3 This file contains the definition for XHCI host controller schedule routines.
5 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #ifndef _EFI_XHCI_SCHED_H_
11 #define _EFI_XHCI_SCHED_H_
13 #define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
14 #define XHC_INIT_DEVICE_SLOT_RETRIES 1
17 // Transfer types, used in URB to identify the transfer type
19 #define XHC_CTRL_TRANSFER 0x01
20 #define XHC_BULK_TRANSFER 0x02
21 #define XHC_INT_TRANSFER_SYNC 0x04
22 #define XHC_INT_TRANSFER_ASYNC 0x08
23 #define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
28 #define TRB_TYPE_NORMAL 1
29 #define TRB_TYPE_SETUP_STAGE 2
30 #define TRB_TYPE_DATA_STAGE 3
31 #define TRB_TYPE_STATUS_STAGE 4
32 #define TRB_TYPE_ISOCH 5
33 #define TRB_TYPE_LINK 6
34 #define TRB_TYPE_EVENT_DATA 7
35 #define TRB_TYPE_NO_OP 8
36 #define TRB_TYPE_EN_SLOT 9
37 #define TRB_TYPE_DIS_SLOT 10
38 #define TRB_TYPE_ADDRESS_DEV 11
39 #define TRB_TYPE_CON_ENDPOINT 12
40 #define TRB_TYPE_EVALU_CONTXT 13
41 #define TRB_TYPE_RESET_ENDPOINT 14
42 #define TRB_TYPE_STOP_ENDPOINT 15
43 #define TRB_TYPE_SET_TR_DEQUE 16
44 #define TRB_TYPE_RESET_DEV 17
45 #define TRB_TYPE_GET_PORT_BANW 21
46 #define TRB_TYPE_FORCE_HEADER 22
47 #define TRB_TYPE_NO_OP_COMMAND 23
48 #define TRB_TYPE_TRANS_EVENT 32
49 #define TRB_TYPE_COMMAND_COMPLT_EVENT 33
50 #define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
51 #define TRB_TYPE_HOST_CONTROLLER_EVENT 37
52 #define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
53 #define TRB_TYPE_MFINDEX_WRAP_EVENT 39
56 // Endpoint Type (EP Type).
58 #define ED_NOT_VALID 0
59 #define ED_ISOCH_OUT 1
61 #define ED_INTERRUPT_OUT 3
62 #define ED_CONTROL_BIDIR 4
65 #define ED_INTERRUPT_IN 7
68 // 6.4.5 TRB Completion Codes
70 #define TRB_COMPLETION_INVALID 0
71 #define TRB_COMPLETION_SUCCESS 1
72 #define TRB_COMPLETION_DATA_BUFFER_ERROR 2
73 #define TRB_COMPLETION_BABBLE_ERROR 3
74 #define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
75 #define TRB_COMPLETION_TRB_ERROR 5
76 #define TRB_COMPLETION_STALL_ERROR 6
77 #define TRB_COMPLETION_SHORT_PACKET 13
78 #define TRB_COMPLETION_STOPPED 26
79 #define TRB_COMPLETION_STOPPED_LENGTH_INVALID 27
82 // The topology string used to present usb device location
84 typedef struct _USB_DEV_TOPOLOGY
{
86 // The tier concatenation of down stream port.
88 UINT32 RouteString
: 20;
90 // The root port number of the chain.
92 UINT32 RootPortNum
: 8;
94 // The Tier the device reside.
100 // USB Device's RouteChart
102 typedef union _USB_DEV_ROUTE
{
104 USB_DEV_TOPOLOGY Route
;
108 // Endpoint address and its capabilities
110 typedef struct _USB_ENDPOINT
{
112 // Store logical device address assigned by UsbBus
113 // It's because some XHCI host controllers may assign the same physcial device
114 // address for those devices inserted at different root port.
119 EFI_USB_DATA_DIRECTION Direction
;
128 typedef struct _TRB_TEMPLATE
{
141 typedef struct _TRANSFER_RING
{
144 TRB_TEMPLATE
*RingEnqueue
;
145 TRB_TEMPLATE
*RingDequeue
;
149 typedef struct _EVENT_RING
{
153 TRB_TEMPLATE
*EventRingEnqueue
;
154 TRB_TEMPLATE
*EventRingDequeue
;
159 // URB (Usb Request Block) contains information for all kinds of
162 typedef struct _URB
{
166 // Usb Device URB related information
169 EFI_USB_DEVICE_REQUEST
*Request
;
174 EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
;
181 // completed data length
185 // Command/Tranfer Ring info
188 TRB_TEMPLATE
*TrbStart
;
189 TRB_TEMPLATE
*TrbEnd
;
195 TRB_TEMPLATE
*EvtTrb
;
199 // 6.5 Event Ring Segment Table
200 // The Event Ring Segment Table is used to define multi-segment Event Rings and to enable runtime
201 // expansion and shrinking of the Event Ring. The location of the Event Ring Segment Table is defined by the
202 // Event Ring Segment Table Base Address Register (5.5.2.3.2). The size of the Event Ring Segment Table
203 // is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
205 typedef struct _EVENT_RING_SEG_TABLE_ENTRY
{
208 UINT32 RingTrbSize
: 16;
211 } EVENT_RING_SEG_TABLE_ENTRY
;
214 // 6.4.1.1 Normal TRB
215 // A Normal TRB is used in several ways; exclusively on Bulk and Interrupt Transfer Rings for normal and
216 // Scatter/Gather operations, to define additional data buffers for Scatter/Gather operations on Isoch Transfer
217 // Rings, and to define the Data stage information for Control Transfer Rings.
219 typedef struct _TRANSFER_TRB_NORMAL
{
226 UINT32 IntTarget
: 10;
239 } TRANSFER_TRB_NORMAL
;
242 // 6.4.1.2.1 Setup Stage TRB
243 // A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
245 typedef struct _TRANSFER_TRB_CONTROL_SETUP
{
246 UINT32 bmRequestType
: 8;
255 UINT32 IntTarget
: 10;
265 } TRANSFER_TRB_CONTROL_SETUP
;
268 // 6.4.1.2.2 Data Stage TRB
269 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
271 typedef struct _TRANSFER_TRB_CONTROL_DATA
{
278 UINT32 IntTarget
: 10;
291 } TRANSFER_TRB_CONTROL_DATA
;
294 // 6.4.1.2.2 Data Stage TRB
295 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
297 typedef struct _TRANSFER_TRB_CONTROL_STATUS
{
302 UINT32 IntTarget
: 10;
313 } TRANSFER_TRB_CONTROL_STATUS
;
316 // 6.4.2.1 Transfer Event TRB
317 // A Transfer Event provides the completion status associated with a Transfer TRB. Refer to section 4.11.3.1
318 // for more information on the use and operation of Transfer Events.
320 typedef struct _EVT_TRB_TRANSFER
{
326 UINT32 Completecode
: 8;
333 UINT32 EndpointId
: 5;
339 // 6.4.2.2 Command Completion Event TRB
340 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
341 // Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
343 typedef struct _EVT_TRB_COMMAND_COMPLETION
{
349 UINT32 Completecode
: 8;
356 } EVT_TRB_COMMAND_COMPLETION
;
359 TRB_TEMPLATE TrbTemplate
;
360 TRANSFER_TRB_NORMAL TrbNormal
;
361 TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup
;
362 TRANSFER_TRB_CONTROL_DATA TrbCtrData
;
363 TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus
;
367 // 6.4.3.1 No Op Command TRB
368 // The No Op Command TRB provides a simple means for verifying the operation of the Command Ring
369 // mechanisms offered by the xHCI.
371 typedef struct _CMD_TRB_NO_OP
{
383 // 6.4.3.2 Enable Slot Command TRB
384 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
385 // selected slot to the host in a Command Completion Event.
387 typedef struct _CMD_TRB_ENABLE_SLOT
{
396 } CMD_TRB_ENABLE_SLOT
;
399 // 6.4.3.3 Disable Slot Command TRB
400 // The Disable Slot Command TRB releases any bandwidth assigned to the disabled slot and frees any
401 // internal xHC resources assigned to the slot.
403 typedef struct _CMD_TRB_DISABLE_SLOT
{
413 } CMD_TRB_DISABLE_SLOT
;
416 // 6.4.3.4 Address Device Command TRB
417 // The Address Device Command TRB transitions the selected Device Context from the Default to the
418 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
419 // issue a SET_ADDRESS request to the USB device.
421 typedef struct _CMD_TRB_ADDRESS_DEVICE
{
434 } CMD_TRB_ADDRESS_DEVICE
;
437 // 6.4.3.5 Configure Endpoint Command TRB
438 // The Configure Endpoint Command TRB evaluates the bandwidth and resource requirements of the
439 // endpoints selected by the command.
441 typedef struct _CMD_TRB_CONFIG_ENDPOINT
{
454 } CMD_TRB_CONFIG_ENDPOINT
;
457 // 6.4.3.6 Evaluate Context Command TRB
458 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
459 // Context data structures in the Device Context have been modified by system software and that the xHC
460 // shall evaluate any changes
462 typedef struct _CMD_TRB_EVALUATE_CONTEXT
{
474 } CMD_TRB_EVALUATE_CONTEXT
;
477 // 6.4.3.7 Reset Endpoint Command TRB
478 // The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
480 typedef struct _CMD_TRB_RESET_ENDPOINT
{
492 } CMD_TRB_RESET_ENDPOINT
;
495 // 6.4.3.8 Stop Endpoint Command TRB
496 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
497 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
499 typedef struct _CMD_TRB_STOP_ENDPOINT
{
511 } CMD_TRB_STOP_ENDPOINT
;
514 // 6.4.3.9 Set TR Dequeue Pointer Command TRB
515 // The Set TR Dequeue Pointer Command TRB is used by system software to modify the TR Dequeue
516 // Pointer and DCS fields of an Endpoint or Stream Context.
518 typedef struct _CMD_SET_TR_DEQ_POINTER
{
524 UINT32 StreamID
: 16;
532 } CMD_SET_TR_DEQ_POINTER
;
536 // A Link TRB provides support for non-contiguous TRB Rings.
538 typedef struct _LINK_TRB
{
544 UINT32 InterTarget
: 10;
557 // 6.2.2 Slot Context
559 typedef struct _SLOT_CONTEXT
{
560 UINT32 RouteString
: 20;
565 UINT32 ContextEntries
: 5;
567 UINT32 MaxExitLatency
: 16;
568 UINT32 RootHubPortNum
: 8;
571 UINT32 TTHubSlotId
: 8;
572 UINT32 TTPortNum
: 8;
575 UINT32 InterTarget
: 10;
577 UINT32 DeviceAddress
: 8;
579 UINT32 SlotState
: 5;
587 typedef struct _SLOT_CONTEXT_64
{
588 UINT32 RouteString
: 20;
593 UINT32 ContextEntries
: 5;
595 UINT32 MaxExitLatency
: 16;
596 UINT32 RootHubPortNum
: 8;
599 UINT32 TTHubSlotId
: 8;
600 UINT32 TTPortNum
: 8;
603 UINT32 InterTarget
: 10;
605 UINT32 DeviceAddress
: 8;
607 UINT32 SlotState
: 5;
626 // 6.2.3 Endpoint Context
628 typedef struct _ENDPOINT_CONTEXT
{
632 UINT32 MaxPStreams
: 5;
642 UINT32 MaxBurstSize
: 8;
643 UINT32 MaxPacketSize
: 16;
649 UINT32 AverageTRBLength
: 16;
650 UINT32 MaxESITPayload
: 16;
657 typedef struct _ENDPOINT_CONTEXT_64
{
661 UINT32 MaxPStreams
: 5;
671 UINT32 MaxBurstSize
: 8;
672 UINT32 MaxPacketSize
: 16;
678 UINT32 AverageTRBLength
: 16;
679 UINT32 MaxESITPayload
: 16;
694 } ENDPOINT_CONTEXT_64
;
697 // 6.2.5.1 Input Control Context
699 typedef struct _INPUT_CONTRL_CONTEXT
{
708 } INPUT_CONTRL_CONTEXT
;
710 typedef struct _INPUT_CONTRL_CONTEXT_64
{
727 } INPUT_CONTRL_CONTEXT_64
;
730 // 6.2.1 Device Context
732 typedef struct _DEVICE_CONTEXT
{
734 ENDPOINT_CONTEXT EP
[31];
737 typedef struct _DEVICE_CONTEXT_64
{
738 SLOT_CONTEXT_64 Slot
;
739 ENDPOINT_CONTEXT_64 EP
[31];
743 // 6.2.5 Input Context
745 typedef struct _INPUT_CONTEXT
{
746 INPUT_CONTRL_CONTEXT InputControlContext
;
748 ENDPOINT_CONTEXT EP
[31];
751 typedef struct _INPUT_CONTEXT_64
{
752 INPUT_CONTRL_CONTEXT_64 InputControlContext
;
753 SLOT_CONTEXT_64 Slot
;
754 ENDPOINT_CONTEXT_64 EP
[31];
758 Initialize the XHCI host controller for schedule.
760 @param Xhc The XHCI Instance to be initialized.
765 IN USB_XHCI_INSTANCE
*Xhc
769 Free the resouce allocated at initializing schedule.
771 @param Xhc The XHCI Instance.
776 IN USB_XHCI_INSTANCE
*Xhc
780 Ring the door bell to notify XHCI there is a transaction to be executed through URB.
782 @param Xhc The XHCI Instance.
783 @param Urb The URB to be rung.
785 @retval EFI_SUCCESS Successfully ring the door bell.
789 RingIntTransferDoorBell (
790 IN USB_XHCI_INSTANCE
*Xhc
,
795 Execute the transfer by polling the URB. This is a synchronous operation.
797 @param Xhc The XHCI Instance.
798 @param CmdTransfer The executed URB is for cmd transfer or not.
799 @param Urb The URB to execute.
800 @param Timeout The time to wait before abort, in millisecond.
802 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
803 @return EFI_TIMEOUT The transfer failed due to time out.
804 @return EFI_SUCCESS The transfer finished OK.
809 IN USB_XHCI_INSTANCE
*Xhc
,
810 IN BOOLEAN CmdTransfer
,
816 Delete a single asynchronous interrupt transfer for
817 the device and endpoint.
819 @param Xhc The XHCI Instance.
820 @param BusAddr The logical device address assigned by UsbBus driver.
821 @param EpNum The endpoint of the target.
823 @retval EFI_SUCCESS An asynchronous transfer is removed.
824 @retval EFI_NOT_FOUND No transfer for the device is found.
828 XhciDelAsyncIntTransfer (
829 IN USB_XHCI_INSTANCE
*Xhc
,
835 Remove all the asynchronous interrupt transfers.
837 @param Xhc The XHCI Instance.
841 XhciDelAllAsyncIntTransfers (
842 IN USB_XHCI_INSTANCE
*Xhc
846 Insert a single asynchronous interrupt transfer for
847 the device and endpoint.
849 @param Xhc The XHCI Instance
850 @param BusAddr The logical device address assigned by UsbBus driver
851 @param EpAddr Endpoint addrress
852 @param DevSpeed The device speed
853 @param MaxPacket The max packet length of the endpoint
854 @param DataLen The length of data buffer
855 @param Callback The function to call when data is transferred
856 @param Context The context to the callback
858 @return Created URB or NULL
862 XhciInsertAsyncIntTransfer (
863 IN USB_XHCI_INSTANCE
*Xhc
,
869 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
876 @param Xhc The XHCI Instance.
880 XhcSetBiosOwnership (
881 IN USB_XHCI_INSTANCE
*Xhc
887 @param Xhc The XHCI Instance.
891 XhcClearBiosOwnership (
892 IN USB_XHCI_INSTANCE
*Xhc
896 Find out the slot id according to the device's route string.
898 @param Xhc The XHCI Instance.
899 @param RouteString The route string described the device location.
901 @return The slot id used by the device.
906 XhcRouteStringToSlotId (
907 IN USB_XHCI_INSTANCE
*Xhc
,
908 IN USB_DEV_ROUTE RouteString
912 Calculate the device context index by endpoint address and direction.
914 @param EpAddr The target endpoint number.
915 @param Direction The direction of the target endpoint.
917 @return The device context index of endpoint.
927 Ring the door bell to notify XHCI there is a transaction to be executed.
929 @param Xhc The XHCI Instance.
930 @param SlotId The slot id of the target device.
931 @param Dci The device context index of the target slot or endpoint.
933 @retval EFI_SUCCESS Successfully ring the door bell.
939 IN USB_XHCI_INSTANCE
*Xhc
,
945 Interrupt transfer periodic check handler.
947 @param Event Interrupt event.
948 @param Context Pointer to USB_XHCI_INSTANCE.
953 XhcMonitorAsyncRequests (
959 Monitor the port status change. Enable/Disable device slot if there is a device attached/detached.
961 @param Xhc The XHCI Instance.
962 @param ParentRouteChart The route string pointed to the parent device if it exists.
963 @param Port The port to be polled.
964 @param PortState The port state.
966 @retval EFI_SUCCESS Successfully enable/disable device slot according to port state.
967 @retval Others Should not appear.
972 XhcPollPortStatusChange (
973 IN USB_XHCI_INSTANCE
*Xhc
,
974 IN USB_DEV_ROUTE ParentRouteChart
,
976 IN EFI_USB_PORT_STATUS
*PortState
980 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
982 @param Xhc The XHCI Instance.
983 @param SlotId The slot id to be configured.
984 @param PortNum The total number of downstream port supported by the hub.
985 @param TTT The TT think time of the hub device.
986 @param MTT The multi-TT of the hub device.
988 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
992 XhcConfigHubContext (
993 IN USB_XHCI_INSTANCE
*Xhc
,
1001 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
1003 @param Xhc The XHCI Instance.
1004 @param SlotId The slot id to be configured.
1005 @param PortNum The total number of downstream port supported by the hub.
1006 @param TTT The TT think time of the hub device.
1007 @param MTT The multi-TT of the hub device.
1009 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
1013 XhcConfigHubContext64 (
1014 IN USB_XHCI_INSTANCE
*Xhc
,
1022 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1024 @param Xhc The XHCI Instance.
1025 @param SlotId The slot id to be configured.
1026 @param DeviceSpeed The device's speed.
1027 @param ConfigDesc The pointer to the usb device configuration descriptor.
1029 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1035 IN USB_XHCI_INSTANCE
*Xhc
,
1037 IN UINT8 DeviceSpeed
,
1038 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1042 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1044 @param Xhc The XHCI Instance.
1045 @param SlotId The slot id to be configured.
1046 @param DeviceSpeed The device's speed.
1047 @param ConfigDesc The pointer to the usb device configuration descriptor.
1049 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1055 IN USB_XHCI_INSTANCE
*Xhc
,
1057 IN UINT8 DeviceSpeed
,
1058 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1062 Set interface through XHCI's Configure_Endpoint cmd.
1064 @param Xhc The XHCI Instance.
1065 @param SlotId The slot id to be configured.
1066 @param DeviceSpeed The device's speed.
1067 @param ConfigDesc The pointer to the usb device configuration descriptor.
1068 @param Request USB device request to send.
1070 @retval EFI_SUCCESS Successfully set interface.
1076 IN USB_XHCI_INSTANCE
*Xhc
,
1078 IN UINT8 DeviceSpeed
,
1079 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
,
1080 IN EFI_USB_DEVICE_REQUEST
*Request
1084 Set interface through XHCI's Configure_Endpoint cmd.
1086 @param Xhc The XHCI Instance.
1087 @param SlotId The slot id to be configured.
1088 @param DeviceSpeed The device's speed.
1089 @param ConfigDesc The pointer to the usb device configuration descriptor.
1090 @param Request USB device request to send.
1092 @retval EFI_SUCCESS Successfully set interface.
1098 IN USB_XHCI_INSTANCE
*Xhc
,
1100 IN UINT8 DeviceSpeed
,
1101 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
,
1102 IN EFI_USB_DEVICE_REQUEST
*Request
1106 Find out the actual device address according to the requested device address from UsbBus.
1108 @param Xhc The XHCI Instance.
1109 @param BusDevAddr The requested device address by UsbBus upper driver.
1111 @return The actual device address assigned to the device.
1116 XhcBusDevAddrToSlotId (
1117 IN USB_XHCI_INSTANCE
*Xhc
,
1122 Assign and initialize the device slot for a new device.
1124 @param Xhc The XHCI Instance.
1125 @param ParentRouteChart The route string pointed to the parent device.
1126 @param ParentPort The port at which the device is located.
1127 @param RouteChart The route string pointed to the device.
1128 @param DeviceSpeed The device speed.
1130 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1135 XhcInitializeDeviceSlot (
1136 IN USB_XHCI_INSTANCE
*Xhc
,
1137 IN USB_DEV_ROUTE ParentRouteChart
,
1138 IN UINT16 ParentPort
,
1139 IN USB_DEV_ROUTE RouteChart
,
1140 IN UINT8 DeviceSpeed
1144 Assign and initialize the device slot for a new device.
1146 @param Xhc The XHCI Instance.
1147 @param ParentRouteChart The route string pointed to the parent device.
1148 @param ParentPort The port at which the device is located.
1149 @param RouteChart The route string pointed to the device.
1150 @param DeviceSpeed The device speed.
1152 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1157 XhcInitializeDeviceSlot64 (
1158 IN USB_XHCI_INSTANCE
*Xhc
,
1159 IN USB_DEV_ROUTE ParentRouteChart
,
1160 IN UINT16 ParentPort
,
1161 IN USB_DEV_ROUTE RouteChart
,
1162 IN UINT8 DeviceSpeed
1166 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1168 @param Xhc The XHCI Instance.
1169 @param SlotId The slot id to be evaluated.
1170 @param MaxPacketSize The max packet size supported by the device control transfer.
1172 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1177 XhcEvaluateContext (
1178 IN USB_XHCI_INSTANCE
*Xhc
,
1180 IN UINT32 MaxPacketSize
1184 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1186 @param Xhc The XHCI Instance.
1187 @param SlotId The slot id to be evaluated.
1188 @param MaxPacketSize The max packet size supported by the device control transfer.
1190 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1195 XhcEvaluateContext64 (
1196 IN USB_XHCI_INSTANCE
*Xhc
,
1198 IN UINT32 MaxPacketSize
1202 Disable the specified device slot.
1204 @param Xhc The XHCI Instance.
1205 @param SlotId The slot id to be disabled.
1207 @retval EFI_SUCCESS Successfully disable the device slot.
1213 IN USB_XHCI_INSTANCE
*Xhc
,
1218 Disable the specified device slot.
1220 @param Xhc The XHCI Instance.
1221 @param SlotId The slot id to be disabled.
1223 @retval EFI_SUCCESS Successfully disable the device slot.
1228 XhcDisableSlotCmd64 (
1229 IN USB_XHCI_INSTANCE
*Xhc
,
1234 Synchronize the specified transfer ring to update the enqueue and dequeue pointer.
1236 @param Xhc The XHCI Instance.
1237 @param TrsRing The transfer ring to sync.
1239 @retval EFI_SUCCESS The transfer ring is synchronized successfully.
1245 IN USB_XHCI_INSTANCE
*Xhc
,
1246 TRANSFER_RING
*TrsRing
1250 Synchronize the specified event ring to update the enqueue and dequeue pointer.
1252 @param Xhc The XHCI Instance.
1253 @param EvtRing The event ring to sync.
1255 @retval EFI_SUCCESS The event ring is synchronized successfully.
1261 IN USB_XHCI_INSTANCE
*Xhc
,
1266 Check if there is a new generated event.
1268 @param Xhc The XHCI Instance.
1269 @param EvtRing The event ring to check.
1270 @param NewEvtTrb The new event TRB found.
1272 @retval EFI_SUCCESS Found a new event TRB at the event ring.
1273 @retval EFI_NOT_READY The event ring has no new event.
1279 IN USB_XHCI_INSTANCE
*Xhc
,
1280 IN EVENT_RING
*EvtRing
,
1281 OUT TRB_TEMPLATE
**NewEvtTrb
1285 Create XHCI transfer ring.
1287 @param Xhc The XHCI Instance.
1288 @param TrbNum The number of TRB in the ring.
1289 @param TransferRing The created transfer ring.
1293 CreateTransferRing (
1294 IN USB_XHCI_INSTANCE
*Xhc
,
1296 OUT TRANSFER_RING
*TransferRing
1300 Create XHCI event ring.
1302 @param Xhc The XHCI Instance.
1303 @param EventRing The created event ring.
1308 IN USB_XHCI_INSTANCE
*Xhc
,
1309 OUT EVENT_RING
*EventRing
1313 System software shall use a Reset Endpoint Command (section 4.11.4.7) to remove the Halted
1314 condition in the xHC. After the successful completion of the Reset Endpoint Command, the Endpoint
1315 Context is transitioned from the Halted to the Stopped state and the Transfer Ring of the endpoint is
1316 reenabled. The next write to the Doorbell of the Endpoint will transition the Endpoint Context from the
1317 Stopped to the Running state.
1319 @param Xhc The XHCI Instance.
1320 @param Urb The urb which makes the endpoint halted.
1322 @retval EFI_SUCCESS The recovery is successful.
1323 @retval Others Failed to recovery halted endpoint.
1328 XhcRecoverHaltedEndpoint (
1329 IN USB_XHCI_INSTANCE
*Xhc
,
1334 System software shall use a Stop Endpoint Command (section 4.6.9) and the Set TR Dequeue Pointer
1335 Command (section 4.6.10) to remove the timed-out TDs from the xHC transfer ring. The next write to
1336 the Doorbell of the Endpoint will transition the Endpoint Context from the Stopped to the Running
1339 @param Xhc The XHCI Instance.
1340 @param Urb The urb which doesn't get completed in a specified timeout range.
1342 @retval EFI_SUCCESS The dequeuing of the TDs is successful.
1343 @retval Others Failed to stop the endpoint and dequeue the TDs.
1348 XhcDequeueTrbFromEndpoint (
1349 IN USB_XHCI_INSTANCE
*Xhc
,
1354 Stop endpoint through XHCI's Stop_Endpoint cmd.
1356 @param Xhc The XHCI Instance.
1357 @param SlotId The slot id to be configured.
1358 @param Dci The device context index of endpoint.
1359 @param PendingUrb The pending URB to check completion status when stopping the end point.
1361 @retval EFI_SUCCESS Stop endpoint successfully.
1362 @retval Others Failed to stop endpoint.
1368 IN USB_XHCI_INSTANCE
*Xhc
,
1371 IN URB
*PendingUrb OPTIONAL
1375 Reset endpoint through XHCI's Reset_Endpoint cmd.
1377 @param Xhc The XHCI Instance.
1378 @param SlotId The slot id to be configured.
1379 @param Dci The device context index of endpoint.
1381 @retval EFI_SUCCESS Reset endpoint successfully.
1382 @retval Others Failed to reset endpoint.
1388 IN USB_XHCI_INSTANCE
*Xhc
,
1394 Set transfer ring dequeue pointer through XHCI's Set_Tr_Dequeue_Pointer cmd.
1396 @param Xhc The XHCI Instance.
1397 @param SlotId The slot id to be configured.
1398 @param Dci The device context index of endpoint.
1399 @param Urb The dequeue pointer of the transfer ring specified
1400 by the urb to be updated.
1402 @retval EFI_SUCCESS Set transfer ring dequeue pointer succeeds.
1403 @retval Others Failed to set transfer ring dequeue pointer.
1408 XhcSetTrDequeuePointer (
1409 IN USB_XHCI_INSTANCE
*Xhc
,
1416 Create a new URB for a new transaction.
1418 @param Xhc The XHCI Instance
1419 @param DevAddr The device address
1420 @param EpAddr Endpoint addrress
1421 @param DevSpeed The device speed
1422 @param MaxPacket The max packet length of the endpoint
1423 @param Type The transaction type
1424 @param Request The standard USB request for control transfer
1425 @param Data The user data to transfer
1426 @param DataLen The length of data buffer
1427 @param Callback The function to call when data is transferred
1428 @param Context The context to the callback
1430 @return Created URB or NULL
1435 IN USB_XHCI_INSTANCE
*Xhc
,
1441 IN EFI_USB_DEVICE_REQUEST
*Request
,
1444 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
1449 Free an allocated URB.
1451 @param Xhc The XHCI device.
1452 @param Urb The URB to free.
1457 IN USB_XHCI_INSTANCE
*Xhc
,
1462 Create a transfer TRB.
1464 @param Xhc The XHCI Instance
1465 @param Urb The urb used to construct the transfer TRB.
1467 @return Created TRB or NULL
1471 XhcCreateTransferTrb (
1472 IN USB_XHCI_INSTANCE
*Xhc
,