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MdeModulePkg XhciPei/UsbBusPei: Add XHCI recovery support.
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1 /** @file
2 Private Header file for Usb Host Controller PEIM
3
4 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions
8 of the BSD License which accompanies this distribution. The
9 full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef _RECOVERY_XHC_H_
18 #define _RECOVERY_XHC_H_
19
20 #include <PiPei.h>
21
22 #include <Ppi/UsbController.h>
23 #include <Ppi/Usb2HostController.h>
24
25 #include <Library/DebugLib.h>
26 #include <Library/PeimEntryPoint.h>
27 #include <Library/PeiServicesLib.h>
28 #include <Library/BaseMemoryLib.h>
29 #include <Library/TimerLib.h>
30 #include <Library/IoLib.h>
31 #include <Library/MemoryAllocationLib.h>
32
33 typedef struct _PEI_XHC_DEV PEI_XHC_DEV;
34 typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
35
36 #include "UsbHcMem.h"
37 #include "XhciReg.h"
38 #include "XhciSched.h"
39
40 #define CMD_RING_TRB_NUMBER 0x100
41 #define TR_RING_TRB_NUMBER 0x100
42 #define ERST_NUMBER 0x01
43 #define EVENT_RING_TRB_NUMBER 0x200
44
45 #define XHC_1_MICROSECOND 1
46 #define XHC_1_MILLISECOND (1000 * XHC_1_MICROSECOND)
47 #define XHC_1_SECOND (1000 * XHC_1_MILLISECOND)
48
49 //
50 // XHC reset timeout experience values.
51 // The unit is microsecond, setting it as 1s.
52 //
53 #define XHC_RESET_TIMEOUT (1 * XHC_1_SECOND)
54 //
55 // XHC delay experience value for polling operation.
56 // The unit is microsecond, set it as 1ms.
57 //
58 #define XHC_POLL_DELAY (1 * XHC_1_MILLISECOND)
59
60 //
61 // Wait for root port state stable.
62 //
63 #define XHC_ROOT_PORT_STATE_STABLE (200 * XHC_1_MILLISECOND)
64
65 #define XHC_GENERIC_TIMEOUT (10 * XHC_1_MILLISECOND)
66
67 #define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
68 #define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
69 #define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
70
71 #define XHC_REG_BIT_IS_SET(XHC, Offset, Bit) \
72 (XHC_BIT_IS_SET(XhcPeiReadOpReg ((XHC), (Offset)), (Bit)))
73
74 #define USB_DESC_TYPE_HUB 0x29
75 #define USB_DESC_TYPE_HUB_SUPER_SPEED 0x2a
76
77 //
78 // The RequestType in EFI_USB_DEVICE_REQUEST is composed of
79 // three fields: One bit direction, 2 bit type, and 5 bit
80 // target.
81 //
82 #define USB_REQUEST_TYPE(Dir, Type, Target) \
83 ((UINT8)((((Dir) == EfiUsbDataIn ? 0x01 : 0) << 7) | (Type) | (Target)))
84
85 struct _USB_DEV_CONTEXT {
86 //
87 // Whether this entry in UsbDevContext array is used or not.
88 //
89 BOOLEAN Enabled;
90 //
91 // The slot id assigned to the new device through XHCI's Enable_Slot cmd.
92 //
93 UINT8 SlotId;
94 //
95 // The route string presented an attached usb device.
96 //
97 USB_DEV_ROUTE RouteString;
98 //
99 // The route string of parent device if it exists. Otherwise it's zero.
100 //
101 USB_DEV_ROUTE ParentRouteString;
102 //
103 // The actual device address assigned by XHCI through Address_Device command.
104 //
105 UINT8 XhciDevAddr;
106 //
107 // The requested device address from UsbBus driver through Set_Address standard usb request.
108 // As XHCI spec replaces this request with Address_Device command, we have to record the
109 // requested device address and establish a mapping relationship with the actual device address.
110 // Then UsbBus driver just need to be aware of the requested device address to access usb device
111 // through EFI_USB2_HC_PROTOCOL. Xhci driver would be responsible for translating it to actual
112 // device address and access the actual device.
113 //
114 UINT8 BusDevAddr;
115 //
116 // The pointer to the input device context.
117 //
118 VOID *InputContext;
119 //
120 // The pointer to the output device context.
121 //
122 VOID *OutputContext;
123 //
124 // The transfer queue for every endpoint.
125 //
126 VOID *EndpointTransferRing[31];
127 //
128 // The device descriptor which is stored to support XHCI's Evaluate_Context cmd.
129 //
130 EFI_USB_DEVICE_DESCRIPTOR DevDesc;
131 //
132 // As a usb device may include multiple configuration descriptors, we dynamically allocate an array
133 // to store them.
134 // Note that every configuration descriptor stored here includes those lower level descriptors,
135 // such as Interface descriptor, Endpoint descriptor, and so on.
136 // These information is used to support XHCI's Config_Endpoint cmd.
137 //
138 EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;
139 };
140
141 #define USB_XHC_DEV_SIGNATURE SIGNATURE_32 ('x', 'h', 'c', 'i')
142
143 struct _PEI_XHC_DEV {
144 UINTN Signature;
145 PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;
146 EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
147 UINT32 UsbHostControllerBaseAddress;
148 USBHC_MEM_POOL *MemPool;
149
150 //
151 // XHCI configuration data
152 //
153 UINT8 CapLength; ///< Capability Register Length
154 XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1
155 XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2
156 XHC_HCCPARAMS HcCParams; ///< Capability Parameters
157 UINT32 DBOff; ///< Doorbell Offset
158 UINT32 RTSOff; ///< Runtime Register Space Offset
159 UINT32 PageSize;
160 UINT32 MaxScratchpadBufs;
161 UINT64 *ScratchBuf;
162 UINT64 *ScratchEntry;
163 UINT64 *DCBAA;
164 UINT32 MaxSlotsEn;
165 //
166 // Cmd Transfer Ring
167 //
168 TRANSFER_RING CmdRing;
169 //
170 // EventRing
171 //
172 EVENT_RING EventRing;
173
174 //
175 // Store device contexts managed by XHCI device
176 // The array supports up to 255 devices, entry 0 is reserved and should not be used.
177 //
178 USB_DEV_CONTEXT UsbDevContext[256];
179 };
180
181 #define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS(a) CR (a, PEI_XHC_DEV, Usb2HostControllerPpi, USB_XHC_DEV_SIGNATURE)
182
183 /**
184 Initialize the memory management pool for the host controller.
185
186 @return Pointer to the allocated memory pool or NULL if failed.
187
188 **/
189 USBHC_MEM_POOL *
190 UsbHcInitMemPool (
191 VOID
192 )
193 ;
194
195 /**
196 Release the memory management pool.
197
198 @param Pool The USB memory pool to free.
199
200 **/
201 VOID
202 UsbHcFreeMemPool (
203 IN USBHC_MEM_POOL *Pool
204 )
205 ;
206
207 /**
208 Allocate some memory from the host controller's memory pool
209 which can be used to communicate with host controller.
210
211 @param Pool The host controller's memory pool.
212 @param Size Size of the memory to allocate.
213
214 @return The allocated memory or NULL.
215
216 **/
217 VOID *
218 UsbHcAllocateMem (
219 IN USBHC_MEM_POOL *Pool,
220 IN UINTN Size
221 )
222 ;
223
224 /**
225 Free the allocated memory back to the memory pool.
226
227 @param Pool The memory pool of the host controller.
228 @param Mem The memory to free.
229 @param Size The size of the memory to free.
230
231 **/
232 VOID
233 UsbHcFreeMem (
234 IN USBHC_MEM_POOL *Pool,
235 IN VOID *Mem,
236 IN UINTN Size
237 )
238 ;
239
240 #endif