Enable Nt32 platform boot to DXE phase.
[mirror_edk2.git] / MdeModulePkg / Core / DxeIplPeim / Ia32 / VirtualMemory.c
1 /*++
2
3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 Module Name:
13 VirtualMemory.c
14
15 Abstract:
16
17 x64 Virtual Memory Management Services in the form of an IA-32 driver.
18 Used to establish a 1:1 Virtual to Physical Mapping that is required to
19 enter Long Mode (x64 64-bit mode).
20
21 While we make a 1:1 mapping (identity mapping) for all physical pages
22 we still need to use the MTRR's to ensure that the cachability attirbutes
23 for all memory regions is correct.
24
25 The basic idea is to use 2MB page table entries where ever possible. If
26 more granularity of cachability is required then 4K page tables are used.
27
28 References:
29 1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel
30 2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
31 3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
32
33 --*/
34
35 //
36 // Include common header file for this module.
37 //
38 #include "CommonHeader.h"
39
40 #include "VirtualMemory.h"
41
42 UINTN
43 CreateIdentityMappingPageTables (
44 VOID
45 )
46 /*++
47
48 Routine Description:
49
50 Allocates and fills in the Page Directory and Page Table Entries to
51 establish a 1:1 Virtual to Physical mapping.
52
53 Arguments:
54
55 NumberOfProcessorPhysicalAddressBits - Number of processor address bits to use.
56 Limits the number of page table entries
57 to the physical address space.
58
59 Returns:
60
61 EFI_SUCCESS The 1:1 Virtual to Physical identity mapping was created
62
63 --*/
64 {
65 UINT8 PhysicalAddressBits;
66 EFI_PHYSICAL_ADDRESS PageAddress;
67 UINTN IndexOfPml4Entries;
68 UINTN IndexOfPdpEntries;
69 UINTN IndexOfPageDirectoryEntries;
70 UINTN NumberOfPml4EntriesNeeded;
71 UINTN NumberOfPdpEntriesNeeded;
72 PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
73 PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
74 PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
75 PAGE_TABLE_ENTRY *PageDirectoryEntry;
76 UINTN TotalPagesNum;
77 UINTN BigPageAddress;
78 VOID *Hob;
79
80 //
81 // Get physical address bits supported from CPU HOB.
82 //
83 PhysicalAddressBits = 36;
84
85 Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
86 if (Hob != NULL) {
87 PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
88 }
89
90 //
91 // Calculate the table entries needed.
92 //
93 if (PhysicalAddressBits <= 39 ) {
94 NumberOfPml4EntriesNeeded = 1;
95 NumberOfPdpEntriesNeeded = 1 << (PhysicalAddressBits - 30);
96 } else {
97 NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);
98 NumberOfPdpEntriesNeeded = 512;
99 }
100
101 //
102 // Pre-allocate big pages to avoid later allocations.
103 //
104 TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;
105 BigPageAddress = (UINTN) AllocatePages (TotalPagesNum);
106 ASSERT (BigPageAddress != 0);
107
108 //
109 // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
110 //
111 PageMap = (VOID *) BigPageAddress;
112 BigPageAddress += EFI_PAGE_SIZE;
113
114 PageMapLevel4Entry = PageMap;
115 PageAddress = 0;
116 for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
117 //
118 // Each PML4 entry points to a page of Page Directory Pointer entires.
119 // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
120 //
121 PageDirectoryPointerEntry = (VOID *) BigPageAddress;
122 BigPageAddress += EFI_PAGE_SIZE;
123
124 //
125 // Make a PML4 Entry
126 //
127 PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
128 PageMapLevel4Entry->Bits.ReadWrite = 1;
129 PageMapLevel4Entry->Bits.Present = 1;
130
131 for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
132 //
133 // Each Directory Pointer entries points to a page of Page Directory entires.
134 // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
135 //
136 PageDirectoryEntry = (VOID *) BigPageAddress;
137 BigPageAddress += EFI_PAGE_SIZE;
138
139 //
140 // Fill in a Page Directory Pointer Entries
141 //
142 PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
143 PageDirectoryPointerEntry->Bits.ReadWrite = 1;
144 PageDirectoryPointerEntry->Bits.Present = 1;
145
146 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {
147 //
148 // Fill in the Page Directory entries
149 //
150 PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
151 PageDirectoryEntry->Bits.ReadWrite = 1;
152 PageDirectoryEntry->Bits.Present = 1;
153 PageDirectoryEntry->Bits.MustBe1 = 1;
154
155 }
156 }
157 }
158
159 //
160 // For the PML4 entries we are not using fill in a null entry.
161 // For now we just copy the first entry.
162 //
163 for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {
164 CopyMem (
165 PageMapLevel4Entry,
166 PageMap,
167 sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
168 );
169 }
170
171 return (UINTN)PageMap; // FIXME
172 }
173