2 x64-specifc functionality for DxeLoad.
4 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include "X64/VirtualMemory.h"
21 Transfers control to DxeCore.
23 This function performs a CPU architecture specific operations to execute
24 the entry point of DxeCore with the parameters of HobList.
25 It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
27 @param DxeCoreEntryPoint The entry point of DxeCore.
28 @param HobList The start of HobList passed to DxeCore.
33 IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint
,
34 IN EFI_PEI_HOB_POINTERS HobList
42 EFI_VECTOR_HANDOFF_INFO
*VectorInfo
;
43 EFI_PEI_VECTOR_HANDOFF_INFO_PPI
*VectorHandoffInfoPpi
;
45 if (IsNullDetectionEnabled ()) {
46 ClearFirst4KPage (HobList
.Raw
);
50 // Get Vector Hand-off Info PPI and build Guided HOB
52 Status
= PeiServicesLocatePpi (
53 &gEfiVectorHandoffInfoPpiGuid
,
56 (VOID
**)&VectorHandoffInfoPpi
58 if (Status
== EFI_SUCCESS
) {
59 DEBUG ((EFI_D_INFO
, "Vector Hand-off Info PPI is gotten, GUIDed HOB is created!\n"));
60 VectorInfo
= VectorHandoffInfoPpi
->Info
;
62 while (VectorInfo
->Attribute
!= EFI_VECTOR_HANDOFF_LAST_ENTRY
) {
67 &gEfiVectorHandoffInfoPpiGuid
,
68 VectorHandoffInfoPpi
->Info
,
69 sizeof (EFI_VECTOR_HANDOFF_INFO
) * Index
74 // Allocate 128KB for the Stack
76 BaseOfStack
= AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE
));
77 ASSERT (BaseOfStack
!= NULL
);
80 // Compute the top of the stack we were allocated. Pre-allocate a UINTN
83 TopOfStack
= (VOID
*) ((UINTN
) BaseOfStack
+ EFI_SIZE_TO_PAGES (STACK_SIZE
) * EFI_PAGE_SIZE
- CPU_STACK_ALIGNMENT
);
84 TopOfStack
= ALIGN_POINTER (TopOfStack
, CPU_STACK_ALIGNMENT
);
87 if (FeaturePcdGet (PcdDxeIplBuildPageTables
)) {
89 // Create page table and save PageMapLevel4 to CR3
91 PageTables
= CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS
) (UINTN
) BaseOfStack
, STACK_SIZE
);
94 // Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
95 // for the DxeIpl and the DxeCore are both X64.
97 ASSERT (PcdGetBool (PcdSetNxForStack
) == FALSE
);
98 ASSERT (PcdGetBool (PcdCpuStackGuard
) == FALSE
);
102 // End of PEI phase signal
104 Status
= PeiServicesInstallPpi (&gEndOfPeiSignalPpi
);
105 ASSERT_EFI_ERROR (Status
);
107 if (FeaturePcdGet (PcdDxeIplBuildPageTables
)) {
108 AsmWriteCr3 (PageTables
);
112 // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
114 UpdateStackHob ((EFI_PHYSICAL_ADDRESS
)(UINTN
) BaseOfStack
, STACK_SIZE
);
117 // Transfer the control to the entry point of DxeCore.
120 (SWITCH_STACK_ENTRY_POINT
)(UINTN
)DxeCoreEntryPoint
,