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[mirror_edk2.git] / MdeModulePkg / Core / DxeIplPeim / X64 / DxeLoadFunc.c
1 /** @file
2 x64-specifc functionality for DxeLoad.
3
4 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include "DxeIpl.h"
10 #include "X64/VirtualMemory.h"
11
12 /**
13 Transfers control to DxeCore.
14
15 This function performs a CPU architecture specific operations to execute
16 the entry point of DxeCore with the parameters of HobList.
17 It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
18
19 @param DxeCoreEntryPoint The entry point of DxeCore.
20 @param HobList The start of HobList passed to DxeCore.
21
22 **/
23 VOID
24 HandOffToDxeCore (
25 IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
26 IN EFI_PEI_HOB_POINTERS HobList
27 )
28 {
29 VOID *BaseOfStack;
30 VOID *TopOfStack;
31 EFI_STATUS Status;
32 UINTN PageTables;
33 UINT32 Index;
34 EFI_VECTOR_HANDOFF_INFO *VectorInfo;
35 EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;
36 VOID *GhcbBase;
37 UINTN GhcbSize;
38
39 //
40 // Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
41 //
42 if (IsNullDetectionEnabled ()) {
43 ClearFirst4KPage (HobList.Raw);
44 BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
45 }
46
47 //
48 // Get Vector Hand-off Info PPI and build Guided HOB
49 //
50 Status = PeiServicesLocatePpi (
51 &gEfiVectorHandoffInfoPpiGuid,
52 0,
53 NULL,
54 (VOID **)&VectorHandoffInfoPpi
55 );
56 if (Status == EFI_SUCCESS) {
57 DEBUG ((DEBUG_INFO, "Vector Hand-off Info PPI is gotten, GUIDed HOB is created!\n"));
58 VectorInfo = VectorHandoffInfoPpi->Info;
59 Index = 1;
60 while (VectorInfo->Attribute != EFI_VECTOR_HANDOFF_LAST_ENTRY) {
61 VectorInfo++;
62 Index++;
63 }
64
65 BuildGuidDataHob (
66 &gEfiVectorHandoffInfoPpiGuid,
67 VectorHandoffInfoPpi->Info,
68 sizeof (EFI_VECTOR_HANDOFF_INFO) * Index
69 );
70 }
71
72 //
73 // Allocate 128KB for the Stack
74 //
75 BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
76 ASSERT (BaseOfStack != NULL);
77
78 //
79 // Compute the top of the stack we were allocated. Pre-allocate a UINTN
80 // for safety.
81 //
82 TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
83 TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
84
85 //
86 // Get the address and size of the GHCB pages
87 //
88 GhcbBase = (VOID *)PcdGet64 (PcdGhcbBase);
89 GhcbSize = PcdGet64 (PcdGhcbSize);
90
91 PageTables = 0;
92 if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
93 //
94 // Create page table and save PageMapLevel4 to CR3
95 //
96 PageTables = CreateIdentityMappingPageTables (
97 (EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack,
98 STACK_SIZE,
99 (EFI_PHYSICAL_ADDRESS)(UINTN)GhcbBase,
100 GhcbSize
101 );
102 } else {
103 //
104 // Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
105 // for the DxeIpl and the DxeCore are both X64.
106 //
107 ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);
108 ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
109 }
110
111 //
112 // End of PEI phase signal
113 //
114 Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);
115 ASSERT_EFI_ERROR (Status);
116
117 if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
118 AsmWriteCr3 (PageTables);
119 }
120
121 //
122 // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
123 //
124 UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);
125
126 //
127 // Transfer the control to the entry point of DxeCore.
128 //
129 SwitchStack (
130 (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
131 HobList.Raw,
132 NULL,
133 TopOfStack
134 );
135 }