MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe: Add support for PCD PcdPteMemoryEn...
[mirror_edk2.git] / MdeModulePkg / Universal / Acpi / BootScriptExecutorDxe / X64 / SetIdtEntry.c
1 /** @file
2 Set a IDT entry for debug purpose
3
4 Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform
5
6 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
7 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
8
9
10 This program and the accompanying materials
11 are licensed and made available under the terms and conditions of the BSD License
12 which accompanies this distribution. The full text of the license may be found at
13 http://opensource.org/licenses/bsd-license.php
14
15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17
18 **/
19 #include "ScriptExecute.h"
20
21 //
22 // 8 extra pages for PF handler.
23 //
24 #define EXTRA_PAGE_TABLE_PAGES 8
25
26 #define IA32_PG_P BIT0
27 #define IA32_PG_RW BIT1
28 #define IA32_PG_PS BIT7
29
30 UINT64 mPhyMask;
31 VOID *mOriginalHandler;
32 UINTN mPageFaultBuffer;
33 UINTN mPageFaultIndex = 0;
34 //
35 // Store the uplink information for each page being used.
36 //
37 UINT64 *mPageFaultUplink[EXTRA_PAGE_TABLE_PAGES];
38
39 /**
40 Page fault handler.
41
42 **/
43 VOID
44 EFIAPI
45 PageFaultHandlerHook (
46 VOID
47 );
48
49 /**
50 Hook IDT with our page fault handler so that the on-demand paging works on page fault.
51
52 @param IdtEntry a pointer to IDT entry
53
54 **/
55 VOID
56 HookPageFaultHandler (
57 IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry
58 )
59 {
60 UINT32 RegEax;
61 UINT8 PhysicalAddressBits;
62 UINTN PageFaultHandlerHookAddress;
63
64 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
65 if (RegEax >= 0x80000008) {
66 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
67 PhysicalAddressBits = (UINT8) RegEax;
68 } else {
69 PhysicalAddressBits = 36;
70 }
71 mPhyMask = LShiftU64 (1, PhysicalAddressBits) - 1;
72 mPhyMask &= (1ull << 48) - SIZE_4KB;
73
74 //
75 // Set Page Fault entry to catch >4G access
76 //
77 PageFaultHandlerHookAddress = (UINTN)PageFaultHandlerHook;
78 mOriginalHandler = (VOID *)(UINTN)(LShiftU64 (IdtEntry->Bits.OffsetUpper, 32) + IdtEntry->Bits.OffsetLow + (IdtEntry->Bits.OffsetHigh << 16));
79 IdtEntry->Bits.OffsetLow = (UINT16)PageFaultHandlerHookAddress;
80 IdtEntry->Bits.Selector = (UINT16)AsmReadCs ();
81 IdtEntry->Bits.Reserved_0 = 0;
82 IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
83 IdtEntry->Bits.OffsetHigh = (UINT16)(PageFaultHandlerHookAddress >> 16);
84 IdtEntry->Bits.OffsetUpper = (UINT32)(PageFaultHandlerHookAddress >> 32);
85 IdtEntry->Bits.Reserved_1 = 0;
86
87 if (mPage1GSupport) {
88 mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(2);
89 }else {
90 mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(6);
91 }
92 ZeroMem (mPageFaultUplink, sizeof (mPageFaultUplink));
93 }
94
95 /**
96 The function will check if current waking vector is long mode.
97
98 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
99
100 @retval TRUE Current context need long mode waking vector.
101 @retval FALSE Current context need not long mode waking vector.
102 **/
103 BOOLEAN
104 IsLongModeWakingVector (
105 IN ACPI_S3_CONTEXT *AcpiS3Context
106 )
107 {
108 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
109
110 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
111 if ((Facs == NULL) ||
112 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
113 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
114 // Something wrong with FACS
115 return FALSE;
116 }
117 if (Facs->XFirmwareWakingVector != 0) {
118 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
119 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
120 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
121 // Both BIOS and OS wants 64bit vector
122 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
123 return TRUE;
124 }
125 }
126 }
127 return FALSE;
128 }
129
130 /**
131 Set a IDT entry for interrupt vector 3 for debug purpose.
132
133 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
134
135 **/
136 VOID
137 SetIdtEntry (
138 IN ACPI_S3_CONTEXT *AcpiS3Context
139 )
140 {
141 IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
142 IA32_DESCRIPTOR *IdtDescriptor;
143 UINTN S3DebugBuffer;
144 EFI_STATUS Status;
145
146 //
147 // Restore IDT for debug
148 //
149 IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);
150 AsmWriteIdtr (IdtDescriptor);
151
152 //
153 // Setup the default CPU exception handlers
154 //
155 Status = InitializeCpuExceptionHandlers (NULL);
156 ASSERT_EFI_ERROR (Status);
157
158 DEBUG_CODE (
159 //
160 // Update IDT entry INT3 if the instruction is valid in it
161 //
162 S3DebugBuffer = (UINTN) (AcpiS3Context->S3DebugBufferAddress);
163 if (*(UINTN *)S3DebugBuffer != (UINTN) -1) {
164 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (3 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));
165 IdtEntry->Bits.OffsetLow = (UINT16)S3DebugBuffer;
166 IdtEntry->Bits.Selector = (UINT16)AsmReadCs ();
167 IdtEntry->Bits.Reserved_0 = 0;
168 IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
169 IdtEntry->Bits.OffsetHigh = (UINT16)(S3DebugBuffer >> 16);
170 IdtEntry->Bits.OffsetUpper = (UINT32)(S3DebugBuffer >> 32);
171 IdtEntry->Bits.Reserved_1 = 0;
172 }
173 );
174
175 //
176 // If both BIOS and OS wants long mode waking vector,
177 // S3ResumePei should have established 1:1 Virtual to Physical identity mapping page table,
178 // no need to hook page fault handler.
179 //
180 if (!IsLongModeWakingVector (AcpiS3Context)) {
181 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (14 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));
182 HookPageFaultHandler (IdtEntry);
183 }
184 }
185
186 /**
187 Acquire page for page fault.
188
189 @param[in, out] Uplink Pointer to up page table entry.
190
191 **/
192 VOID
193 AcquirePage (
194 IN OUT UINT64 *Uplink
195 )
196 {
197 UINTN Address;
198
199 Address = mPageFaultBuffer + EFI_PAGES_TO_SIZE (mPageFaultIndex);
200 ZeroMem ((VOID *) Address, EFI_PAGES_TO_SIZE (1));
201
202 //
203 // Cut the previous uplink if it exists and wasn't overwritten.
204 //
205 if ((mPageFaultUplink[mPageFaultIndex] != NULL) &&
206 ((*mPageFaultUplink[mPageFaultIndex] & ~mAddressEncMask & mPhyMask) == Address)) {
207 *mPageFaultUplink[mPageFaultIndex] = 0;
208 }
209
210 //
211 // Link & Record the current uplink.
212 //
213 *Uplink = Address | mAddressEncMask | IA32_PG_P | IA32_PG_RW;
214 mPageFaultUplink[mPageFaultIndex] = Uplink;
215
216 mPageFaultIndex = (mPageFaultIndex + 1) % EXTRA_PAGE_TABLE_PAGES;
217 }
218
219 /**
220 The page fault handler that on-demand read >4G memory/MMIO.
221
222 @retval TRUE The page fault is correctly handled.
223 @retval FALSE The page fault is not handled and is passed through to original handler.
224
225 **/
226 BOOLEAN
227 EFIAPI
228 PageFaultHandler (
229 VOID
230 )
231 {
232 UINT64 *PageTable;
233 UINT64 PFAddress;
234 UINTN PTIndex;
235
236 PFAddress = AsmReadCr2 ();
237 DEBUG ((EFI_D_ERROR, "BootScript - PageFaultHandler: Cr2 - %lx\n", PFAddress));
238
239 if (PFAddress >= mPhyMask + SIZE_4KB) {
240 return FALSE;
241 }
242 PFAddress &= mPhyMask;
243
244 PageTable = (UINT64*)(UINTN)(AsmReadCr3 () & mPhyMask);
245
246 PTIndex = BitFieldRead64 (PFAddress, 39, 47);
247 // PML4E
248 if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
249 AcquirePage (&PageTable[PTIndex]);
250 }
251 PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & ~mAddressEncMask & mPhyMask);
252 PTIndex = BitFieldRead64 (PFAddress, 30, 38);
253 // PDPTE
254 if (mPage1GSupport) {
255 PageTable[PTIndex] = ((PFAddress | mAddressEncMask) & ~((1ull << 30) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
256 } else {
257 if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
258 AcquirePage (&PageTable[PTIndex]);
259 }
260 PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & ~mAddressEncMask & mPhyMask);
261 PTIndex = BitFieldRead64 (PFAddress, 21, 29);
262 // PD
263 PageTable[PTIndex] = ((PFAddress | mAddressEncMask) & ~((1ull << 21) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
264 }
265
266 return TRUE;
267 }