]> git.proxmox.com Git - mirror_edk2.git/blob - MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PciCfg2.c
1) Add PcatSingleSegmentPciCfg2Pei in MdeModulePkg.
[mirror_edk2.git] / MdeModulePkg / Universal / PcatSingleSegmentPciCfg2Pei / PciCfg2.c
1 /**
2
3 Copyright (c) 2006 - 2007, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 **/
13
14 #include <PiPei.h>
15
16 #include <Ppi/PciCfg2.h>
17
18 #include <Library/BaseLib.h>
19 #include <Library/DebugLib.h>
20 #include <Library/PciLib.h>
21 #include <Library/PeimEntryPoint.h>
22
23 #include <IndustryStandard\Pci.h>
24
25 #define COMMON_TO_PCILIB_ADDRESS(A) (UINTN)PCI_LIB_ADDRESS( \
26 ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Bus, \
27 ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Device, \
28 ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Function, \
29 ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Register \
30 )
31
32
33 /**
34 Reads from a given location in the PCI configuration space.
35
36 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
37
38 @param This Pointer to local data for the interface.
39
40 @param Width The width of the access. Enumerated in bytes.
41 See EFI_PEI_PCI_CFG_PPI_WIDTH above.
42
43 @param Address The physical address of the access. The format of
44 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
45
46 @param Buffer A pointer to the buffer of data..
47
48
49 @retval EFI_SUCCESS The function completed successfully.
50
51 @retval EFI_DEVICE_ERROR There was a problem with the transaction.
52
53 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this
54 time.
55
56 **/
57 EFI_STATUS
58 EFIAPI
59 PciCfg2Read (
60 IN CONST EFI_PEI_SERVICES **PeiServices,
61 IN CONST EFI_PEI_PCI_CFG2_PPI *This,
62 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
63 IN UINT64 Address,
64 IN OUT VOID *Buffer
65 );
66
67 /**
68 Write to a given location in the PCI configuration space.
69
70 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
71
72 @param This Pointer to local data for the interface.
73
74 @param Width The width of the access. Enumerated in bytes.
75 See EFI_PEI_PCI_CFG_PPI_WIDTH above.
76
77 @param Address The physical address of the access. The format of
78 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
79
80 @param Buffer A pointer to the buffer of data..
81
82
83 @retval EFI_SUCCESS The function completed successfully.
84
85 @retval EFI_DEVICE_ERROR There was a problem with the transaction.
86
87 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this
88 time.
89
90 **/
91 EFI_STATUS
92 EFIAPI
93 PciCfg2Write (
94 IN CONST EFI_PEI_SERVICES **PeiServices,
95 IN CONST EFI_PEI_PCI_CFG2_PPI *This,
96 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
97 IN UINT64 Address,
98 IN OUT VOID *Buffer
99 );
100
101
102 /**
103 PCI read-modify-write operation.
104
105 @param PeiServices An indirect pointer to the PEI Services Table
106 published by the PEI Foundation.
107
108 @param This Pointer to local data for the interface.
109
110 @param Width The width of the access. Enumerated in bytes. Type
111 EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
112
113 @param Address The physical address of the access.
114
115 @param SetBits Points to value to bitwise-OR with the read configuration value.
116
117 The size of the value is determined by Width.
118
119 @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.
120 The size of the value is determined by Width.
121
122
123 @retval EFI_SUCCESS The function completed successfully.
124
125 @retval EFI_DEVICE_ERROR There was a problem with the transaction.
126
127 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting
128 the operation at this time.
129
130 **/
131 EFI_STATUS
132 EFIAPI
133 PciCfg2Modify (
134 IN CONST EFI_PEI_SERVICES **PeiServices,
135 IN CONST EFI_PEI_PCI_CFG2_PPI *This,
136 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
137 IN UINT64 Address,
138 IN CONST VOID *SetBits,
139 IN CONST VOID *ClearBits
140 );
141
142
143
144 /**
145 @par Ppi Description:
146 The EFI_PEI_PCI_CFG2_PPI interfaces are used to abstract
147 accesses to PCI controllers behind a PCI root bridge
148 controller.
149
150 @param Read PCI read services. See the Read() function description.
151
152 @param Write PCI write services. See the Write() function description.
153
154 @param Modify PCI read-modify-write services. See the Modify() function description.
155
156 @param Segment The PCI bus segment which the specified functions will access.
157
158 **/
159 GLOBAL_REMOVE_IF_UNREFERENCED
160 EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {
161 PciCfg2Read,
162 PciCfg2Write,
163 PciCfg2Modify
164 };
165
166 GLOBAL_REMOVE_IF_UNREFERENCED
167 EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {
168 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
169 &gEfiPciCfg2PpiGuid,
170 &gPciCfg2Ppi
171 };
172
173 /**
174 Reads from a given location in the PCI configuration space.
175
176 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
177
178 @param This Pointer to local data for the interface.
179
180 @param Width The width of the access. Enumerated in bytes.
181 See EFI_PEI_PCI_CFG_PPI_WIDTH above.
182
183 @param Address The physical address of the access. The format of
184 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
185
186 @param Buffer A pointer to the buffer of data..
187
188
189 @retval EFI_SUCCESS The function completed successfully.
190
191 @retval EFI_DEVICE_ERROR There was a problem with the transaction.
192
193 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this
194 time.
195
196 **/
197 EFI_STATUS
198 EFIAPI
199 PciCfg2Read (
200 IN CONST EFI_PEI_SERVICES **PeiServices,
201 IN CONST EFI_PEI_PCI_CFG2_PPI *This,
202 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
203 IN UINT64 Address,
204 IN OUT VOID *Buffer
205 )
206 {
207 UINTN PciLibAddress;
208
209 PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
210
211 if (Width == EfiPeiPciCfgWidthUint8) {
212 *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
213 } else if (Width == EfiPeiPciCfgWidthUint16) {
214 *((UINT16 *) Buffer) = PciRead16 (PciLibAddress);
215 } else if (Width == EfiPeiPciCfgWidthUint32) {
216 *((UINT32 *) Buffer) = PciRead32 (PciLibAddress);
217 } else {
218 return EFI_INVALID_PARAMETER;
219 }
220
221 return EFI_SUCCESS;
222 }
223
224 /**
225 Write to a given location in the PCI configuration space.
226
227 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
228
229 @param This Pointer to local data for the interface.
230
231 @param Width The width of the access. Enumerated in bytes.
232 See EFI_PEI_PCI_CFG_PPI_WIDTH above.
233
234 @param Address The physical address of the access. The format of
235 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
236
237 @param Buffer A pointer to the buffer of data..
238
239
240 @retval EFI_SUCCESS The function completed successfully.
241
242 @retval EFI_DEVICE_ERROR There was a problem with the transaction.
243
244 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this
245 time.
246
247 **/
248 EFI_STATUS
249 EFIAPI
250 PciCfg2Write (
251 IN CONST EFI_PEI_SERVICES **PeiServices,
252 IN CONST EFI_PEI_PCI_CFG2_PPI *This,
253 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
254 IN UINT64 Address,
255 IN OUT VOID *Buffer
256 )
257 {
258 UINTN PciLibAddress;
259
260 PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
261
262 if (Width == EfiPeiPciCfgWidthUint8) {
263 PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
264 } else if (Width == EfiPeiPciCfgWidthUint16) {
265 PciWrite16 (PciLibAddress, *((UINT16 *) Buffer));
266 } else if (Width == EfiPeiPciCfgWidthUint32) {
267 PciWrite32 (PciLibAddress, *((UINT32 *) Buffer));
268 } else {
269 return EFI_INVALID_PARAMETER;
270 }
271
272 return EFI_SUCCESS;
273 }
274
275
276 /**
277 PCI read-modify-write operation.
278
279 @param PeiServices An indirect pointer to the PEI Services Table
280 published by the PEI Foundation.
281
282 @param This Pointer to local data for the interface.
283
284 @param Width The width of the access. Enumerated in bytes. Type
285 EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
286
287 @param Address The physical address of the access.
288
289 @param SetBits Points to value to bitwise-OR with the read configuration value.
290
291 The size of the value is determined by Width.
292
293 @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.
294 The size of the value is determined by Width.
295
296
297 @retval EFI_SUCCESS The function completed successfully.
298
299 @retval EFI_DEVICE_ERROR There was a problem with the transaction.
300
301 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting
302 the operation at this time.
303
304 **/
305 EFI_STATUS
306 EFIAPI
307 PciCfg2Modify (
308 IN CONST EFI_PEI_SERVICES **PeiServices,
309 IN CONST EFI_PEI_PCI_CFG2_PPI *This,
310 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
311 IN UINT64 Address,
312 IN CONST VOID *SetBits,
313 IN CONST VOID *ClearBits
314 )
315 {
316 UINTN PciLibAddress;
317
318 PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);
319
320 if (Width == EfiPeiPciCfgWidthUint8) {
321 PciAndThenOr8 (PciLibAddress, ~(*(UINT8 *)ClearBits), *((UINT8 *) SetBits));
322 } else if (Width == EfiPeiPciCfgWidthUint16) {
323 PciAndThenOr16 (PciLibAddress, ~ReadUnaligned16 ((UINT16 *) ClearBits), ReadUnaligned16 ((UINT16 *) SetBits));
324 } else if (Width == EfiPeiPciCfgWidthUint32) {
325 PciAndThenOr32 (PciLibAddress, ~ReadUnaligned32 ((UINT32 *) ClearBits), ReadUnaligned32 ((UINT32 *) SetBits));
326 } else {
327 return EFI_INVALID_PARAMETER;
328 }
329 return EFI_SUCCESS;
330 }
331
332
333 EFI_STATUS
334 EFIAPI
335 PeimInitializePciCfg (
336 IN EFI_FFS_FILE_HEADER *FfsHeader,
337 IN EFI_PEI_SERVICES **PeiServices
338 )
339 {
340 EFI_STATUS Status;
341
342 ASSERT ((**PeiServices).Hdr.Revision >= PEI_SERVICES_REVISION);
343
344 (**PeiServices).PciCfg = &gPciCfg2Ppi;
345 Status = (**PeiServices).InstallPpi (PeiServices, &gPciCfg2PpiList);
346
347 return Status;
348 }