MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits
[mirror_edk2.git] / MdePkg / Include / AArch64 / ProcessorBind.h
1 /** @file
2 Processor or Compiler specific defines and types for AArch64.
3
4 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
5 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
6 Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
7
8 This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
12
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15
16 **/
17
18 #ifndef __PROCESSOR_BIND_H__
19 #define __PROCESSOR_BIND_H__
20
21 ///
22 /// Define the processor type so other code can make processor based choices
23 ///
24 #define MDE_CPU_AARCH64
25
26 //
27 // Make sure we are using the correct packing rules per EFI specification
28 //
29 #if !defined(__GNUC__) && !defined(__ASSEMBLER__)
30 #pragma pack()
31 #endif
32
33 #if defined(_MSC_EXTENSIONS)
34
35 //
36 // Disable some level 4 compilation warnings (same as IA32 and X64)
37 //
38
39 //
40 // Disabling bitfield type checking warnings.
41 //
42 #pragma warning ( disable : 4214 )
43
44 //
45 // Disabling the unreferenced formal parameter warnings.
46 //
47 #pragma warning ( disable : 4100 )
48
49 //
50 // Disable slightly different base types warning as CHAR8 * can not be set
51 // to a constant string.
52 //
53 #pragma warning ( disable : 4057 )
54
55 //
56 // ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
57 //
58 #pragma warning ( disable : 4127 )
59
60 //
61 // This warning is caused by functions defined but not used. For precompiled header only.
62 //
63 #pragma warning ( disable : 4505 )
64
65 //
66 // This warning is caused by empty (after preprocessing) source file. For precompiled header only.
67 //
68 #pragma warning ( disable : 4206 )
69
70 //
71 // Disable 'potentially uninitialized local variable X used' warnings
72 //
73 #pragma warning ( disable : 4701 )
74
75 //
76 // Disable 'potentially uninitialized local pointer variable X used' warnings
77 //
78 #pragma warning ( disable : 4703 )
79
80 //
81 // use Microsoft* C compiler dependent integer width types
82 //
83 typedef unsigned __int64 UINT64;
84 typedef __int64 INT64;
85 typedef unsigned __int32 UINT32;
86 typedef __int32 INT32;
87 typedef unsigned short UINT16;
88 typedef unsigned short CHAR16;
89 typedef short INT16;
90 typedef unsigned char BOOLEAN;
91 typedef unsigned char UINT8;
92 typedef char CHAR8;
93 typedef signed char INT8;
94
95 #else
96
97 //
98 // Assume standard AARCH64 alignment.
99 //
100 typedef unsigned long long UINT64;
101 typedef long long INT64;
102 typedef unsigned int UINT32;
103 typedef int INT32;
104 typedef unsigned short UINT16;
105 typedef unsigned short CHAR16;
106 typedef short INT16;
107 typedef unsigned char BOOLEAN;
108 typedef unsigned char UINT8;
109 typedef char CHAR8;
110 typedef signed char INT8;
111
112 #endif
113
114 ///
115 /// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
116 /// 8 bytes on supported 64-bit processor instructions)
117 ///
118 typedef UINT64 UINTN;
119
120 ///
121 /// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
122 /// 8 bytes on supported 64-bit processor instructions)
123 ///
124 typedef INT64 INTN;
125
126 //
127 // Processor specific defines
128 //
129
130 ///
131 /// A value of native width with the highest bit set.
132 ///
133 #define MAX_BIT 0x8000000000000000ULL
134
135 ///
136 /// A value of native width with the two highest bits set.
137 ///
138 #define MAX_2_BITS 0xC000000000000000ULL
139
140 ///
141 /// Maximum legal AARCH64 address (48 bits for 4 KB page size)
142 ///
143 #define MAX_ADDRESS 0xFFFFFFFFFFFFULL
144
145 ///
146 /// Maximum legal AArch64 INTN and UINTN values.
147 ///
148 #define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL)
149 #define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)
150
151 ///
152 /// Minimum legal AArch64 INTN value.
153 ///
154 #define MIN_INTN (((INTN)-9223372036854775807LL) - 1)
155
156 ///
157 /// The stack alignment required for AARCH64
158 ///
159 #define CPU_STACK_ALIGNMENT 16
160
161 ///
162 /// Page allocation granularity for AARCH64
163 ///
164 #define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
165 #define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000)
166
167 //
168 // Modifier to ensure that all protocol member functions and EFI intrinsics
169 // use the correct C calling convention. All protocol member functions and
170 // EFI intrinsics are required to modify their member functions with EFIAPI.
171 //
172 #define EFIAPI
173
174 // When compiling with Clang, we still use GNU as for the assembler, so we still
175 // need to define the GCC_ASM* macros.
176 #if defined(__GNUC__) || defined(__clang__)
177 ///
178 /// For GNU assembly code, .global or .globl can declare global symbols.
179 /// Define this macro to unify the usage.
180 ///
181 #define ASM_GLOBAL .globl
182
183 #define GCC_ASM_EXPORT(func__) \
184 .global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\
185 .type ASM_PFX(func__), %function
186
187 #define GCC_ASM_IMPORT(func__) \
188 .extern _CONCATENATE (__USER_LABEL_PREFIX__, func__)
189
190 #endif
191
192 /**
193 Return the pointer to the first instruction of a function given a function pointer.
194 On ARM CPU architectures, these two pointer values are the same,
195 so the implementation of this macro is very simple.
196
197 @param FunctionPointer A pointer to a function.
198
199 @return The pointer to the first instruction of a function given a function pointer.
200
201 **/
202 #define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
203
204 #ifndef __USER_LABEL_PREFIX__
205 #define __USER_LABEL_PREFIX__
206 #endif
207
208 #endif