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1 /** @file
2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.
3
4 Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 **/
13
14 #ifndef _ACPI_5_0_H_
15 #define _ACPI_5_0_H_
16
17 #include <IndustryStandard/Acpi40.h>
18
19 //
20 // Define for Desriptor
21 //
22 #define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
23 #define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
24 #define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
25
26 #define ACPI_FIXED_DMA_DESCRIPTOR 0x55
27 #define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
28 #define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
29
30 #pragma pack(1)
31
32 ///
33 /// Generic DMA Descriptor.
34 ///
35 typedef PACKED struct {
36 ACPI_SMALL_RESOURCE_HEADER Header;
37 UINT16 DmaRequestLine;
38 UINT16 DmaChannel;
39 UINT8 DmaTransferWidth;
40 } EFI_ACPI_FIXED_DMA_DESCRIPTOR;
41
42 ///
43 /// GPIO Connection Descriptor
44 ///
45 typedef PACKED struct {
46 ACPI_LARGE_RESOURCE_HEADER Header;
47 UINT8 RevisionId;
48 UINT8 ConnectionType;
49 UINT16 GeneralFlags;
50 UINT16 InterruptFlags;
51 UINT8 PinConfiguration;
52 UINT16 OutputDriveStrength;
53 UINT16 DebounceTimeout;
54 UINT16 PinTableOffset;
55 UINT8 ResourceSourceIndex;
56 UINT16 ResourceSourceNameOffset;
57 UINT16 VendorDataOffset;
58 UINT16 VendorDataLength;
59 } EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;
60
61 #define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
62 #define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
63
64 ///
65 /// Serial Bus Resource Descriptor (Generic)
66 ///
67 typedef PACKED struct {
68 ACPI_LARGE_RESOURCE_HEADER Header;
69 UINT8 RevisionId;
70 UINT8 ResourceSourceIndex;
71 UINT8 SerialBusType;
72 UINT8 GeneralFlags;
73 UINT16 TypeSpecificFlags;
74 UINT8 TypeSpecificRevisionId;
75 UINT16 TypeDataLength;
76 // Type specific data
77 } EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;
78
79 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
80 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2
81 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3
82
83 ///
84 /// Serial Bus Resource Descriptor (I2C)
85 ///
86 typedef PACKED struct {
87 ACPI_LARGE_RESOURCE_HEADER Header;
88 UINT8 RevisionId;
89 UINT8 ResourceSourceIndex;
90 UINT8 SerialBusType;
91 UINT8 GeneralFlags;
92 UINT16 TypeSpecificFlags;
93 UINT8 TypeSpecificRevisionId;
94 UINT16 TypeDataLength;
95 UINT32 ConnectionSpeed;
96 UINT16 SlaveAddress;
97 } EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;
98
99 ///
100 /// Serial Bus Resource Descriptor (SPI)
101 ///
102 typedef PACKED struct {
103 ACPI_LARGE_RESOURCE_HEADER Header;
104 UINT8 RevisionId;
105 UINT8 ResourceSourceIndex;
106 UINT8 SerialBusType;
107 UINT8 GeneralFlags;
108 UINT16 TypeSpecificFlags;
109 UINT8 TypeSpecificRevisionId;
110 UINT16 TypeDataLength;
111 UINT32 ConnectionSpeed;
112 UINT8 DataBitLength;
113 UINT8 Phase;
114 UINT8 Polarity;
115 UINT16 DeviceSelection;
116 } EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;
117
118 ///
119 /// Serial Bus Resource Descriptor (UART)
120 ///
121 typedef PACKED struct {
122 ACPI_LARGE_RESOURCE_HEADER Header;
123 UINT8 RevisionId;
124 UINT8 ResourceSourceIndex;
125 UINT8 SerialBusType;
126 UINT8 GeneralFlags;
127 UINT16 TypeSpecificFlags;
128 UINT8 TypeSpecificRevisionId;
129 UINT16 TypeDataLength;
130 UINT32 DefaultBaudRate;
131 UINT16 RxFIFO;
132 UINT16 TxFIFO;
133 UINT8 Parity;
134 UINT8 SerialLinesEnabled;
135 } EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;
136
137 #pragma pack()
138
139 //
140 // Ensure proper structure formats
141 //
142 #pragma pack(1)
143
144 ///
145 /// ACPI 5.0 Generic Address Space definition
146 ///
147 typedef struct {
148 UINT8 AddressSpaceId;
149 UINT8 RegisterBitWidth;
150 UINT8 RegisterBitOffset;
151 UINT8 AccessSize;
152 UINT64 Address;
153 } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;
154
155 //
156 // Generic Address Space Address IDs
157 //
158 #define EFI_ACPI_5_0_SYSTEM_MEMORY 0
159 #define EFI_ACPI_5_0_SYSTEM_IO 1
160 #define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
161 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
162 #define EFI_ACPI_5_0_SMBUS 4
163 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
164 #define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
165
166 //
167 // Generic Address Space Access Sizes
168 //
169 #define EFI_ACPI_5_0_UNDEFINED 0
170 #define EFI_ACPI_5_0_BYTE 1
171 #define EFI_ACPI_5_0_WORD 2
172 #define EFI_ACPI_5_0_DWORD 3
173 #define EFI_ACPI_5_0_QWORD 4
174
175 //
176 // ACPI 5.0 table structures
177 //
178
179 ///
180 /// Root System Description Pointer Structure
181 ///
182 typedef struct {
183 UINT64 Signature;
184 UINT8 Checksum;
185 UINT8 OemId[6];
186 UINT8 Revision;
187 UINT32 RsdtAddress;
188 UINT32 Length;
189 UINT64 XsdtAddress;
190 UINT8 ExtendedChecksum;
191 UINT8 Reserved[3];
192 } EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
193
194 ///
195 /// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
196 ///
197 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
198
199 ///
200 /// Common table header, this prefaces all ACPI tables, including FACS, but
201 /// excluding the RSD PTR structure
202 ///
203 typedef struct {
204 UINT32 Signature;
205 UINT32 Length;
206 } EFI_ACPI_5_0_COMMON_HEADER;
207
208 //
209 // Root System Description Table
210 // No definition needed as it is a common description table header, the same with
211 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
212 //
213
214 ///
215 /// RSDT Revision (as defined in ACPI 5.0 spec.)
216 ///
217 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
218
219 //
220 // Extended System Description Table
221 // No definition needed as it is a common description table header, the same with
222 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
223 //
224
225 ///
226 /// XSDT Revision (as defined in ACPI 5.0 spec.)
227 ///
228 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
229
230 ///
231 /// Fixed ACPI Description Table Structure (FADT)
232 ///
233 typedef struct {
234 EFI_ACPI_DESCRIPTION_HEADER Header;
235 UINT32 FirmwareCtrl;
236 UINT32 Dsdt;
237 UINT8 Reserved0;
238 UINT8 PreferredPmProfile;
239 UINT16 SciInt;
240 UINT32 SmiCmd;
241 UINT8 AcpiEnable;
242 UINT8 AcpiDisable;
243 UINT8 S4BiosReq;
244 UINT8 PstateCnt;
245 UINT32 Pm1aEvtBlk;
246 UINT32 Pm1bEvtBlk;
247 UINT32 Pm1aCntBlk;
248 UINT32 Pm1bCntBlk;
249 UINT32 Pm2CntBlk;
250 UINT32 PmTmrBlk;
251 UINT32 Gpe0Blk;
252 UINT32 Gpe1Blk;
253 UINT8 Pm1EvtLen;
254 UINT8 Pm1CntLen;
255 UINT8 Pm2CntLen;
256 UINT8 PmTmrLen;
257 UINT8 Gpe0BlkLen;
258 UINT8 Gpe1BlkLen;
259 UINT8 Gpe1Base;
260 UINT8 CstCnt;
261 UINT16 PLvl2Lat;
262 UINT16 PLvl3Lat;
263 UINT16 FlushSize;
264 UINT16 FlushStride;
265 UINT8 DutyOffset;
266 UINT8 DutyWidth;
267 UINT8 DayAlrm;
268 UINT8 MonAlrm;
269 UINT8 Century;
270 UINT16 IaPcBootArch;
271 UINT8 Reserved1;
272 UINT32 Flags;
273 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
274 UINT8 ResetValue;
275 UINT8 Reserved2[3];
276 UINT64 XFirmwareCtrl;
277 UINT64 XDsdt;
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
283 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
284 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
285 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
286 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
287 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
288 } EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;
289
290 ///
291 /// FADT Version (as defined in ACPI 5.0 spec.)
292 ///
293 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
294
295 //
296 // Fixed ACPI Description Table Preferred Power Management Profile
297 //
298 #define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0
299 #define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1
300 #define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2
301 #define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3
302 #define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4
303 #define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5
304 #define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6
305 #define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7
306 #define EFI_ACPI_5_0_PM_PROFILE_TABLET 8
307
308 //
309 // Fixed ACPI Description Table Boot Architecture Flags
310 // All other bits are reserved and must be set to 0.
311 //
312 #define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
313 #define EFI_ACPI_5_0_8042 BIT1
314 #define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
315 #define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
316 #define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
317 #define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
318
319 //
320 // Fixed ACPI Description Table Fixed Feature Flags
321 // All other bits are reserved and must be set to 0.
322 //
323 #define EFI_ACPI_5_0_WBINVD BIT0
324 #define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
325 #define EFI_ACPI_5_0_PROC_C1 BIT2
326 #define EFI_ACPI_5_0_P_LVL2_UP BIT3
327 #define EFI_ACPI_5_0_PWR_BUTTON BIT4
328 #define EFI_ACPI_5_0_SLP_BUTTON BIT5
329 #define EFI_ACPI_5_0_FIX_RTC BIT6
330 #define EFI_ACPI_5_0_RTC_S4 BIT7
331 #define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
332 #define EFI_ACPI_5_0_DCK_CAP BIT9
333 #define EFI_ACPI_5_0_RESET_REG_SUP BIT10
334 #define EFI_ACPI_5_0_SEALED_CASE BIT11
335 #define EFI_ACPI_5_0_HEADLESS BIT12
336 #define EFI_ACPI_5_0_CPU_SW_SLP BIT13
337 #define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
338 #define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
339 #define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
340 #define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
341 #define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
342 #define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
343 #define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
344 #define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
345
346 ///
347 /// Firmware ACPI Control Structure
348 ///
349 typedef struct {
350 UINT32 Signature;
351 UINT32 Length;
352 UINT32 HardwareSignature;
353 UINT32 FirmwareWakingVector;
354 UINT32 GlobalLock;
355 UINT32 Flags;
356 UINT64 XFirmwareWakingVector;
357 UINT8 Version;
358 UINT8 Reserved0[3];
359 UINT32 OspmFlags;
360 UINT8 Reserved1[24];
361 } EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
362
363 ///
364 /// FACS Version (as defined in ACPI 5.0 spec.)
365 ///
366 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
367
368 ///
369 /// Firmware Control Structure Feature Flags
370 /// All other bits are reserved and must be set to 0.
371 ///
372 #define EFI_ACPI_5_0_S4BIOS_F BIT0
373 #define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
374
375 ///
376 /// OSPM Enabled Firmware Control Structure Flags
377 /// All other bits are reserved and must be set to 0.
378 ///
379 #define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
380
381 //
382 // Differentiated System Description Table,
383 // Secondary System Description Table
384 // and Persistent System Description Table,
385 // no definition needed as they are common description table header, the same with
386 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
387 //
388 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
389 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
390
391 ///
392 /// Multiple APIC Description Table header definition. The rest of the table
393 /// must be defined in a platform specific manner.
394 ///
395 typedef struct {
396 EFI_ACPI_DESCRIPTION_HEADER Header;
397 UINT32 LocalApicAddress;
398 UINT32 Flags;
399 } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
400
401 ///
402 /// MADT Revision (as defined in ACPI 5.0 spec.)
403 ///
404 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
405
406 ///
407 /// Multiple APIC Flags
408 /// All other bits are reserved and must be set to 0.
409 ///
410 #define EFI_ACPI_5_0_PCAT_COMPAT BIT0
411
412 //
413 // Multiple APIC Description Table APIC structure types
414 // All other values between 0x0D and 0x7F are reserved and
415 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
416 //
417 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00
418 #define EFI_ACPI_5_0_IO_APIC 0x01
419 #define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02
420 #define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
421 #define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04
422 #define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
423 #define EFI_ACPI_5_0_IO_SAPIC 0x06
424 #define EFI_ACPI_5_0_LOCAL_SAPIC 0x07
425 #define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08
426 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09
427 #define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A
428 #define EFI_ACPI_5_0_GIC 0x0B
429 #define EFI_ACPI_5_0_GICD 0x0C
430
431 //
432 // APIC Structure Definitions
433 //
434
435 ///
436 /// Processor Local APIC Structure Definition
437 ///
438 typedef struct {
439 UINT8 Type;
440 UINT8 Length;
441 UINT8 AcpiProcessorId;
442 UINT8 ApicId;
443 UINT32 Flags;
444 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
445
446 ///
447 /// Local APIC Flags. All other bits are reserved and must be 0.
448 ///
449 #define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
450
451 ///
452 /// IO APIC Structure
453 ///
454 typedef struct {
455 UINT8 Type;
456 UINT8 Length;
457 UINT8 IoApicId;
458 UINT8 Reserved;
459 UINT32 IoApicAddress;
460 UINT32 GlobalSystemInterruptBase;
461 } EFI_ACPI_5_0_IO_APIC_STRUCTURE;
462
463 ///
464 /// Interrupt Source Override Structure
465 ///
466 typedef struct {
467 UINT8 Type;
468 UINT8 Length;
469 UINT8 Bus;
470 UINT8 Source;
471 UINT32 GlobalSystemInterrupt;
472 UINT16 Flags;
473 } EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
474
475 ///
476 /// Platform Interrupt Sources Structure Definition
477 ///
478 typedef struct {
479 UINT8 Type;
480 UINT8 Length;
481 UINT16 Flags;
482 UINT8 InterruptType;
483 UINT8 ProcessorId;
484 UINT8 ProcessorEid;
485 UINT8 IoSapicVector;
486 UINT32 GlobalSystemInterrupt;
487 UINT32 PlatformInterruptSourceFlags;
488 UINT8 CpeiProcessorOverride;
489 UINT8 Reserved[31];
490 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
491
492 //
493 // MPS INTI flags.
494 // All other bits are reserved and must be set to 0.
495 //
496 #define EFI_ACPI_5_0_POLARITY (3 << 0)
497 #define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)
498
499 ///
500 /// Non-Maskable Interrupt Source Structure
501 ///
502 typedef struct {
503 UINT8 Type;
504 UINT8 Length;
505 UINT16 Flags;
506 UINT32 GlobalSystemInterrupt;
507 } EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
508
509 ///
510 /// Local APIC NMI Structure
511 ///
512 typedef struct {
513 UINT8 Type;
514 UINT8 Length;
515 UINT8 AcpiProcessorId;
516 UINT16 Flags;
517 UINT8 LocalApicLint;
518 } EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;
519
520 ///
521 /// Local APIC Address Override Structure
522 ///
523 typedef struct {
524 UINT8 Type;
525 UINT8 Length;
526 UINT16 Reserved;
527 UINT64 LocalApicAddress;
528 } EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
529
530 ///
531 /// IO SAPIC Structure
532 ///
533 typedef struct {
534 UINT8 Type;
535 UINT8 Length;
536 UINT8 IoApicId;
537 UINT8 Reserved;
538 UINT32 GlobalSystemInterruptBase;
539 UINT64 IoSapicAddress;
540 } EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;
541
542 ///
543 /// Local SAPIC Structure
544 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
545 ///
546 typedef struct {
547 UINT8 Type;
548 UINT8 Length;
549 UINT8 AcpiProcessorId;
550 UINT8 LocalSapicId;
551 UINT8 LocalSapicEid;
552 UINT8 Reserved[3];
553 UINT32 Flags;
554 UINT32 ACPIProcessorUIDValue;
555 } EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
556
557 ///
558 /// Platform Interrupt Sources Structure
559 ///
560 typedef struct {
561 UINT8 Type;
562 UINT8 Length;
563 UINT16 Flags;
564 UINT8 InterruptType;
565 UINT8 ProcessorId;
566 UINT8 ProcessorEid;
567 UINT8 IoSapicVector;
568 UINT32 GlobalSystemInterrupt;
569 UINT32 PlatformInterruptSourceFlags;
570 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
571
572 ///
573 /// Platform Interrupt Source Flags.
574 /// All other bits are reserved and must be set to 0.
575 ///
576 #define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
577
578 ///
579 /// Processor Local x2APIC Structure Definition
580 ///
581 typedef struct {
582 UINT8 Type;
583 UINT8 Length;
584 UINT8 Reserved[2];
585 UINT32 X2ApicId;
586 UINT32 Flags;
587 UINT32 AcpiProcessorUid;
588 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
589
590 ///
591 /// Local x2APIC NMI Structure
592 ///
593 typedef struct {
594 UINT8 Type;
595 UINT8 Length;
596 UINT16 Flags;
597 UINT32 AcpiProcessorUid;
598 UINT8 LocalX2ApicLint;
599 UINT8 Reserved[3];
600 } EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;
601
602 ///
603 /// GIC Structure
604 ///
605 typedef struct {
606 UINT8 Type;
607 UINT8 Length;
608 UINT16 Reserved;
609 UINT32 GicId;
610 UINT32 AcpiProcessorUid;
611 UINT32 Flags;
612 UINT32 ParkingProtocolVersion;
613 UINT32 PerformanceInterruptGsiv;
614 UINT64 ParkedAddress;
615 UINT64 PhysicalBaseAddress;
616 } EFI_ACPI_5_0_GIC_STRUCTURE;
617
618 ///
619 /// GIC Flags. All other bits are reserved and must be 0.
620 ///
621 #define EFI_ACPI_5_0_GIC_ENABLED BIT0
622 #define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
623
624 ///
625 /// GIC Distributor Structure
626 ///
627 typedef struct {
628 UINT8 Type;
629 UINT8 Length;
630 UINT16 Reserved1;
631 UINT32 GicId;
632 UINT64 PhysicalBaseAddress;
633 UINT32 SystemVectorBase;
634 UINT32 Reserved2;
635 } EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;
636
637 ///
638 /// Smart Battery Description Table (SBST)
639 ///
640 typedef struct {
641 EFI_ACPI_DESCRIPTION_HEADER Header;
642 UINT32 WarningEnergyLevel;
643 UINT32 LowEnergyLevel;
644 UINT32 CriticalEnergyLevel;
645 } EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;
646
647 ///
648 /// SBST Version (as defined in ACPI 5.0 spec.)
649 ///
650 #define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
651
652 ///
653 /// Embedded Controller Boot Resources Table (ECDT)
654 /// The table is followed by a null terminated ASCII string that contains
655 /// a fully qualified reference to the name space object.
656 ///
657 typedef struct {
658 EFI_ACPI_DESCRIPTION_HEADER Header;
659 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
660 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
661 UINT32 Uid;
662 UINT8 GpeBit;
663 } EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
664
665 ///
666 /// ECDT Version (as defined in ACPI 5.0 spec.)
667 ///
668 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
669
670 ///
671 /// System Resource Affinity Table (SRAT). The rest of the table
672 /// must be defined in a platform specific manner.
673 ///
674 typedef struct {
675 EFI_ACPI_DESCRIPTION_HEADER Header;
676 UINT32 Reserved1; ///< Must be set to 1
677 UINT64 Reserved2;
678 } EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
679
680 ///
681 /// SRAT Version (as defined in ACPI 5.0 spec.)
682 ///
683 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
684
685 //
686 // SRAT structure types.
687 // All other values between 0x03 an 0xFF are reserved and
688 // will be ignored by OSPM.
689 //
690 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
691 #define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01
692 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
693
694 ///
695 /// Processor Local APIC/SAPIC Affinity Structure Definition
696 ///
697 typedef struct {
698 UINT8 Type;
699 UINT8 Length;
700 UINT8 ProximityDomain7To0;
701 UINT8 ApicId;
702 UINT32 Flags;
703 UINT8 LocalSapicEid;
704 UINT8 ProximityDomain31To8[3];
705 UINT32 ClockDomain;
706 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
707
708 ///
709 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
710 ///
711 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
712
713 ///
714 /// Memory Affinity Structure Definition
715 ///
716 typedef struct {
717 UINT8 Type;
718 UINT8 Length;
719 UINT32 ProximityDomain;
720 UINT16 Reserved1;
721 UINT32 AddressBaseLow;
722 UINT32 AddressBaseHigh;
723 UINT32 LengthLow;
724 UINT32 LengthHigh;
725 UINT32 Reserved2;
726 UINT32 Flags;
727 UINT64 Reserved3;
728 } EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;
729
730 //
731 // Memory Flags. All other bits are reserved and must be 0.
732 //
733 #define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
734 #define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
735 #define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
736
737 ///
738 /// Processor Local x2APIC Affinity Structure Definition
739 ///
740 typedef struct {
741 UINT8 Type;
742 UINT8 Length;
743 UINT8 Reserved1[2];
744 UINT32 ProximityDomain;
745 UINT32 X2ApicId;
746 UINT32 Flags;
747 UINT32 ClockDomain;
748 UINT8 Reserved2[4];
749 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
750
751 ///
752 /// System Locality Distance Information Table (SLIT).
753 /// The rest of the table is a matrix.
754 ///
755 typedef struct {
756 EFI_ACPI_DESCRIPTION_HEADER Header;
757 UINT64 NumberOfSystemLocalities;
758 } EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
759
760 ///
761 /// SLIT Version (as defined in ACPI 5.0 spec.)
762 ///
763 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
764
765 ///
766 /// Corrected Platform Error Polling Table (CPEP)
767 ///
768 typedef struct {
769 EFI_ACPI_DESCRIPTION_HEADER Header;
770 UINT8 Reserved[8];
771 } EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
772
773 ///
774 /// CPEP Version (as defined in ACPI 5.0 spec.)
775 ///
776 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
777
778 //
779 // CPEP processor structure types.
780 //
781 #define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
782
783 ///
784 /// Corrected Platform Error Polling Processor Structure Definition
785 ///
786 typedef struct {
787 UINT8 Type;
788 UINT8 Length;
789 UINT8 ProcessorId;
790 UINT8 ProcessorEid;
791 UINT32 PollingInterval;
792 } EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
793
794 ///
795 /// Maximum System Characteristics Table (MSCT)
796 ///
797 typedef struct {
798 EFI_ACPI_DESCRIPTION_HEADER Header;
799 UINT32 OffsetProxDomInfo;
800 UINT32 MaximumNumberOfProximityDomains;
801 UINT32 MaximumNumberOfClockDomains;
802 UINT64 MaximumPhysicalAddress;
803 } EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
804
805 ///
806 /// MSCT Version (as defined in ACPI 5.0 spec.)
807 ///
808 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
809
810 ///
811 /// Maximum Proximity Domain Information Structure Definition
812 ///
813 typedef struct {
814 UINT8 Revision;
815 UINT8 Length;
816 UINT32 ProximityDomainRangeLow;
817 UINT32 ProximityDomainRangeHigh;
818 UINT32 MaximumProcessorCapacity;
819 UINT64 MaximumMemoryCapacity;
820 } EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
821
822 ///
823 /// ACPI RAS Feature Table definition.
824 ///
825 typedef struct {
826 EFI_ACPI_DESCRIPTION_HEADER Header;
827 UINT8 PlatformCommunicationChannelIdentifier[12];
828 } EFI_ACPI_5_0_RAS_FEATURE_TABLE;
829
830 ///
831 /// RASF Version (as defined in ACPI 5.0 spec.)
832 ///
833 #define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
834
835 ///
836 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
837 ///
838 typedef struct {
839 UINT32 Signature;
840 UINT16 Command;
841 UINT16 Status;
842 UINT16 Version;
843 UINT8 RASCapabilities[16];
844 UINT8 SetRASCapabilities[16];
845 UINT16 NumberOfRASFParameterBlocks;
846 UINT32 SetRASCapabilitiesStatus;
847 } EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
848
849 ///
850 /// ACPI RASF PCC command code
851 ///
852 #define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
853
854 ///
855 /// ACPI RASF Platform RAS Capabilities
856 ///
857 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
858 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
859
860 ///
861 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
862 ///
863 typedef struct {
864 UINT16 Type;
865 UINT16 Version;
866 UINT16 Length;
867 UINT16 PatrolScrubCommand;
868 UINT64 RequestedAddressRange[2];
869 UINT64 ActualAddressRange[2];
870 UINT16 Flags;
871 UINT8 RequestedSpeed;
872 } EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
873
874 ///
875 /// ACPI RASF Patrol Scrub command
876 ///
877 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
878 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
879 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
880
881 ///
882 /// Memory Power State Table definition.
883 ///
884 typedef struct {
885 EFI_ACPI_DESCRIPTION_HEADER Header;
886 UINT8 PlatformCommunicationChannelIdentifier;
887 UINT8 Reserved[3];
888 // Memory Power Node Structure
889 // Memory Power State Characteristics
890 } EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;
891
892 ///
893 /// MPST Version (as defined in ACPI 5.0 spec.)
894 ///
895 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
896
897 ///
898 /// MPST Platform Communication Channel Shared Memory Region definition.
899 ///
900 typedef struct {
901 UINT32 Signature;
902 UINT16 Command;
903 UINT16 Status;
904 UINT32 MemoryPowerCommandRegister;
905 UINT32 MemoryPowerStatusRegister;
906 UINT32 PowerStateId;
907 UINT32 MemoryPowerNodeId;
908 UINT64 MemoryEnergyConsumed;
909 UINT64 ExpectedAveragePowerComsuned;
910 } EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
911
912 ///
913 /// ACPI MPST PCC command code
914 ///
915 #define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
916
917 ///
918 /// ACPI MPST Memory Power command
919 ///
920 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
921 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
922 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
923 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
924
925 ///
926 /// MPST Memory Power Node Table
927 ///
928 typedef struct {
929 UINT8 PowerStateValue;
930 UINT8 PowerStateInformationIndex;
931 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;
932
933 typedef struct {
934 UINT8 Flag;
935 UINT8 Reserved;
936 UINT16 MemoryPowerNodeId;
937 UINT32 Length;
938 UINT64 AddressBase;
939 UINT64 AddressLength;
940 UINT32 NumberOfPowerStates;
941 UINT32 NumberOfPhysicalComponents;
942 //EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
943 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
944 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;
945
946 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
947 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
948 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
949
950 typedef struct {
951 UINT16 MemoryPowerNodeCount;
952 UINT8 Reserved[2];
953 } EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;
954
955 ///
956 /// MPST Memory Power State Characteristics Table
957 ///
958 typedef struct {
959 UINT8 PowerStateStructureID;
960 UINT8 Flag;
961 UINT16 Reserved;
962 UINT32 AveragePowerConsumedInMPS0;
963 UINT32 RelativePowerSavingToMPS0;
964 UINT64 ExitLatencyToMPS0;
965 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
966
967 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
968 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
969 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
970
971 typedef struct {
972 UINT16 MemoryPowerStateCharacteristicsCount;
973 UINT8 Reserved[2];
974 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
975
976 ///
977 /// Memory Topology Table definition.
978 ///
979 typedef struct {
980 EFI_ACPI_DESCRIPTION_HEADER Header;
981 UINT32 Reserved;
982 } EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;
983
984 ///
985 /// PMTT Version (as defined in ACPI 5.0 spec.)
986 ///
987 #define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
988
989 ///
990 /// Common Memory Aggregator Device Structure.
991 ///
992 typedef struct {
993 UINT8 Type;
994 UINT8 Reserved;
995 UINT16 Length;
996 UINT16 Flags;
997 UINT16 Reserved1;
998 } EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
999
1000 ///
1001 /// Memory Aggregator Device Type
1002 ///
1003 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
1004 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
1005 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
1006
1007 ///
1008 /// Socket Memory Aggregator Device Structure.
1009 ///
1010 typedef struct {
1011 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1012 UINT16 SocketIdentifier;
1013 UINT16 Reserved;
1014 //EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1015 } EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1016
1017 ///
1018 /// MemoryController Memory Aggregator Device Structure.
1019 ///
1020 typedef struct {
1021 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1022 UINT32 ReadLatency;
1023 UINT32 WriteLatency;
1024 UINT32 ReadBandwidth;
1025 UINT32 WriteBandwidth;
1026 UINT16 OptimalAccessUnit;
1027 UINT16 OptimalAccessAlignment;
1028 UINT16 Reserved;
1029 UINT16 NumberOfProximityDomains;
1030 //UINT32 ProximityDomain[NumberOfProximityDomains];
1031 //EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1032 } EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1033
1034 ///
1035 /// DIMM Memory Aggregator Device Structure.
1036 ///
1037 typedef struct {
1038 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1039 UINT16 PhysicalComponentIdentifier;
1040 UINT16 Reserved;
1041 UINT32 SizeOfDimm;
1042 UINT32 SmbiosHandle;
1043 } EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1044
1045 ///
1046 /// Boot Graphics Resource Table definition.
1047 ///
1048 typedef struct {
1049 EFI_ACPI_DESCRIPTION_HEADER Header;
1050 ///
1051 /// 2-bytes (16 bit) version ID. This value must be 1.
1052 ///
1053 UINT16 Version;
1054 ///
1055 /// 1-byte status field indicating current status about the table.
1056 /// Bits[7:1] = Reserved (must be zero)
1057 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1058 ///
1059 UINT8 Status;
1060 ///
1061 /// 1-byte enumerated type field indicating format of the image.
1062 /// 0 = Bitmap
1063 /// 1 - 255 Reserved (for future use)
1064 ///
1065 UINT8 ImageType;
1066 ///
1067 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1068 /// of the image bitmap.
1069 ///
1070 UINT64 ImageAddress;
1071 ///
1072 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1073 /// (X, Y) display offset of the top left corner of the boot image.
1074 /// The top left corner of the display is at offset (0, 0).
1075 ///
1076 UINT32 ImageOffsetX;
1077 ///
1078 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1079 /// (X, Y) display offset of the top left corner of the boot image.
1080 /// The top left corner of the display is at offset (0, 0).
1081 ///
1082 UINT32 ImageOffsetY;
1083 } EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;
1084
1085 ///
1086 /// BGRT Revision
1087 ///
1088 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1089
1090 ///
1091 /// BGRT Version
1092 ///
1093 #define EFI_ACPI_5_0_BGRT_VERSION 0x01
1094
1095 ///
1096 /// BGRT Status
1097 ///
1098 #define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
1099 #define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
1100 #define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
1101 #define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
1102
1103 ///
1104 /// BGRT Image Type
1105 ///
1106 #define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00
1107
1108 ///
1109 /// FPDT Version (as defined in ACPI 5.0 spec.)
1110 ///
1111 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1112
1113 ///
1114 /// FPDT Performance Record Types
1115 ///
1116 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1117 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1118
1119 ///
1120 /// FPDT Performance Record Revision
1121 ///
1122 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1123 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1124
1125 ///
1126 /// FPDT Runtime Performance Record Types
1127 ///
1128 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1129 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1130 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1131
1132 ///
1133 /// FPDT Runtime Performance Record Revision
1134 ///
1135 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1136 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1137 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1138
1139 ///
1140 /// FPDT Performance Record header
1141 ///
1142 typedef struct {
1143 UINT16 Type;
1144 UINT8 Length;
1145 UINT8 Revision;
1146 } EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;
1147
1148 ///
1149 /// FPDT Performance Table header
1150 ///
1151 typedef struct {
1152 UINT32 Signature;
1153 UINT32 Length;
1154 } EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;
1155
1156 ///
1157 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1158 ///
1159 typedef struct {
1160 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1161 UINT32 Reserved;
1162 ///
1163 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1164 ///
1165 UINT64 BootPerformanceTablePointer;
1166 } EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1167
1168 ///
1169 /// FPDT S3 Performance Table Pointer Record Structure
1170 ///
1171 typedef struct {
1172 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1173 UINT32 Reserved;
1174 ///
1175 /// 64-bit processor-relative physical address of the S3 Performance Table.
1176 ///
1177 UINT64 S3PerformanceTablePointer;
1178 } EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1179
1180 ///
1181 /// FPDT Firmware Basic Boot Performance Record Structure
1182 ///
1183 typedef struct {
1184 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1185 UINT32 Reserved;
1186 ///
1187 /// Timer value logged at the beginning of firmware image execution.
1188 /// This may not always be zero or near zero.
1189 ///
1190 UINT64 ResetEnd;
1191 ///
1192 /// Timer value logged just prior to loading the OS boot loader into memory.
1193 /// For non-UEFI compatible boots, this field must be zero.
1194 ///
1195 UINT64 OsLoaderLoadImageStart;
1196 ///
1197 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1198 /// For non-UEFI compatible boots, the timer value logged will be just prior
1199 /// to the INT 19h handler invocation.
1200 ///
1201 UINT64 OsLoaderStartImageStart;
1202 ///
1203 /// Timer value logged at the point when the OS loader calls the
1204 /// ExitBootServices function for UEFI compatible firmware.
1205 /// For non-UEFI compatible boots, this field must be zero.
1206 ///
1207 UINT64 ExitBootServicesEntry;
1208 ///
1209 /// Timer value logged at the point just prior towhen the OS loader gaining
1210 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1211 /// For non-UEFI compatible boots, this field must be zero.
1212 ///
1213 UINT64 ExitBootServicesExit;
1214 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1215
1216 ///
1217 /// FPDT Firmware Basic Boot Performance Table signature
1218 ///
1219 #define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1220
1221 //
1222 // FPDT Firmware Basic Boot Performance Table
1223 //
1224 typedef struct {
1225 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
1226 //
1227 // one or more Performance Records.
1228 //
1229 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1230
1231 ///
1232 /// FPDT "S3PT" S3 Performance Table
1233 ///
1234 #define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1235
1236 //
1237 // FPDT Firmware S3 Boot Performance Table
1238 //
1239 typedef struct {
1240 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
1241 //
1242 // one or more Performance Records.
1243 //
1244 } EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;
1245
1246 ///
1247 /// FPDT Basic S3 Resume Performance Record
1248 ///
1249 typedef struct {
1250 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1251 ///
1252 /// A count of the number of S3 resume cycles since the last full boot sequence.
1253 ///
1254 UINT32 ResumeCount;
1255 ///
1256 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1257 /// OS waking vector. Only the most recent resume cycle's time is retained.
1258 ///
1259 UINT64 FullResume;
1260 ///
1261 /// Average timer value of all resume cycles logged since the last full boot
1262 /// sequence, including the most recent resume. Note that the entire log of
1263 /// timer values does not need to be retained in order to calculate this average.
1264 ///
1265 UINT64 AverageResume;
1266 } EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;
1267
1268 ///
1269 /// FPDT Basic S3 Suspend Performance Record
1270 ///
1271 typedef struct {
1272 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1273 ///
1274 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1275 /// Only the most recent suspend cycle's timer value is retained.
1276 ///
1277 UINT64 SuspendStart;
1278 ///
1279 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1280 /// mechanism) used to trigger hardware entry to S3.
1281 /// Only the most recent suspend cycle's timer value is retained.
1282 ///
1283 UINT64 SuspendEnd;
1284 } EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;
1285
1286 ///
1287 /// Firmware Performance Record Table definition.
1288 ///
1289 typedef struct {
1290 EFI_ACPI_DESCRIPTION_HEADER Header;
1291 } EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1292
1293 ///
1294 /// Generic Timer Description Table definition.
1295 ///
1296 typedef struct {
1297 EFI_ACPI_DESCRIPTION_HEADER Header;
1298 UINT64 PhysicalAddress;
1299 UINT32 GlobalFlags;
1300 UINT32 SecurePL1TimerGSIV;
1301 UINT32 SecurePL1TimerFlags;
1302 UINT32 NonSecurePL1TimerGSIV;
1303 UINT32 NonSecurePL1TimerFlags;
1304 UINT32 VirtualTimerGSIV;
1305 UINT32 VirtualTimerFlags;
1306 UINT32 NonSecurePL2TimerGSIV;
1307 UINT32 NonSecurePL2TimerFlags;
1308 } EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;
1309
1310 ///
1311 /// GTDT Version (as defined in ACPI 5.0 spec.)
1312 ///
1313 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1314
1315 ///
1316 /// Global Flags. All other bits are reserved and must be 0.
1317 ///
1318 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
1319 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
1320
1321 ///
1322 /// Timer Flags. All other bits are reserved and must be 0.
1323 ///
1324 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1325 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1326
1327 ///
1328 /// Boot Error Record Table (BERT)
1329 ///
1330 typedef struct {
1331 EFI_ACPI_DESCRIPTION_HEADER Header;
1332 UINT32 BootErrorRegionLength;
1333 UINT64 BootErrorRegion;
1334 } EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;
1335
1336 ///
1337 /// BERT Version (as defined in ACPI 5.0 spec.)
1338 ///
1339 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1340
1341 ///
1342 /// Boot Error Region Block Status Definition
1343 ///
1344 typedef struct {
1345 UINT32 UncorrectableErrorValid:1;
1346 UINT32 CorrectableErrorValid:1;
1347 UINT32 MultipleUncorrectableErrors:1;
1348 UINT32 MultipleCorrectableErrors:1;
1349 UINT32 ErrorDataEntryCount:10;
1350 UINT32 Reserved:18;
1351 } EFI_ACPI_5_0_ERROR_BLOCK_STATUS;
1352
1353 ///
1354 /// Boot Error Region Definition
1355 ///
1356 typedef struct {
1357 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
1358 UINT32 RawDataOffset;
1359 UINT32 RawDataLength;
1360 UINT32 DataLength;
1361 UINT32 ErrorSeverity;
1362 } EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;
1363
1364 //
1365 // Boot Error Severity types
1366 //
1367 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
1368 #define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
1369 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
1370 #define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
1371
1372 ///
1373 /// Generic Error Data Entry Definition
1374 ///
1375 typedef struct {
1376 UINT8 SectionType[16];
1377 UINT32 ErrorSeverity;
1378 UINT16 Revision;
1379 UINT8 ValidationBits;
1380 UINT8 Flags;
1381 UINT32 ErrorDataLength;
1382 UINT8 FruId[16];
1383 UINT8 FruText[20];
1384 } EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1385
1386 ///
1387 /// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)
1388 ///
1389 #define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1390
1391 ///
1392 /// HEST - Hardware Error Source Table
1393 ///
1394 typedef struct {
1395 EFI_ACPI_DESCRIPTION_HEADER Header;
1396 UINT32 ErrorSourceCount;
1397 } EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1398
1399 ///
1400 /// HEST Version (as defined in ACPI 5.0 spec.)
1401 ///
1402 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1403
1404 //
1405 // Error Source structure types.
1406 //
1407 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1408 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1409 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
1410 #define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
1411 #define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07
1412 #define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08
1413 #define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09
1414
1415 //
1416 // Error Source structure flags.
1417 //
1418 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1419 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1420
1421 ///
1422 /// IA-32 Architecture Machine Check Exception Structure Definition
1423 ///
1424 typedef struct {
1425 UINT16 Type;
1426 UINT16 SourceId;
1427 UINT8 Reserved0[2];
1428 UINT8 Flags;
1429 UINT8 Enabled;
1430 UINT32 NumberOfRecordsToPreAllocate;
1431 UINT32 MaxSectionsPerRecord;
1432 UINT64 GlobalCapabilityInitData;
1433 UINT64 GlobalControlInitData;
1434 UINT8 NumberOfHardwareBanks;
1435 UINT8 Reserved1[7];
1436 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1437
1438 ///
1439 /// IA-32 Architecture Machine Check Bank Structure Definition
1440 ///
1441 typedef struct {
1442 UINT8 BankNumber;
1443 UINT8 ClearStatusOnInitialization;
1444 UINT8 StatusDataFormat;
1445 UINT8 Reserved0;
1446 UINT32 ControlRegisterMsrAddress;
1447 UINT64 ControlInitData;
1448 UINT32 StatusRegisterMsrAddress;
1449 UINT32 AddressRegisterMsrAddress;
1450 UINT32 MiscRegisterMsrAddress;
1451 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1452
1453 ///
1454 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1455 ///
1456 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1457 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1458 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1459
1460 //
1461 // Hardware Error Notification types. All other values are reserved
1462 //
1463 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1464 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1465 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1466 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1467 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1468
1469 ///
1470 /// Hardware Error Notification Configuration Write Enable Structure Definition
1471 ///
1472 typedef struct {
1473 UINT16 Type:1;
1474 UINT16 PollInterval:1;
1475 UINT16 SwitchToPollingThresholdValue:1;
1476 UINT16 SwitchToPollingThresholdWindow:1;
1477 UINT16 ErrorThresholdValue:1;
1478 UINT16 ErrorThresholdWindow:1;
1479 UINT16 Reserved:10;
1480 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1481
1482 ///
1483 /// Hardware Error Notification Structure Definition
1484 ///
1485 typedef struct {
1486 UINT8 Type;
1487 UINT8 Length;
1488 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1489 UINT32 PollInterval;
1490 UINT32 Vector;
1491 UINT32 SwitchToPollingThresholdValue;
1492 UINT32 SwitchToPollingThresholdWindow;
1493 UINT32 ErrorThresholdValue;
1494 UINT32 ErrorThresholdWindow;
1495 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1496
1497 ///
1498 /// IA-32 Architecture Corrected Machine Check Structure Definition
1499 ///
1500 typedef struct {
1501 UINT16 Type;
1502 UINT16 SourceId;
1503 UINT8 Reserved0[2];
1504 UINT8 Flags;
1505 UINT8 Enabled;
1506 UINT32 NumberOfRecordsToPreAllocate;
1507 UINT32 MaxSectionsPerRecord;
1508 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1509 UINT8 NumberOfHardwareBanks;
1510 UINT8 Reserved1[3];
1511 } EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1512
1513 ///
1514 /// IA-32 Architecture NMI Error Structure Definition
1515 ///
1516 typedef struct {
1517 UINT16 Type;
1518 UINT16 SourceId;
1519 UINT8 Reserved0[2];
1520 UINT32 NumberOfRecordsToPreAllocate;
1521 UINT32 MaxSectionsPerRecord;
1522 UINT32 MaxRawDataLength;
1523 } EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1524
1525 ///
1526 /// PCI Express Root Port AER Structure Definition
1527 ///
1528 typedef struct {
1529 UINT16 Type;
1530 UINT16 SourceId;
1531 UINT8 Reserved0[2];
1532 UINT8 Flags;
1533 UINT8 Enabled;
1534 UINT32 NumberOfRecordsToPreAllocate;
1535 UINT32 MaxSectionsPerRecord;
1536 UINT32 Bus;
1537 UINT16 Device;
1538 UINT16 Function;
1539 UINT16 DeviceControl;
1540 UINT8 Reserved1[2];
1541 UINT32 UncorrectableErrorMask;
1542 UINT32 UncorrectableErrorSeverity;
1543 UINT32 CorrectableErrorMask;
1544 UINT32 AdvancedErrorCapabilitiesAndControl;
1545 UINT32 RootErrorCommand;
1546 } EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1547
1548 ///
1549 /// PCI Express Device AER Structure Definition
1550 ///
1551 typedef struct {
1552 UINT16 Type;
1553 UINT16 SourceId;
1554 UINT8 Reserved0[2];
1555 UINT8 Flags;
1556 UINT8 Enabled;
1557 UINT32 NumberOfRecordsToPreAllocate;
1558 UINT32 MaxSectionsPerRecord;
1559 UINT32 Bus;
1560 UINT16 Device;
1561 UINT16 Function;
1562 UINT16 DeviceControl;
1563 UINT8 Reserved1[2];
1564 UINT32 UncorrectableErrorMask;
1565 UINT32 UncorrectableErrorSeverity;
1566 UINT32 CorrectableErrorMask;
1567 UINT32 AdvancedErrorCapabilitiesAndControl;
1568 } EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1569
1570 ///
1571 /// PCI Express Bridge AER Structure Definition
1572 ///
1573 typedef struct {
1574 UINT16 Type;
1575 UINT16 SourceId;
1576 UINT8 Reserved0[2];
1577 UINT8 Flags;
1578 UINT8 Enabled;
1579 UINT32 NumberOfRecordsToPreAllocate;
1580 UINT32 MaxSectionsPerRecord;
1581 UINT32 Bus;
1582 UINT16 Device;
1583 UINT16 Function;
1584 UINT16 DeviceControl;
1585 UINT8 Reserved1[2];
1586 UINT32 UncorrectableErrorMask;
1587 UINT32 UncorrectableErrorSeverity;
1588 UINT32 CorrectableErrorMask;
1589 UINT32 AdvancedErrorCapabilitiesAndControl;
1590 UINT32 SecondaryUncorrectableErrorMask;
1591 UINT32 SecondaryUncorrectableErrorSeverity;
1592 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1593 } EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1594
1595 ///
1596 /// Generic Hardware Error Source Structure Definition
1597 ///
1598 typedef struct {
1599 UINT16 Type;
1600 UINT16 SourceId;
1601 UINT16 RelatedSourceId;
1602 UINT8 Flags;
1603 UINT8 Enabled;
1604 UINT32 NumberOfRecordsToPreAllocate;
1605 UINT32 MaxSectionsPerRecord;
1606 UINT32 MaxRawDataLength;
1607 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1608 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1609 UINT32 ErrorStatusBlockLength;
1610 } EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1611
1612 ///
1613 /// Generic Error Status Definition
1614 ///
1615 typedef struct {
1616 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
1617 UINT32 RawDataOffset;
1618 UINT32 RawDataLength;
1619 UINT32 DataLength;
1620 UINT32 ErrorSeverity;
1621 } EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;
1622
1623 ///
1624 /// ERST - Error Record Serialization Table
1625 ///
1626 typedef struct {
1627 EFI_ACPI_DESCRIPTION_HEADER Header;
1628 UINT32 SerializationHeaderSize;
1629 UINT8 Reserved0[4];
1630 UINT32 InstructionEntryCount;
1631 } EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
1632
1633 ///
1634 /// ERST Version (as defined in ACPI 5.0 spec.)
1635 ///
1636 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1637
1638 ///
1639 /// ERST Serialization Actions
1640 ///
1641 #define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
1642 #define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
1643 #define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
1644 #define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
1645 #define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
1646 #define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
1647 #define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
1648 #define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
1649 #define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
1650 #define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
1651 #define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
1652 #define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1653 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1654 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1655 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1656
1657 ///
1658 /// ERST Action Command Status
1659 ///
1660 #define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
1661 #define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1662 #define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1663 #define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
1664 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1665 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
1666
1667 ///
1668 /// ERST Serialization Instructions
1669 ///
1670 #define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
1671 #define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
1672 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
1673 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
1674 #define EFI_ACPI_5_0_ERST_NOOP 0x04
1675 #define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
1676 #define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
1677 #define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
1678 #define EFI_ACPI_5_0_ERST_ADD 0x08
1679 #define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
1680 #define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
1681 #define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
1682 #define EFI_ACPI_5_0_ERST_STALL 0x0C
1683 #define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
1684 #define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1685 #define EFI_ACPI_5_0_ERST_GOTO 0x0F
1686 #define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
1687 #define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
1688 #define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
1689
1690 ///
1691 /// ERST Instruction Flags
1692 ///
1693 #define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
1694
1695 ///
1696 /// ERST Serialization Instruction Entry
1697 ///
1698 typedef struct {
1699 UINT8 SerializationAction;
1700 UINT8 Instruction;
1701 UINT8 Flags;
1702 UINT8 Reserved0;
1703 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1704 UINT64 Value;
1705 UINT64 Mask;
1706 } EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
1707
1708 ///
1709 /// EINJ - Error Injection Table
1710 ///
1711 typedef struct {
1712 EFI_ACPI_DESCRIPTION_HEADER Header;
1713 UINT32 InjectionHeaderSize;
1714 UINT8 InjectionFlags;
1715 UINT8 Reserved0[3];
1716 UINT32 InjectionEntryCount;
1717 } EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;
1718
1719 ///
1720 /// EINJ Version (as defined in ACPI 5.0 spec.)
1721 ///
1722 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
1723
1724 ///
1725 /// EINJ Error Injection Actions
1726 ///
1727 #define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
1728 #define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1729 #define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
1730 #define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
1731 #define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
1732 #define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
1733 #define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
1734 #define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
1735 #define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
1736
1737 ///
1738 /// EINJ Action Command Status
1739 ///
1740 #define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
1741 #define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1742 #define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
1743
1744 ///
1745 /// EINJ Error Type Definition
1746 ///
1747 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1748 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1749 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1750 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1751 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1752 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1753 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1754 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1755 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1756 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1757 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1758 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1759
1760 ///
1761 /// EINJ Injection Instructions
1762 ///
1763 #define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
1764 #define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
1765 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
1766 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
1767 #define EFI_ACPI_5_0_EINJ_NOOP 0x04
1768
1769 ///
1770 /// EINJ Instruction Flags
1771 ///
1772 #define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
1773
1774 ///
1775 /// EINJ Injection Instruction Entry
1776 ///
1777 typedef struct {
1778 UINT8 InjectionAction;
1779 UINT8 Instruction;
1780 UINT8 Flags;
1781 UINT8 Reserved0;
1782 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1783 UINT64 Value;
1784 UINT64 Mask;
1785 } EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
1786
1787 ///
1788 /// EINJ Trigger Action Table
1789 ///
1790 typedef struct {
1791 UINT32 HeaderSize;
1792 UINT32 Revision;
1793 UINT32 TableSize;
1794 UINT32 EntryCount;
1795 } EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;
1796
1797 ///
1798 /// Platform Communications Channel Table (PCCT)
1799 ///
1800 typedef struct {
1801 EFI_ACPI_DESCRIPTION_HEADER Header;
1802 UINT32 Flags;
1803 UINT64 Reserved;
1804 } EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
1805
1806 ///
1807 /// PCCT Version (as defined in ACPI 5.0 spec.)
1808 ///
1809 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1810
1811 ///
1812 /// PCCT Global Flags
1813 ///
1814 #define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
1815
1816 //
1817 // PCCT Subspace type
1818 //
1819 #define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1820
1821 ///
1822 /// PCC Subspace Structure Header
1823 ///
1824 typedef struct {
1825 UINT8 Type;
1826 UINT8 Length;
1827 } EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;
1828
1829 ///
1830 /// Generic Communications Subspace Structure
1831 ///
1832 typedef struct {
1833 UINT8 Type;
1834 UINT8 Length;
1835 UINT8 Reserved[6];
1836 UINT64 BaseAddress;
1837 UINT64 AddressLength;
1838 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
1839 UINT64 DoorbellPreserve;
1840 UINT64 DoorbellWrite;
1841 UINT32 NominalLatency;
1842 UINT32 MaximumPeriodicAccessRate;
1843 UINT16 MinimumRequestTurnaroundTime;
1844 } EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;
1845
1846 ///
1847 /// Generic Communications Channel Shared Memory Region
1848 ///
1849
1850 typedef struct {
1851 UINT8 Command;
1852 UINT8 Reserved:7;
1853 UINT8 GenerateSci:1;
1854 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
1855
1856 typedef struct {
1857 UINT8 CommandComplete:1;
1858 UINT8 SciDoorbell:1;
1859 UINT8 Error:1;
1860 UINT8 Reserved:5;
1861 UINT8 Reserved1;
1862 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
1863
1864 typedef struct {
1865 UINT32 Signature;
1866 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
1867 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
1868 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
1869
1870 //
1871 // Known table signatures
1872 //
1873
1874 ///
1875 /// "RSD PTR " Root System Description Pointer
1876 ///
1877 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1878
1879 ///
1880 /// "APIC" Multiple APIC Description Table
1881 ///
1882 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1883
1884 ///
1885 /// "BERT" Boot Error Record Table
1886 ///
1887 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1888
1889 ///
1890 /// "BGRT" Boot Graphics Resource Table
1891 ///
1892 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1893
1894 ///
1895 /// "CPEP" Corrected Platform Error Polling Table
1896 ///
1897 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1898
1899 ///
1900 /// "DSDT" Differentiated System Description Table
1901 ///
1902 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1903
1904 ///
1905 /// "ECDT" Embedded Controller Boot Resources Table
1906 ///
1907 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1908
1909 ///
1910 /// "EINJ" Error Injection Table
1911 ///
1912 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1913
1914 ///
1915 /// "ERST" Error Record Serialization Table
1916 ///
1917 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1918
1919 ///
1920 /// "FACP" Fixed ACPI Description Table
1921 ///
1922 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1923
1924 ///
1925 /// "FACS" Firmware ACPI Control Structure
1926 ///
1927 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1928
1929 ///
1930 /// "FPDT" Firmware Performance Data Table
1931 ///
1932 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1933
1934 ///
1935 /// "GTDT" Generic Timer Description Table
1936 ///
1937 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1938
1939 ///
1940 /// "HEST" Hardware Error Source Table
1941 ///
1942 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1943
1944 ///
1945 /// "MPST" Memory Power State Table
1946 ///
1947 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1948
1949 ///
1950 /// "MSCT" Maximum System Characteristics Table
1951 ///
1952 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1953
1954 ///
1955 /// "PMTT" Platform Memory Topology Table
1956 ///
1957 #define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1958
1959 ///
1960 /// "PSDT" Persistent System Description Table
1961 ///
1962 #define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1963
1964 ///
1965 /// "RASF" ACPI RAS Feature Table
1966 ///
1967 #define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1968
1969 ///
1970 /// "RSDT" Root System Description Table
1971 ///
1972 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1973
1974 ///
1975 /// "SBST" Smart Battery Specification Table
1976 ///
1977 #define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
1978
1979 ///
1980 /// "SLIT" System Locality Information Table
1981 ///
1982 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
1983
1984 ///
1985 /// "SRAT" System Resource Affinity Table
1986 ///
1987 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
1988
1989 ///
1990 /// "SSDT" Secondary System Description Table
1991 ///
1992 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
1993
1994 ///
1995 /// "XSDT" Extended System Description Table
1996 ///
1997 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
1998
1999 ///
2000 /// "BOOT" MS Simple Boot Spec
2001 ///
2002 #define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2003
2004 ///
2005 /// "CSRT" MS Core System Resource Table
2006 ///
2007 #define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2008
2009 ///
2010 /// "DBG2" MS Debug Port 2 Spec
2011 ///
2012 #define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2013
2014 ///
2015 /// "DBGP" MS Debug Port Spec
2016 ///
2017 #define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2018
2019 ///
2020 /// "DMAR" DMA Remapping Table
2021 ///
2022 #define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2023
2024 ///
2025 /// "DRTM" Dynamic Root of Trust for Measurement Table
2026 ///
2027 #define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2028
2029 ///
2030 /// "ETDT" Event Timer Description Table
2031 ///
2032 #define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2033
2034 ///
2035 /// "HPET" IA-PC High Precision Event Timer Table
2036 ///
2037 #define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2038
2039 ///
2040 /// "iBFT" iSCSI Boot Firmware Table
2041 ///
2042 #define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2043
2044 ///
2045 /// "IVRS" I/O Virtualization Reporting Structure
2046 ///
2047 #define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2048
2049 ///
2050 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2051 ///
2052 #define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2053
2054 ///
2055 /// "MCHI" Management Controller Host Interface Table
2056 ///
2057 #define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2058
2059 ///
2060 /// "MSDM" MS Data Management Table
2061 ///
2062 #define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2063
2064 ///
2065 /// "SLIC" MS Software Licensing Table Specification
2066 ///
2067 #define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2068
2069 ///
2070 /// "SPCR" Serial Port Concole Redirection Table
2071 ///
2072 #define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2073
2074 ///
2075 /// "SPMI" Server Platform Management Interface Table
2076 ///
2077 #define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2078
2079 ///
2080 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2081 ///
2082 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2083
2084 ///
2085 /// "TPM2" Trusted Computing Platform 1 Table
2086 ///
2087 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2088
2089 ///
2090 /// "UEFI" UEFI ACPI Data Table
2091 ///
2092 #define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2093
2094 ///
2095 /// "WAET" Windows ACPI Emulated Devices Table
2096 ///
2097 #define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2098 #define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
2099
2100 ///
2101 /// "WDAT" Watchdog Action Table
2102 ///
2103 #define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2104
2105 ///
2106 /// "WDRT" Watchdog Resource Table
2107 ///
2108 #define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2109
2110 ///
2111 /// "WPBT" MS Platform Binary Table
2112 ///
2113 #define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
2114
2115 #pragma pack()
2116
2117 #endif