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1 /** @file
2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.
3
4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
5 Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.<BR>
6 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8 **/
9
10 #ifndef _ACPI_5_0_H_
11 #define _ACPI_5_0_H_
12
13 #include <IndustryStandard/Acpi40.h>
14
15 //
16 // Define for Descriptor
17 //
18 #define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
19 #define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
20 #define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
21
22 #define ACPI_FIXED_DMA_DESCRIPTOR 0x55
23 #define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
24 #define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
25
26 #pragma pack(1)
27
28 ///
29 /// Generic DMA Descriptor.
30 ///
31 typedef PACKED struct {
32 ACPI_SMALL_RESOURCE_HEADER Header;
33 UINT16 DmaRequestLine;
34 UINT16 DmaChannel;
35 UINT8 DmaTransferWidth;
36 } EFI_ACPI_FIXED_DMA_DESCRIPTOR;
37
38 ///
39 /// GPIO Connection Descriptor
40 ///
41 typedef PACKED struct {
42 ACPI_LARGE_RESOURCE_HEADER Header;
43 UINT8 RevisionId;
44 UINT8 ConnectionType;
45 UINT16 GeneralFlags;
46 UINT16 InterruptFlags;
47 UINT8 PinConfiguration;
48 UINT16 OutputDriveStrength;
49 UINT16 DebounceTimeout;
50 UINT16 PinTableOffset;
51 UINT8 ResourceSourceIndex;
52 UINT16 ResourceSourceNameOffset;
53 UINT16 VendorDataOffset;
54 UINT16 VendorDataLength;
55 } EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;
56
57 #define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
58 #define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
59
60 ///
61 /// Serial Bus Resource Descriptor (Generic)
62 ///
63 typedef PACKED struct {
64 ACPI_LARGE_RESOURCE_HEADER Header;
65 UINT8 RevisionId;
66 UINT8 ResourceSourceIndex;
67 UINT8 SerialBusType;
68 UINT8 GeneralFlags;
69 UINT16 TypeSpecificFlags;
70 UINT8 TypeSpecificRevisionId;
71 UINT16 TypeDataLength;
72 // Type specific data
73 } EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;
74
75 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
76 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2
77 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3
78
79 ///
80 /// Serial Bus Resource Descriptor (I2C)
81 ///
82 typedef PACKED struct {
83 ACPI_LARGE_RESOURCE_HEADER Header;
84 UINT8 RevisionId;
85 UINT8 ResourceSourceIndex;
86 UINT8 SerialBusType;
87 UINT8 GeneralFlags;
88 UINT16 TypeSpecificFlags;
89 UINT8 TypeSpecificRevisionId;
90 UINT16 TypeDataLength;
91 UINT32 ConnectionSpeed;
92 UINT16 SlaveAddress;
93 } EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;
94
95 ///
96 /// Serial Bus Resource Descriptor (SPI)
97 ///
98 typedef PACKED struct {
99 ACPI_LARGE_RESOURCE_HEADER Header;
100 UINT8 RevisionId;
101 UINT8 ResourceSourceIndex;
102 UINT8 SerialBusType;
103 UINT8 GeneralFlags;
104 UINT16 TypeSpecificFlags;
105 UINT8 TypeSpecificRevisionId;
106 UINT16 TypeDataLength;
107 UINT32 ConnectionSpeed;
108 UINT8 DataBitLength;
109 UINT8 Phase;
110 UINT8 Polarity;
111 UINT16 DeviceSelection;
112 } EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;
113
114 ///
115 /// Serial Bus Resource Descriptor (UART)
116 ///
117 typedef PACKED struct {
118 ACPI_LARGE_RESOURCE_HEADER Header;
119 UINT8 RevisionId;
120 UINT8 ResourceSourceIndex;
121 UINT8 SerialBusType;
122 UINT8 GeneralFlags;
123 UINT16 TypeSpecificFlags;
124 UINT8 TypeSpecificRevisionId;
125 UINT16 TypeDataLength;
126 UINT32 DefaultBaudRate;
127 UINT16 RxFIFO;
128 UINT16 TxFIFO;
129 UINT8 Parity;
130 UINT8 SerialLinesEnabled;
131 } EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;
132
133 #pragma pack()
134
135 //
136 // Ensure proper structure formats
137 //
138 #pragma pack(1)
139
140 ///
141 /// ACPI 5.0 Generic Address Space definition
142 ///
143 typedef struct {
144 UINT8 AddressSpaceId;
145 UINT8 RegisterBitWidth;
146 UINT8 RegisterBitOffset;
147 UINT8 AccessSize;
148 UINT64 Address;
149 } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;
150
151 //
152 // Generic Address Space Address IDs
153 //
154 #define EFI_ACPI_5_0_SYSTEM_MEMORY 0
155 #define EFI_ACPI_5_0_SYSTEM_IO 1
156 #define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
157 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
158 #define EFI_ACPI_5_0_SMBUS 4
159 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
160 #define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
161
162 //
163 // Generic Address Space Access Sizes
164 //
165 #define EFI_ACPI_5_0_UNDEFINED 0
166 #define EFI_ACPI_5_0_BYTE 1
167 #define EFI_ACPI_5_0_WORD 2
168 #define EFI_ACPI_5_0_DWORD 3
169 #define EFI_ACPI_5_0_QWORD 4
170
171 //
172 // ACPI 5.0 table structures
173 //
174
175 ///
176 /// Root System Description Pointer Structure
177 ///
178 typedef struct {
179 UINT64 Signature;
180 UINT8 Checksum;
181 UINT8 OemId[6];
182 UINT8 Revision;
183 UINT32 RsdtAddress;
184 UINT32 Length;
185 UINT64 XsdtAddress;
186 UINT8 ExtendedChecksum;
187 UINT8 Reserved[3];
188 } EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
189
190 ///
191 /// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
192 ///
193 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
194
195 ///
196 /// Common table header, this prefaces all ACPI tables, including FACS, but
197 /// excluding the RSD PTR structure
198 ///
199 typedef struct {
200 UINT32 Signature;
201 UINT32 Length;
202 } EFI_ACPI_5_0_COMMON_HEADER;
203
204 //
205 // Root System Description Table
206 // No definition needed as it is a common description table header, the same with
207 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
208 //
209
210 ///
211 /// RSDT Revision (as defined in ACPI 5.0 spec.)
212 ///
213 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
214
215 //
216 // Extended System Description Table
217 // No definition needed as it is a common description table header, the same with
218 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
219 //
220
221 ///
222 /// XSDT Revision (as defined in ACPI 5.0 spec.)
223 ///
224 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
225
226 ///
227 /// Fixed ACPI Description Table Structure (FADT)
228 ///
229 typedef struct {
230 EFI_ACPI_DESCRIPTION_HEADER Header;
231 UINT32 FirmwareCtrl;
232 UINT32 Dsdt;
233 UINT8 Reserved0;
234 UINT8 PreferredPmProfile;
235 UINT16 SciInt;
236 UINT32 SmiCmd;
237 UINT8 AcpiEnable;
238 UINT8 AcpiDisable;
239 UINT8 S4BiosReq;
240 UINT8 PstateCnt;
241 UINT32 Pm1aEvtBlk;
242 UINT32 Pm1bEvtBlk;
243 UINT32 Pm1aCntBlk;
244 UINT32 Pm1bCntBlk;
245 UINT32 Pm2CntBlk;
246 UINT32 PmTmrBlk;
247 UINT32 Gpe0Blk;
248 UINT32 Gpe1Blk;
249 UINT8 Pm1EvtLen;
250 UINT8 Pm1CntLen;
251 UINT8 Pm2CntLen;
252 UINT8 PmTmrLen;
253 UINT8 Gpe0BlkLen;
254 UINT8 Gpe1BlkLen;
255 UINT8 Gpe1Base;
256 UINT8 CstCnt;
257 UINT16 PLvl2Lat;
258 UINT16 PLvl3Lat;
259 UINT16 FlushSize;
260 UINT16 FlushStride;
261 UINT8 DutyOffset;
262 UINT8 DutyWidth;
263 UINT8 DayAlrm;
264 UINT8 MonAlrm;
265 UINT8 Century;
266 UINT16 IaPcBootArch;
267 UINT8 Reserved1;
268 UINT32 Flags;
269 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
270 UINT8 ResetValue;
271 UINT8 Reserved2[3];
272 UINT64 XFirmwareCtrl;
273 UINT64 XDsdt;
274 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
275 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
276 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
277 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
283 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
284 } EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;
285
286 ///
287 /// FADT Version (as defined in ACPI 5.0 spec.)
288 ///
289 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
290
291 //
292 // Fixed ACPI Description Table Preferred Power Management Profile
293 //
294 #define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0
295 #define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1
296 #define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2
297 #define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3
298 #define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4
299 #define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5
300 #define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6
301 #define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7
302 #define EFI_ACPI_5_0_PM_PROFILE_TABLET 8
303
304 //
305 // Fixed ACPI Description Table Boot Architecture Flags
306 // All other bits are reserved and must be set to 0.
307 //
308 #define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
309 #define EFI_ACPI_5_0_8042 BIT1
310 #define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
311 #define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
312 #define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
313 #define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
314
315 //
316 // Fixed ACPI Description Table Fixed Feature Flags
317 // All other bits are reserved and must be set to 0.
318 //
319 #define EFI_ACPI_5_0_WBINVD BIT0
320 #define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
321 #define EFI_ACPI_5_0_PROC_C1 BIT2
322 #define EFI_ACPI_5_0_P_LVL2_UP BIT3
323 #define EFI_ACPI_5_0_PWR_BUTTON BIT4
324 #define EFI_ACPI_5_0_SLP_BUTTON BIT5
325 #define EFI_ACPI_5_0_FIX_RTC BIT6
326 #define EFI_ACPI_5_0_RTC_S4 BIT7
327 #define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
328 #define EFI_ACPI_5_0_DCK_CAP BIT9
329 #define EFI_ACPI_5_0_RESET_REG_SUP BIT10
330 #define EFI_ACPI_5_0_SEALED_CASE BIT11
331 #define EFI_ACPI_5_0_HEADLESS BIT12
332 #define EFI_ACPI_5_0_CPU_SW_SLP BIT13
333 #define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
334 #define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
335 #define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
336 #define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
337 #define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
338 #define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
339 #define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
340 #define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
341
342 ///
343 /// Firmware ACPI Control Structure
344 ///
345 typedef struct {
346 UINT32 Signature;
347 UINT32 Length;
348 UINT32 HardwareSignature;
349 UINT32 FirmwareWakingVector;
350 UINT32 GlobalLock;
351 UINT32 Flags;
352 UINT64 XFirmwareWakingVector;
353 UINT8 Version;
354 UINT8 Reserved0[3];
355 UINT32 OspmFlags;
356 UINT8 Reserved1[24];
357 } EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
358
359 ///
360 /// FACS Version (as defined in ACPI 5.0 spec.)
361 ///
362 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
363
364 ///
365 /// Firmware Control Structure Feature Flags
366 /// All other bits are reserved and must be set to 0.
367 ///
368 #define EFI_ACPI_5_0_S4BIOS_F BIT0
369 #define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
370
371 ///
372 /// OSPM Enabled Firmware Control Structure Flags
373 /// All other bits are reserved and must be set to 0.
374 ///
375 #define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
376
377 //
378 // Differentiated System Description Table,
379 // Secondary System Description Table
380 // and Persistent System Description Table,
381 // no definition needed as they are common description table header, the same with
382 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
383 //
384 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
385 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
386
387 ///
388 /// Multiple APIC Description Table header definition. The rest of the table
389 /// must be defined in a platform specific manner.
390 ///
391 typedef struct {
392 EFI_ACPI_DESCRIPTION_HEADER Header;
393 UINT32 LocalApicAddress;
394 UINT32 Flags;
395 } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
396
397 ///
398 /// MADT Revision (as defined in ACPI 5.0 spec.)
399 ///
400 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
401
402 ///
403 /// Multiple APIC Flags
404 /// All other bits are reserved and must be set to 0.
405 ///
406 #define EFI_ACPI_5_0_PCAT_COMPAT BIT0
407
408 //
409 // Multiple APIC Description Table APIC structure types
410 // All other values between 0x0D and 0x7F are reserved and
411 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
412 //
413 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00
414 #define EFI_ACPI_5_0_IO_APIC 0x01
415 #define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02
416 #define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
417 #define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04
418 #define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
419 #define EFI_ACPI_5_0_IO_SAPIC 0x06
420 #define EFI_ACPI_5_0_LOCAL_SAPIC 0x07
421 #define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08
422 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09
423 #define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A
424 #define EFI_ACPI_5_0_GIC 0x0B
425 #define EFI_ACPI_5_0_GICD 0x0C
426
427 //
428 // APIC Structure Definitions
429 //
430
431 ///
432 /// Processor Local APIC Structure Definition
433 ///
434 typedef struct {
435 UINT8 Type;
436 UINT8 Length;
437 UINT8 AcpiProcessorId;
438 UINT8 ApicId;
439 UINT32 Flags;
440 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
441
442 ///
443 /// Local APIC Flags. All other bits are reserved and must be 0.
444 ///
445 #define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
446
447 ///
448 /// IO APIC Structure
449 ///
450 typedef struct {
451 UINT8 Type;
452 UINT8 Length;
453 UINT8 IoApicId;
454 UINT8 Reserved;
455 UINT32 IoApicAddress;
456 UINT32 GlobalSystemInterruptBase;
457 } EFI_ACPI_5_0_IO_APIC_STRUCTURE;
458
459 ///
460 /// Interrupt Source Override Structure
461 ///
462 typedef struct {
463 UINT8 Type;
464 UINT8 Length;
465 UINT8 Bus;
466 UINT8 Source;
467 UINT32 GlobalSystemInterrupt;
468 UINT16 Flags;
469 } EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
470
471 ///
472 /// Platform Interrupt Sources Structure Definition
473 ///
474 typedef struct {
475 UINT8 Type;
476 UINT8 Length;
477 UINT16 Flags;
478 UINT8 InterruptType;
479 UINT8 ProcessorId;
480 UINT8 ProcessorEid;
481 UINT8 IoSapicVector;
482 UINT32 GlobalSystemInterrupt;
483 UINT32 PlatformInterruptSourceFlags;
484 UINT8 CpeiProcessorOverride;
485 UINT8 Reserved[31];
486 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
487
488 //
489 // MPS INTI flags.
490 // All other bits are reserved and must be set to 0.
491 //
492 #define EFI_ACPI_5_0_POLARITY (3 << 0)
493 #define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)
494
495 ///
496 /// Non-Maskable Interrupt Source Structure
497 ///
498 typedef struct {
499 UINT8 Type;
500 UINT8 Length;
501 UINT16 Flags;
502 UINT32 GlobalSystemInterrupt;
503 } EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
504
505 ///
506 /// Local APIC NMI Structure
507 ///
508 typedef struct {
509 UINT8 Type;
510 UINT8 Length;
511 UINT8 AcpiProcessorId;
512 UINT16 Flags;
513 UINT8 LocalApicLint;
514 } EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;
515
516 ///
517 /// Local APIC Address Override Structure
518 ///
519 typedef struct {
520 UINT8 Type;
521 UINT8 Length;
522 UINT16 Reserved;
523 UINT64 LocalApicAddress;
524 } EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
525
526 ///
527 /// IO SAPIC Structure
528 ///
529 typedef struct {
530 UINT8 Type;
531 UINT8 Length;
532 UINT8 IoApicId;
533 UINT8 Reserved;
534 UINT32 GlobalSystemInterruptBase;
535 UINT64 IoSapicAddress;
536 } EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;
537
538 ///
539 /// Local SAPIC Structure
540 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
541 ///
542 typedef struct {
543 UINT8 Type;
544 UINT8 Length;
545 UINT8 AcpiProcessorId;
546 UINT8 LocalSapicId;
547 UINT8 LocalSapicEid;
548 UINT8 Reserved[3];
549 UINT32 Flags;
550 UINT32 ACPIProcessorUIDValue;
551 } EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
552
553 ///
554 /// Platform Interrupt Sources Structure
555 ///
556 typedef struct {
557 UINT8 Type;
558 UINT8 Length;
559 UINT16 Flags;
560 UINT8 InterruptType;
561 UINT8 ProcessorId;
562 UINT8 ProcessorEid;
563 UINT8 IoSapicVector;
564 UINT32 GlobalSystemInterrupt;
565 UINT32 PlatformInterruptSourceFlags;
566 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
567
568 ///
569 /// Platform Interrupt Source Flags.
570 /// All other bits are reserved and must be set to 0.
571 ///
572 #define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
573
574 ///
575 /// Processor Local x2APIC Structure Definition
576 ///
577 typedef struct {
578 UINT8 Type;
579 UINT8 Length;
580 UINT8 Reserved[2];
581 UINT32 X2ApicId;
582 UINT32 Flags;
583 UINT32 AcpiProcessorUid;
584 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
585
586 ///
587 /// Local x2APIC NMI Structure
588 ///
589 typedef struct {
590 UINT8 Type;
591 UINT8 Length;
592 UINT16 Flags;
593 UINT32 AcpiProcessorUid;
594 UINT8 LocalX2ApicLint;
595 UINT8 Reserved[3];
596 } EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;
597
598 ///
599 /// GIC Structure
600 ///
601 typedef struct {
602 UINT8 Type;
603 UINT8 Length;
604 UINT16 Reserved;
605 UINT32 GicId;
606 UINT32 AcpiProcessorUid;
607 UINT32 Flags;
608 UINT32 ParkingProtocolVersion;
609 UINT32 PerformanceInterruptGsiv;
610 UINT64 ParkedAddress;
611 UINT64 PhysicalBaseAddress;
612 } EFI_ACPI_5_0_GIC_STRUCTURE;
613
614 ///
615 /// GIC Flags. All other bits are reserved and must be 0.
616 ///
617 #define EFI_ACPI_5_0_GIC_ENABLED BIT0
618 #define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
619
620 ///
621 /// GIC Distributor Structure
622 ///
623 typedef struct {
624 UINT8 Type;
625 UINT8 Length;
626 UINT16 Reserved1;
627 UINT32 GicId;
628 UINT64 PhysicalBaseAddress;
629 UINT32 SystemVectorBase;
630 UINT32 Reserved2;
631 } EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;
632
633 ///
634 /// Smart Battery Description Table (SBST)
635 ///
636 typedef struct {
637 EFI_ACPI_DESCRIPTION_HEADER Header;
638 UINT32 WarningEnergyLevel;
639 UINT32 LowEnergyLevel;
640 UINT32 CriticalEnergyLevel;
641 } EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;
642
643 ///
644 /// SBST Version (as defined in ACPI 5.0 spec.)
645 ///
646 #define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
647
648 ///
649 /// Embedded Controller Boot Resources Table (ECDT)
650 /// The table is followed by a null terminated ASCII string that contains
651 /// a fully qualified reference to the name space object.
652 ///
653 typedef struct {
654 EFI_ACPI_DESCRIPTION_HEADER Header;
655 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
656 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
657 UINT32 Uid;
658 UINT8 GpeBit;
659 } EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
660
661 ///
662 /// ECDT Version (as defined in ACPI 5.0 spec.)
663 ///
664 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
665
666 ///
667 /// System Resource Affinity Table (SRAT). The rest of the table
668 /// must be defined in a platform specific manner.
669 ///
670 typedef struct {
671 EFI_ACPI_DESCRIPTION_HEADER Header;
672 UINT32 Reserved1; ///< Must be set to 1
673 UINT64 Reserved2;
674 } EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
675
676 ///
677 /// SRAT Version (as defined in ACPI 5.0 spec.)
678 ///
679 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
680
681 //
682 // SRAT structure types.
683 // All other values between 0x03 an 0xFF are reserved and
684 // will be ignored by OSPM.
685 //
686 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
687 #define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01
688 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
689
690 ///
691 /// Processor Local APIC/SAPIC Affinity Structure Definition
692 ///
693 typedef struct {
694 UINT8 Type;
695 UINT8 Length;
696 UINT8 ProximityDomain7To0;
697 UINT8 ApicId;
698 UINT32 Flags;
699 UINT8 LocalSapicEid;
700 UINT8 ProximityDomain31To8[3];
701 UINT32 ClockDomain;
702 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
703
704 ///
705 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
706 ///
707 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
708
709 ///
710 /// Memory Affinity Structure Definition
711 ///
712 typedef struct {
713 UINT8 Type;
714 UINT8 Length;
715 UINT32 ProximityDomain;
716 UINT16 Reserved1;
717 UINT32 AddressBaseLow;
718 UINT32 AddressBaseHigh;
719 UINT32 LengthLow;
720 UINT32 LengthHigh;
721 UINT32 Reserved2;
722 UINT32 Flags;
723 UINT64 Reserved3;
724 } EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;
725
726 //
727 // Memory Flags. All other bits are reserved and must be 0.
728 //
729 #define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
730 #define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
731 #define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
732
733 ///
734 /// Processor Local x2APIC Affinity Structure Definition
735 ///
736 typedef struct {
737 UINT8 Type;
738 UINT8 Length;
739 UINT8 Reserved1[2];
740 UINT32 ProximityDomain;
741 UINT32 X2ApicId;
742 UINT32 Flags;
743 UINT32 ClockDomain;
744 UINT8 Reserved2[4];
745 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
746
747 ///
748 /// System Locality Distance Information Table (SLIT).
749 /// The rest of the table is a matrix.
750 ///
751 typedef struct {
752 EFI_ACPI_DESCRIPTION_HEADER Header;
753 UINT64 NumberOfSystemLocalities;
754 } EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
755
756 ///
757 /// SLIT Version (as defined in ACPI 5.0 spec.)
758 ///
759 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
760
761 ///
762 /// Corrected Platform Error Polling Table (CPEP)
763 ///
764 typedef struct {
765 EFI_ACPI_DESCRIPTION_HEADER Header;
766 UINT8 Reserved[8];
767 } EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
768
769 ///
770 /// CPEP Version (as defined in ACPI 5.0 spec.)
771 ///
772 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
773
774 //
775 // CPEP processor structure types.
776 //
777 #define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
778
779 ///
780 /// Corrected Platform Error Polling Processor Structure Definition
781 ///
782 typedef struct {
783 UINT8 Type;
784 UINT8 Length;
785 UINT8 ProcessorId;
786 UINT8 ProcessorEid;
787 UINT32 PollingInterval;
788 } EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
789
790 ///
791 /// Maximum System Characteristics Table (MSCT)
792 ///
793 typedef struct {
794 EFI_ACPI_DESCRIPTION_HEADER Header;
795 UINT32 OffsetProxDomInfo;
796 UINT32 MaximumNumberOfProximityDomains;
797 UINT32 MaximumNumberOfClockDomains;
798 UINT64 MaximumPhysicalAddress;
799 } EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
800
801 ///
802 /// MSCT Version (as defined in ACPI 5.0 spec.)
803 ///
804 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
805
806 ///
807 /// Maximum Proximity Domain Information Structure Definition
808 ///
809 typedef struct {
810 UINT8 Revision;
811 UINT8 Length;
812 UINT32 ProximityDomainRangeLow;
813 UINT32 ProximityDomainRangeHigh;
814 UINT32 MaximumProcessorCapacity;
815 UINT64 MaximumMemoryCapacity;
816 } EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
817
818 ///
819 /// ACPI RAS Feature Table definition.
820 ///
821 typedef struct {
822 EFI_ACPI_DESCRIPTION_HEADER Header;
823 UINT8 PlatformCommunicationChannelIdentifier[12];
824 } EFI_ACPI_5_0_RAS_FEATURE_TABLE;
825
826 ///
827 /// RASF Version (as defined in ACPI 5.0 spec.)
828 ///
829 #define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
830
831 ///
832 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
833 ///
834 typedef struct {
835 UINT32 Signature;
836 UINT16 Command;
837 UINT16 Status;
838 UINT16 Version;
839 UINT8 RASCapabilities[16];
840 UINT8 SetRASCapabilities[16];
841 UINT16 NumberOfRASFParameterBlocks;
842 UINT32 SetRASCapabilitiesStatus;
843 } EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
844
845 ///
846 /// ACPI RASF PCC command code
847 ///
848 #define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
849
850 ///
851 /// ACPI RASF Platform RAS Capabilities
852 ///
853 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
854 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
855
856 ///
857 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
858 ///
859 typedef struct {
860 UINT16 Type;
861 UINT16 Version;
862 UINT16 Length;
863 UINT16 PatrolScrubCommand;
864 UINT64 RequestedAddressRange[2];
865 UINT64 ActualAddressRange[2];
866 UINT16 Flags;
867 UINT8 RequestedSpeed;
868 } EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
869
870 ///
871 /// ACPI RASF Patrol Scrub command
872 ///
873 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
874 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
875 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
876
877 ///
878 /// Memory Power State Table definition.
879 ///
880 typedef struct {
881 EFI_ACPI_DESCRIPTION_HEADER Header;
882 UINT8 PlatformCommunicationChannelIdentifier;
883 UINT8 Reserved[3];
884 // Memory Power Node Structure
885 // Memory Power State Characteristics
886 } EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;
887
888 ///
889 /// MPST Version (as defined in ACPI 5.0 spec.)
890 ///
891 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
892
893 ///
894 /// MPST Platform Communication Channel Shared Memory Region definition.
895 ///
896 typedef struct {
897 UINT32 Signature;
898 UINT16 Command;
899 UINT16 Status;
900 UINT32 MemoryPowerCommandRegister;
901 UINT32 MemoryPowerStatusRegister;
902 UINT32 PowerStateId;
903 UINT32 MemoryPowerNodeId;
904 UINT64 MemoryEnergyConsumed;
905 UINT64 ExpectedAveragePowerComsuned;
906 } EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
907
908 ///
909 /// ACPI MPST PCC command code
910 ///
911 #define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
912
913 ///
914 /// ACPI MPST Memory Power command
915 ///
916 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
917 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
918 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
919 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
920
921 ///
922 /// MPST Memory Power Node Table
923 ///
924 typedef struct {
925 UINT8 PowerStateValue;
926 UINT8 PowerStateInformationIndex;
927 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;
928
929 typedef struct {
930 UINT8 Flag;
931 UINT8 Reserved;
932 UINT16 MemoryPowerNodeId;
933 UINT32 Length;
934 UINT64 AddressBase;
935 UINT64 AddressLength;
936 UINT32 NumberOfPowerStates;
937 UINT32 NumberOfPhysicalComponents;
938 // EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
939 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
940 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;
941
942 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
943 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
944 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
945
946 typedef struct {
947 UINT16 MemoryPowerNodeCount;
948 UINT8 Reserved[2];
949 } EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;
950
951 ///
952 /// MPST Memory Power State Characteristics Table
953 ///
954 typedef struct {
955 UINT8 PowerStateStructureID;
956 UINT8 Flag;
957 UINT16 Reserved;
958 UINT32 AveragePowerConsumedInMPS0;
959 UINT32 RelativePowerSavingToMPS0;
960 UINT64 ExitLatencyToMPS0;
961 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
962
963 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
964 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
965 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
966
967 typedef struct {
968 UINT16 MemoryPowerStateCharacteristicsCount;
969 UINT8 Reserved[2];
970 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
971
972 ///
973 /// Memory Topology Table definition.
974 ///
975 typedef struct {
976 EFI_ACPI_DESCRIPTION_HEADER Header;
977 UINT32 Reserved;
978 } EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;
979
980 ///
981 /// PMTT Version (as defined in ACPI 5.0 spec.)
982 ///
983 #define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
984
985 ///
986 /// Common Memory Aggregator Device Structure.
987 ///
988 typedef struct {
989 UINT8 Type;
990 UINT8 Reserved;
991 UINT16 Length;
992 UINT16 Flags;
993 UINT16 Reserved1;
994 } EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
995
996 ///
997 /// Memory Aggregator Device Type
998 ///
999 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0
1000 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
1001 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2
1002
1003 ///
1004 /// Socket Memory Aggregator Device Structure.
1005 ///
1006 typedef struct {
1007 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1008 UINT16 SocketIdentifier;
1009 UINT16 Reserved;
1010 // EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1011 } EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1012
1013 ///
1014 /// MemoryController Memory Aggregator Device Structure.
1015 ///
1016 typedef struct {
1017 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1018 UINT32 ReadLatency;
1019 UINT32 WriteLatency;
1020 UINT32 ReadBandwidth;
1021 UINT32 WriteBandwidth;
1022 UINT16 OptimalAccessUnit;
1023 UINT16 OptimalAccessAlignment;
1024 UINT16 Reserved;
1025 UINT16 NumberOfProximityDomains;
1026 // UINT32 ProximityDomain[NumberOfProximityDomains];
1027 // EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1028 } EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1029
1030 ///
1031 /// DIMM Memory Aggregator Device Structure.
1032 ///
1033 typedef struct {
1034 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1035 UINT16 PhysicalComponentIdentifier;
1036 UINT16 Reserved;
1037 UINT32 SizeOfDimm;
1038 UINT32 SmbiosHandle;
1039 } EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1040
1041 ///
1042 /// Boot Graphics Resource Table definition.
1043 ///
1044 typedef struct {
1045 EFI_ACPI_DESCRIPTION_HEADER Header;
1046 ///
1047 /// 2-bytes (16 bit) version ID. This value must be 1.
1048 ///
1049 UINT16 Version;
1050 ///
1051 /// 1-byte status field indicating current status about the table.
1052 /// Bits[7:1] = Reserved (must be zero)
1053 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1054 ///
1055 UINT8 Status;
1056 ///
1057 /// 1-byte enumerated type field indicating format of the image.
1058 /// 0 = Bitmap
1059 /// 1 - 255 Reserved (for future use)
1060 ///
1061 UINT8 ImageType;
1062 ///
1063 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1064 /// of the image bitmap.
1065 ///
1066 UINT64 ImageAddress;
1067 ///
1068 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1069 /// (X, Y) display offset of the top left corner of the boot image.
1070 /// The top left corner of the display is at offset (0, 0).
1071 ///
1072 UINT32 ImageOffsetX;
1073 ///
1074 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1075 /// (X, Y) display offset of the top left corner of the boot image.
1076 /// The top left corner of the display is at offset (0, 0).
1077 ///
1078 UINT32 ImageOffsetY;
1079 } EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;
1080
1081 ///
1082 /// BGRT Revision
1083 ///
1084 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1085
1086 ///
1087 /// BGRT Version
1088 ///
1089 #define EFI_ACPI_5_0_BGRT_VERSION 0x01
1090
1091 ///
1092 /// BGRT Status
1093 ///
1094 #define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
1095 #define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
1096 #define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
1097 #define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
1098
1099 ///
1100 /// BGRT Image Type
1101 ///
1102 #define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00
1103
1104 ///
1105 /// FPDT Version (as defined in ACPI 5.0 spec.)
1106 ///
1107 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1108
1109 ///
1110 /// FPDT Performance Record Types
1111 ///
1112 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1113 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1114
1115 ///
1116 /// FPDT Performance Record Revision
1117 ///
1118 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1119 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1120
1121 ///
1122 /// FPDT Runtime Performance Record Types
1123 ///
1124 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1125 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1126 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1127
1128 ///
1129 /// FPDT Runtime Performance Record Revision
1130 ///
1131 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1132 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1133 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1134
1135 ///
1136 /// FPDT Performance Record header
1137 ///
1138 typedef struct {
1139 UINT16 Type;
1140 UINT8 Length;
1141 UINT8 Revision;
1142 } EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;
1143
1144 ///
1145 /// FPDT Performance Table header
1146 ///
1147 typedef struct {
1148 UINT32 Signature;
1149 UINT32 Length;
1150 } EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;
1151
1152 ///
1153 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1154 ///
1155 typedef struct {
1156 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1157 UINT32 Reserved;
1158 ///
1159 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1160 ///
1161 UINT64 BootPerformanceTablePointer;
1162 } EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1163
1164 ///
1165 /// FPDT S3 Performance Table Pointer Record Structure
1166 ///
1167 typedef struct {
1168 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1169 UINT32 Reserved;
1170 ///
1171 /// 64-bit processor-relative physical address of the S3 Performance Table.
1172 ///
1173 UINT64 S3PerformanceTablePointer;
1174 } EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1175
1176 ///
1177 /// FPDT Firmware Basic Boot Performance Record Structure
1178 ///
1179 typedef struct {
1180 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1181 UINT32 Reserved;
1182 ///
1183 /// Timer value logged at the beginning of firmware image execution.
1184 /// This may not always be zero or near zero.
1185 ///
1186 UINT64 ResetEnd;
1187 ///
1188 /// Timer value logged just prior to loading the OS boot loader into memory.
1189 /// For non-UEFI compatible boots, this field must be zero.
1190 ///
1191 UINT64 OsLoaderLoadImageStart;
1192 ///
1193 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1194 /// For non-UEFI compatible boots, the timer value logged will be just prior
1195 /// to the INT 19h handler invocation.
1196 ///
1197 UINT64 OsLoaderStartImageStart;
1198 ///
1199 /// Timer value logged at the point when the OS loader calls the
1200 /// ExitBootServices function for UEFI compatible firmware.
1201 /// For non-UEFI compatible boots, this field must be zero.
1202 ///
1203 UINT64 ExitBootServicesEntry;
1204 ///
1205 /// Timer value logged at the point just prior to when the OS loader gaining
1206 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1207 /// For non-UEFI compatible boots, this field must be zero.
1208 ///
1209 UINT64 ExitBootServicesExit;
1210 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1211
1212 ///
1213 /// FPDT Firmware Basic Boot Performance Table signature
1214 ///
1215 #define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1216
1217 //
1218 // FPDT Firmware Basic Boot Performance Table
1219 //
1220 typedef struct {
1221 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
1222 //
1223 // one or more Performance Records.
1224 //
1225 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1226
1227 ///
1228 /// FPDT "S3PT" S3 Performance Table
1229 ///
1230 #define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1231
1232 //
1233 // FPDT Firmware S3 Boot Performance Table
1234 //
1235 typedef struct {
1236 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
1237 //
1238 // one or more Performance Records.
1239 //
1240 } EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;
1241
1242 ///
1243 /// FPDT Basic S3 Resume Performance Record
1244 ///
1245 typedef struct {
1246 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1247 ///
1248 /// A count of the number of S3 resume cycles since the last full boot sequence.
1249 ///
1250 UINT32 ResumeCount;
1251 ///
1252 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1253 /// OS waking vector. Only the most recent resume cycle's time is retained.
1254 ///
1255 UINT64 FullResume;
1256 ///
1257 /// Average timer value of all resume cycles logged since the last full boot
1258 /// sequence, including the most recent resume. Note that the entire log of
1259 /// timer values does not need to be retained in order to calculate this average.
1260 ///
1261 UINT64 AverageResume;
1262 } EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;
1263
1264 ///
1265 /// FPDT Basic S3 Suspend Performance Record
1266 ///
1267 typedef struct {
1268 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1269 ///
1270 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1271 /// Only the most recent suspend cycle's timer value is retained.
1272 ///
1273 UINT64 SuspendStart;
1274 ///
1275 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1276 /// mechanism) used to trigger hardware entry to S3.
1277 /// Only the most recent suspend cycle's timer value is retained.
1278 ///
1279 UINT64 SuspendEnd;
1280 } EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;
1281
1282 ///
1283 /// Firmware Performance Record Table definition.
1284 ///
1285 typedef struct {
1286 EFI_ACPI_DESCRIPTION_HEADER Header;
1287 } EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1288
1289 ///
1290 /// Generic Timer Description Table definition.
1291 ///
1292 typedef struct {
1293 EFI_ACPI_DESCRIPTION_HEADER Header;
1294 UINT64 PhysicalAddress;
1295 UINT32 GlobalFlags;
1296 UINT32 SecurePL1TimerGSIV;
1297 UINT32 SecurePL1TimerFlags;
1298 UINT32 NonSecurePL1TimerGSIV;
1299 UINT32 NonSecurePL1TimerFlags;
1300 UINT32 VirtualTimerGSIV;
1301 UINT32 VirtualTimerFlags;
1302 UINT32 NonSecurePL2TimerGSIV;
1303 UINT32 NonSecurePL2TimerFlags;
1304 } EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;
1305
1306 ///
1307 /// GTDT Version (as defined in ACPI 5.0 spec.)
1308 ///
1309 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1310
1311 ///
1312 /// Global Flags. All other bits are reserved and must be 0.
1313 ///
1314 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
1315 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
1316
1317 ///
1318 /// Timer Flags. All other bits are reserved and must be 0.
1319 ///
1320 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1321 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1322
1323 ///
1324 /// Boot Error Record Table (BERT)
1325 ///
1326 typedef struct {
1327 EFI_ACPI_DESCRIPTION_HEADER Header;
1328 UINT32 BootErrorRegionLength;
1329 UINT64 BootErrorRegion;
1330 } EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;
1331
1332 ///
1333 /// BERT Version (as defined in ACPI 5.0 spec.)
1334 ///
1335 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1336
1337 ///
1338 /// Boot Error Region Block Status Definition
1339 ///
1340 typedef struct {
1341 UINT32 UncorrectableErrorValid : 1;
1342 UINT32 CorrectableErrorValid : 1;
1343 UINT32 MultipleUncorrectableErrors : 1;
1344 UINT32 MultipleCorrectableErrors : 1;
1345 UINT32 ErrorDataEntryCount : 10;
1346 UINT32 Reserved : 18;
1347 } EFI_ACPI_5_0_ERROR_BLOCK_STATUS;
1348
1349 ///
1350 /// Boot Error Region Definition
1351 ///
1352 typedef struct {
1353 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
1354 UINT32 RawDataOffset;
1355 UINT32 RawDataLength;
1356 UINT32 DataLength;
1357 UINT32 ErrorSeverity;
1358 } EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;
1359
1360 //
1361 // Boot Error Severity types
1362 //
1363 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
1364 #define EFI_ACPI_5_0_ERROR_SEVERITY_RECOVERABLE 0x00
1365 #define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
1366 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
1367 #define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
1368
1369 ///
1370 /// Generic Error Data Entry Definition
1371 ///
1372 typedef struct {
1373 UINT8 SectionType[16];
1374 UINT32 ErrorSeverity;
1375 UINT16 Revision;
1376 UINT8 ValidationBits;
1377 UINT8 Flags;
1378 UINT32 ErrorDataLength;
1379 UINT8 FruId[16];
1380 UINT8 FruText[20];
1381 } EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1382
1383 ///
1384 /// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)
1385 ///
1386 #define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1387
1388 ///
1389 /// HEST - Hardware Error Source Table
1390 ///
1391 typedef struct {
1392 EFI_ACPI_DESCRIPTION_HEADER Header;
1393 UINT32 ErrorSourceCount;
1394 } EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1395
1396 ///
1397 /// HEST Version (as defined in ACPI 5.0 spec.)
1398 ///
1399 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1400
1401 //
1402 // Error Source structure types.
1403 //
1404 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1405 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1406 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
1407 #define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
1408 #define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07
1409 #define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08
1410 #define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09
1411
1412 //
1413 // Error Source structure flags.
1414 //
1415 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1416 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1417
1418 ///
1419 /// IA-32 Architecture Machine Check Exception Structure Definition
1420 ///
1421 typedef struct {
1422 UINT16 Type;
1423 UINT16 SourceId;
1424 UINT8 Reserved0[2];
1425 UINT8 Flags;
1426 UINT8 Enabled;
1427 UINT32 NumberOfRecordsToPreAllocate;
1428 UINT32 MaxSectionsPerRecord;
1429 UINT64 GlobalCapabilityInitData;
1430 UINT64 GlobalControlInitData;
1431 UINT8 NumberOfHardwareBanks;
1432 UINT8 Reserved1[7];
1433 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1434
1435 ///
1436 /// IA-32 Architecture Machine Check Bank Structure Definition
1437 ///
1438 typedef struct {
1439 UINT8 BankNumber;
1440 UINT8 ClearStatusOnInitialization;
1441 UINT8 StatusDataFormat;
1442 UINT8 Reserved0;
1443 UINT32 ControlRegisterMsrAddress;
1444 UINT64 ControlInitData;
1445 UINT32 StatusRegisterMsrAddress;
1446 UINT32 AddressRegisterMsrAddress;
1447 UINT32 MiscRegisterMsrAddress;
1448 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1449
1450 ///
1451 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1452 ///
1453 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1454 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1455 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1456
1457 //
1458 // Hardware Error Notification types. All other values are reserved
1459 //
1460 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1461 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1462 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1463 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1464 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1465
1466 ///
1467 /// Hardware Error Notification Configuration Write Enable Structure Definition
1468 ///
1469 typedef struct {
1470 UINT16 Type : 1;
1471 UINT16 PollInterval : 1;
1472 UINT16 SwitchToPollingThresholdValue : 1;
1473 UINT16 SwitchToPollingThresholdWindow : 1;
1474 UINT16 ErrorThresholdValue : 1;
1475 UINT16 ErrorThresholdWindow : 1;
1476 UINT16 Reserved : 10;
1477 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1478
1479 ///
1480 /// Hardware Error Notification Structure Definition
1481 ///
1482 typedef struct {
1483 UINT8 Type;
1484 UINT8 Length;
1485 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1486 UINT32 PollInterval;
1487 UINT32 Vector;
1488 UINT32 SwitchToPollingThresholdValue;
1489 UINT32 SwitchToPollingThresholdWindow;
1490 UINT32 ErrorThresholdValue;
1491 UINT32 ErrorThresholdWindow;
1492 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1493
1494 ///
1495 /// IA-32 Architecture Corrected Machine Check Structure Definition
1496 ///
1497 typedef struct {
1498 UINT16 Type;
1499 UINT16 SourceId;
1500 UINT8 Reserved0[2];
1501 UINT8 Flags;
1502 UINT8 Enabled;
1503 UINT32 NumberOfRecordsToPreAllocate;
1504 UINT32 MaxSectionsPerRecord;
1505 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1506 UINT8 NumberOfHardwareBanks;
1507 UINT8 Reserved1[3];
1508 } EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1509
1510 ///
1511 /// IA-32 Architecture NMI Error Structure Definition
1512 ///
1513 typedef struct {
1514 UINT16 Type;
1515 UINT16 SourceId;
1516 UINT8 Reserved0[2];
1517 UINT32 NumberOfRecordsToPreAllocate;
1518 UINT32 MaxSectionsPerRecord;
1519 UINT32 MaxRawDataLength;
1520 } EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1521
1522 ///
1523 /// PCI Express Root Port AER Structure Definition
1524 ///
1525 typedef struct {
1526 UINT16 Type;
1527 UINT16 SourceId;
1528 UINT8 Reserved0[2];
1529 UINT8 Flags;
1530 UINT8 Enabled;
1531 UINT32 NumberOfRecordsToPreAllocate;
1532 UINT32 MaxSectionsPerRecord;
1533 UINT32 Bus;
1534 UINT16 Device;
1535 UINT16 Function;
1536 UINT16 DeviceControl;
1537 UINT8 Reserved1[2];
1538 UINT32 UncorrectableErrorMask;
1539 UINT32 UncorrectableErrorSeverity;
1540 UINT32 CorrectableErrorMask;
1541 UINT32 AdvancedErrorCapabilitiesAndControl;
1542 UINT32 RootErrorCommand;
1543 } EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1544
1545 ///
1546 /// PCI Express Device AER Structure Definition
1547 ///
1548 typedef struct {
1549 UINT16 Type;
1550 UINT16 SourceId;
1551 UINT8 Reserved0[2];
1552 UINT8 Flags;
1553 UINT8 Enabled;
1554 UINT32 NumberOfRecordsToPreAllocate;
1555 UINT32 MaxSectionsPerRecord;
1556 UINT32 Bus;
1557 UINT16 Device;
1558 UINT16 Function;
1559 UINT16 DeviceControl;
1560 UINT8 Reserved1[2];
1561 UINT32 UncorrectableErrorMask;
1562 UINT32 UncorrectableErrorSeverity;
1563 UINT32 CorrectableErrorMask;
1564 UINT32 AdvancedErrorCapabilitiesAndControl;
1565 } EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1566
1567 ///
1568 /// PCI Express Bridge AER Structure Definition
1569 ///
1570 typedef struct {
1571 UINT16 Type;
1572 UINT16 SourceId;
1573 UINT8 Reserved0[2];
1574 UINT8 Flags;
1575 UINT8 Enabled;
1576 UINT32 NumberOfRecordsToPreAllocate;
1577 UINT32 MaxSectionsPerRecord;
1578 UINT32 Bus;
1579 UINT16 Device;
1580 UINT16 Function;
1581 UINT16 DeviceControl;
1582 UINT8 Reserved1[2];
1583 UINT32 UncorrectableErrorMask;
1584 UINT32 UncorrectableErrorSeverity;
1585 UINT32 CorrectableErrorMask;
1586 UINT32 AdvancedErrorCapabilitiesAndControl;
1587 UINT32 SecondaryUncorrectableErrorMask;
1588 UINT32 SecondaryUncorrectableErrorSeverity;
1589 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1590 } EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1591
1592 ///
1593 /// Generic Hardware Error Source Structure Definition
1594 ///
1595 typedef struct {
1596 UINT16 Type;
1597 UINT16 SourceId;
1598 UINT16 RelatedSourceId;
1599 UINT8 Flags;
1600 UINT8 Enabled;
1601 UINT32 NumberOfRecordsToPreAllocate;
1602 UINT32 MaxSectionsPerRecord;
1603 UINT32 MaxRawDataLength;
1604 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1605 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1606 UINT32 ErrorStatusBlockLength;
1607 } EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1608
1609 ///
1610 /// Generic Error Status Definition
1611 ///
1612 typedef struct {
1613 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
1614 UINT32 RawDataOffset;
1615 UINT32 RawDataLength;
1616 UINT32 DataLength;
1617 UINT32 ErrorSeverity;
1618 } EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;
1619
1620 ///
1621 /// ERST - Error Record Serialization Table
1622 ///
1623 typedef struct {
1624 EFI_ACPI_DESCRIPTION_HEADER Header;
1625 UINT32 SerializationHeaderSize;
1626 UINT8 Reserved0[4];
1627 UINT32 InstructionEntryCount;
1628 } EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
1629
1630 ///
1631 /// ERST Version (as defined in ACPI 5.0 spec.)
1632 ///
1633 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1634
1635 ///
1636 /// ERST Serialization Actions
1637 ///
1638 #define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
1639 #define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
1640 #define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
1641 #define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
1642 #define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
1643 #define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
1644 #define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
1645 #define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
1646 #define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
1647 #define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
1648 #define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
1649 #define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1650 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1651 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1652 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1653
1654 ///
1655 /// ERST Action Command Status
1656 ///
1657 #define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
1658 #define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1659 #define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1660 #define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
1661 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1662 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
1663
1664 ///
1665 /// ERST Serialization Instructions
1666 ///
1667 #define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
1668 #define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
1669 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
1670 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
1671 #define EFI_ACPI_5_0_ERST_NOOP 0x04
1672 #define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
1673 #define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
1674 #define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
1675 #define EFI_ACPI_5_0_ERST_ADD 0x08
1676 #define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
1677 #define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
1678 #define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
1679 #define EFI_ACPI_5_0_ERST_STALL 0x0C
1680 #define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
1681 #define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1682 #define EFI_ACPI_5_0_ERST_GOTO 0x0F
1683 #define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
1684 #define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
1685 #define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
1686
1687 ///
1688 /// ERST Instruction Flags
1689 ///
1690 #define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
1691
1692 ///
1693 /// ERST Serialization Instruction Entry
1694 ///
1695 typedef struct {
1696 UINT8 SerializationAction;
1697 UINT8 Instruction;
1698 UINT8 Flags;
1699 UINT8 Reserved0;
1700 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1701 UINT64 Value;
1702 UINT64 Mask;
1703 } EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
1704
1705 ///
1706 /// EINJ - Error Injection Table
1707 ///
1708 typedef struct {
1709 EFI_ACPI_DESCRIPTION_HEADER Header;
1710 UINT32 InjectionHeaderSize;
1711 UINT8 InjectionFlags;
1712 UINT8 Reserved0[3];
1713 UINT32 InjectionEntryCount;
1714 } EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;
1715
1716 ///
1717 /// EINJ Version (as defined in ACPI 5.0 spec.)
1718 ///
1719 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
1720
1721 ///
1722 /// EINJ Error Injection Actions
1723 ///
1724 #define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
1725 #define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1726 #define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
1727 #define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
1728 #define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
1729 #define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
1730 #define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
1731 #define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
1732 #define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
1733
1734 ///
1735 /// EINJ Action Command Status
1736 ///
1737 #define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
1738 #define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1739 #define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
1740
1741 ///
1742 /// EINJ Error Type Definition
1743 ///
1744 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1745 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1746 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1747 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1748 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1749 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1750 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1751 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1752 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1753 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1754 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1755 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1756
1757 ///
1758 /// EINJ Injection Instructions
1759 ///
1760 #define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
1761 #define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
1762 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
1763 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
1764 #define EFI_ACPI_5_0_EINJ_NOOP 0x04
1765
1766 ///
1767 /// EINJ Instruction Flags
1768 ///
1769 #define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
1770
1771 ///
1772 /// EINJ Injection Instruction Entry
1773 ///
1774 typedef struct {
1775 UINT8 InjectionAction;
1776 UINT8 Instruction;
1777 UINT8 Flags;
1778 UINT8 Reserved0;
1779 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1780 UINT64 Value;
1781 UINT64 Mask;
1782 } EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
1783
1784 ///
1785 /// EINJ Trigger Action Table
1786 ///
1787 typedef struct {
1788 UINT32 HeaderSize;
1789 UINT32 Revision;
1790 UINT32 TableSize;
1791 UINT32 EntryCount;
1792 } EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;
1793
1794 ///
1795 /// Platform Communications Channel Table (PCCT)
1796 ///
1797 typedef struct {
1798 EFI_ACPI_DESCRIPTION_HEADER Header;
1799 UINT32 Flags;
1800 UINT64 Reserved;
1801 } EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
1802
1803 ///
1804 /// PCCT Version (as defined in ACPI 5.0 spec.)
1805 ///
1806 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1807
1808 ///
1809 /// PCCT Global Flags
1810 ///
1811 #define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
1812
1813 //
1814 // PCCT Subspace type
1815 //
1816 #define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1817
1818 ///
1819 /// PCC Subspace Structure Header
1820 ///
1821 typedef struct {
1822 UINT8 Type;
1823 UINT8 Length;
1824 } EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;
1825
1826 ///
1827 /// Generic Communications Subspace Structure
1828 ///
1829 typedef struct {
1830 UINT8 Type;
1831 UINT8 Length;
1832 UINT8 Reserved[6];
1833 UINT64 BaseAddress;
1834 UINT64 AddressLength;
1835 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
1836 UINT64 DoorbellPreserve;
1837 UINT64 DoorbellWrite;
1838 UINT32 NominalLatency;
1839 UINT32 MaximumPeriodicAccessRate;
1840 UINT16 MinimumRequestTurnaroundTime;
1841 } EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;
1842
1843 ///
1844 /// Generic Communications Channel Shared Memory Region
1845 ///
1846
1847 typedef struct {
1848 UINT8 Command;
1849 UINT8 Reserved : 7;
1850 UINT8 GenerateSci : 1;
1851 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
1852
1853 typedef struct {
1854 UINT8 CommandComplete : 1;
1855 UINT8 SciDoorbell : 1;
1856 UINT8 Error : 1;
1857 UINT8 PlatformNotification : 1;
1858 UINT8 Reserved : 4;
1859 UINT8 Reserved1;
1860 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
1861
1862 typedef struct {
1863 UINT32 Signature;
1864 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
1865 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
1866 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
1867
1868 //
1869 // Known table signatures
1870 //
1871
1872 ///
1873 /// "RSD PTR " Root System Description Pointer
1874 ///
1875 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1876
1877 ///
1878 /// "APIC" Multiple APIC Description Table
1879 ///
1880 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1881
1882 ///
1883 /// "BERT" Boot Error Record Table
1884 ///
1885 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1886
1887 ///
1888 /// "BGRT" Boot Graphics Resource Table
1889 ///
1890 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1891
1892 ///
1893 /// "CPEP" Corrected Platform Error Polling Table
1894 ///
1895 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1896
1897 ///
1898 /// "DSDT" Differentiated System Description Table
1899 ///
1900 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1901
1902 ///
1903 /// "ECDT" Embedded Controller Boot Resources Table
1904 ///
1905 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1906
1907 ///
1908 /// "EINJ" Error Injection Table
1909 ///
1910 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1911
1912 ///
1913 /// "ERST" Error Record Serialization Table
1914 ///
1915 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1916
1917 ///
1918 /// "FACP" Fixed ACPI Description Table
1919 ///
1920 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1921
1922 ///
1923 /// "FACS" Firmware ACPI Control Structure
1924 ///
1925 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1926
1927 ///
1928 /// "FPDT" Firmware Performance Data Table
1929 ///
1930 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1931
1932 ///
1933 /// "GTDT" Generic Timer Description Table
1934 ///
1935 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1936
1937 ///
1938 /// "HEST" Hardware Error Source Table
1939 ///
1940 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1941
1942 ///
1943 /// "MPST" Memory Power State Table
1944 ///
1945 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1946
1947 ///
1948 /// "MSCT" Maximum System Characteristics Table
1949 ///
1950 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1951
1952 ///
1953 /// "PMTT" Platform Memory Topology Table
1954 ///
1955 #define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1956
1957 ///
1958 /// "PSDT" Persistent System Description Table
1959 ///
1960 #define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1961
1962 ///
1963 /// "RASF" ACPI RAS Feature Table
1964 ///
1965 #define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1966
1967 ///
1968 /// "RSDT" Root System Description Table
1969 ///
1970 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1971
1972 ///
1973 /// "SBST" Smart Battery Specification Table
1974 ///
1975 #define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
1976
1977 ///
1978 /// "SLIT" System Locality Information Table
1979 ///
1980 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
1981
1982 ///
1983 /// "SRAT" System Resource Affinity Table
1984 ///
1985 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
1986
1987 ///
1988 /// "SSDT" Secondary System Description Table
1989 ///
1990 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
1991
1992 ///
1993 /// "XSDT" Extended System Description Table
1994 ///
1995 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
1996
1997 ///
1998 /// "BOOT" MS Simple Boot Spec
1999 ///
2000 #define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2001
2002 ///
2003 /// "CSRT" MS Core System Resource Table
2004 ///
2005 #define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2006
2007 ///
2008 /// "DBG2" MS Debug Port 2 Spec
2009 ///
2010 #define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2011
2012 ///
2013 /// "DBGP" MS Debug Port Spec
2014 ///
2015 #define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2016
2017 ///
2018 /// "DMAR" DMA Remapping Table
2019 ///
2020 #define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2021
2022 ///
2023 /// "DRTM" Dynamic Root of Trust for Measurement Table
2024 ///
2025 #define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2026
2027 ///
2028 /// "ETDT" Event Timer Description Table
2029 ///
2030 #define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2031
2032 ///
2033 /// "HPET" IA-PC High Precision Event Timer Table
2034 ///
2035 #define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2036
2037 ///
2038 /// "iBFT" iSCSI Boot Firmware Table
2039 ///
2040 #define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2041
2042 ///
2043 /// "IVRS" I/O Virtualization Reporting Structure
2044 ///
2045 #define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2046
2047 ///
2048 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2049 ///
2050 #define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2051
2052 ///
2053 /// "MCHI" Management Controller Host Interface Table
2054 ///
2055 #define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2056
2057 ///
2058 /// "MSDM" MS Data Management Table
2059 ///
2060 #define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2061
2062 ///
2063 /// "PCCT" Platform Communications Channel Table
2064 ///
2065 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
2066
2067 ///
2068 /// "SLIC" MS Software Licensing Table Specification
2069 ///
2070 #define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2071
2072 ///
2073 /// "SPCR" Serial Port Console Redirection Table
2074 ///
2075 #define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2076
2077 ///
2078 /// "SPMI" Server Platform Management Interface Table
2079 ///
2080 #define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2081
2082 ///
2083 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2084 ///
2085 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2086
2087 ///
2088 /// "TPM2" Trusted Computing Platform 1 Table
2089 ///
2090 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2091
2092 ///
2093 /// "UEFI" UEFI ACPI Data Table
2094 ///
2095 #define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2096
2097 ///
2098 /// "WAET" Windows ACPI Emulated Devices Table
2099 ///
2100 #define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2101 #define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
2102
2103 ///
2104 /// "WDAT" Watchdog Action Table
2105 ///
2106 #define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2107
2108 ///
2109 /// "WDRT" Watchdog Resource Table
2110 ///
2111 #define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2112
2113 ///
2114 /// "WPBT" MS Platform Binary Table
2115 ///
2116 #define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
2117
2118 #pragma pack()
2119
2120 #endif