MdePkg Acpi51.h:Correct the declaration of EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_ST...
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi51.h
1 /** @file
2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014.
3
4 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 **/
13
14 #ifndef _ACPI_5_1_H_
15 #define _ACPI_5_1_H_
16
17 #include <IndustryStandard/Acpi50.h>
18
19 //
20 // Ensure proper structure formats
21 //
22 #pragma pack(1)
23
24 ///
25 /// ACPI 5.1 Generic Address Space definition
26 ///
27 typedef struct {
28 UINT8 AddressSpaceId;
29 UINT8 RegisterBitWidth;
30 UINT8 RegisterBitOffset;
31 UINT8 AccessSize;
32 UINT64 Address;
33 } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;
34
35 //
36 // Generic Address Space Address IDs
37 //
38 #define EFI_ACPI_5_1_SYSTEM_MEMORY 0
39 #define EFI_ACPI_5_1_SYSTEM_IO 1
40 #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2
41 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3
42 #define EFI_ACPI_5_1_SMBUS 4
43 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A
44 #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F
45
46 //
47 // Generic Address Space Access Sizes
48 //
49 #define EFI_ACPI_5_1_UNDEFINED 0
50 #define EFI_ACPI_5_1_BYTE 1
51 #define EFI_ACPI_5_1_WORD 2
52 #define EFI_ACPI_5_1_DWORD 3
53 #define EFI_ACPI_5_1_QWORD 4
54
55 //
56 // ACPI 5.1 table structures
57 //
58
59 ///
60 /// Root System Description Pointer Structure
61 ///
62 typedef struct {
63 UINT64 Signature;
64 UINT8 Checksum;
65 UINT8 OemId[6];
66 UINT8 Revision;
67 UINT32 RsdtAddress;
68 UINT32 Length;
69 UINT64 XsdtAddress;
70 UINT8 ExtendedChecksum;
71 UINT8 Reserved[3];
72 } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;
73
74 ///
75 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
76 ///
77 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2
78
79 ///
80 /// Common table header, this prefaces all ACPI tables, including FACS, but
81 /// excluding the RSD PTR structure
82 ///
83 typedef struct {
84 UINT32 Signature;
85 UINT32 Length;
86 } EFI_ACPI_5_1_COMMON_HEADER;
87
88 //
89 // Root System Description Table
90 // No definition needed as it is a common description table header, the same with
91 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
92 //
93
94 ///
95 /// RSDT Revision (as defined in ACPI 5.1 spec.)
96 ///
97 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
98
99 //
100 // Extended System Description Table
101 // No definition needed as it is a common description table header, the same with
102 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
103 //
104
105 ///
106 /// XSDT Revision (as defined in ACPI 5.1 spec.)
107 ///
108 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
109
110 ///
111 /// Fixed ACPI Description Table Structure (FADT)
112 ///
113 typedef struct {
114 EFI_ACPI_DESCRIPTION_HEADER Header;
115 UINT32 FirmwareCtrl;
116 UINT32 Dsdt;
117 UINT8 Reserved0;
118 UINT8 PreferredPmProfile;
119 UINT16 SciInt;
120 UINT32 SmiCmd;
121 UINT8 AcpiEnable;
122 UINT8 AcpiDisable;
123 UINT8 S4BiosReq;
124 UINT8 PstateCnt;
125 UINT32 Pm1aEvtBlk;
126 UINT32 Pm1bEvtBlk;
127 UINT32 Pm1aCntBlk;
128 UINT32 Pm1bCntBlk;
129 UINT32 Pm2CntBlk;
130 UINT32 PmTmrBlk;
131 UINT32 Gpe0Blk;
132 UINT32 Gpe1Blk;
133 UINT8 Pm1EvtLen;
134 UINT8 Pm1CntLen;
135 UINT8 Pm2CntLen;
136 UINT8 PmTmrLen;
137 UINT8 Gpe0BlkLen;
138 UINT8 Gpe1BlkLen;
139 UINT8 Gpe1Base;
140 UINT8 CstCnt;
141 UINT16 PLvl2Lat;
142 UINT16 PLvl3Lat;
143 UINT16 FlushSize;
144 UINT16 FlushStride;
145 UINT8 DutyOffset;
146 UINT8 DutyWidth;
147 UINT8 DayAlrm;
148 UINT8 MonAlrm;
149 UINT8 Century;
150 UINT16 IaPcBootArch;
151 UINT8 Reserved1;
152 UINT32 Flags;
153 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;
154 UINT8 ResetValue;
155 UINT16 ArmBootArch;
156 UINT8 MinorVersion;
157 UINT64 XFirmwareCtrl;
158 UINT64 XDsdt;
159 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
165 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
166 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
167 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
168 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
169 } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;
170
171 ///
172 /// FADT Version (as defined in ACPI 5.1 spec.)
173 ///
174 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
175 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01
176
177 //
178 // Fixed ACPI Description Table Preferred Power Management Profile
179 //
180 #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0
181 #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1
182 #define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2
183 #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3
184 #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4
185 #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5
186 #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6
187 #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7
188 #define EFI_ACPI_5_1_PM_PROFILE_TABLET 8
189
190 //
191 // Fixed ACPI Description Table Boot Architecture Flags
192 // All other bits are reserved and must be set to 0.
193 //
194 #define EFI_ACPI_5_1_LEGACY_DEVICES BIT0
195 #define EFI_ACPI_5_1_8042 BIT1
196 #define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2
197 #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3
198 #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4
199 #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5
200
201 //
202 // Fixed ACPI Description Table Arm Boot Architecture Flags
203 // All other bits are reserved and must be set to 0.
204 //
205 #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0
206 #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1
207
208 //
209 // Fixed ACPI Description Table Fixed Feature Flags
210 // All other bits are reserved and must be set to 0.
211 //
212 #define EFI_ACPI_5_1_WBINVD BIT0
213 #define EFI_ACPI_5_1_WBINVD_FLUSH BIT1
214 #define EFI_ACPI_5_1_PROC_C1 BIT2
215 #define EFI_ACPI_5_1_P_LVL2_UP BIT3
216 #define EFI_ACPI_5_1_PWR_BUTTON BIT4
217 #define EFI_ACPI_5_1_SLP_BUTTON BIT5
218 #define EFI_ACPI_5_1_FIX_RTC BIT6
219 #define EFI_ACPI_5_1_RTC_S4 BIT7
220 #define EFI_ACPI_5_1_TMR_VAL_EXT BIT8
221 #define EFI_ACPI_5_1_DCK_CAP BIT9
222 #define EFI_ACPI_5_1_RESET_REG_SUP BIT10
223 #define EFI_ACPI_5_1_SEALED_CASE BIT11
224 #define EFI_ACPI_5_1_HEADLESS BIT12
225 #define EFI_ACPI_5_1_CPU_SW_SLP BIT13
226 #define EFI_ACPI_5_1_PCI_EXP_WAK BIT14
227 #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15
228 #define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16
229 #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17
230 #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18
231 #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
232 #define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20
233 #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21
234
235 ///
236 /// Firmware ACPI Control Structure
237 ///
238 typedef struct {
239 UINT32 Signature;
240 UINT32 Length;
241 UINT32 HardwareSignature;
242 UINT32 FirmwareWakingVector;
243 UINT32 GlobalLock;
244 UINT32 Flags;
245 UINT64 XFirmwareWakingVector;
246 UINT8 Version;
247 UINT8 Reserved0[3];
248 UINT32 OspmFlags;
249 UINT8 Reserved1[24];
250 } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;
251
252 ///
253 /// FACS Version (as defined in ACPI 5.1 spec.)
254 ///
255 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
256
257 ///
258 /// Firmware Control Structure Feature Flags
259 /// All other bits are reserved and must be set to 0.
260 ///
261 #define EFI_ACPI_5_1_S4BIOS_F BIT0
262 #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1
263
264 ///
265 /// OSPM Enabled Firmware Control Structure Flags
266 /// All other bits are reserved and must be set to 0.
267 ///
268 #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0
269
270 //
271 // Differentiated System Description Table,
272 // Secondary System Description Table
273 // and Persistent System Description Table,
274 // no definition needed as they are common description table header, the same with
275 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
276 //
277 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
278 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
279
280 ///
281 /// Multiple APIC Description Table header definition. The rest of the table
282 /// must be defined in a platform specific manner.
283 ///
284 typedef struct {
285 EFI_ACPI_DESCRIPTION_HEADER Header;
286 UINT32 LocalApicAddress;
287 UINT32 Flags;
288 } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
289
290 ///
291 /// MADT Revision (as defined in ACPI 5.1 spec.)
292 ///
293 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
294
295 ///
296 /// Multiple APIC Flags
297 /// All other bits are reserved and must be set to 0.
298 ///
299 #define EFI_ACPI_5_1_PCAT_COMPAT BIT0
300
301 //
302 // Multiple APIC Description Table APIC structure types
303 // All other values between 0x0D and 0x7F are reserved and
304 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
305 //
306 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00
307 #define EFI_ACPI_5_1_IO_APIC 0x01
308 #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02
309 #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03
310 #define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04
311 #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
312 #define EFI_ACPI_5_1_IO_SAPIC 0x06
313 #define EFI_ACPI_5_1_LOCAL_SAPIC 0x07
314 #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08
315 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09
316 #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A
317 #define EFI_ACPI_5_1_GIC 0x0B
318 #define EFI_ACPI_5_1_GICD 0x0C
319 #define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D
320 #define EFI_ACPI_5_1_GICR 0x0E
321
322 //
323 // APIC Structure Definitions
324 //
325
326 ///
327 /// Processor Local APIC Structure Definition
328 ///
329 typedef struct {
330 UINT8 Type;
331 UINT8 Length;
332 UINT8 AcpiProcessorId;
333 UINT8 ApicId;
334 UINT32 Flags;
335 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;
336
337 ///
338 /// Local APIC Flags. All other bits are reserved and must be 0.
339 ///
340 #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0
341
342 ///
343 /// IO APIC Structure
344 ///
345 typedef struct {
346 UINT8 Type;
347 UINT8 Length;
348 UINT8 IoApicId;
349 UINT8 Reserved;
350 UINT32 IoApicAddress;
351 UINT32 GlobalSystemInterruptBase;
352 } EFI_ACPI_5_1_IO_APIC_STRUCTURE;
353
354 ///
355 /// Interrupt Source Override Structure
356 ///
357 typedef struct {
358 UINT8 Type;
359 UINT8 Length;
360 UINT8 Bus;
361 UINT8 Source;
362 UINT32 GlobalSystemInterrupt;
363 UINT16 Flags;
364 } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
365
366 ///
367 /// Platform Interrupt Sources Structure Definition
368 ///
369 typedef struct {
370 UINT8 Type;
371 UINT8 Length;
372 UINT16 Flags;
373 UINT8 InterruptType;
374 UINT8 ProcessorId;
375 UINT8 ProcessorEid;
376 UINT8 IoSapicVector;
377 UINT32 GlobalSystemInterrupt;
378 UINT32 PlatformInterruptSourceFlags;
379 UINT8 CpeiProcessorOverride;
380 UINT8 Reserved[31];
381 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;
382
383 //
384 // MPS INTI flags.
385 // All other bits are reserved and must be set to 0.
386 //
387 #define EFI_ACPI_5_1_POLARITY (3 << 0)
388 #define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)
389
390 ///
391 /// Non-Maskable Interrupt Source Structure
392 ///
393 typedef struct {
394 UINT8 Type;
395 UINT8 Length;
396 UINT16 Flags;
397 UINT32 GlobalSystemInterrupt;
398 } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
399
400 ///
401 /// Local APIC NMI Structure
402 ///
403 typedef struct {
404 UINT8 Type;
405 UINT8 Length;
406 UINT8 AcpiProcessorId;
407 UINT16 Flags;
408 UINT8 LocalApicLint;
409 } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;
410
411 ///
412 /// Local APIC Address Override Structure
413 ///
414 typedef struct {
415 UINT8 Type;
416 UINT8 Length;
417 UINT16 Reserved;
418 UINT64 LocalApicAddress;
419 } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
420
421 ///
422 /// IO SAPIC Structure
423 ///
424 typedef struct {
425 UINT8 Type;
426 UINT8 Length;
427 UINT8 IoApicId;
428 UINT8 Reserved;
429 UINT32 GlobalSystemInterruptBase;
430 UINT64 IoSapicAddress;
431 } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;
432
433 ///
434 /// Local SAPIC Structure
435 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
436 ///
437 typedef struct {
438 UINT8 Type;
439 UINT8 Length;
440 UINT8 AcpiProcessorId;
441 UINT8 LocalSapicId;
442 UINT8 LocalSapicEid;
443 UINT8 Reserved[3];
444 UINT32 Flags;
445 UINT32 ACPIProcessorUIDValue;
446 } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
447
448 ///
449 /// Platform Interrupt Sources Structure
450 ///
451 typedef struct {
452 UINT8 Type;
453 UINT8 Length;
454 UINT16 Flags;
455 UINT8 InterruptType;
456 UINT8 ProcessorId;
457 UINT8 ProcessorEid;
458 UINT8 IoSapicVector;
459 UINT32 GlobalSystemInterrupt;
460 UINT32 PlatformInterruptSourceFlags;
461 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
462
463 ///
464 /// Platform Interrupt Source Flags.
465 /// All other bits are reserved and must be set to 0.
466 ///
467 #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0
468
469 ///
470 /// Processor Local x2APIC Structure Definition
471 ///
472 typedef struct {
473 UINT8 Type;
474 UINT8 Length;
475 UINT8 Reserved[2];
476 UINT32 X2ApicId;
477 UINT32 Flags;
478 UINT32 AcpiProcessorUid;
479 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
480
481 ///
482 /// Local x2APIC NMI Structure
483 ///
484 typedef struct {
485 UINT8 Type;
486 UINT8 Length;
487 UINT16 Flags;
488 UINT32 AcpiProcessorUid;
489 UINT8 LocalX2ApicLint;
490 UINT8 Reserved[3];
491 } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;
492
493 ///
494 /// GIC Structure
495 ///
496 typedef struct {
497 UINT8 Type;
498 UINT8 Length;
499 UINT16 Reserved;
500 UINT32 CPUInterfaceNumber;
501 UINT32 AcpiProcessorUid;
502 UINT32 Flags;
503 UINT32 ParkingProtocolVersion;
504 UINT32 PerformanceInterruptGsiv;
505 UINT64 ParkedAddress;
506 UINT64 PhysicalBaseAddress;
507 UINT64 GICV;
508 UINT64 GICH;
509 UINT32 VGICMaintenanceInterrupt;
510 UINT64 GICRBaseAddress;
511 UINT64 MPIDR;
512 } EFI_ACPI_5_1_GIC_STRUCTURE;
513
514 ///
515 /// GIC Flags. All other bits are reserved and must be 0.
516 ///
517 #define EFI_ACPI_5_1_GIC_ENABLED BIT0
518 #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1
519 #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
520
521 ///
522 /// GIC Distributor Structure
523 ///
524 typedef struct {
525 UINT8 Type;
526 UINT8 Length;
527 UINT16 Reserved1;
528 UINT32 GicId;
529 UINT64 PhysicalBaseAddress;
530 UINT32 SystemVectorBase;
531 UINT32 Reserved2;
532 } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;
533
534 ///
535 /// GIC MSI Frame Structure
536 ///
537 typedef struct {
538 UINT8 Type;
539 UINT8 Length;
540 UINT16 Reserved1;
541 UINT32 GicMsiFrameId;
542 UINT64 PhysicalBaseAddress;
543 UINT32 Flags;
544 UINT16 SPICount;
545 UINT16 SPIBase;
546 } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;
547
548 ///
549 /// GIC MSI Frame Flags. All other bits are reserved and must be 0.
550 ///
551 #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0
552
553 ///
554 /// GICR Structure
555 ///
556 typedef struct {
557 UINT8 Type;
558 UINT8 Length;
559 UINT16 Reserved;
560 UINT64 DiscoveryRangeBaseAddress;
561 UINT32 DiscoveryRangeLength;
562 } EFI_ACPI_5_1_GICR_STRUCTURE;
563
564 ///
565 /// Smart Battery Description Table (SBST)
566 ///
567 typedef struct {
568 EFI_ACPI_DESCRIPTION_HEADER Header;
569 UINT32 WarningEnergyLevel;
570 UINT32 LowEnergyLevel;
571 UINT32 CriticalEnergyLevel;
572 } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;
573
574 ///
575 /// SBST Version (as defined in ACPI 5.1 spec.)
576 ///
577 #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
578
579 ///
580 /// Embedded Controller Boot Resources Table (ECDT)
581 /// The table is followed by a null terminated ASCII string that contains
582 /// a fully qualified reference to the name space object.
583 ///
584 typedef struct {
585 EFI_ACPI_DESCRIPTION_HEADER Header;
586 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;
587 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;
588 UINT32 Uid;
589 UINT8 GpeBit;
590 } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
591
592 ///
593 /// ECDT Version (as defined in ACPI 5.1 spec.)
594 ///
595 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
596
597 ///
598 /// System Resource Affinity Table (SRAT). The rest of the table
599 /// must be defined in a platform specific manner.
600 ///
601 typedef struct {
602 EFI_ACPI_DESCRIPTION_HEADER Header;
603 UINT32 Reserved1; ///< Must be set to 1
604 UINT64 Reserved2;
605 } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
606
607 ///
608 /// SRAT Version (as defined in ACPI 5.1 spec.)
609 ///
610 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
611
612 //
613 // SRAT structure types.
614 // All other values between 0x04 an 0xFF are reserved and
615 // will be ignored by OSPM.
616 //
617 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
618 #define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01
619 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
620 #define EFI_ACPI_5_1_GICC_AFFINITY 0x03
621
622 ///
623 /// Processor Local APIC/SAPIC Affinity Structure Definition
624 ///
625 typedef struct {
626 UINT8 Type;
627 UINT8 Length;
628 UINT8 ProximityDomain7To0;
629 UINT8 ApicId;
630 UINT32 Flags;
631 UINT8 LocalSapicEid;
632 UINT8 ProximityDomain31To8[3];
633 UINT32 ClockDomain;
634 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
635
636 ///
637 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
638 ///
639 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
640
641 ///
642 /// Memory Affinity Structure Definition
643 ///
644 typedef struct {
645 UINT8 Type;
646 UINT8 Length;
647 UINT32 ProximityDomain;
648 UINT16 Reserved1;
649 UINT32 AddressBaseLow;
650 UINT32 AddressBaseHigh;
651 UINT32 LengthLow;
652 UINT32 LengthHigh;
653 UINT32 Reserved2;
654 UINT32 Flags;
655 UINT64 Reserved3;
656 } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;
657
658 //
659 // Memory Flags. All other bits are reserved and must be 0.
660 //
661 #define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)
662 #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
663 #define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)
664
665 ///
666 /// Processor Local x2APIC Affinity Structure Definition
667 ///
668 typedef struct {
669 UINT8 Type;
670 UINT8 Length;
671 UINT8 Reserved1[2];
672 UINT32 ProximityDomain;
673 UINT32 X2ApicId;
674 UINT32 Flags;
675 UINT32 ClockDomain;
676 UINT8 Reserved2[4];
677 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
678
679 ///
680 /// GICC Affinity Structure Definition
681 ///
682 typedef struct {
683 UINT8 Type;
684 UINT8 Length;
685 UINT32 ProximityDomain;
686 UINT32 AcpiProcessorUid;
687 UINT32 Flags;
688 UINT32 ClockDomain;
689 } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;
690
691 ///
692 /// GICC Flags. All other bits are reserved and must be 0.
693 ///
694 #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
695
696 ///
697 /// System Locality Distance Information Table (SLIT).
698 /// The rest of the table is a matrix.
699 ///
700 typedef struct {
701 EFI_ACPI_DESCRIPTION_HEADER Header;
702 UINT64 NumberOfSystemLocalities;
703 } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
704
705 ///
706 /// SLIT Version (as defined in ACPI 5.1 spec.)
707 ///
708 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
709
710 ///
711 /// Corrected Platform Error Polling Table (CPEP)
712 ///
713 typedef struct {
714 EFI_ACPI_DESCRIPTION_HEADER Header;
715 UINT8 Reserved[8];
716 } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
717
718 ///
719 /// CPEP Version (as defined in ACPI 5.1 spec.)
720 ///
721 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
722
723 //
724 // CPEP processor structure types.
725 //
726 #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00
727
728 ///
729 /// Corrected Platform Error Polling Processor Structure Definition
730 ///
731 typedef struct {
732 UINT8 Type;
733 UINT8 Length;
734 UINT8 ProcessorId;
735 UINT8 ProcessorEid;
736 UINT32 PollingInterval;
737 } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
738
739 ///
740 /// Maximum System Characteristics Table (MSCT)
741 ///
742 typedef struct {
743 EFI_ACPI_DESCRIPTION_HEADER Header;
744 UINT32 OffsetProxDomInfo;
745 UINT32 MaximumNumberOfProximityDomains;
746 UINT32 MaximumNumberOfClockDomains;
747 UINT64 MaximumPhysicalAddress;
748 } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
749
750 ///
751 /// MSCT Version (as defined in ACPI 5.1 spec.)
752 ///
753 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
754
755 ///
756 /// Maximum Proximity Domain Information Structure Definition
757 ///
758 typedef struct {
759 UINT8 Revision;
760 UINT8 Length;
761 UINT32 ProximityDomainRangeLow;
762 UINT32 ProximityDomainRangeHigh;
763 UINT32 MaximumProcessorCapacity;
764 UINT64 MaximumMemoryCapacity;
765 } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
766
767 ///
768 /// ACPI RAS Feature Table definition.
769 ///
770 typedef struct {
771 EFI_ACPI_DESCRIPTION_HEADER Header;
772 UINT8 PlatformCommunicationChannelIdentifier[12];
773 } EFI_ACPI_5_1_RAS_FEATURE_TABLE;
774
775 ///
776 /// RASF Version (as defined in ACPI 5.1 spec.)
777 ///
778 #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
779
780 ///
781 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
782 ///
783 typedef struct {
784 UINT32 Signature;
785 UINT16 Command;
786 UINT16 Status;
787 UINT16 Version;
788 UINT8 RASCapabilities[16];
789 UINT8 SetRASCapabilities[16];
790 UINT16 NumberOfRASFParameterBlocks;
791 UINT32 SetRASCapabilitiesStatus;
792 } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
793
794 ///
795 /// ACPI RASF PCC command code
796 ///
797 #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
798
799 ///
800 /// ACPI RASF Platform RAS Capabilities
801 ///
802 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
803 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
804
805 ///
806 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
807 ///
808 typedef struct {
809 UINT16 Type;
810 UINT16 Version;
811 UINT16 Length;
812 UINT16 PatrolScrubCommand;
813 UINT64 RequestedAddressRange[2];
814 UINT64 ActualAddressRange[2];
815 UINT16 Flags;
816 UINT8 RequestedSpeed;
817 } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
818
819 ///
820 /// ACPI RASF Patrol Scrub command
821 ///
822 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
823 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
824 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
825
826 ///
827 /// Memory Power State Table definition.
828 ///
829 typedef struct {
830 EFI_ACPI_DESCRIPTION_HEADER Header;
831 UINT8 PlatformCommunicationChannelIdentifier;
832 UINT8 Reserved[3];
833 // Memory Power Node Structure
834 // Memory Power State Characteristics
835 } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;
836
837 ///
838 /// MPST Version (as defined in ACPI 5.1 spec.)
839 ///
840 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
841
842 ///
843 /// MPST Platform Communication Channel Shared Memory Region definition.
844 ///
845 typedef struct {
846 UINT32 Signature;
847 UINT16 Command;
848 UINT16 Status;
849 UINT32 MemoryPowerCommandRegister;
850 UINT32 MemoryPowerStatusRegister;
851 UINT32 PowerStateId;
852 UINT32 MemoryPowerNodeId;
853 UINT64 MemoryEnergyConsumed;
854 UINT64 ExpectedAveragePowerComsuned;
855 } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
856
857 ///
858 /// ACPI MPST PCC command code
859 ///
860 #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
861
862 ///
863 /// ACPI MPST Memory Power command
864 ///
865 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
866 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
867 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
868 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
869
870 ///
871 /// MPST Memory Power Node Table
872 ///
873 typedef struct {
874 UINT8 PowerStateValue;
875 UINT8 PowerStateInformationIndex;
876 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;
877
878 typedef struct {
879 UINT8 Flag;
880 UINT8 Reserved;
881 UINT16 MemoryPowerNodeId;
882 UINT32 Length;
883 UINT64 AddressBase;
884 UINT64 AddressLength;
885 UINT32 NumberOfPowerStates;
886 UINT32 NumberOfPhysicalComponents;
887 //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
888 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
889 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;
890
891 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
892 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
893 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
894
895 typedef struct {
896 UINT16 MemoryPowerNodeCount;
897 UINT8 Reserved[2];
898 } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;
899
900 ///
901 /// MPST Memory Power State Characteristics Table
902 ///
903 typedef struct {
904 UINT8 PowerStateStructureID;
905 UINT8 Flag;
906 UINT16 Reserved;
907 UINT32 AveragePowerConsumedInMPS0;
908 UINT32 RelativePowerSavingToMPS0;
909 UINT64 ExitLatencyToMPS0;
910 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
911
912 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
913 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
914 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
915
916 typedef struct {
917 UINT16 MemoryPowerStateCharacteristicsCount;
918 UINT8 Reserved[2];
919 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
920
921 ///
922 /// Memory Topology Table definition.
923 ///
924 typedef struct {
925 EFI_ACPI_DESCRIPTION_HEADER Header;
926 UINT32 Reserved;
927 } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;
928
929 ///
930 /// PMTT Version (as defined in ACPI 5.1 spec.)
931 ///
932 #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
933
934 ///
935 /// Common Memory Aggregator Device Structure.
936 ///
937 typedef struct {
938 UINT8 Type;
939 UINT8 Reserved;
940 UINT16 Length;
941 UINT16 Flags;
942 UINT16 Reserved1;
943 } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
944
945 ///
946 /// Memory Aggregator Device Type
947 ///
948 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
949 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
950 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
951
952 ///
953 /// Socket Memory Aggregator Device Structure.
954 ///
955 typedef struct {
956 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
957 UINT16 SocketIdentifier;
958 UINT16 Reserved;
959 //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
960 } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
961
962 ///
963 /// MemoryController Memory Aggregator Device Structure.
964 ///
965 typedef struct {
966 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
967 UINT32 ReadLatency;
968 UINT32 WriteLatency;
969 UINT32 ReadBandwidth;
970 UINT32 WriteBandwidth;
971 UINT16 OptimalAccessUnit;
972 UINT16 OptimalAccessAlignment;
973 UINT16 Reserved;
974 UINT16 NumberOfProximityDomains;
975 //UINT32 ProximityDomain[NumberOfProximityDomains];
976 //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
977 } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
978
979 ///
980 /// DIMM Memory Aggregator Device Structure.
981 ///
982 typedef struct {
983 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
984 UINT16 PhysicalComponentIdentifier;
985 UINT16 Reserved;
986 UINT32 SizeOfDimm;
987 UINT32 SmbiosHandle;
988 } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
989
990 ///
991 /// Boot Graphics Resource Table definition.
992 ///
993 typedef struct {
994 EFI_ACPI_DESCRIPTION_HEADER Header;
995 ///
996 /// 2-bytes (16 bit) version ID. This value must be 1.
997 ///
998 UINT16 Version;
999 ///
1000 /// 1-byte status field indicating current status about the table.
1001 /// Bits[7:1] = Reserved (must be zero)
1002 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1003 ///
1004 UINT8 Status;
1005 ///
1006 /// 1-byte enumerated type field indicating format of the image.
1007 /// 0 = Bitmap
1008 /// 1 - 255 Reserved (for future use)
1009 ///
1010 UINT8 ImageType;
1011 ///
1012 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1013 /// of the image bitmap.
1014 ///
1015 UINT64 ImageAddress;
1016 ///
1017 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1018 /// (X, Y) display offset of the top left corner of the boot image.
1019 /// The top left corner of the display is at offset (0, 0).
1020 ///
1021 UINT32 ImageOffsetX;
1022 ///
1023 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1024 /// (X, Y) display offset of the top left corner of the boot image.
1025 /// The top left corner of the display is at offset (0, 0).
1026 ///
1027 UINT32 ImageOffsetY;
1028 } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;
1029
1030 ///
1031 /// BGRT Revision
1032 ///
1033 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1034
1035 ///
1036 /// BGRT Version
1037 ///
1038 #define EFI_ACPI_5_1_BGRT_VERSION 0x01
1039
1040 ///
1041 /// BGRT Status
1042 ///
1043 #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
1044 #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01
1045
1046 ///
1047 /// BGRT Image Type
1048 ///
1049 #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00
1050
1051 ///
1052 /// FPDT Version (as defined in ACPI 5.1 spec.)
1053 ///
1054 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1055
1056 ///
1057 /// FPDT Performance Record Types
1058 ///
1059 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1060 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1061
1062 ///
1063 /// FPDT Performance Record Revision
1064 ///
1065 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1066 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1067
1068 ///
1069 /// FPDT Runtime Performance Record Types
1070 ///
1071 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1072 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1073 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1074
1075 ///
1076 /// FPDT Runtime Performance Record Revision
1077 ///
1078 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1079 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1080 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1081
1082 ///
1083 /// FPDT Performance Record header
1084 ///
1085 typedef struct {
1086 UINT16 Type;
1087 UINT8 Length;
1088 UINT8 Revision;
1089 } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;
1090
1091 ///
1092 /// FPDT Performance Table header
1093 ///
1094 typedef struct {
1095 UINT32 Signature;
1096 UINT32 Length;
1097 } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;
1098
1099 ///
1100 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1101 ///
1102 typedef struct {
1103 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1104 UINT32 Reserved;
1105 ///
1106 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1107 ///
1108 UINT64 BootPerformanceTablePointer;
1109 } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1110
1111 ///
1112 /// FPDT S3 Performance Table Pointer Record Structure
1113 ///
1114 typedef struct {
1115 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1116 UINT32 Reserved;
1117 ///
1118 /// 64-bit processor-relative physical address of the S3 Performance Table.
1119 ///
1120 UINT64 S3PerformanceTablePointer;
1121 } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1122
1123 ///
1124 /// FPDT Firmware Basic Boot Performance Record Structure
1125 ///
1126 typedef struct {
1127 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1128 UINT32 Reserved;
1129 ///
1130 /// Timer value logged at the beginning of firmware image execution.
1131 /// This may not always be zero or near zero.
1132 ///
1133 UINT64 ResetEnd;
1134 ///
1135 /// Timer value logged just prior to loading the OS boot loader into memory.
1136 /// For non-UEFI compatible boots, this field must be zero.
1137 ///
1138 UINT64 OsLoaderLoadImageStart;
1139 ///
1140 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1141 /// For non-UEFI compatible boots, the timer value logged will be just prior
1142 /// to the INT 19h handler invocation.
1143 ///
1144 UINT64 OsLoaderStartImageStart;
1145 ///
1146 /// Timer value logged at the point when the OS loader calls the
1147 /// ExitBootServices function for UEFI compatible firmware.
1148 /// For non-UEFI compatible boots, this field must be zero.
1149 ///
1150 UINT64 ExitBootServicesEntry;
1151 ///
1152 /// Timer value logged at the point just prior towhen the OS loader gaining
1153 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1154 /// For non-UEFI compatible boots, this field must be zero.
1155 ///
1156 UINT64 ExitBootServicesExit;
1157 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1158
1159 ///
1160 /// FPDT Firmware Basic Boot Performance Table signature
1161 ///
1162 #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1163
1164 //
1165 // FPDT Firmware Basic Boot Performance Table
1166 //
1167 typedef struct {
1168 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
1169 //
1170 // one or more Performance Records.
1171 //
1172 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1173
1174 ///
1175 /// FPDT "S3PT" S3 Performance Table
1176 ///
1177 #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1178
1179 //
1180 // FPDT Firmware S3 Boot Performance Table
1181 //
1182 typedef struct {
1183 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
1184 //
1185 // one or more Performance Records.
1186 //
1187 } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;
1188
1189 ///
1190 /// FPDT Basic S3 Resume Performance Record
1191 ///
1192 typedef struct {
1193 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1194 ///
1195 /// A count of the number of S3 resume cycles since the last full boot sequence.
1196 ///
1197 UINT32 ResumeCount;
1198 ///
1199 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1200 /// OS waking vector. Only the most recent resume cycle's time is retained.
1201 ///
1202 UINT64 FullResume;
1203 ///
1204 /// Average timer value of all resume cycles logged since the last full boot
1205 /// sequence, including the most recent resume. Note that the entire log of
1206 /// timer values does not need to be retained in order to calculate this average.
1207 ///
1208 UINT64 AverageResume;
1209 } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;
1210
1211 ///
1212 /// FPDT Basic S3 Suspend Performance Record
1213 ///
1214 typedef struct {
1215 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1216 ///
1217 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1218 /// Only the most recent suspend cycle's timer value is retained.
1219 ///
1220 UINT64 SuspendStart;
1221 ///
1222 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1223 /// mechanism) used to trigger hardware entry to S3.
1224 /// Only the most recent suspend cycle's timer value is retained.
1225 ///
1226 UINT64 SuspendEnd;
1227 } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;
1228
1229 ///
1230 /// Firmware Performance Record Table definition.
1231 ///
1232 typedef struct {
1233 EFI_ACPI_DESCRIPTION_HEADER Header;
1234 } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1235
1236 ///
1237 /// Generic Timer Description Table definition.
1238 ///
1239 typedef struct {
1240 EFI_ACPI_DESCRIPTION_HEADER Header;
1241 UINT64 CntControlBasePhysicalAddress;
1242 UINT32 Reserved;
1243 UINT32 SecurePL1TimerGSIV;
1244 UINT32 SecurePL1TimerFlags;
1245 UINT32 NonSecurePL1TimerGSIV;
1246 UINT32 NonSecurePL1TimerFlags;
1247 UINT32 VirtualTimerGSIV;
1248 UINT32 VirtualTimerFlags;
1249 UINT32 NonSecurePL2TimerGSIV;
1250 UINT32 NonSecurePL2TimerFlags;
1251 UINT64 CntReadBasePhysicalAddress;
1252 UINT32 PlatformTimerCount;
1253 UINT32 PlatformTimerOffset;
1254 } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;
1255
1256 ///
1257 /// GTDT Version (as defined in ACPI 5.1 spec.)
1258 ///
1259 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1260
1261 ///
1262 /// Timer Flags. All other bits are reserved and must be 0.
1263 ///
1264 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1265 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1266 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
1267
1268 ///
1269 /// Platform Timer Type
1270 ///
1271 #define EFI_ACPI_5_1_GTDT_GT_BLOCK 0
1272 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1
1273
1274 ///
1275 /// GT Block Structure
1276 ///
1277 typedef struct {
1278 UINT8 Type;
1279 UINT16 Length;
1280 UINT8 Reserved;
1281 UINT64 CntCtlBase;
1282 UINT32 GTBlockTimerCount;
1283 UINT32 GTBlockTimerOffset;
1284 } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;
1285
1286 ///
1287 /// GT Block Timer Structure
1288 ///
1289 typedef struct {
1290 UINT8 GTFrameNumber;
1291 UINT8 Reserved[3];
1292 UINT64 CntBaseX;
1293 UINT64 CntEL0BaseX;
1294 UINT32 GTxPhysicalTimerGSIV;
1295 UINT32 GTxPhysicalTimerFlags;
1296 UINT32 GTxVirtualTimerGSIV;
1297 UINT32 GTxVirtualTimerFlags;
1298 UINT32 GTxCommonFlags;
1299 } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1300
1301 ///
1302 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
1303 ///
1304 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1305 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1306
1307 ///
1308 /// Common Flags Flags. All other bits are reserved and must be 0.
1309 ///
1310 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
1311 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
1312
1313 ///
1314 /// SBSA Generic Watchdog Structure
1315 ///
1316 typedef struct {
1317 UINT8 Type;
1318 UINT16 Length;
1319 UINT8 Reserved;
1320 UINT64 RefreshFramePhysicalAddress;
1321 UINT64 WatchdogControlFramePhysicalAddress;
1322 UINT32 WatchdogTimerGSIV;
1323 UINT32 WatchdogTimerFlags;
1324 } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
1325
1326 ///
1327 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
1328 ///
1329 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
1330 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1331 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
1332
1333 ///
1334 /// Boot Error Record Table (BERT)
1335 ///
1336 typedef struct {
1337 EFI_ACPI_DESCRIPTION_HEADER Header;
1338 UINT32 BootErrorRegionLength;
1339 UINT64 BootErrorRegion;
1340 } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;
1341
1342 ///
1343 /// BERT Version (as defined in ACPI 5.1 spec.)
1344 ///
1345 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1346
1347 ///
1348 /// Boot Error Region Block Status Definition
1349 ///
1350 typedef struct {
1351 UINT32 UncorrectableErrorValid:1;
1352 UINT32 CorrectableErrorValid:1;
1353 UINT32 MultipleUncorrectableErrors:1;
1354 UINT32 MultipleCorrectableErrors:1;
1355 UINT32 ErrorDataEntryCount:10;
1356 UINT32 Reserved:18;
1357 } EFI_ACPI_5_1_ERROR_BLOCK_STATUS;
1358
1359 ///
1360 /// Boot Error Region Definition
1361 ///
1362 typedef struct {
1363 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
1364 UINT32 RawDataOffset;
1365 UINT32 RawDataLength;
1366 UINT32 DataLength;
1367 UINT32 ErrorSeverity;
1368 } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;
1369
1370 //
1371 // Boot Error Severity types
1372 //
1373 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00
1374 #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01
1375 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02
1376 #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03
1377
1378 ///
1379 /// Generic Error Data Entry Definition
1380 ///
1381 typedef struct {
1382 UINT8 SectionType[16];
1383 UINT32 ErrorSeverity;
1384 UINT16 Revision;
1385 UINT8 ValidationBits;
1386 UINT8 Flags;
1387 UINT32 ErrorDataLength;
1388 UINT8 FruId[16];
1389 UINT8 FruText[20];
1390 } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1391
1392 ///
1393 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)
1394 ///
1395 #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1396
1397 ///
1398 /// HEST - Hardware Error Source Table
1399 ///
1400 typedef struct {
1401 EFI_ACPI_DESCRIPTION_HEADER Header;
1402 UINT32 ErrorSourceCount;
1403 } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1404
1405 ///
1406 /// HEST Version (as defined in ACPI 5.1 spec.)
1407 ///
1408 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1409
1410 //
1411 // Error Source structure types.
1412 //
1413 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1414 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1415 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02
1416 #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06
1417 #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07
1418 #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08
1419 #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09
1420
1421 //
1422 // Error Source structure flags.
1423 //
1424 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1425 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1426
1427 ///
1428 /// IA-32 Architecture Machine Check Exception Structure Definition
1429 ///
1430 typedef struct {
1431 UINT16 Type;
1432 UINT16 SourceId;
1433 UINT8 Reserved0[2];
1434 UINT8 Flags;
1435 UINT8 Enabled;
1436 UINT32 NumberOfRecordsToPreAllocate;
1437 UINT32 MaxSectionsPerRecord;
1438 UINT64 GlobalCapabilityInitData;
1439 UINT64 GlobalControlInitData;
1440 UINT8 NumberOfHardwareBanks;
1441 UINT8 Reserved1[7];
1442 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1443
1444 ///
1445 /// IA-32 Architecture Machine Check Bank Structure Definition
1446 ///
1447 typedef struct {
1448 UINT8 BankNumber;
1449 UINT8 ClearStatusOnInitialization;
1450 UINT8 StatusDataFormat;
1451 UINT8 Reserved0;
1452 UINT32 ControlRegisterMsrAddress;
1453 UINT64 ControlInitData;
1454 UINT32 StatusRegisterMsrAddress;
1455 UINT32 AddressRegisterMsrAddress;
1456 UINT32 MiscRegisterMsrAddress;
1457 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1458
1459 ///
1460 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1461 ///
1462 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1463 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1464 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1465
1466 //
1467 // Hardware Error Notification types. All other values are reserved
1468 //
1469 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1470 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1471 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1472 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1473 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1474
1475 ///
1476 /// Hardware Error Notification Configuration Write Enable Structure Definition
1477 ///
1478 typedef struct {
1479 UINT16 Type:1;
1480 UINT16 PollInterval:1;
1481 UINT16 SwitchToPollingThresholdValue:1;
1482 UINT16 SwitchToPollingThresholdWindow:1;
1483 UINT16 ErrorThresholdValue:1;
1484 UINT16 ErrorThresholdWindow:1;
1485 UINT16 Reserved:10;
1486 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1487
1488 ///
1489 /// Hardware Error Notification Structure Definition
1490 ///
1491 typedef struct {
1492 UINT8 Type;
1493 UINT8 Length;
1494 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1495 UINT32 PollInterval;
1496 UINT32 Vector;
1497 UINT32 SwitchToPollingThresholdValue;
1498 UINT32 SwitchToPollingThresholdWindow;
1499 UINT32 ErrorThresholdValue;
1500 UINT32 ErrorThresholdWindow;
1501 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1502
1503 ///
1504 /// IA-32 Architecture Corrected Machine Check Structure Definition
1505 ///
1506 typedef struct {
1507 UINT16 Type;
1508 UINT16 SourceId;
1509 UINT8 Reserved0[2];
1510 UINT8 Flags;
1511 UINT8 Enabled;
1512 UINT32 NumberOfRecordsToPreAllocate;
1513 UINT32 MaxSectionsPerRecord;
1514 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1515 UINT8 NumberOfHardwareBanks;
1516 UINT8 Reserved1[3];
1517 } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1518
1519 ///
1520 /// IA-32 Architecture NMI Error Structure Definition
1521 ///
1522 typedef struct {
1523 UINT16 Type;
1524 UINT16 SourceId;
1525 UINT8 Reserved0[2];
1526 UINT32 NumberOfRecordsToPreAllocate;
1527 UINT32 MaxSectionsPerRecord;
1528 UINT32 MaxRawDataLength;
1529 } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1530
1531 ///
1532 /// PCI Express Root Port AER Structure Definition
1533 ///
1534 typedef struct {
1535 UINT16 Type;
1536 UINT16 SourceId;
1537 UINT8 Reserved0[2];
1538 UINT8 Flags;
1539 UINT8 Enabled;
1540 UINT32 NumberOfRecordsToPreAllocate;
1541 UINT32 MaxSectionsPerRecord;
1542 UINT32 Bus;
1543 UINT16 Device;
1544 UINT16 Function;
1545 UINT16 DeviceControl;
1546 UINT8 Reserved1[2];
1547 UINT32 UncorrectableErrorMask;
1548 UINT32 UncorrectableErrorSeverity;
1549 UINT32 CorrectableErrorMask;
1550 UINT32 AdvancedErrorCapabilitiesAndControl;
1551 UINT32 RootErrorCommand;
1552 } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1553
1554 ///
1555 /// PCI Express Device AER Structure Definition
1556 ///
1557 typedef struct {
1558 UINT16 Type;
1559 UINT16 SourceId;
1560 UINT8 Reserved0[2];
1561 UINT8 Flags;
1562 UINT8 Enabled;
1563 UINT32 NumberOfRecordsToPreAllocate;
1564 UINT32 MaxSectionsPerRecord;
1565 UINT32 Bus;
1566 UINT16 Device;
1567 UINT16 Function;
1568 UINT16 DeviceControl;
1569 UINT8 Reserved1[2];
1570 UINT32 UncorrectableErrorMask;
1571 UINT32 UncorrectableErrorSeverity;
1572 UINT32 CorrectableErrorMask;
1573 UINT32 AdvancedErrorCapabilitiesAndControl;
1574 } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1575
1576 ///
1577 /// PCI Express Bridge AER Structure Definition
1578 ///
1579 typedef struct {
1580 UINT16 Type;
1581 UINT16 SourceId;
1582 UINT8 Reserved0[2];
1583 UINT8 Flags;
1584 UINT8 Enabled;
1585 UINT32 NumberOfRecordsToPreAllocate;
1586 UINT32 MaxSectionsPerRecord;
1587 UINT32 Bus;
1588 UINT16 Device;
1589 UINT16 Function;
1590 UINT16 DeviceControl;
1591 UINT8 Reserved1[2];
1592 UINT32 UncorrectableErrorMask;
1593 UINT32 UncorrectableErrorSeverity;
1594 UINT32 CorrectableErrorMask;
1595 UINT32 AdvancedErrorCapabilitiesAndControl;
1596 UINT32 SecondaryUncorrectableErrorMask;
1597 UINT32 SecondaryUncorrectableErrorSeverity;
1598 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1599 } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1600
1601 ///
1602 /// Generic Hardware Error Source Structure Definition
1603 ///
1604 typedef struct {
1605 UINT16 Type;
1606 UINT16 SourceId;
1607 UINT16 RelatedSourceId;
1608 UINT8 Flags;
1609 UINT8 Enabled;
1610 UINT32 NumberOfRecordsToPreAllocate;
1611 UINT32 MaxSectionsPerRecord;
1612 UINT32 MaxRawDataLength;
1613 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1614 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1615 UINT32 ErrorStatusBlockLength;
1616 } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1617
1618 ///
1619 /// Generic Error Status Definition
1620 ///
1621 typedef struct {
1622 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
1623 UINT32 RawDataOffset;
1624 UINT32 RawDataLength;
1625 UINT32 DataLength;
1626 UINT32 ErrorSeverity;
1627 } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;
1628
1629 ///
1630 /// ERST - Error Record Serialization Table
1631 ///
1632 typedef struct {
1633 EFI_ACPI_DESCRIPTION_HEADER Header;
1634 UINT32 SerializationHeaderSize;
1635 UINT8 Reserved0[4];
1636 UINT32 InstructionEntryCount;
1637 } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
1638
1639 ///
1640 /// ERST Version (as defined in ACPI 5.1 spec.)
1641 ///
1642 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1643
1644 ///
1645 /// ERST Serialization Actions
1646 ///
1647 #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00
1648 #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01
1649 #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02
1650 #define EFI_ACPI_5_1_ERST_END_OPERATION 0x03
1651 #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04
1652 #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05
1653 #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06
1654 #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07
1655 #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08
1656 #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09
1657 #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A
1658 #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1659 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1660 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1661 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1662
1663 ///
1664 /// ERST Action Command Status
1665 ///
1666 #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00
1667 #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1668 #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1669 #define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03
1670 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1671 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05
1672
1673 ///
1674 /// ERST Serialization Instructions
1675 ///
1676 #define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00
1677 #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01
1678 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02
1679 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03
1680 #define EFI_ACPI_5_1_ERST_NOOP 0x04
1681 #define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05
1682 #define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06
1683 #define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07
1684 #define EFI_ACPI_5_1_ERST_ADD 0x08
1685 #define EFI_ACPI_5_1_ERST_SUBTRACT 0x09
1686 #define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A
1687 #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B
1688 #define EFI_ACPI_5_1_ERST_STALL 0x0C
1689 #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D
1690 #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1691 #define EFI_ACPI_5_1_ERST_GOTO 0x0F
1692 #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10
1693 #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11
1694 #define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12
1695
1696 ///
1697 /// ERST Instruction Flags
1698 ///
1699 #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01
1700
1701 ///
1702 /// ERST Serialization Instruction Entry
1703 ///
1704 typedef struct {
1705 UINT8 SerializationAction;
1706 UINT8 Instruction;
1707 UINT8 Flags;
1708 UINT8 Reserved0;
1709 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1710 UINT64 Value;
1711 UINT64 Mask;
1712 } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
1713
1714 ///
1715 /// EINJ - Error Injection Table
1716 ///
1717 typedef struct {
1718 EFI_ACPI_DESCRIPTION_HEADER Header;
1719 UINT32 InjectionHeaderSize;
1720 UINT8 InjectionFlags;
1721 UINT8 Reserved0[3];
1722 UINT32 InjectionEntryCount;
1723 } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;
1724
1725 ///
1726 /// EINJ Version (as defined in ACPI 5.1 spec.)
1727 ///
1728 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
1729
1730 ///
1731 /// EINJ Error Injection Actions
1732 ///
1733 #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00
1734 #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1735 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02
1736 #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03
1737 #define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04
1738 #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05
1739 #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06
1740 #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07
1741 #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF
1742
1743 ///
1744 /// EINJ Action Command Status
1745 ///
1746 #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00
1747 #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1748 #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02
1749
1750 ///
1751 /// EINJ Error Type Definition
1752 ///
1753 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1754 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1755 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1756 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1757 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1758 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1759 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1760 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1761 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1762 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1763 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1764 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1765
1766 ///
1767 /// EINJ Injection Instructions
1768 ///
1769 #define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00
1770 #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01
1771 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02
1772 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03
1773 #define EFI_ACPI_5_1_EINJ_NOOP 0x04
1774
1775 ///
1776 /// EINJ Instruction Flags
1777 ///
1778 #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01
1779
1780 ///
1781 /// EINJ Injection Instruction Entry
1782 ///
1783 typedef struct {
1784 UINT8 InjectionAction;
1785 UINT8 Instruction;
1786 UINT8 Flags;
1787 UINT8 Reserved0;
1788 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1789 UINT64 Value;
1790 UINT64 Mask;
1791 } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;
1792
1793 ///
1794 /// EINJ Trigger Action Table
1795 ///
1796 typedef struct {
1797 UINT32 HeaderSize;
1798 UINT32 Revision;
1799 UINT32 TableSize;
1800 UINT32 EntryCount;
1801 } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;
1802
1803 ///
1804 /// Platform Communications Channel Table (PCCT)
1805 ///
1806 typedef struct {
1807 EFI_ACPI_DESCRIPTION_HEADER Header;
1808 UINT32 Flags;
1809 UINT64 Reserved;
1810 } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
1811
1812 ///
1813 /// PCCT Version (as defined in ACPI 5.1 spec.)
1814 ///
1815 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1816
1817 ///
1818 /// PCCT Global Flags
1819 ///
1820 #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0
1821
1822 //
1823 // PCCT Subspace type
1824 //
1825 #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1826
1827 ///
1828 /// PCC Subspace Structure Header
1829 ///
1830 typedef struct {
1831 UINT8 Type;
1832 UINT8 Length;
1833 } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;
1834
1835 ///
1836 /// Generic Communications Subspace Structure
1837 ///
1838 typedef struct {
1839 UINT8 Type;
1840 UINT8 Length;
1841 UINT8 Reserved[6];
1842 UINT64 BaseAddress;
1843 UINT64 AddressLength;
1844 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
1845 UINT64 DoorbellPreserve;
1846 UINT64 DoorbellWrite;
1847 UINT32 NominalLatency;
1848 UINT32 MaximumPeriodicAccessRate;
1849 UINT16 MinimumRequestTurnaroundTime;
1850 } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;
1851
1852 ///
1853 /// Generic Communications Channel Shared Memory Region
1854 ///
1855
1856 typedef struct {
1857 UINT8 Command;
1858 UINT8 Reserved:7;
1859 UINT8 GenerateSci:1;
1860 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
1861
1862 typedef struct {
1863 UINT8 CommandComplete:1;
1864 UINT8 SciDoorbell:1;
1865 UINT8 Error:1;
1866 UINT8 Reserved:5;
1867 UINT8 Reserved1;
1868 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
1869
1870 typedef struct {
1871 UINT32 Signature;
1872 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
1873 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
1874 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
1875
1876 //
1877 // Known table signatures
1878 //
1879
1880 ///
1881 /// "RSD PTR " Root System Description Pointer
1882 ///
1883 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1884
1885 ///
1886 /// "APIC" Multiple APIC Description Table
1887 ///
1888 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1889
1890 ///
1891 /// "BERT" Boot Error Record Table
1892 ///
1893 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1894
1895 ///
1896 /// "BGRT" Boot Graphics Resource Table
1897 ///
1898 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1899
1900 ///
1901 /// "CPEP" Corrected Platform Error Polling Table
1902 ///
1903 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1904
1905 ///
1906 /// "DSDT" Differentiated System Description Table
1907 ///
1908 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1909
1910 ///
1911 /// "ECDT" Embedded Controller Boot Resources Table
1912 ///
1913 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1914
1915 ///
1916 /// "EINJ" Error Injection Table
1917 ///
1918 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1919
1920 ///
1921 /// "ERST" Error Record Serialization Table
1922 ///
1923 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1924
1925 ///
1926 /// "FACP" Fixed ACPI Description Table
1927 ///
1928 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1929
1930 ///
1931 /// "FACS" Firmware ACPI Control Structure
1932 ///
1933 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1934
1935 ///
1936 /// "FPDT" Firmware Performance Data Table
1937 ///
1938 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1939
1940 ///
1941 /// "GTDT" Generic Timer Description Table
1942 ///
1943 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1944
1945 ///
1946 /// "HEST" Hardware Error Source Table
1947 ///
1948 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1949
1950 ///
1951 /// "MPST" Memory Power State Table
1952 ///
1953 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1954
1955 ///
1956 /// "MSCT" Maximum System Characteristics Table
1957 ///
1958 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1959
1960 ///
1961 /// "PMTT" Platform Memory Topology Table
1962 ///
1963 #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1964
1965 ///
1966 /// "PSDT" Persistent System Description Table
1967 ///
1968 #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1969
1970 ///
1971 /// "RASF" ACPI RAS Feature Table
1972 ///
1973 #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1974
1975 ///
1976 /// "RSDT" Root System Description Table
1977 ///
1978 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1979
1980 ///
1981 /// "SBST" Smart Battery Specification Table
1982 ///
1983 #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
1984
1985 ///
1986 /// "SLIT" System Locality Information Table
1987 ///
1988 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
1989
1990 ///
1991 /// "SRAT" System Resource Affinity Table
1992 ///
1993 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
1994
1995 ///
1996 /// "SSDT" Secondary System Description Table
1997 ///
1998 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
1999
2000 ///
2001 /// "XSDT" Extended System Description Table
2002 ///
2003 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
2004
2005 ///
2006 /// "BOOT" MS Simple Boot Spec
2007 ///
2008 #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2009
2010 ///
2011 /// "CSRT" MS Core System Resource Table
2012 ///
2013 #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2014
2015 ///
2016 /// "DBG2" MS Debug Port 2 Spec
2017 ///
2018 #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2019
2020 ///
2021 /// "DBGP" MS Debug Port Spec
2022 ///
2023 #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2024
2025 ///
2026 /// "DMAR" DMA Remapping Table
2027 ///
2028 #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2029
2030 ///
2031 /// "DRTM" Dynamic Root of Trust for Measurement Table
2032 ///
2033 #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2034
2035 ///
2036 /// "ETDT" Event Timer Description Table
2037 ///
2038 #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2039
2040 ///
2041 /// "HPET" IA-PC High Precision Event Timer Table
2042 ///
2043 #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2044
2045 ///
2046 /// "iBFT" iSCSI Boot Firmware Table
2047 ///
2048 #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2049
2050 ///
2051 /// "IVRS" I/O Virtualization Reporting Structure
2052 ///
2053 #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2054
2055 ///
2056 /// "LPIT" Low Power Idle Table
2057 ///
2058 #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
2059
2060 ///
2061 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2062 ///
2063 #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2064
2065 ///
2066 /// "MCHI" Management Controller Host Interface Table
2067 ///
2068 #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2069
2070 ///
2071 /// "MSDM" MS Data Management Table
2072 ///
2073 #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2074
2075 ///
2076 /// "SLIC" MS Software Licensing Table Specification
2077 ///
2078 #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2079
2080 ///
2081 /// "SPCR" Serial Port Concole Redirection Table
2082 ///
2083 #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2084
2085 ///
2086 /// "SPMI" Server Platform Management Interface Table
2087 ///
2088 #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2089
2090 ///
2091 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2092 ///
2093 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2094
2095 ///
2096 /// "TPM2" Trusted Computing Platform 1 Table
2097 ///
2098 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2099
2100 ///
2101 /// "UEFI" UEFI ACPI Data Table
2102 ///
2103 #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2104
2105 ///
2106 /// "WAET" Windows ACPI Emulated Devices Table
2107 ///
2108 #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2109
2110 ///
2111 /// "WDAT" Watchdog Action Table
2112 ///
2113 #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2114
2115 ///
2116 /// "WDRT" Watchdog Resource Table
2117 ///
2118 #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2119
2120 ///
2121 /// "WPBT" MS Platform Binary Table
2122 ///
2123 #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
2124
2125 #pragma pack()
2126
2127 #endif