2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014.
4 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <IndustryStandard/Acpi50.h>
20 // Ensure proper structure formats
25 /// ACPI 5.1 Generic Address Space definition
29 UINT8 RegisterBitWidth
;
30 UINT8 RegisterBitOffset
;
33 } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE
;
36 // Generic Address Space Address IDs
38 #define EFI_ACPI_5_1_SYSTEM_MEMORY 0
39 #define EFI_ACPI_5_1_SYSTEM_IO 1
40 #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2
41 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3
42 #define EFI_ACPI_5_1_SMBUS 4
43 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A
44 #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F
47 // Generic Address Space Access Sizes
49 #define EFI_ACPI_5_1_UNDEFINED 0
50 #define EFI_ACPI_5_1_BYTE 1
51 #define EFI_ACPI_5_1_WORD 2
52 #define EFI_ACPI_5_1_DWORD 3
53 #define EFI_ACPI_5_1_QWORD 4
56 // ACPI 5.1 table structures
60 /// Root System Description Pointer Structure
70 UINT8 ExtendedChecksum
;
72 } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER
;
75 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
77 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2
80 /// Common table header, this prefaces all ACPI tables, including FACS, but
81 /// excluding the RSD PTR structure
86 } EFI_ACPI_5_1_COMMON_HEADER
;
89 // Root System Description Table
90 // No definition needed as it is a common description table header, the same with
91 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
95 /// RSDT Revision (as defined in ACPI 5.1 spec.)
97 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
100 // Extended System Description Table
101 // No definition needed as it is a common description table header, the same with
102 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
106 /// XSDT Revision (as defined in ACPI 5.1 spec.)
108 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
111 /// Fixed ACPI Description Table Structure (FADT)
114 EFI_ACPI_DESCRIPTION_HEADER Header
;
118 UINT8 PreferredPmProfile
;
153 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg
;
157 UINT64 XFirmwareCtrl
;
159 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
;
160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
;
161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
;
162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
;
163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
;
164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
;
165 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
;
166 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
;
167 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg
;
168 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
;
169 } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE
;
172 /// FADT Version (as defined in ACPI 5.1 spec.)
174 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
175 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01
178 // Fixed ACPI Description Table Preferred Power Management Profile
180 #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0
181 #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1
182 #define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2
183 #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3
184 #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4
185 #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5
186 #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6
187 #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7
188 #define EFI_ACPI_5_1_PM_PROFILE_TABLET 8
191 // Fixed ACPI Description Table Boot Architecture Flags
192 // All other bits are reserved and must be set to 0.
194 #define EFI_ACPI_5_1_LEGACY_DEVICES BIT0
195 #define EFI_ACPI_5_1_8042 BIT1
196 #define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2
197 #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3
198 #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4
199 #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5
202 // Fixed ACPI Description Table Arm Boot Architecture Flags
203 // All other bits are reserved and must be set to 0.
205 #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0
206 #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1
209 // Fixed ACPI Description Table Fixed Feature Flags
210 // All other bits are reserved and must be set to 0.
212 #define EFI_ACPI_5_1_WBINVD BIT0
213 #define EFI_ACPI_5_1_WBINVD_FLUSH BIT1
214 #define EFI_ACPI_5_1_PROC_C1 BIT2
215 #define EFI_ACPI_5_1_P_LVL2_UP BIT3
216 #define EFI_ACPI_5_1_PWR_BUTTON BIT4
217 #define EFI_ACPI_5_1_SLP_BUTTON BIT5
218 #define EFI_ACPI_5_1_FIX_RTC BIT6
219 #define EFI_ACPI_5_1_RTC_S4 BIT7
220 #define EFI_ACPI_5_1_TMR_VAL_EXT BIT8
221 #define EFI_ACPI_5_1_DCK_CAP BIT9
222 #define EFI_ACPI_5_1_RESET_REG_SUP BIT10
223 #define EFI_ACPI_5_1_SEALED_CASE BIT11
224 #define EFI_ACPI_5_1_HEADLESS BIT12
225 #define EFI_ACPI_5_1_CPU_SW_SLP BIT13
226 #define EFI_ACPI_5_1_PCI_EXP_WAK BIT14
227 #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15
228 #define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16
229 #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17
230 #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18
231 #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
232 #define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20
233 #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21
236 /// Firmware ACPI Control Structure
241 UINT32 HardwareSignature
;
242 UINT32 FirmwareWakingVector
;
245 UINT64 XFirmwareWakingVector
;
250 } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE
;
253 /// FACS Version (as defined in ACPI 5.1 spec.)
255 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
258 /// Firmware Control Structure Feature Flags
259 /// All other bits are reserved and must be set to 0.
261 #define EFI_ACPI_5_1_S4BIOS_F BIT0
262 #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1
265 /// OSPM Enabled Firmware Control Structure Flags
266 /// All other bits are reserved and must be set to 0.
268 #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0
271 // Differentiated System Description Table,
272 // Secondary System Description Table
273 // and Persistent System Description Table,
274 // no definition needed as they are common description table header, the same with
275 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
277 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
278 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
281 /// Multiple APIC Description Table header definition. The rest of the table
282 /// must be defined in a platform specific manner.
285 EFI_ACPI_DESCRIPTION_HEADER Header
;
286 UINT32 LocalApicAddress
;
288 } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER
;
291 /// MADT Revision (as defined in ACPI 5.1 spec.)
293 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
296 /// Multiple APIC Flags
297 /// All other bits are reserved and must be set to 0.
299 #define EFI_ACPI_5_1_PCAT_COMPAT BIT0
302 // Multiple APIC Description Table APIC structure types
303 // All other values between 0x0D and 0x7F are reserved and
304 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
306 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00
307 #define EFI_ACPI_5_1_IO_APIC 0x01
308 #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02
309 #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03
310 #define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04
311 #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
312 #define EFI_ACPI_5_1_IO_SAPIC 0x06
313 #define EFI_ACPI_5_1_LOCAL_SAPIC 0x07
314 #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08
315 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09
316 #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A
317 #define EFI_ACPI_5_1_GIC 0x0B
318 #define EFI_ACPI_5_1_GICD 0x0C
319 #define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D
320 #define EFI_ACPI_5_1_GICR 0x0E
323 // APIC Structure Definitions
327 /// Processor Local APIC Structure Definition
332 UINT8 AcpiProcessorId
;
335 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE
;
338 /// Local APIC Flags. All other bits are reserved and must be 0.
340 #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0
343 /// IO APIC Structure
350 UINT32 IoApicAddress
;
351 UINT32 GlobalSystemInterruptBase
;
352 } EFI_ACPI_5_1_IO_APIC_STRUCTURE
;
355 /// Interrupt Source Override Structure
362 UINT32 GlobalSystemInterrupt
;
364 } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE
;
367 /// Platform Interrupt Sources Structure Definition
377 UINT32 GlobalSystemInterrupt
;
378 UINT32 PlatformInterruptSourceFlags
;
379 UINT8 CpeiProcessorOverride
;
381 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE
;
385 // All other bits are reserved and must be set to 0.
387 #define EFI_ACPI_5_1_POLARITY (3 << 0)
388 #define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)
391 /// Non-Maskable Interrupt Source Structure
397 UINT32 GlobalSystemInterrupt
;
398 } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE
;
401 /// Local APIC NMI Structure
406 UINT8 AcpiProcessorId
;
409 } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE
;
412 /// Local APIC Address Override Structure
418 UINT64 LocalApicAddress
;
419 } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE
;
422 /// IO SAPIC Structure
429 UINT32 GlobalSystemInterruptBase
;
430 UINT64 IoSapicAddress
;
431 } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE
;
434 /// Local SAPIC Structure
435 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
440 UINT8 AcpiProcessorId
;
445 UINT32 ACPIProcessorUIDValue
;
446 } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE
;
449 /// Platform Interrupt Sources Structure
459 UINT32 GlobalSystemInterrupt
;
460 UINT32 PlatformInterruptSourceFlags
;
461 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE
;
464 /// Platform Interrupt Source Flags.
465 /// All other bits are reserved and must be set to 0.
467 #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0
470 /// Processor Local x2APIC Structure Definition
478 UINT32 AcpiProcessorUid
;
479 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE
;
482 /// Local x2APIC NMI Structure
488 UINT32 AcpiProcessorUid
;
489 UINT8 LocalX2ApicLint
;
491 } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE
;
500 UINT32 CPUInterfaceNumber
;
501 UINT32 AcpiProcessorUid
;
503 UINT32 ParkingProtocolVersion
;
504 UINT32 PerformanceInterruptGsiv
;
505 UINT64 ParkedAddress
;
506 UINT64 PhysicalBaseAddress
;
509 UINT32 VGICMaintenanceInterrupt
;
510 UINT64 GICRBaseAddress
;
512 } EFI_ACPI_5_1_GIC_STRUCTURE
;
515 /// GIC Flags. All other bits are reserved and must be 0.
517 #define EFI_ACPI_5_1_GIC_ENABLED BIT0
518 #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1
519 #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
522 /// GIC Distributor Structure
529 UINT64 PhysicalBaseAddress
;
530 UINT32 SystemVectorBase
;
532 } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE
;
535 /// GIC MSI Frame Structure
541 UINT32 GicMsiFrameId
;
542 UINT64 PhysicalBaseAddress
;
546 } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE
;
549 /// GIC MSI Frame Flags. All other bits are reserved and must be 0.
551 #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0
560 UINT64 DiscoveryRangeBaseAddress
;
561 UINT32 DiscoveryRangeLength
;
562 } EFI_ACPI_5_1_GICR_STRUCTURE
;
565 /// Smart Battery Description Table (SBST)
568 EFI_ACPI_DESCRIPTION_HEADER Header
;
569 UINT32 WarningEnergyLevel
;
570 UINT32 LowEnergyLevel
;
571 UINT32 CriticalEnergyLevel
;
572 } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE
;
575 /// SBST Version (as defined in ACPI 5.1 spec.)
577 #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
580 /// Embedded Controller Boot Resources Table (ECDT)
581 /// The table is followed by a null terminated ASCII string that contains
582 /// a fully qualified reference to the name space object.
585 EFI_ACPI_DESCRIPTION_HEADER Header
;
586 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl
;
587 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData
;
590 } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE
;
593 /// ECDT Version (as defined in ACPI 5.1 spec.)
595 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
598 /// System Resource Affinity Table (SRAT). The rest of the table
599 /// must be defined in a platform specific manner.
602 EFI_ACPI_DESCRIPTION_HEADER Header
;
603 UINT32 Reserved1
; ///< Must be set to 1
605 } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER
;
608 /// SRAT Version (as defined in ACPI 5.1 spec.)
610 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
613 // SRAT structure types.
614 // All other values between 0x04 an 0xFF are reserved and
615 // will be ignored by OSPM.
617 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
618 #define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01
619 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
620 #define EFI_ACPI_5_1_GICC_AFFINITY 0x03
623 /// Processor Local APIC/SAPIC Affinity Structure Definition
628 UINT8 ProximityDomain7To0
;
632 UINT8 ProximityDomain31To8
[3];
634 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE
;
637 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
639 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
642 /// Memory Affinity Structure Definition
647 UINT32 ProximityDomain
;
649 UINT32 AddressBaseLow
;
650 UINT32 AddressBaseHigh
;
656 } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE
;
659 // Memory Flags. All other bits are reserved and must be 0.
661 #define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)
662 #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
663 #define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)
666 /// Processor Local x2APIC Affinity Structure Definition
672 UINT32 ProximityDomain
;
677 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE
;
680 /// GICC Affinity Structure Definition
685 UINT32 ProximityDomain
;
686 UINT32 AcpiProcessorUid
;
689 } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE
;
692 /// GICC Flags. All other bits are reserved and must be 0.
694 #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
697 /// System Locality Distance Information Table (SLIT).
698 /// The rest of the table is a matrix.
701 EFI_ACPI_DESCRIPTION_HEADER Header
;
702 UINT64 NumberOfSystemLocalities
;
703 } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER
;
706 /// SLIT Version (as defined in ACPI 5.1 spec.)
708 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
711 /// Corrected Platform Error Polling Table (CPEP)
714 EFI_ACPI_DESCRIPTION_HEADER Header
;
716 } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER
;
719 /// CPEP Version (as defined in ACPI 5.1 spec.)
721 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
724 // CPEP processor structure types.
726 #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00
729 /// Corrected Platform Error Polling Processor Structure Definition
736 UINT32 PollingInterval
;
737 } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE
;
740 /// Maximum System Characteristics Table (MSCT)
743 EFI_ACPI_DESCRIPTION_HEADER Header
;
744 UINT32 OffsetProxDomInfo
;
745 UINT32 MaximumNumberOfProximityDomains
;
746 UINT32 MaximumNumberOfClockDomains
;
747 UINT64 MaximumPhysicalAddress
;
748 } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER
;
751 /// MSCT Version (as defined in ACPI 5.1 spec.)
753 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
756 /// Maximum Proximity Domain Information Structure Definition
761 UINT32 ProximityDomainRangeLow
;
762 UINT32 ProximityDomainRangeHigh
;
763 UINT32 MaximumProcessorCapacity
;
764 UINT64 MaximumMemoryCapacity
;
765 } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE
;
768 /// ACPI RAS Feature Table definition.
771 EFI_ACPI_DESCRIPTION_HEADER Header
;
772 UINT8 PlatformCommunicationChannelIdentifier
[12];
773 } EFI_ACPI_5_1_RAS_FEATURE_TABLE
;
776 /// RASF Version (as defined in ACPI 5.1 spec.)
778 #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
781 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
788 UINT8 RASCapabilities
[16];
789 UINT8 SetRASCapabilities
[16];
790 UINT16 NumberOfRASFParameterBlocks
;
791 UINT32 SetRASCapabilitiesStatus
;
792 } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION
;
795 /// ACPI RASF PCC command code
797 #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
800 /// ACPI RASF Platform RAS Capabilities
802 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
803 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
806 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
812 UINT16 PatrolScrubCommand
;
813 UINT64 RequestedAddressRange
[2];
814 UINT64 ActualAddressRange
[2];
816 UINT8 RequestedSpeed
;
817 } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE
;
820 /// ACPI RASF Patrol Scrub command
822 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
823 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
824 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
827 /// Memory Power State Table definition.
830 EFI_ACPI_DESCRIPTION_HEADER Header
;
831 UINT8 PlatformCommunicationChannelIdentifier
;
833 // Memory Power Node Structure
834 // Memory Power State Characteristics
835 } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE
;
838 /// MPST Version (as defined in ACPI 5.1 spec.)
840 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
843 /// MPST Platform Communication Channel Shared Memory Region definition.
849 UINT32 MemoryPowerCommandRegister
;
850 UINT32 MemoryPowerStatusRegister
;
852 UINT32 MemoryPowerNodeId
;
853 UINT64 MemoryEnergyConsumed
;
854 UINT64 ExpectedAveragePowerComsuned
;
855 } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION
;
858 /// ACPI MPST PCC command code
860 #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
863 /// ACPI MPST Memory Power command
865 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
866 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
867 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
868 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
871 /// MPST Memory Power Node Table
874 UINT8 PowerStateValue
;
875 UINT8 PowerStateInformationIndex
;
876 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE
;
881 UINT16 MemoryPowerNodeId
;
884 UINT64 AddressLength
;
885 UINT32 NumberOfPowerStates
;
886 UINT32 NumberOfPhysicalComponents
;
887 //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
888 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
889 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE
;
891 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
892 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
893 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
896 UINT16 MemoryPowerNodeCount
;
898 } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE
;
901 /// MPST Memory Power State Characteristics Table
904 UINT8 PowerStateStructureID
;
907 UINT32 AveragePowerConsumedInMPS0
;
908 UINT32 RelativePowerSavingToMPS0
;
909 UINT64 ExitLatencyToMPS0
;
910 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE
;
912 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
913 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
914 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
917 UINT16 MemoryPowerStateCharacteristicsCount
;
919 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE
;
922 /// Memory Topology Table definition.
925 EFI_ACPI_DESCRIPTION_HEADER Header
;
927 } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE
;
930 /// PMTT Version (as defined in ACPI 5.1 spec.)
932 #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
935 /// Common Memory Aggregator Device Structure.
943 } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
946 /// Memory Aggregator Device Type
948 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
949 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
950 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
953 /// Socket Memory Aggregator Device Structure.
956 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
957 UINT16 SocketIdentifier
;
959 //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
960 } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
963 /// MemoryController Memory Aggregator Device Structure.
966 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
969 UINT32 ReadBandwidth
;
970 UINT32 WriteBandwidth
;
971 UINT16 OptimalAccessUnit
;
972 UINT16 OptimalAccessAlignment
;
974 UINT16 NumberOfProximityDomains
;
975 //UINT32 ProximityDomain[NumberOfProximityDomains];
976 //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
977 } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
980 /// DIMM Memory Aggregator Device Structure.
983 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header
;
984 UINT16 PhysicalComponentIdentifier
;
988 } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE
;
991 /// Boot Graphics Resource Table definition.
994 EFI_ACPI_DESCRIPTION_HEADER Header
;
996 /// 2-bytes (16 bit) version ID. This value must be 1.
1000 /// 1-byte status field indicating current status about the table.
1001 /// Bits[7:1] = Reserved (must be zero)
1002 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1006 /// 1-byte enumerated type field indicating format of the image.
1008 /// 1 - 255 Reserved (for future use)
1012 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1013 /// of the image bitmap.
1015 UINT64 ImageAddress
;
1017 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1018 /// (X, Y) display offset of the top left corner of the boot image.
1019 /// The top left corner of the display is at offset (0, 0).
1021 UINT32 ImageOffsetX
;
1023 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1024 /// (X, Y) display offset of the top left corner of the boot image.
1025 /// The top left corner of the display is at offset (0, 0).
1027 UINT32 ImageOffsetY
;
1028 } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE
;
1033 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1038 #define EFI_ACPI_5_1_BGRT_VERSION 0x01
1043 #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
1044 #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01
1049 #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00
1052 /// FPDT Version (as defined in ACPI 5.1 spec.)
1054 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1057 /// FPDT Performance Record Types
1059 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1060 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1063 /// FPDT Performance Record Revision
1065 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1066 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1069 /// FPDT Runtime Performance Record Types
1071 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1072 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1073 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1076 /// FPDT Runtime Performance Record Revision
1078 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1079 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1080 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1083 /// FPDT Performance Record header
1089 } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER
;
1092 /// FPDT Performance Table header
1097 } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER
;
1100 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1103 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1106 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1108 UINT64 BootPerformanceTablePointer
;
1109 } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD
;
1112 /// FPDT S3 Performance Table Pointer Record Structure
1115 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1118 /// 64-bit processor-relative physical address of the S3 Performance Table.
1120 UINT64 S3PerformanceTablePointer
;
1121 } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD
;
1124 /// FPDT Firmware Basic Boot Performance Record Structure
1127 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1130 /// Timer value logged at the beginning of firmware image execution.
1131 /// This may not always be zero or near zero.
1135 /// Timer value logged just prior to loading the OS boot loader into memory.
1136 /// For non-UEFI compatible boots, this field must be zero.
1138 UINT64 OsLoaderLoadImageStart
;
1140 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1141 /// For non-UEFI compatible boots, the timer value logged will be just prior
1142 /// to the INT 19h handler invocation.
1144 UINT64 OsLoaderStartImageStart
;
1146 /// Timer value logged at the point when the OS loader calls the
1147 /// ExitBootServices function for UEFI compatible firmware.
1148 /// For non-UEFI compatible boots, this field must be zero.
1150 UINT64 ExitBootServicesEntry
;
1152 /// Timer value logged at the point just prior towhen the OS loader gaining
1153 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1154 /// For non-UEFI compatible boots, this field must be zero.
1156 UINT64 ExitBootServicesExit
;
1157 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD
;
1160 /// FPDT Firmware Basic Boot Performance Table signature
1162 #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1165 // FPDT Firmware Basic Boot Performance Table
1168 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header
;
1170 // one or more Performance Records.
1172 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE
;
1175 /// FPDT "S3PT" S3 Performance Table
1177 #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1180 // FPDT Firmware S3 Boot Performance Table
1183 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header
;
1185 // one or more Performance Records.
1187 } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE
;
1190 /// FPDT Basic S3 Resume Performance Record
1193 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1195 /// A count of the number of S3 resume cycles since the last full boot sequence.
1199 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1200 /// OS waking vector. Only the most recent resume cycle's time is retained.
1204 /// Average timer value of all resume cycles logged since the last full boot
1205 /// sequence, including the most recent resume. Note that the entire log of
1206 /// timer values does not need to be retained in order to calculate this average.
1208 UINT64 AverageResume
;
1209 } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD
;
1212 /// FPDT Basic S3 Suspend Performance Record
1215 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header
;
1217 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1218 /// Only the most recent suspend cycle's timer value is retained.
1220 UINT64 SuspendStart
;
1222 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1223 /// mechanism) used to trigger hardware entry to S3.
1224 /// Only the most recent suspend cycle's timer value is retained.
1227 } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD
;
1230 /// Firmware Performance Record Table definition.
1233 EFI_ACPI_DESCRIPTION_HEADER Header
;
1234 } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE
;
1237 /// Generic Timer Description Table definition.
1240 EFI_ACPI_DESCRIPTION_HEADER Header
;
1241 UINT64 CntControlBasePhysicalAddress
;
1243 UINT32 SecurePL1TimerGSIV
;
1244 UINT32 SecurePL1TimerFlags
;
1245 UINT32 NonSecurePL1TimerGSIV
;
1246 UINT32 NonSecurePL1TimerFlags
;
1247 UINT32 VirtualTimerGSIV
;
1248 UINT32 VirtualTimerFlags
;
1249 UINT32 NonSecurePL2TimerGSIV
;
1250 UINT32 NonSecurePL2TimerFlags
;
1251 UINT64 CntReadBasePhysicalAddress
;
1252 UINT32 PlatformTimerCount
;
1253 UINT32 PlatformTimerOffset
;
1254 } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE
;
1257 /// GTDT Version (as defined in ACPI 5.1 spec.)
1259 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1262 /// Timer Flags. All other bits are reserved and must be 0.
1264 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1265 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1266 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
1269 /// Platform Timer Type
1271 #define EFI_ACPI_5_1_GTDT_GT_BLOCK 0
1272 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1
1275 /// GT Block Structure
1282 UINT32 GTBlockTimerCount
;
1283 UINT32 GTBlockTimerOffset
;
1284 } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE
;
1287 /// GT Block Timer Structure
1290 UINT8 GTFrameNumber
;
1294 UINT32 GTxPhysicalTimerGSIV
;
1295 UINT32 GTxPhysicalTimerFlags
;
1296 UINT32 GTxVirtualTimerGSIV
;
1297 UINT32 GTxVirtualTimerFlags
;
1298 UINT32 GTxCommonFlags
;
1299 } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE
;
1302 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
1304 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1305 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1308 /// Common Flags Flags. All other bits are reserved and must be 0.
1310 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
1311 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
1314 /// SBSA Generic Watchdog Structure
1320 UINT64 RefreshFramePhysicalAddress
;
1321 UINT64 WatchdogControlFramePhysicalAddress
;
1322 UINT32 WatchdogTimerGSIV
;
1323 UINT32 WatchdogTimerFlags
;
1324 } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE
;
1327 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
1329 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
1330 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1331 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
1334 /// Boot Error Record Table (BERT)
1337 EFI_ACPI_DESCRIPTION_HEADER Header
;
1338 UINT32 BootErrorRegionLength
;
1339 UINT64 BootErrorRegion
;
1340 } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER
;
1343 /// BERT Version (as defined in ACPI 5.1 spec.)
1345 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1348 /// Boot Error Region Block Status Definition
1351 UINT32 UncorrectableErrorValid
:1;
1352 UINT32 CorrectableErrorValid
:1;
1353 UINT32 MultipleUncorrectableErrors
:1;
1354 UINT32 MultipleCorrectableErrors
:1;
1355 UINT32 ErrorDataEntryCount
:10;
1357 } EFI_ACPI_5_1_ERROR_BLOCK_STATUS
;
1360 /// Boot Error Region Definition
1363 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus
;
1364 UINT32 RawDataOffset
;
1365 UINT32 RawDataLength
;
1367 UINT32 ErrorSeverity
;
1368 } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE
;
1371 // Boot Error Severity types
1373 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00
1374 #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01
1375 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02
1376 #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03
1379 /// Generic Error Data Entry Definition
1382 UINT8 SectionType
[16];
1383 UINT32 ErrorSeverity
;
1385 UINT8 ValidationBits
;
1387 UINT32 ErrorDataLength
;
1390 } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE
;
1393 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)
1395 #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1398 /// HEST - Hardware Error Source Table
1401 EFI_ACPI_DESCRIPTION_HEADER Header
;
1402 UINT32 ErrorSourceCount
;
1403 } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER
;
1406 /// HEST Version (as defined in ACPI 5.1 spec.)
1408 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1411 // Error Source structure types.
1413 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1414 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1415 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02
1416 #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06
1417 #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07
1418 #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08
1419 #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09
1422 // Error Source structure flags.
1424 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1425 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1428 /// IA-32 Architecture Machine Check Exception Structure Definition
1436 UINT32 NumberOfRecordsToPreAllocate
;
1437 UINT32 MaxSectionsPerRecord
;
1438 UINT64 GlobalCapabilityInitData
;
1439 UINT64 GlobalControlInitData
;
1440 UINT8 NumberOfHardwareBanks
;
1442 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE
;
1445 /// IA-32 Architecture Machine Check Bank Structure Definition
1449 UINT8 ClearStatusOnInitialization
;
1450 UINT8 StatusDataFormat
;
1452 UINT32 ControlRegisterMsrAddress
;
1453 UINT64 ControlInitData
;
1454 UINT32 StatusRegisterMsrAddress
;
1455 UINT32 AddressRegisterMsrAddress
;
1456 UINT32 MiscRegisterMsrAddress
;
1457 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE
;
1460 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1462 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1463 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1464 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1467 // Hardware Error Notification types. All other values are reserved
1469 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1470 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1471 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1472 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1473 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1476 /// Hardware Error Notification Configuration Write Enable Structure Definition
1480 UINT16 PollInterval
:1;
1481 UINT16 SwitchToPollingThresholdValue
:1;
1482 UINT16 SwitchToPollingThresholdWindow
:1;
1483 UINT16 ErrorThresholdValue
:1;
1484 UINT16 ErrorThresholdWindow
:1;
1486 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE
;
1489 /// Hardware Error Notification Structure Definition
1494 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable
;
1495 UINT32 PollInterval
;
1497 UINT32 SwitchToPollingThresholdValue
;
1498 UINT32 SwitchToPollingThresholdWindow
;
1499 UINT32 ErrorThresholdValue
;
1500 UINT32 ErrorThresholdWindow
;
1501 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE
;
1504 /// IA-32 Architecture Corrected Machine Check Structure Definition
1512 UINT32 NumberOfRecordsToPreAllocate
;
1513 UINT32 MaxSectionsPerRecord
;
1514 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure
;
1515 UINT8 NumberOfHardwareBanks
;
1517 } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE
;
1520 /// IA-32 Architecture NMI Error Structure Definition
1526 UINT32 NumberOfRecordsToPreAllocate
;
1527 UINT32 MaxSectionsPerRecord
;
1528 UINT32 MaxRawDataLength
;
1529 } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE
;
1532 /// PCI Express Root Port AER Structure Definition
1540 UINT32 NumberOfRecordsToPreAllocate
;
1541 UINT32 MaxSectionsPerRecord
;
1545 UINT16 DeviceControl
;
1547 UINT32 UncorrectableErrorMask
;
1548 UINT32 UncorrectableErrorSeverity
;
1549 UINT32 CorrectableErrorMask
;
1550 UINT32 AdvancedErrorCapabilitiesAndControl
;
1551 UINT32 RootErrorCommand
;
1552 } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE
;
1555 /// PCI Express Device AER Structure Definition
1563 UINT32 NumberOfRecordsToPreAllocate
;
1564 UINT32 MaxSectionsPerRecord
;
1568 UINT16 DeviceControl
;
1570 UINT32 UncorrectableErrorMask
;
1571 UINT32 UncorrectableErrorSeverity
;
1572 UINT32 CorrectableErrorMask
;
1573 UINT32 AdvancedErrorCapabilitiesAndControl
;
1574 } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE
;
1577 /// PCI Express Bridge AER Structure Definition
1585 UINT32 NumberOfRecordsToPreAllocate
;
1586 UINT32 MaxSectionsPerRecord
;
1590 UINT16 DeviceControl
;
1592 UINT32 UncorrectableErrorMask
;
1593 UINT32 UncorrectableErrorSeverity
;
1594 UINT32 CorrectableErrorMask
;
1595 UINT32 AdvancedErrorCapabilitiesAndControl
;
1596 UINT32 SecondaryUncorrectableErrorMask
;
1597 UINT32 SecondaryUncorrectableErrorSeverity
;
1598 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl
;
1599 } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE
;
1602 /// Generic Hardware Error Source Structure Definition
1607 UINT16 RelatedSourceId
;
1610 UINT32 NumberOfRecordsToPreAllocate
;
1611 UINT32 MaxSectionsPerRecord
;
1612 UINT32 MaxRawDataLength
;
1613 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress
;
1614 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure
;
1615 UINT32 ErrorStatusBlockLength
;
1616 } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE
;
1619 /// Generic Error Status Definition
1622 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus
;
1623 UINT32 RawDataOffset
;
1624 UINT32 RawDataLength
;
1626 UINT32 ErrorSeverity
;
1627 } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE
;
1630 /// ERST - Error Record Serialization Table
1633 EFI_ACPI_DESCRIPTION_HEADER Header
;
1634 UINT32 SerializationHeaderSize
;
1636 UINT32 InstructionEntryCount
;
1637 } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER
;
1640 /// ERST Version (as defined in ACPI 5.1 spec.)
1642 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1645 /// ERST Serialization Actions
1647 #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00
1648 #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01
1649 #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02
1650 #define EFI_ACPI_5_1_ERST_END_OPERATION 0x03
1651 #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04
1652 #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05
1653 #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06
1654 #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07
1655 #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08
1656 #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09
1657 #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A
1658 #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1659 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1660 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1661 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1664 /// ERST Action Command Status
1666 #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00
1667 #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1668 #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1669 #define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03
1670 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1671 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05
1674 /// ERST Serialization Instructions
1676 #define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00
1677 #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01
1678 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02
1679 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03
1680 #define EFI_ACPI_5_1_ERST_NOOP 0x04
1681 #define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05
1682 #define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06
1683 #define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07
1684 #define EFI_ACPI_5_1_ERST_ADD 0x08
1685 #define EFI_ACPI_5_1_ERST_SUBTRACT 0x09
1686 #define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A
1687 #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B
1688 #define EFI_ACPI_5_1_ERST_STALL 0x0C
1689 #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D
1690 #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1691 #define EFI_ACPI_5_1_ERST_GOTO 0x0F
1692 #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10
1693 #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11
1694 #define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12
1697 /// ERST Instruction Flags
1699 #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01
1702 /// ERST Serialization Instruction Entry
1705 UINT8 SerializationAction
;
1709 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion
;
1712 } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY
;
1715 /// EINJ - Error Injection Table
1718 EFI_ACPI_DESCRIPTION_HEADER Header
;
1719 UINT32 InjectionHeaderSize
;
1720 UINT8 InjectionFlags
;
1722 UINT32 InjectionEntryCount
;
1723 } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER
;
1726 /// EINJ Version (as defined in ACPI 5.1 spec.)
1728 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
1731 /// EINJ Error Injection Actions
1733 #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00
1734 #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1735 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02
1736 #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03
1737 #define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04
1738 #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05
1739 #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06
1740 #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07
1741 #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF
1744 /// EINJ Action Command Status
1746 #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00
1747 #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1748 #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02
1751 /// EINJ Error Type Definition
1753 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1754 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1755 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1756 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1757 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1758 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1759 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1760 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1761 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1762 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1763 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1764 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1767 /// EINJ Injection Instructions
1769 #define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00
1770 #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01
1771 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02
1772 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03
1773 #define EFI_ACPI_5_1_EINJ_NOOP 0x04
1776 /// EINJ Instruction Flags
1778 #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01
1781 /// EINJ Injection Instruction Entry
1784 UINT8 InjectionAction
;
1788 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion
;
1791 } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY
;
1794 /// EINJ Trigger Action Table
1801 } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE
;
1804 /// Platform Communications Channel Table (PCCT)
1807 EFI_ACPI_DESCRIPTION_HEADER Header
;
1810 } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER
;
1813 /// PCCT Version (as defined in ACPI 5.1 spec.)
1815 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1818 /// PCCT Global Flags
1820 #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0
1823 // PCCT Subspace type
1825 #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1828 /// PCC Subspace Structure Header
1833 } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER
;
1836 /// Generic Communications Subspace Structure
1843 UINT64 AddressLength
;
1844 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister
;
1845 UINT64 DoorbellPreserve
;
1846 UINT64 DoorbellWrite
;
1847 UINT32 NominalLatency
;
1848 UINT32 MaximumPeriodicAccessRate
;
1849 UINT16 MinimumRequestTurnaroundTime
;
1850 } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC
;
1853 /// Generic Communications Channel Shared Memory Region
1859 UINT8 GenerateSci
:1;
1860 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND
;
1863 UINT8 CommandComplete
:1;
1864 UINT8 SciDoorbell
:1;
1868 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS
;
1872 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command
;
1873 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status
;
1874 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER
;
1877 // Known table signatures
1881 /// "RSD PTR " Root System Description Pointer
1883 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1886 /// "APIC" Multiple APIC Description Table
1888 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1891 /// "BERT" Boot Error Record Table
1893 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1896 /// "BGRT" Boot Graphics Resource Table
1898 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1901 /// "CPEP" Corrected Platform Error Polling Table
1903 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1906 /// "DSDT" Differentiated System Description Table
1908 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1911 /// "ECDT" Embedded Controller Boot Resources Table
1913 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1916 /// "EINJ" Error Injection Table
1918 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1921 /// "ERST" Error Record Serialization Table
1923 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1926 /// "FACP" Fixed ACPI Description Table
1928 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1931 /// "FACS" Firmware ACPI Control Structure
1933 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1936 /// "FPDT" Firmware Performance Data Table
1938 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1941 /// "GTDT" Generic Timer Description Table
1943 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1946 /// "HEST" Hardware Error Source Table
1948 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1951 /// "MPST" Memory Power State Table
1953 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1956 /// "MSCT" Maximum System Characteristics Table
1958 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1961 /// "PMTT" Platform Memory Topology Table
1963 #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1966 /// "PSDT" Persistent System Description Table
1968 #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1971 /// "RASF" ACPI RAS Feature Table
1973 #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1976 /// "RSDT" Root System Description Table
1978 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1981 /// "SBST" Smart Battery Specification Table
1983 #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
1986 /// "SLIT" System Locality Information Table
1988 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
1991 /// "SRAT" System Resource Affinity Table
1993 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
1996 /// "SSDT" Secondary System Description Table
1998 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
2001 /// "XSDT" Extended System Description Table
2003 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
2006 /// "BOOT" MS Simple Boot Spec
2008 #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2011 /// "CSRT" MS Core System Resource Table
2013 #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2016 /// "DBG2" MS Debug Port 2 Spec
2018 #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2021 /// "DBGP" MS Debug Port Spec
2023 #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2026 /// "DMAR" DMA Remapping Table
2028 #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2031 /// "DRTM" Dynamic Root of Trust for Measurement Table
2033 #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2036 /// "ETDT" Event Timer Description Table
2038 #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2041 /// "HPET" IA-PC High Precision Event Timer Table
2043 #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2046 /// "iBFT" iSCSI Boot Firmware Table
2048 #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2051 /// "IVRS" I/O Virtualization Reporting Structure
2053 #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2056 /// "LPIT" Low Power Idle Table
2058 #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
2061 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2063 #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2066 /// "MCHI" Management Controller Host Interface Table
2068 #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2071 /// "MSDM" MS Data Management Table
2073 #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2076 /// "SLIC" MS Software Licensing Table Specification
2078 #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2081 /// "SPCR" Serial Port Concole Redirection Table
2083 #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2086 /// "SPMI" Server Platform Management Interface Table
2088 #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2091 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2093 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2096 /// "TPM2" Trusted Computing Platform 1 Table
2098 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2101 /// "UEFI" UEFI ACPI Data Table
2103 #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2106 /// "WAET" Windows ACPI Emulated Devices Table
2108 #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2111 /// "WDAT" Watchdog Action Table
2113 #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2116 /// "WDRT" Watchdog Resource Table
2118 #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2121 /// "WPBT" MS Platform Binary Table
2123 #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')