MdePkg: Add definitions for ACPI 6.2
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi62.h
1 /** @file
2 ACPI 6.2 definitions from the ACPI Specification Revision 6.2 May, 2017.
3
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 **/
13
14 #ifndef _ACPI_6_2_H_
15 #define _ACPI_6_2_H_
16
17 #include <IndustryStandard/Acpi61.h>
18
19 //
20 // Large Item Descriptor Name
21 //
22 #define ACPI_LARGE_PIN_FUNCTION_DESCRIPTOR_NAME 0x0D
23 #define ACPI_LARGE_PIN_CONFIGURATION_DESCRIPTOR_NAME 0x0F
24 #define ACPI_LARGE_PIN_GROUP_DESCRIPTOR_NAME 0x10
25 #define ACPI_LARGE_PIN_GROUP_FUNCTION_DESCRIPTOR_NAME 0x11
26 #define ACPI_LARGE_PIN_GROUP_CONFIGURATION_DESCRIPTOR_NAME 0x12
27
28 //
29 // Large Item Descriptor Value
30 //
31 #define ACPI_PIN_FUNCTION_DESCRIPTOR 0x8D
32 #define ACPI_PIN_CONFIGURATION_DESCRIPTOR 0x8F
33 #define ACPI_PIN_GROUP_DESCRIPTOR 0x90
34 #define ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR 0x91
35 #define ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR 0x92
36
37 #pragma pack(1)
38
39 ///
40 /// Pin Function Descriptor
41 ///
42 typedef PACKED struct {
43 ACPI_LARGE_RESOURCE_HEADER Header;
44 UINT8 RevisionId;
45 UINT16 Flags;
46 UINT8 PinPullConfiguration;
47 UINT16 FunctionNumber;
48 UINT16 PinTableOffset;
49 UINT8 ResourceSourceIndex;
50 UINT16 ResourceSourceNameOffset;
51 UINT16 VendorDataOffset;
52 UINT16 VendorDataLength;
53 } EFI_ACPI_PIN_FUNCTION_DESCRIPTOR;
54
55 ///
56 /// Pin Configuration Descriptor
57 ///
58 typedef PACKED struct {
59 ACPI_LARGE_RESOURCE_HEADER Header;
60 UINT8 RevisionId;
61 UINT16 Flags;
62 UINT8 PinConfigurationType;
63 UINT32 PinConfigurationValue;
64 UINT16 PinTableOffset;
65 UINT8 ResourceSourceIndex;
66 UINT16 ResourceSourceNameOffset;
67 UINT16 VendorDataOffset;
68 UINT16 VendorDataLength;
69 } EFI_ACPI_PIN_CONFIGURATION_DESCRIPTOR;
70
71 ///
72 /// Pin Group Descriptor
73 ///
74 typedef PACKED struct {
75 ACPI_LARGE_RESOURCE_HEADER Header;
76 UINT8 RevisionId;
77 UINT16 Flags;
78 UINT16 PinTableOffset;
79 UINT16 ResourceLabelOffset;
80 UINT16 VendorDataOffset;
81 UINT16 VendorDataLength;
82 } EFI_ACPI_PIN_GROUP_DESCRIPTOR;
83
84 ///
85 /// Pin Group Function Descriptor
86 ///
87 typedef PACKED struct {
88 ACPI_LARGE_RESOURCE_HEADER Header;
89 UINT8 RevisionId;
90 UINT16 Flags;
91 UINT16 FunctionNumber;
92 UINT8 ResourceSourceIndex;
93 UINT16 ResourceSourceNameOffset;
94 UINT16 ResourceSourceLabelOffset;
95 UINT16 VendorDataOffset;
96 UINT16 VendorDataLength;
97 } EFI_ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR;
98
99 ///
100 /// Pin Group Configuration Descriptor
101 ///
102 typedef PACKED struct {
103 ACPI_LARGE_RESOURCE_HEADER Header;
104 UINT8 RevisionId;
105 UINT16 Flags;
106 UINT8 PinConfigurationType;
107 UINT32 PinConfigurationValue;
108 UINT8 ResourceSourceIndex;
109 UINT16 ResourceSourceNameOffset;
110 UINT16 ResourceSourceLabelOffset;
111 UINT16 VendorDataOffset;
112 UINT16 VendorDataLength;
113 } EFI_ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR;
114
115 #pragma pack()
116
117 //
118 // Ensure proper structure formats
119 //
120 #pragma pack(1)
121
122 ///
123 /// ACPI 6.2 Generic Address Space definition
124 ///
125 typedef struct {
126 UINT8 AddressSpaceId;
127 UINT8 RegisterBitWidth;
128 UINT8 RegisterBitOffset;
129 UINT8 AccessSize;
130 UINT64 Address;
131 } EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE;
132
133 //
134 // Generic Address Space Address IDs
135 //
136 #define EFI_ACPI_6_2_SYSTEM_MEMORY 0
137 #define EFI_ACPI_6_2_SYSTEM_IO 1
138 #define EFI_ACPI_6_2_PCI_CONFIGURATION_SPACE 2
139 #define EFI_ACPI_6_2_EMBEDDED_CONTROLLER 3
140 #define EFI_ACPI_6_2_SMBUS 4
141 #define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL 0x0A
142 #define EFI_ACPI_6_2_FUNCTIONAL_FIXED_HARDWARE 0x7F
143
144 //
145 // Generic Address Space Access Sizes
146 //
147 #define EFI_ACPI_6_2_UNDEFINED 0
148 #define EFI_ACPI_6_2_BYTE 1
149 #define EFI_ACPI_6_2_WORD 2
150 #define EFI_ACPI_6_2_DWORD 3
151 #define EFI_ACPI_6_2_QWORD 4
152
153 //
154 // ACPI 6.2 table structures
155 //
156
157 ///
158 /// Root System Description Pointer Structure
159 ///
160 typedef struct {
161 UINT64 Signature;
162 UINT8 Checksum;
163 UINT8 OemId[6];
164 UINT8 Revision;
165 UINT32 RsdtAddress;
166 UINT32 Length;
167 UINT64 XsdtAddress;
168 UINT8 ExtendedChecksum;
169 UINT8 Reserved[3];
170 } EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER;
171
172 ///
173 /// RSD_PTR Revision (as defined in ACPI 6.2 spec.)
174 ///
175 #define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.2) says current value is 2
176
177 ///
178 /// Common table header, this prefaces all ACPI tables, including FACS, but
179 /// excluding the RSD PTR structure
180 ///
181 typedef struct {
182 UINT32 Signature;
183 UINT32 Length;
184 } EFI_ACPI_6_2_COMMON_HEADER;
185
186 //
187 // Root System Description Table
188 // No definition needed as it is a common description table header, the same with
189 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
190 //
191
192 ///
193 /// RSDT Revision (as defined in ACPI 6.2 spec.)
194 ///
195 #define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
196
197 //
198 // Extended System Description Table
199 // No definition needed as it is a common description table header, the same with
200 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
201 //
202
203 ///
204 /// XSDT Revision (as defined in ACPI 6.2 spec.)
205 ///
206 #define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
207
208 ///
209 /// Fixed ACPI Description Table Structure (FADT)
210 ///
211 typedef struct {
212 EFI_ACPI_DESCRIPTION_HEADER Header;
213 UINT32 FirmwareCtrl;
214 UINT32 Dsdt;
215 UINT8 Reserved0;
216 UINT8 PreferredPmProfile;
217 UINT16 SciInt;
218 UINT32 SmiCmd;
219 UINT8 AcpiEnable;
220 UINT8 AcpiDisable;
221 UINT8 S4BiosReq;
222 UINT8 PstateCnt;
223 UINT32 Pm1aEvtBlk;
224 UINT32 Pm1bEvtBlk;
225 UINT32 Pm1aCntBlk;
226 UINT32 Pm1bCntBlk;
227 UINT32 Pm2CntBlk;
228 UINT32 PmTmrBlk;
229 UINT32 Gpe0Blk;
230 UINT32 Gpe1Blk;
231 UINT8 Pm1EvtLen;
232 UINT8 Pm1CntLen;
233 UINT8 Pm2CntLen;
234 UINT8 PmTmrLen;
235 UINT8 Gpe0BlkLen;
236 UINT8 Gpe1BlkLen;
237 UINT8 Gpe1Base;
238 UINT8 CstCnt;
239 UINT16 PLvl2Lat;
240 UINT16 PLvl3Lat;
241 UINT16 FlushSize;
242 UINT16 FlushStride;
243 UINT8 DutyOffset;
244 UINT8 DutyWidth;
245 UINT8 DayAlrm;
246 UINT8 MonAlrm;
247 UINT8 Century;
248 UINT16 IaPcBootArch;
249 UINT8 Reserved1;
250 UINT32 Flags;
251 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ResetReg;
252 UINT8 ResetValue;
253 UINT16 ArmBootArch;
254 UINT8 MinorVersion;
255 UINT64 XFirmwareCtrl;
256 UINT64 XDsdt;
257 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
258 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
259 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
260 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
261 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
262 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
263 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
264 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
265 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
266 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
267 UINT64 HypervisorVendorIdentity;
268 } EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE;
269
270 ///
271 /// FADT Version (as defined in ACPI 6.2 spec.)
272 ///
273 #define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
274 #define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x02
275
276 //
277 // Fixed ACPI Description Table Preferred Power Management Profile
278 //
279 #define EFI_ACPI_6_2_PM_PROFILE_UNSPECIFIED 0
280 #define EFI_ACPI_6_2_PM_PROFILE_DESKTOP 1
281 #define EFI_ACPI_6_2_PM_PROFILE_MOBILE 2
282 #define EFI_ACPI_6_2_PM_PROFILE_WORKSTATION 3
283 #define EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER 4
284 #define EFI_ACPI_6_2_PM_PROFILE_SOHO_SERVER 5
285 #define EFI_ACPI_6_2_PM_PROFILE_APPLIANCE_PC 6
286 #define EFI_ACPI_6_2_PM_PROFILE_PERFORMANCE_SERVER 7
287 #define EFI_ACPI_6_2_PM_PROFILE_TABLET 8
288
289 //
290 // Fixed ACPI Description Table Boot Architecture Flags
291 // All other bits are reserved and must be set to 0.
292 //
293 #define EFI_ACPI_6_2_LEGACY_DEVICES BIT0
294 #define EFI_ACPI_6_2_8042 BIT1
295 #define EFI_ACPI_6_2_VGA_NOT_PRESENT BIT2
296 #define EFI_ACPI_6_2_MSI_NOT_SUPPORTED BIT3
297 #define EFI_ACPI_6_2_PCIE_ASPM_CONTROLS BIT4
298 #define EFI_ACPI_6_2_CMOS_RTC_NOT_PRESENT BIT5
299
300 //
301 // Fixed ACPI Description Table Arm Boot Architecture Flags
302 // All other bits are reserved and must be set to 0.
303 //
304 #define EFI_ACPI_6_2_ARM_PSCI_COMPLIANT BIT0
305 #define EFI_ACPI_6_2_ARM_PSCI_USE_HVC BIT1
306
307 //
308 // Fixed ACPI Description Table Fixed Feature Flags
309 // All other bits are reserved and must be set to 0.
310 //
311 #define EFI_ACPI_6_2_WBINVD BIT0
312 #define EFI_ACPI_6_2_WBINVD_FLUSH BIT1
313 #define EFI_ACPI_6_2_PROC_C1 BIT2
314 #define EFI_ACPI_6_2_P_LVL2_UP BIT3
315 #define EFI_ACPI_6_2_PWR_BUTTON BIT4
316 #define EFI_ACPI_6_2_SLP_BUTTON BIT5
317 #define EFI_ACPI_6_2_FIX_RTC BIT6
318 #define EFI_ACPI_6_2_RTC_S4 BIT7
319 #define EFI_ACPI_6_2_TMR_VAL_EXT BIT8
320 #define EFI_ACPI_6_2_DCK_CAP BIT9
321 #define EFI_ACPI_6_2_RESET_REG_SUP BIT10
322 #define EFI_ACPI_6_2_SEALED_CASE BIT11
323 #define EFI_ACPI_6_2_HEADLESS BIT12
324 #define EFI_ACPI_6_2_CPU_SW_SLP BIT13
325 #define EFI_ACPI_6_2_PCI_EXP_WAK BIT14
326 #define EFI_ACPI_6_2_USE_PLATFORM_CLOCK BIT15
327 #define EFI_ACPI_6_2_S4_RTC_STS_VALID BIT16
328 #define EFI_ACPI_6_2_REMOTE_POWER_ON_CAPABLE BIT17
329 #define EFI_ACPI_6_2_FORCE_APIC_CLUSTER_MODEL BIT18
330 #define EFI_ACPI_6_2_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
331 #define EFI_ACPI_6_2_HW_REDUCED_ACPI BIT20
332 #define EFI_ACPI_6_2_LOW_POWER_S0_IDLE_CAPABLE BIT21
333
334 ///
335 /// Firmware ACPI Control Structure
336 ///
337 typedef struct {
338 UINT32 Signature;
339 UINT32 Length;
340 UINT32 HardwareSignature;
341 UINT32 FirmwareWakingVector;
342 UINT32 GlobalLock;
343 UINT32 Flags;
344 UINT64 XFirmwareWakingVector;
345 UINT8 Version;
346 UINT8 Reserved0[3];
347 UINT32 OspmFlags;
348 UINT8 Reserved1[24];
349 } EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE;
350
351 ///
352 /// FACS Version (as defined in ACPI 6.2 spec.)
353 ///
354 #define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
355
356 ///
357 /// Firmware Control Structure Feature Flags
358 /// All other bits are reserved and must be set to 0.
359 ///
360 #define EFI_ACPI_6_2_S4BIOS_F BIT0
361 #define EFI_ACPI_6_2_64BIT_WAKE_SUPPORTED_F BIT1
362
363 ///
364 /// OSPM Enabled Firmware Control Structure Flags
365 /// All other bits are reserved and must be set to 0.
366 ///
367 #define EFI_ACPI_6_2_OSPM_64BIT_WAKE_F BIT0
368
369 //
370 // Differentiated System Description Table,
371 // Secondary System Description Table
372 // and Persistent System Description Table,
373 // no definition needed as they are common description table header, the same with
374 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
375 //
376 #define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
377 #define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
378
379 ///
380 /// Multiple APIC Description Table header definition. The rest of the table
381 /// must be defined in a platform specific manner.
382 ///
383 typedef struct {
384 EFI_ACPI_DESCRIPTION_HEADER Header;
385 UINT32 LocalApicAddress;
386 UINT32 Flags;
387 } EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
388
389 ///
390 /// MADT Revision (as defined in ACPI 6.2 spec.)
391 ///
392 #define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04
393
394 ///
395 /// Multiple APIC Flags
396 /// All other bits are reserved and must be set to 0.
397 ///
398 #define EFI_ACPI_6_2_PCAT_COMPAT BIT0
399
400 //
401 // Multiple APIC Description Table APIC structure types
402 // All other values between 0x0D and 0x7F are reserved and
403 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
404 //
405 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC 0x00
406 #define EFI_ACPI_6_2_IO_APIC 0x01
407 #define EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE 0x02
408 #define EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE 0x03
409 #define EFI_ACPI_6_2_LOCAL_APIC_NMI 0x04
410 #define EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
411 #define EFI_ACPI_6_2_IO_SAPIC 0x06
412 #define EFI_ACPI_6_2_LOCAL_SAPIC 0x07
413 #define EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES 0x08
414 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC 0x09
415 #define EFI_ACPI_6_2_LOCAL_X2APIC_NMI 0x0A
416 #define EFI_ACPI_6_2_GIC 0x0B
417 #define EFI_ACPI_6_2_GICD 0x0C
418 #define EFI_ACPI_6_2_GIC_MSI_FRAME 0x0D
419 #define EFI_ACPI_6_2_GICR 0x0E
420 #define EFI_ACPI_6_2_GIC_ITS 0x0F
421
422 //
423 // APIC Structure Definitions
424 //
425
426 ///
427 /// Processor Local APIC Structure Definition
428 ///
429 typedef struct {
430 UINT8 Type;
431 UINT8 Length;
432 UINT8 AcpiProcessorUid;
433 UINT8 ApicId;
434 UINT32 Flags;
435 } EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_STRUCTURE;
436
437 ///
438 /// Local APIC Flags. All other bits are reserved and must be 0.
439 ///
440 #define EFI_ACPI_6_2_LOCAL_APIC_ENABLED BIT0
441
442 ///
443 /// IO APIC Structure
444 ///
445 typedef struct {
446 UINT8 Type;
447 UINT8 Length;
448 UINT8 IoApicId;
449 UINT8 Reserved;
450 UINT32 IoApicAddress;
451 UINT32 GlobalSystemInterruptBase;
452 } EFI_ACPI_6_2_IO_APIC_STRUCTURE;
453
454 ///
455 /// Interrupt Source Override Structure
456 ///
457 typedef struct {
458 UINT8 Type;
459 UINT8 Length;
460 UINT8 Bus;
461 UINT8 Source;
462 UINT32 GlobalSystemInterrupt;
463 UINT16 Flags;
464 } EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
465
466 ///
467 /// Platform Interrupt Sources Structure Definition
468 ///
469 typedef struct {
470 UINT8 Type;
471 UINT8 Length;
472 UINT16 Flags;
473 UINT8 InterruptType;
474 UINT8 ProcessorId;
475 UINT8 ProcessorEid;
476 UINT8 IoSapicVector;
477 UINT32 GlobalSystemInterrupt;
478 UINT32 PlatformInterruptSourceFlags;
479 UINT8 CpeiProcessorOverride;
480 UINT8 Reserved[31];
481 } EFI_ACPI_6_2_PLATFORM_INTERRUPT_APIC_STRUCTURE;
482
483 //
484 // MPS INTI flags.
485 // All other bits are reserved and must be set to 0.
486 //
487 #define EFI_ACPI_6_2_POLARITY (3 << 0)
488 #define EFI_ACPI_6_2_TRIGGER_MODE (3 << 2)
489
490 ///
491 /// Non-Maskable Interrupt Source Structure
492 ///
493 typedef struct {
494 UINT8 Type;
495 UINT8 Length;
496 UINT16 Flags;
497 UINT32 GlobalSystemInterrupt;
498 } EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
499
500 ///
501 /// Local APIC NMI Structure
502 ///
503 typedef struct {
504 UINT8 Type;
505 UINT8 Length;
506 UINT8 AcpiProcessorUid;
507 UINT16 Flags;
508 UINT8 LocalApicLint;
509 } EFI_ACPI_6_2_LOCAL_APIC_NMI_STRUCTURE;
510
511 ///
512 /// Local APIC Address Override Structure
513 ///
514 typedef struct {
515 UINT8 Type;
516 UINT8 Length;
517 UINT16 Reserved;
518 UINT64 LocalApicAddress;
519 } EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
520
521 ///
522 /// IO SAPIC Structure
523 ///
524 typedef struct {
525 UINT8 Type;
526 UINT8 Length;
527 UINT8 IoApicId;
528 UINT8 Reserved;
529 UINT32 GlobalSystemInterruptBase;
530 UINT64 IoSapicAddress;
531 } EFI_ACPI_6_2_IO_SAPIC_STRUCTURE;
532
533 ///
534 /// Local SAPIC Structure
535 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
536 ///
537 typedef struct {
538 UINT8 Type;
539 UINT8 Length;
540 UINT8 AcpiProcessorId;
541 UINT8 LocalSapicId;
542 UINT8 LocalSapicEid;
543 UINT8 Reserved[3];
544 UINT32 Flags;
545 UINT32 ACPIProcessorUIDValue;
546 } EFI_ACPI_6_2_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
547
548 ///
549 /// Platform Interrupt Sources Structure
550 ///
551 typedef struct {
552 UINT8 Type;
553 UINT8 Length;
554 UINT16 Flags;
555 UINT8 InterruptType;
556 UINT8 ProcessorId;
557 UINT8 ProcessorEid;
558 UINT8 IoSapicVector;
559 UINT32 GlobalSystemInterrupt;
560 UINT32 PlatformInterruptSourceFlags;
561 } EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
562
563 ///
564 /// Platform Interrupt Source Flags.
565 /// All other bits are reserved and must be set to 0.
566 ///
567 #define EFI_ACPI_6_2_CPEI_PROCESSOR_OVERRIDE BIT0
568
569 ///
570 /// Processor Local x2APIC Structure Definition
571 ///
572 typedef struct {
573 UINT8 Type;
574 UINT8 Length;
575 UINT8 Reserved[2];
576 UINT32 X2ApicId;
577 UINT32 Flags;
578 UINT32 AcpiProcessorUid;
579 } EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
580
581 ///
582 /// Local x2APIC NMI Structure
583 ///
584 typedef struct {
585 UINT8 Type;
586 UINT8 Length;
587 UINT16 Flags;
588 UINT32 AcpiProcessorUid;
589 UINT8 LocalX2ApicLint;
590 UINT8 Reserved[3];
591 } EFI_ACPI_6_2_LOCAL_X2APIC_NMI_STRUCTURE;
592
593 ///
594 /// GIC Structure
595 ///
596 typedef struct {
597 UINT8 Type;
598 UINT8 Length;
599 UINT16 Reserved;
600 UINT32 CPUInterfaceNumber;
601 UINT32 AcpiProcessorUid;
602 UINT32 Flags;
603 UINT32 ParkingProtocolVersion;
604 UINT32 PerformanceInterruptGsiv;
605 UINT64 ParkedAddress;
606 UINT64 PhysicalBaseAddress;
607 UINT64 GICV;
608 UINT64 GICH;
609 UINT32 VGICMaintenanceInterrupt;
610 UINT64 GICRBaseAddress;
611 UINT64 MPIDR;
612 UINT8 ProcessorPowerEfficiencyClass;
613 UINT8 Reserved2[3];
614 } EFI_ACPI_6_2_GIC_STRUCTURE;
615
616 ///
617 /// GIC Flags. All other bits are reserved and must be 0.
618 ///
619 #define EFI_ACPI_6_2_GIC_ENABLED BIT0
620 #define EFI_ACPI_6_2_PERFORMANCE_INTERRUPT_MODEL BIT1
621 #define EFI_ACPI_6_2_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
622
623 ///
624 /// GIC Distributor Structure
625 ///
626 typedef struct {
627 UINT8 Type;
628 UINT8 Length;
629 UINT16 Reserved1;
630 UINT32 GicId;
631 UINT64 PhysicalBaseAddress;
632 UINT32 SystemVectorBase;
633 UINT8 GicVersion;
634 UINT8 Reserved2[3];
635 } EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE;
636
637 ///
638 /// GIC Version
639 ///
640 #define EFI_ACPI_6_2_GIC_V1 0x01
641 #define EFI_ACPI_6_2_GIC_V2 0x02
642 #define EFI_ACPI_6_2_GIC_V3 0x03
643 #define EFI_ACPI_6_2_GIC_V4 0x04
644
645 ///
646 /// GIC MSI Frame Structure
647 ///
648 typedef struct {
649 UINT8 Type;
650 UINT8 Length;
651 UINT16 Reserved1;
652 UINT32 GicMsiFrameId;
653 UINT64 PhysicalBaseAddress;
654 UINT32 Flags;
655 UINT16 SPICount;
656 UINT16 SPIBase;
657 } EFI_ACPI_6_2_GIC_MSI_FRAME_STRUCTURE;
658
659 ///
660 /// GIC MSI Frame Flags. All other bits are reserved and must be 0.
661 ///
662 #define EFI_ACPI_6_2_SPI_COUNT_BASE_SELECT BIT0
663
664 ///
665 /// GICR Structure
666 ///
667 typedef struct {
668 UINT8 Type;
669 UINT8 Length;
670 UINT16 Reserved;
671 UINT64 DiscoveryRangeBaseAddress;
672 UINT32 DiscoveryRangeLength;
673 } EFI_ACPI_6_2_GICR_STRUCTURE;
674
675 ///
676 /// GIC Interrupt Translation Service Structure
677 ///
678 typedef struct {
679 UINT8 Type;
680 UINT8 Length;
681 UINT16 Reserved;
682 UINT32 GicItsId;
683 UINT64 PhysicalBaseAddress;
684 UINT32 Reserved2;
685 } EFI_ACPI_6_2_GIC_ITS_STRUCTURE;
686
687 ///
688 /// Smart Battery Description Table (SBST)
689 ///
690 typedef struct {
691 EFI_ACPI_DESCRIPTION_HEADER Header;
692 UINT32 WarningEnergyLevel;
693 UINT32 LowEnergyLevel;
694 UINT32 CriticalEnergyLevel;
695 } EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE;
696
697 ///
698 /// SBST Version (as defined in ACPI 6.2 spec.)
699 ///
700 #define EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
701
702 ///
703 /// Embedded Controller Boot Resources Table (ECDT)
704 /// The table is followed by a null terminated ASCII string that contains
705 /// a fully qualified reference to the name space object.
706 ///
707 typedef struct {
708 EFI_ACPI_DESCRIPTION_HEADER Header;
709 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcControl;
710 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcData;
711 UINT32 Uid;
712 UINT8 GpeBit;
713 } EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
714
715 ///
716 /// ECDT Version (as defined in ACPI 6.2 spec.)
717 ///
718 #define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
719
720 ///
721 /// System Resource Affinity Table (SRAT). The rest of the table
722 /// must be defined in a platform specific manner.
723 ///
724 typedef struct {
725 EFI_ACPI_DESCRIPTION_HEADER Header;
726 UINT32 Reserved1; ///< Must be set to 1
727 UINT64 Reserved2;
728 } EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
729
730 ///
731 /// SRAT Version (as defined in ACPI 6.2 spec.)
732 ///
733 #define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
734
735 //
736 // SRAT structure types.
737 // All other values between 0x05 an 0xFF are reserved and
738 // will be ignored by OSPM.
739 //
740 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
741 #define EFI_ACPI_6_2_MEMORY_AFFINITY 0x01
742 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
743 #define EFI_ACPI_6_2_GICC_AFFINITY 0x03
744 #define EFI_ACPI_6_2_GIC_ITS_AFFINITY 0x04
745
746 ///
747 /// Processor Local APIC/SAPIC Affinity Structure Definition
748 ///
749 typedef struct {
750 UINT8 Type;
751 UINT8 Length;
752 UINT8 ProximityDomain7To0;
753 UINT8 ApicId;
754 UINT32 Flags;
755 UINT8 LocalSapicEid;
756 UINT8 ProximityDomain31To8[3];
757 UINT32 ClockDomain;
758 } EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
759
760 ///
761 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
762 ///
763 #define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
764
765 ///
766 /// Memory Affinity Structure Definition
767 ///
768 typedef struct {
769 UINT8 Type;
770 UINT8 Length;
771 UINT32 ProximityDomain;
772 UINT16 Reserved1;
773 UINT32 AddressBaseLow;
774 UINT32 AddressBaseHigh;
775 UINT32 LengthLow;
776 UINT32 LengthHigh;
777 UINT32 Reserved2;
778 UINT32 Flags;
779 UINT64 Reserved3;
780 } EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE;
781
782 //
783 // Memory Flags. All other bits are reserved and must be 0.
784 //
785 #define EFI_ACPI_6_2_MEMORY_ENABLED (1 << 0)
786 #define EFI_ACPI_6_2_MEMORY_HOT_PLUGGABLE (1 << 1)
787 #define EFI_ACPI_6_2_MEMORY_NONVOLATILE (1 << 2)
788
789 ///
790 /// Processor Local x2APIC Affinity Structure Definition
791 ///
792 typedef struct {
793 UINT8 Type;
794 UINT8 Length;
795 UINT8 Reserved1[2];
796 UINT32 ProximityDomain;
797 UINT32 X2ApicId;
798 UINT32 Flags;
799 UINT32 ClockDomain;
800 UINT8 Reserved2[4];
801 } EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
802
803 ///
804 /// GICC Affinity Structure Definition
805 ///
806 typedef struct {
807 UINT8 Type;
808 UINT8 Length;
809 UINT32 ProximityDomain;
810 UINT32 AcpiProcessorUid;
811 UINT32 Flags;
812 UINT32 ClockDomain;
813 } EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE;
814
815 ///
816 /// GICC Flags. All other bits are reserved and must be 0.
817 ///
818 #define EFI_ACPI_6_2_GICC_ENABLED (1 << 0)
819
820 ///
821 /// GIC Interrupt Translation Service (ITS) Affinity Structure Definition
822 ///
823 typedef struct {
824 UINT8 Type;
825 UINT8 Length;
826 UINT32 ProximityDomain;
827 UINT8 Reserved[2];
828 UINT32 ItsId;
829 } EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE;
830
831 ///
832 /// System Locality Distance Information Table (SLIT).
833 /// The rest of the table is a matrix.
834 ///
835 typedef struct {
836 EFI_ACPI_DESCRIPTION_HEADER Header;
837 UINT64 NumberOfSystemLocalities;
838 } EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
839
840 ///
841 /// SLIT Version (as defined in ACPI 6.2 spec.)
842 ///
843 #define EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
844
845 ///
846 /// Corrected Platform Error Polling Table (CPEP)
847 ///
848 typedef struct {
849 EFI_ACPI_DESCRIPTION_HEADER Header;
850 UINT8 Reserved[8];
851 } EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
852
853 ///
854 /// CPEP Version (as defined in ACPI 6.2 spec.)
855 ///
856 #define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
857
858 //
859 // CPEP processor structure types.
860 //
861 #define EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC 0x00
862
863 ///
864 /// Corrected Platform Error Polling Processor Structure Definition
865 ///
866 typedef struct {
867 UINT8 Type;
868 UINT8 Length;
869 UINT8 ProcessorId;
870 UINT8 ProcessorEid;
871 UINT32 PollingInterval;
872 } EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
873
874 ///
875 /// Maximum System Characteristics Table (MSCT)
876 ///
877 typedef struct {
878 EFI_ACPI_DESCRIPTION_HEADER Header;
879 UINT32 OffsetProxDomInfo;
880 UINT32 MaximumNumberOfProximityDomains;
881 UINT32 MaximumNumberOfClockDomains;
882 UINT64 MaximumPhysicalAddress;
883 } EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
884
885 ///
886 /// MSCT Version (as defined in ACPI 6.2 spec.)
887 ///
888 #define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
889
890 ///
891 /// Maximum Proximity Domain Information Structure Definition
892 ///
893 typedef struct {
894 UINT8 Revision;
895 UINT8 Length;
896 UINT32 ProximityDomainRangeLow;
897 UINT32 ProximityDomainRangeHigh;
898 UINT32 MaximumProcessorCapacity;
899 UINT64 MaximumMemoryCapacity;
900 } EFI_ACPI_6_2_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
901
902 ///
903 /// ACPI RAS Feature Table definition.
904 ///
905 typedef struct {
906 EFI_ACPI_DESCRIPTION_HEADER Header;
907 UINT8 PlatformCommunicationChannelIdentifier[12];
908 } EFI_ACPI_6_2_RAS_FEATURE_TABLE;
909
910 ///
911 /// RASF Version (as defined in ACPI 6.2 spec.)
912 ///
913 #define EFI_ACPI_6_2_RAS_FEATURE_TABLE_REVISION 0x01
914
915 ///
916 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
917 ///
918 typedef struct {
919 UINT32 Signature;
920 UINT16 Command;
921 UINT16 Status;
922 UINT16 Version;
923 UINT8 RASCapabilities[16];
924 UINT8 SetRASCapabilities[16];
925 UINT16 NumberOfRASFParameterBlocks;
926 UINT32 SetRASCapabilitiesStatus;
927 } EFI_ACPI_6_2_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
928
929 ///
930 /// ACPI RASF PCC command code
931 ///
932 #define EFI_ACPI_6_2_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
933
934 ///
935 /// ACPI RASF Platform RAS Capabilities
936 ///
937 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0
938 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1
939 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2
940 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3
941 #define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4
942
943 ///
944 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
945 ///
946 typedef struct {
947 UINT16 Type;
948 UINT16 Version;
949 UINT16 Length;
950 UINT16 PatrolScrubCommand;
951 UINT64 RequestedAddressRange[2];
952 UINT64 ActualAddressRange[2];
953 UINT16 Flags;
954 UINT8 RequestedSpeed;
955 } EFI_ACPI_6_2_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
956
957 ///
958 /// ACPI RASF Patrol Scrub command
959 ///
960 #define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
961 #define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
962 #define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
963
964 ///
965 /// Memory Power State Table definition.
966 ///
967 typedef struct {
968 EFI_ACPI_DESCRIPTION_HEADER Header;
969 UINT8 PlatformCommunicationChannelIdentifier;
970 UINT8 Reserved[3];
971 // Memory Power Node Structure
972 // Memory Power State Characteristics
973 } EFI_ACPI_6_2_MEMORY_POWER_STATUS_TABLE;
974
975 ///
976 /// MPST Version (as defined in ACPI 6.2 spec.)
977 ///
978 #define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_REVISION 0x01
979
980 ///
981 /// MPST Platform Communication Channel Shared Memory Region definition.
982 ///
983 typedef struct {
984 UINT32 Signature;
985 UINT16 Command;
986 UINT16 Status;
987 UINT32 MemoryPowerCommandRegister;
988 UINT32 MemoryPowerStatusRegister;
989 UINT32 PowerStateId;
990 UINT32 MemoryPowerNodeId;
991 UINT64 MemoryEnergyConsumed;
992 UINT64 ExpectedAveragePowerComsuned;
993 } EFI_ACPI_6_2_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
994
995 ///
996 /// ACPI MPST PCC command code
997 ///
998 #define EFI_ACPI_6_2_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
999
1000 ///
1001 /// ACPI MPST Memory Power command
1002 ///
1003 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
1004 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
1005 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
1006 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
1007
1008 ///
1009 /// MPST Memory Power Node Table
1010 ///
1011 typedef struct {
1012 UINT8 PowerStateValue;
1013 UINT8 PowerStateInformationIndex;
1014 } EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE;
1015
1016 typedef struct {
1017 UINT8 Flag;
1018 UINT8 Reserved;
1019 UINT16 MemoryPowerNodeId;
1020 UINT32 Length;
1021 UINT64 AddressBase;
1022 UINT64 AddressLength;
1023 UINT32 NumberOfPowerStates;
1024 UINT32 NumberOfPhysicalComponents;
1025 //EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
1026 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
1027 } EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE;
1028
1029 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
1030 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
1031 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
1032
1033 typedef struct {
1034 UINT16 MemoryPowerNodeCount;
1035 UINT8 Reserved[2];
1036 } EFI_ACPI_6_2_MPST_MEMORY_POWER_NODE_TABLE;
1037
1038 ///
1039 /// MPST Memory Power State Characteristics Table
1040 ///
1041 typedef struct {
1042 UINT8 PowerStateStructureID;
1043 UINT8 Flag;
1044 UINT16 Reserved;
1045 UINT32 AveragePowerConsumedInMPS0;
1046 UINT32 RelativePowerSavingToMPS0;
1047 UINT64 ExitLatencyToMPS0;
1048 } EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
1049
1050 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
1051 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
1052 #define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
1053
1054 typedef struct {
1055 UINT16 MemoryPowerStateCharacteristicsCount;
1056 UINT8 Reserved[2];
1057 } EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
1058
1059 ///
1060 /// Memory Topology Table definition.
1061 ///
1062 typedef struct {
1063 EFI_ACPI_DESCRIPTION_HEADER Header;
1064 UINT32 Reserved;
1065 } EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE;
1066
1067 ///
1068 /// PMTT Version (as defined in ACPI 6.2 spec.)
1069 ///
1070 #define EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
1071
1072 ///
1073 /// Common Memory Aggregator Device Structure.
1074 ///
1075 typedef struct {
1076 UINT8 Type;
1077 UINT8 Reserved;
1078 UINT16 Length;
1079 UINT16 Flags;
1080 UINT16 Reserved1;
1081 } EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1082
1083 ///
1084 /// Memory Aggregator Device Type
1085 ///
1086 #define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
1087 #define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
1088 #define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
1089
1090 ///
1091 /// Socket Memory Aggregator Device Structure.
1092 ///
1093 typedef struct {
1094 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1095 UINT16 SocketIdentifier;
1096 UINT16 Reserved;
1097 //EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1098 } EFI_ACPI_6_2_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1099
1100 ///
1101 /// MemoryController Memory Aggregator Device Structure.
1102 ///
1103 typedef struct {
1104 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1105 UINT32 ReadLatency;
1106 UINT32 WriteLatency;
1107 UINT32 ReadBandwidth;
1108 UINT32 WriteBandwidth;
1109 UINT16 OptimalAccessUnit;
1110 UINT16 OptimalAccessAlignment;
1111 UINT16 Reserved;
1112 UINT16 NumberOfProximityDomains;
1113 //UINT32 ProximityDomain[NumberOfProximityDomains];
1114 //EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1115 } EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1116
1117 ///
1118 /// DIMM Memory Aggregator Device Structure.
1119 ///
1120 typedef struct {
1121 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1122 UINT16 PhysicalComponentIdentifier;
1123 UINT16 Reserved;
1124 UINT32 SizeOfDimm;
1125 UINT32 SmbiosHandle;
1126 } EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1127
1128 ///
1129 /// Boot Graphics Resource Table definition.
1130 ///
1131 typedef struct {
1132 EFI_ACPI_DESCRIPTION_HEADER Header;
1133 ///
1134 /// 2-bytes (16 bit) version ID. This value must be 1.
1135 ///
1136 UINT16 Version;
1137 ///
1138 /// 1-byte status field indicating current status about the table.
1139 /// Bits[7:1] = Reserved (must be zero)
1140 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1141 ///
1142 UINT8 Status;
1143 ///
1144 /// 1-byte enumerated type field indicating format of the image.
1145 /// 0 = Bitmap
1146 /// 1 - 255 Reserved (for future use)
1147 ///
1148 UINT8 ImageType;
1149 ///
1150 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1151 /// of the image bitmap.
1152 ///
1153 UINT64 ImageAddress;
1154 ///
1155 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1156 /// (X, Y) display offset of the top left corner of the boot image.
1157 /// The top left corner of the display is at offset (0, 0).
1158 ///
1159 UINT32 ImageOffsetX;
1160 ///
1161 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1162 /// (X, Y) display offset of the top left corner of the boot image.
1163 /// The top left corner of the display is at offset (0, 0).
1164 ///
1165 UINT32 ImageOffsetY;
1166 } EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE;
1167
1168 ///
1169 /// BGRT Revision
1170 ///
1171 #define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1172
1173 ///
1174 /// BGRT Version
1175 ///
1176 #define EFI_ACPI_6_2_BGRT_VERSION 0x01
1177
1178 ///
1179 /// BGRT Status
1180 ///
1181 #define EFI_ACPI_6_2_BGRT_STATUS_NOT_DISPLAYED 0x00
1182 #define EFI_ACPI_6_2_BGRT_STATUS_DISPLAYED 0x01
1183
1184 ///
1185 /// BGRT Image Type
1186 ///
1187 #define EFI_ACPI_6_2_BGRT_IMAGE_TYPE_BMP 0x00
1188
1189 ///
1190 /// FPDT Version (as defined in ACPI 6.2 spec.)
1191 ///
1192 #define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1193
1194 ///
1195 /// FPDT Performance Record Types
1196 ///
1197 #define EFI_ACPI_6_2_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1198 #define EFI_ACPI_6_2_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1199
1200 ///
1201 /// FPDT Performance Record Revision
1202 ///
1203 #define EFI_ACPI_6_2_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1204 #define EFI_ACPI_6_2_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1205
1206 ///
1207 /// FPDT Runtime Performance Record Types
1208 ///
1209 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1210 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1211 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1212
1213 ///
1214 /// FPDT Runtime Performance Record Revision
1215 ///
1216 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1217 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1218 #define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1219
1220 ///
1221 /// FPDT Performance Record header
1222 ///
1223 typedef struct {
1224 UINT16 Type;
1225 UINT8 Length;
1226 UINT8 Revision;
1227 } EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER;
1228
1229 ///
1230 /// FPDT Performance Table header
1231 ///
1232 typedef struct {
1233 UINT32 Signature;
1234 UINT32 Length;
1235 } EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER;
1236
1237 ///
1238 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1239 ///
1240 typedef struct {
1241 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;
1242 UINT32 Reserved;
1243 ///
1244 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1245 ///
1246 UINT64 BootPerformanceTablePointer;
1247 } EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1248
1249 ///
1250 /// FPDT S3 Performance Table Pointer Record Structure
1251 ///
1252 typedef struct {
1253 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;
1254 UINT32 Reserved;
1255 ///
1256 /// 64-bit processor-relative physical address of the S3 Performance Table.
1257 ///
1258 UINT64 S3PerformanceTablePointer;
1259 } EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1260
1261 ///
1262 /// FPDT Firmware Basic Boot Performance Record Structure
1263 ///
1264 typedef struct {
1265 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;
1266 UINT32 Reserved;
1267 ///
1268 /// Timer value logged at the beginning of firmware image execution.
1269 /// This may not always be zero or near zero.
1270 ///
1271 UINT64 ResetEnd;
1272 ///
1273 /// Timer value logged just prior to loading the OS boot loader into memory.
1274 /// For non-UEFI compatible boots, this field must be zero.
1275 ///
1276 UINT64 OsLoaderLoadImageStart;
1277 ///
1278 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1279 /// For non-UEFI compatible boots, the timer value logged will be just prior
1280 /// to the INT 19h handler invocation.
1281 ///
1282 UINT64 OsLoaderStartImageStart;
1283 ///
1284 /// Timer value logged at the point when the OS loader calls the
1285 /// ExitBootServices function for UEFI compatible firmware.
1286 /// For non-UEFI compatible boots, this field must be zero.
1287 ///
1288 UINT64 ExitBootServicesEntry;
1289 ///
1290 /// Timer value logged at the point just prior towhen the OS loader gaining
1291 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1292 /// For non-UEFI compatible boots, this field must be zero.
1293 ///
1294 UINT64 ExitBootServicesExit;
1295 } EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1296
1297 ///
1298 /// FPDT Firmware Basic Boot Performance Table signature
1299 ///
1300 #define EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1301
1302 //
1303 // FPDT Firmware Basic Boot Performance Table
1304 //
1305 typedef struct {
1306 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header;
1307 //
1308 // one or more Performance Records.
1309 //
1310 } EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1311
1312 ///
1313 /// FPDT "S3PT" S3 Performance Table
1314 ///
1315 #define EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1316
1317 //
1318 // FPDT Firmware S3 Boot Performance Table
1319 //
1320 typedef struct {
1321 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header;
1322 //
1323 // one or more Performance Records.
1324 //
1325 } EFI_ACPI_6_2_FPDT_FIRMWARE_S3_BOOT_TABLE;
1326
1327 ///
1328 /// FPDT Basic S3 Resume Performance Record
1329 ///
1330 typedef struct {
1331 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;
1332 ///
1333 /// A count of the number of S3 resume cycles since the last full boot sequence.
1334 ///
1335 UINT32 ResumeCount;
1336 ///
1337 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1338 /// OS waking vector. Only the most recent resume cycle's time is retained.
1339 ///
1340 UINT64 FullResume;
1341 ///
1342 /// Average timer value of all resume cycles logged since the last full boot
1343 /// sequence, including the most recent resume. Note that the entire log of
1344 /// timer values does not need to be retained in order to calculate this average.
1345 ///
1346 UINT64 AverageResume;
1347 } EFI_ACPI_6_2_FPDT_S3_RESUME_RECORD;
1348
1349 ///
1350 /// FPDT Basic S3 Suspend Performance Record
1351 ///
1352 typedef struct {
1353 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;
1354 ///
1355 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1356 /// Only the most recent suspend cycle's timer value is retained.
1357 ///
1358 UINT64 SuspendStart;
1359 ///
1360 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1361 /// mechanism) used to trigger hardware entry to S3.
1362 /// Only the most recent suspend cycle's timer value is retained.
1363 ///
1364 UINT64 SuspendEnd;
1365 } EFI_ACPI_6_2_FPDT_S3_SUSPEND_RECORD;
1366
1367 ///
1368 /// Firmware Performance Record Table definition.
1369 ///
1370 typedef struct {
1371 EFI_ACPI_DESCRIPTION_HEADER Header;
1372 } EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1373
1374 ///
1375 /// Generic Timer Description Table definition.
1376 ///
1377 typedef struct {
1378 EFI_ACPI_DESCRIPTION_HEADER Header;
1379 UINT64 CntControlBasePhysicalAddress;
1380 UINT32 Reserved;
1381 UINT32 SecurePL1TimerGSIV;
1382 UINT32 SecurePL1TimerFlags;
1383 UINT32 NonSecurePL1TimerGSIV;
1384 UINT32 NonSecurePL1TimerFlags;
1385 UINT32 VirtualTimerGSIV;
1386 UINT32 VirtualTimerFlags;
1387 UINT32 NonSecurePL2TimerGSIV;
1388 UINT32 NonSecurePL2TimerFlags;
1389 UINT64 CntReadBasePhysicalAddress;
1390 UINT32 PlatformTimerCount;
1391 UINT32 PlatformTimerOffset;
1392 } EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE;
1393
1394 ///
1395 /// GTDT Version (as defined in ACPI 6.2 spec.)
1396 ///
1397 #define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
1398
1399 ///
1400 /// Timer Flags. All other bits are reserved and must be 0.
1401 ///
1402 #define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1403 #define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1404 #define EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
1405
1406 ///
1407 /// Platform Timer Type
1408 ///
1409 #define EFI_ACPI_6_2_GTDT_GT_BLOCK 0
1410 #define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG 1
1411
1412 ///
1413 /// GT Block Structure
1414 ///
1415 typedef struct {
1416 UINT8 Type;
1417 UINT16 Length;
1418 UINT8 Reserved;
1419 UINT64 CntCtlBase;
1420 UINT32 GTBlockTimerCount;
1421 UINT32 GTBlockTimerOffset;
1422 } EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE;
1423
1424 ///
1425 /// GT Block Timer Structure
1426 ///
1427 typedef struct {
1428 UINT8 GTFrameNumber;
1429 UINT8 Reserved[3];
1430 UINT64 CntBaseX;
1431 UINT64 CntEL0BaseX;
1432 UINT32 GTxPhysicalTimerGSIV;
1433 UINT32 GTxPhysicalTimerFlags;
1434 UINT32 GTxVirtualTimerGSIV;
1435 UINT32 GTxVirtualTimerFlags;
1436 UINT32 GTxCommonFlags;
1437 } EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1438
1439 ///
1440 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
1441 ///
1442 #define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1443 #define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1444
1445 ///
1446 /// Common Flags Flags. All other bits are reserved and must be 0.
1447 ///
1448 #define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
1449 #define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
1450
1451 ///
1452 /// SBSA Generic Watchdog Structure
1453 ///
1454 typedef struct {
1455 UINT8 Type;
1456 UINT16 Length;
1457 UINT8 Reserved;
1458 UINT64 RefreshFramePhysicalAddress;
1459 UINT64 WatchdogControlFramePhysicalAddress;
1460 UINT32 WatchdogTimerGSIV;
1461 UINT32 WatchdogTimerFlags;
1462 } EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
1463
1464 ///
1465 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
1466 ///
1467 #define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
1468 #define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1469 #define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
1470
1471 //
1472 // NVDIMM Firmware Interface Table definition.
1473 //
1474 typedef struct {
1475 EFI_ACPI_DESCRIPTION_HEADER Header;
1476 UINT32 Reserved;
1477 } EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE;
1478
1479 //
1480 // NFIT Version (as defined in ACPI 6.2 spec.)
1481 //
1482 #define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
1483
1484 //
1485 // Definition for NFIT Table Structure Types
1486 //
1487 #define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0
1488 #define EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1
1489 #define EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE_TYPE 2
1490 #define EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3
1491 #define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4
1492 #define EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5
1493 #define EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6
1494
1495 //
1496 // Definition for NFIT Structure Header
1497 //
1498 typedef struct {
1499 UINT16 Type;
1500 UINT16 Length;
1501 } EFI_ACPI_6_2_NFIT_STRUCTURE_HEADER;
1502
1503 //
1504 // Definition for System Physical Address Range Structure
1505 //
1506 #define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
1507 #define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
1508 #define EFI_ACPI_6_2_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
1509 #define EFI_ACPI_6_2_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
1510 #define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
1511 #define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
1512 #define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
1513 #define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
1514 #define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
1515 #define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D ]}
1516 typedef struct {
1517 UINT16 Type;
1518 UINT16 Length;
1519 UINT16 SPARangeStructureIndex;
1520 UINT16 Flags;
1521 UINT32 Reserved_8;
1522 UINT32 ProximityDomain;
1523 GUID AddressRangeTypeGUID;
1524 UINT64 SystemPhysicalAddressRangeBase;
1525 UINT64 SystemPhysicalAddressRangeLength;
1526 UINT64 AddressRangeMemoryMappingAttribute;
1527 } EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;
1528
1529 //
1530 // Definition for Memory Device to System Physical Address Range Mapping Structure
1531 //
1532 typedef struct {
1533 UINT32 DIMMNumber:4;
1534 UINT32 MemoryChannelNumber:4;
1535 UINT32 MemoryControllerID:4;
1536 UINT32 SocketID:4;
1537 UINT32 NodeControllerID:12;
1538 UINT32 Reserved_28:4;
1539 } EFI_ACPI_6_2_NFIT_DEVICE_HANDLE;
1540
1541 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0
1542 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1
1543 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2
1544 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3
1545 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4
1546 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5
1547 #define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6
1548 typedef struct {
1549 UINT16 Type;
1550 UINT16 Length;
1551 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1552 UINT16 NVDIMMPhysicalID;
1553 UINT16 NVDIMMRegionID;
1554 UINT16 SPARangeStructureIndex ;
1555 UINT16 NVDIMMControlRegionStructureIndex;
1556 UINT64 NVDIMMRegionSize;
1557 UINT64 RegionOffset;
1558 UINT64 NVDIMMPhysicalAddressRegionBase;
1559 UINT16 InterleaveStructureIndex;
1560 UINT16 InterleaveWays;
1561 UINT16 NVDIMMStateFlags;
1562 UINT16 Reserved_46;
1563 } EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;
1564
1565 //
1566 // Definition for Interleave Structure
1567 //
1568 typedef struct {
1569 UINT16 Type;
1570 UINT16 Length;
1571 UINT16 InterleaveStructureIndex;
1572 UINT16 Reserved_6;
1573 UINT32 NumberOfLines;
1574 UINT32 LineSize;
1575 //UINT32 LineOffset[NumberOfLines];
1576 } EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE;
1577
1578 //
1579 // Definition for SMBIOS Management Information Structure
1580 //
1581 typedef struct {
1582 UINT16 Type;
1583 UINT16 Length;
1584 UINT32 Reserved_4;
1585 //UINT8 Data[];
1586 } EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;
1587
1588 //
1589 // Definition for NVDIMM Control Region Structure
1590 //
1591 #define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0
1592
1593 #define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
1594 typedef struct {
1595 UINT16 Type;
1596 UINT16 Length;
1597 UINT16 NVDIMMControlRegionStructureIndex;
1598 UINT16 VendorID;
1599 UINT16 DeviceID;
1600 UINT16 RevisionID;
1601 UINT16 SubsystemVendorID;
1602 UINT16 SubsystemDeviceID;
1603 UINT16 SubsystemRevisionID;
1604 UINT8 ValidFields;
1605 UINT8 ManufacturingLocation;
1606 UINT16 ManufacturingDate;
1607 UINT8 Reserved_22[2];
1608 UINT32 SerialNumber;
1609 UINT16 RegionFormatInterfaceCode;
1610 UINT16 NumberOfBlockControlWindows;
1611 UINT64 SizeOfBlockControlWindow;
1612 UINT64 CommandRegisterOffsetInBlockControlWindow;
1613 UINT64 SizeOfCommandRegisterInBlockControlWindows;
1614 UINT64 StatusRegisterOffsetInBlockControlWindow;
1615 UINT64 SizeOfStatusRegisterInBlockControlWindows;
1616 UINT16 NVDIMMControlRegionFlag;
1617 UINT8 Reserved_74[6];
1618 } EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;
1619
1620 //
1621 // Definition for NVDIMM Block Data Window Region Structure
1622 //
1623 typedef struct {
1624 UINT16 Type;
1625 UINT16 Length;
1626 UINT16 NVDIMMControlRegionStructureIndex;
1627 UINT16 NumberOfBlockDataWindows;
1628 UINT64 BlockDataWindowStartOffset;
1629 UINT64 SizeOfBlockDataWindow;
1630 UINT64 BlockAccessibleMemoryCapacity;
1631 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
1632 } EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;
1633
1634 //
1635 // Definition for Flush Hint Address Structure
1636 //
1637 typedef struct {
1638 UINT16 Type;
1639 UINT16 Length;
1640 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1641 UINT16 NumberOfFlushHintAddresses;
1642 UINT8 Reserved_10[6];
1643 //UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
1644 } EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;
1645
1646 ///
1647 /// Secure DEVices Table (SDEV)
1648 ///
1649 typedef struct {
1650 EFI_ACPI_DESCRIPTION_HEADER Header;
1651 } EFI_ACPI_6_2_SECURE_DEVICES_TABLE_HEADER;
1652
1653 ///
1654 /// SDEV Revision (as defined in ACPI 6.2 spec.)
1655 ///
1656 #define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_REVISION 0x01
1657
1658 ///
1659 /// Secure Devcice types
1660 ///
1661 #define EFI_ACPI_6_2_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01
1662 #define EFI_ACPI_6_2_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00
1663
1664 ///
1665 /// Secure Devcice flags
1666 ///
1667 #define EFI_ACPI_6_2_SDEV_FLAG_ALLOW_HANDOFF BIT0
1668
1669 ///
1670 /// SDEV Structure Header
1671 ///
1672 typedef struct {
1673 UINT8 Type;
1674 UINT8 Flags;
1675 UINT16 Length;
1676 } EFI_ACPI_6_2_SDEV_STRUCTURE_HEADER;
1677
1678 ///
1679 /// PCIe Endpoint Device based Secure Device Structure
1680 ///
1681 typedef struct {
1682 UINT8 Type;
1683 UINT8 Flags;
1684 UINT16 Length;
1685 UINT16 PciSegmentNumber;
1686 UINT16 StartBusNumber;
1687 UINT16 PciPathOffset;
1688 UINT16 PciPathLength;
1689 UINT16 VendorSpecificDataOffset;
1690 UINT16 VendorSpecificDataLength;
1691 } EFI_ACPI_6_2_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;
1692
1693 ///
1694 /// ACPI_NAMESPACE_DEVICE based Secure Device Structure
1695 ///
1696 typedef struct {
1697 UINT8 Type;
1698 UINT8 Flags;
1699 UINT16 Length;
1700 UINT16 DeviceIdentifierOffset;
1701 UINT16 DeviceIdentifierLength;
1702 UINT16 VendorSpecificDataOffset;
1703 UINT16 VendorSpecificDataLength;
1704 } EFI_ACPI_6_2_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;
1705
1706 ///
1707 /// Boot Error Record Table (BERT)
1708 ///
1709 typedef struct {
1710 EFI_ACPI_DESCRIPTION_HEADER Header;
1711 UINT32 BootErrorRegionLength;
1712 UINT64 BootErrorRegion;
1713 } EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_HEADER;
1714
1715 ///
1716 /// BERT Version (as defined in ACPI 6.2 spec.)
1717 ///
1718 #define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1719
1720 ///
1721 /// Boot Error Region Block Status Definition
1722 ///
1723 typedef struct {
1724 UINT32 UncorrectableErrorValid:1;
1725 UINT32 CorrectableErrorValid:1;
1726 UINT32 MultipleUncorrectableErrors:1;
1727 UINT32 MultipleCorrectableErrors:1;
1728 UINT32 ErrorDataEntryCount:10;
1729 UINT32 Reserved:18;
1730 } EFI_ACPI_6_2_ERROR_BLOCK_STATUS;
1731
1732 ///
1733 /// Boot Error Region Definition
1734 ///
1735 typedef struct {
1736 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus;
1737 UINT32 RawDataOffset;
1738 UINT32 RawDataLength;
1739 UINT32 DataLength;
1740 UINT32 ErrorSeverity;
1741 } EFI_ACPI_6_2_BOOT_ERROR_REGION_STRUCTURE;
1742
1743 //
1744 // Boot Error Severity types
1745 //
1746 #define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTABLE 0x00
1747 #define EFI_ACPI_6_2_ERROR_SEVERITY_FATAL 0x01
1748 #define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTED 0x02
1749 #define EFI_ACPI_6_2_ERROR_SEVERITY_NONE 0x03
1750
1751 ///
1752 /// Generic Error Data Entry Definition
1753 ///
1754 typedef struct {
1755 UINT8 SectionType[16];
1756 UINT32 ErrorSeverity;
1757 UINT16 Revision;
1758 UINT8 ValidationBits;
1759 UINT8 Flags;
1760 UINT32 ErrorDataLength;
1761 UINT8 FruId[16];
1762 UINT8 FruText[20];
1763 UINT8 Timestamp[8];
1764 } EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1765
1766 ///
1767 /// Generic Error Data Entry Version (as defined in ACPI 6.2 spec.)
1768 ///
1769 #define EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300
1770
1771 ///
1772 /// HEST - Hardware Error Source Table
1773 ///
1774 typedef struct {
1775 EFI_ACPI_DESCRIPTION_HEADER Header;
1776 UINT32 ErrorSourceCount;
1777 } EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1778
1779 ///
1780 /// HEST Version (as defined in ACPI 6.2 spec.)
1781 ///
1782 #define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1783
1784 //
1785 // Error Source structure types.
1786 //
1787 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1788 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1789 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR 0x02
1790 #define EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER 0x06
1791 #define EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER 0x07
1792 #define EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER 0x08
1793 #define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR 0x09
1794 #define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A
1795 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B
1796
1797 //
1798 // Error Source structure flags.
1799 //
1800 #define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1801 #define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1802 #define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)
1803
1804 ///
1805 /// IA-32 Architecture Machine Check Exception Structure Definition
1806 ///
1807 typedef struct {
1808 UINT16 Type;
1809 UINT16 SourceId;
1810 UINT8 Reserved0[2];
1811 UINT8 Flags;
1812 UINT8 Enabled;
1813 UINT32 NumberOfRecordsToPreAllocate;
1814 UINT32 MaxSectionsPerRecord;
1815 UINT64 GlobalCapabilityInitData;
1816 UINT64 GlobalControlInitData;
1817 UINT8 NumberOfHardwareBanks;
1818 UINT8 Reserved1[7];
1819 } EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1820
1821 ///
1822 /// IA-32 Architecture Machine Check Bank Structure Definition
1823 ///
1824 typedef struct {
1825 UINT8 BankNumber;
1826 UINT8 ClearStatusOnInitialization;
1827 UINT8 StatusDataFormat;
1828 UINT8 Reserved0;
1829 UINT32 ControlRegisterMsrAddress;
1830 UINT64 ControlInitData;
1831 UINT32 StatusRegisterMsrAddress;
1832 UINT32 AddressRegisterMsrAddress;
1833 UINT32 MiscRegisterMsrAddress;
1834 } EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1835
1836 ///
1837 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1838 ///
1839 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1840 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1841 #define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1842
1843 //
1844 // Hardware Error Notification types. All other values are reserved
1845 //
1846 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1847 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1848 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1849 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1850 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1851 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
1852 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
1853 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
1854 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08
1855 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09
1856 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A
1857 #define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B
1858
1859 ///
1860 /// Hardware Error Notification Configuration Write Enable Structure Definition
1861 ///
1862 typedef struct {
1863 UINT16 Type:1;
1864 UINT16 PollInterval:1;
1865 UINT16 SwitchToPollingThresholdValue:1;
1866 UINT16 SwitchToPollingThresholdWindow:1;
1867 UINT16 ErrorThresholdValue:1;
1868 UINT16 ErrorThresholdWindow:1;
1869 UINT16 Reserved:10;
1870 } EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1871
1872 ///
1873 /// Hardware Error Notification Structure Definition
1874 ///
1875 typedef struct {
1876 UINT8 Type;
1877 UINT8 Length;
1878 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1879 UINT32 PollInterval;
1880 UINT32 Vector;
1881 UINT32 SwitchToPollingThresholdValue;
1882 UINT32 SwitchToPollingThresholdWindow;
1883 UINT32 ErrorThresholdValue;
1884 UINT32 ErrorThresholdWindow;
1885 } EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1886
1887 ///
1888 /// IA-32 Architecture Corrected Machine Check Structure Definition
1889 ///
1890 typedef struct {
1891 UINT16 Type;
1892 UINT16 SourceId;
1893 UINT8 Reserved0[2];
1894 UINT8 Flags;
1895 UINT8 Enabled;
1896 UINT32 NumberOfRecordsToPreAllocate;
1897 UINT32 MaxSectionsPerRecord;
1898 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1899 UINT8 NumberOfHardwareBanks;
1900 UINT8 Reserved1[3];
1901 } EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1902
1903 ///
1904 /// IA-32 Architecture NMI Error Structure Definition
1905 ///
1906 typedef struct {
1907 UINT16 Type;
1908 UINT16 SourceId;
1909 UINT8 Reserved0[2];
1910 UINT32 NumberOfRecordsToPreAllocate;
1911 UINT32 MaxSectionsPerRecord;
1912 UINT32 MaxRawDataLength;
1913 } EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1914
1915 ///
1916 /// PCI Express Root Port AER Structure Definition
1917 ///
1918 typedef struct {
1919 UINT16 Type;
1920 UINT16 SourceId;
1921 UINT8 Reserved0[2];
1922 UINT8 Flags;
1923 UINT8 Enabled;
1924 UINT32 NumberOfRecordsToPreAllocate;
1925 UINT32 MaxSectionsPerRecord;
1926 UINT32 Bus;
1927 UINT16 Device;
1928 UINT16 Function;
1929 UINT16 DeviceControl;
1930 UINT8 Reserved1[2];
1931 UINT32 UncorrectableErrorMask;
1932 UINT32 UncorrectableErrorSeverity;
1933 UINT32 CorrectableErrorMask;
1934 UINT32 AdvancedErrorCapabilitiesAndControl;
1935 UINT32 RootErrorCommand;
1936 } EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1937
1938 ///
1939 /// PCI Express Device AER Structure Definition
1940 ///
1941 typedef struct {
1942 UINT16 Type;
1943 UINT16 SourceId;
1944 UINT8 Reserved0[2];
1945 UINT8 Flags;
1946 UINT8 Enabled;
1947 UINT32 NumberOfRecordsToPreAllocate;
1948 UINT32 MaxSectionsPerRecord;
1949 UINT32 Bus;
1950 UINT16 Device;
1951 UINT16 Function;
1952 UINT16 DeviceControl;
1953 UINT8 Reserved1[2];
1954 UINT32 UncorrectableErrorMask;
1955 UINT32 UncorrectableErrorSeverity;
1956 UINT32 CorrectableErrorMask;
1957 UINT32 AdvancedErrorCapabilitiesAndControl;
1958 } EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1959
1960 ///
1961 /// PCI Express Bridge AER Structure Definition
1962 ///
1963 typedef struct {
1964 UINT16 Type;
1965 UINT16 SourceId;
1966 UINT8 Reserved0[2];
1967 UINT8 Flags;
1968 UINT8 Enabled;
1969 UINT32 NumberOfRecordsToPreAllocate;
1970 UINT32 MaxSectionsPerRecord;
1971 UINT32 Bus;
1972 UINT16 Device;
1973 UINT16 Function;
1974 UINT16 DeviceControl;
1975 UINT8 Reserved1[2];
1976 UINT32 UncorrectableErrorMask;
1977 UINT32 UncorrectableErrorSeverity;
1978 UINT32 CorrectableErrorMask;
1979 UINT32 AdvancedErrorCapabilitiesAndControl;
1980 UINT32 SecondaryUncorrectableErrorMask;
1981 UINT32 SecondaryUncorrectableErrorSeverity;
1982 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1983 } EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1984
1985 ///
1986 /// Generic Hardware Error Source Structure Definition
1987 ///
1988 typedef struct {
1989 UINT16 Type;
1990 UINT16 SourceId;
1991 UINT16 RelatedSourceId;
1992 UINT8 Flags;
1993 UINT8 Enabled;
1994 UINT32 NumberOfRecordsToPreAllocate;
1995 UINT32 MaxSectionsPerRecord;
1996 UINT32 MaxRawDataLength;
1997 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1998 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1999 UINT32 ErrorStatusBlockLength;
2000 } EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
2001
2002 ///
2003 /// Generic Hardware Error Source Version 2 Structure Definition
2004 ///
2005 typedef struct {
2006 UINT16 Type;
2007 UINT16 SourceId;
2008 UINT16 RelatedSourceId;
2009 UINT8 Flags;
2010 UINT8 Enabled;
2011 UINT32 NumberOfRecordsToPreAllocate;
2012 UINT32 MaxSectionsPerRecord;
2013 UINT32 MaxRawDataLength;
2014 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
2015 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2016 UINT32 ErrorStatusBlockLength;
2017 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;
2018 UINT64 ReadAckPreserve;
2019 UINT64 ReadAckWrite;
2020 } EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;
2021
2022 ///
2023 /// Generic Error Status Definition
2024 ///
2025 typedef struct {
2026 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus;
2027 UINT32 RawDataOffset;
2028 UINT32 RawDataLength;
2029 UINT32 DataLength;
2030 UINT32 ErrorSeverity;
2031 } EFI_ACPI_6_2_GENERIC_ERROR_STATUS_STRUCTURE;
2032
2033 ///
2034 /// IA-32 Architecture Deferred Machine Check Structure Definition
2035 ///
2036 typedef struct {
2037 UINT16 Type;
2038 UINT16 SourceId;
2039 UINT8 Reserved0[2];
2040 UINT8 Flags;
2041 UINT8 Enabled;
2042 UINT32 NumberOfRecordsToPreAllocate;
2043 UINT32 MaxSectionsPerRecord;
2044 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2045 UINT8 NumberOfHardwareBanks;
2046 UINT8 Reserved1[3];
2047 } EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;;
2048
2049 ///
2050 /// HMAT - Heterogeneous Memory Attribute Table
2051 ///
2052 typedef struct {
2053 EFI_ACPI_DESCRIPTION_HEADER Header;
2054 UINT8 Reserved[4];
2055 } EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;
2056
2057 ///
2058 /// HMAT Revision (as defined in ACPI 6.2 spec.)
2059 ///
2060 #define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x01
2061
2062 ///
2063 /// HMAT types
2064 ///
2065 #define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SUBSYSTEM_ADDRESS_RANGE 0x00
2066 #define EFI_ACPI_6_2_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01
2067 #define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02
2068
2069 ///
2070 /// HMAT Structure Header
2071 ///
2072 typedef struct {
2073 UINT16 Type;
2074 UINT8 Reserved[2];
2075 UINT32 Length;
2076 } EFI_ACPI_6_2_HMAT_STRUCTURE_HEADER;
2077
2078 ///
2079 /// Memory Subsystem Address Range Structure flags
2080 ///
2081 typedef struct {
2082 UINT16 ProcessorProximityDomainValid:1;
2083 UINT16 MemoryProximityDomainValid:1;
2084 UINT16 ReservationHint:1;
2085 UINT16 Reserved:13;
2086 } EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS;
2087
2088 ///
2089 /// Memory Subsystem Address Range Structure
2090 ///
2091 typedef struct {
2092 UINT16 Type;
2093 UINT8 Reserved[2];
2094 UINT32 Length;
2095 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS Flags;
2096 UINT8 Reserved1[2];
2097 UINT32 ProcessorProximityDomain;
2098 UINT32 MemoryProximityDomain;
2099 UINT8 Reserved2[4];
2100 UINT64 SystemPhysicalAddressRangeBase;
2101 UINT64 SystemPhysicalAddressRangeLength;
2102 } EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE;
2103
2104 ///
2105 /// System Locality Latency and Bandwidth Information Structure flags
2106 ///
2107 typedef struct {
2108 UINT8 MemoryHierarchy:5;
2109 UINT8 Reserved:3;
2110 } EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;
2111
2112 ///
2113 /// System Locality Latency and Bandwidth Information Structure
2114 ///
2115 typedef struct {
2116 UINT16 Type;
2117 UINT8 Reserved[2];
2118 UINT32 Length;
2119 EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;
2120 UINT8 DataType;
2121 UINT8 Reserved1[2];
2122 UINT32 NumberOfInitiatorProximityDomains;
2123 UINT32 NumberOfTargetProximityDomains;
2124 UINT8 Reserved2[4];
2125 UINT64 EntryBaseUnit;
2126 } EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;
2127
2128 ///
2129 /// Memory Side Cache Information Structure cache attributes
2130 ///
2131 typedef struct {
2132 UINT32 TotalCacheLevels:4;
2133 UINT32 CacheLevel:4;
2134 UINT32 CacheAssociativity:4;
2135 UINT32 WritePolicy:4;
2136 UINT32 CacheLineSize:16;
2137 } EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;
2138
2139 ///
2140 /// Memory Side Cache Information Structure
2141 ///
2142 typedef struct {
2143 UINT16 Type;
2144 UINT8 Reserved[2];
2145 UINT32 Length;
2146 UINT32 MemoryProximityDomain;
2147 UINT8 Reserved1[4];
2148 UINT64 MemorySideCacheSize;
2149 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;
2150 UINT8 Reserved2[2];
2151 UINT16 NumberOfSmbiosHandles;
2152 } EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;
2153
2154 ///
2155 /// ERST - Error Record Serialization Table
2156 ///
2157 typedef struct {
2158 EFI_ACPI_DESCRIPTION_HEADER Header;
2159 UINT32 SerializationHeaderSize;
2160 UINT8 Reserved0[4];
2161 UINT32 InstructionEntryCount;
2162 } EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
2163
2164 ///
2165 /// ERST Version (as defined in ACPI 6.2 spec.)
2166 ///
2167 #define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
2168
2169 ///
2170 /// ERST Serialization Actions
2171 ///
2172 #define EFI_ACPI_6_2_ERST_BEGIN_WRITE_OPERATION 0x00
2173 #define EFI_ACPI_6_2_ERST_BEGIN_READ_OPERATION 0x01
2174 #define EFI_ACPI_6_2_ERST_BEGIN_CLEAR_OPERATION 0x02
2175 #define EFI_ACPI_6_2_ERST_END_OPERATION 0x03
2176 #define EFI_ACPI_6_2_ERST_SET_RECORD_OFFSET 0x04
2177 #define EFI_ACPI_6_2_ERST_EXECUTE_OPERATION 0x05
2178 #define EFI_ACPI_6_2_ERST_CHECK_BUSY_STATUS 0x06
2179 #define EFI_ACPI_6_2_ERST_GET_COMMAND_STATUS 0x07
2180 #define EFI_ACPI_6_2_ERST_GET_RECORD_IDENTIFIER 0x08
2181 #define EFI_ACPI_6_2_ERST_SET_RECORD_IDENTIFIER 0x09
2182 #define EFI_ACPI_6_2_ERST_GET_RECORD_COUNT 0x0A
2183 #define EFI_ACPI_6_2_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
2184 #define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
2185 #define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
2186 #define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
2187 #define EFI_ACPI_6_2_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10
2188
2189 ///
2190 /// ERST Action Command Status
2191 ///
2192 #define EFI_ACPI_6_2_ERST_STATUS_SUCCESS 0x00
2193 #define EFI_ACPI_6_2_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
2194 #define EFI_ACPI_6_2_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
2195 #define EFI_ACPI_6_2_ERST_STATUS_FAILED 0x03
2196 #define EFI_ACPI_6_2_ERST_STATUS_RECORD_STORE_EMPTY 0x04
2197 #define EFI_ACPI_6_2_ERST_STATUS_RECORD_NOT_FOUND 0x05
2198
2199 ///
2200 /// ERST Serialization Instructions
2201 ///
2202 #define EFI_ACPI_6_2_ERST_READ_REGISTER 0x00
2203 #define EFI_ACPI_6_2_ERST_READ_REGISTER_VALUE 0x01
2204 #define EFI_ACPI_6_2_ERST_WRITE_REGISTER 0x02
2205 #define EFI_ACPI_6_2_ERST_WRITE_REGISTER_VALUE 0x03
2206 #define EFI_ACPI_6_2_ERST_NOOP 0x04
2207 #define EFI_ACPI_6_2_ERST_LOAD_VAR1 0x05
2208 #define EFI_ACPI_6_2_ERST_LOAD_VAR2 0x06
2209 #define EFI_ACPI_6_2_ERST_STORE_VAR1 0x07
2210 #define EFI_ACPI_6_2_ERST_ADD 0x08
2211 #define EFI_ACPI_6_2_ERST_SUBTRACT 0x09
2212 #define EFI_ACPI_6_2_ERST_ADD_VALUE 0x0A
2213 #define EFI_ACPI_6_2_ERST_SUBTRACT_VALUE 0x0B
2214 #define EFI_ACPI_6_2_ERST_STALL 0x0C
2215 #define EFI_ACPI_6_2_ERST_STALL_WHILE_TRUE 0x0D
2216 #define EFI_ACPI_6_2_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
2217 #define EFI_ACPI_6_2_ERST_GOTO 0x0F
2218 #define EFI_ACPI_6_2_ERST_SET_SRC_ADDRESS_BASE 0x10
2219 #define EFI_ACPI_6_2_ERST_SET_DST_ADDRESS_BASE 0x11
2220 #define EFI_ACPI_6_2_ERST_MOVE_DATA 0x12
2221
2222 ///
2223 /// ERST Instruction Flags
2224 ///
2225 #define EFI_ACPI_6_2_ERST_PRESERVE_REGISTER 0x01
2226
2227 ///
2228 /// ERST Serialization Instruction Entry
2229 ///
2230 typedef struct {
2231 UINT8 SerializationAction;
2232 UINT8 Instruction;
2233 UINT8 Flags;
2234 UINT8 Reserved0;
2235 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2236 UINT64 Value;
2237 UINT64 Mask;
2238 } EFI_ACPI_6_2_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
2239
2240 ///
2241 /// EINJ - Error Injection Table
2242 ///
2243 typedef struct {
2244 EFI_ACPI_DESCRIPTION_HEADER Header;
2245 UINT32 InjectionHeaderSize;
2246 UINT8 InjectionFlags;
2247 UINT8 Reserved0[3];
2248 UINT32 InjectionEntryCount;
2249 } EFI_ACPI_6_2_ERROR_INJECTION_TABLE_HEADER;
2250
2251 ///
2252 /// EINJ Version (as defined in ACPI 6.2 spec.)
2253 ///
2254 #define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_REVISION 0x01
2255
2256 ///
2257 /// EINJ Error Injection Actions
2258 ///
2259 #define EFI_ACPI_6_2_EINJ_BEGIN_INJECTION_OPERATION 0x00
2260 #define EFI_ACPI_6_2_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
2261 #define EFI_ACPI_6_2_EINJ_SET_ERROR_TYPE 0x02
2262 #define EFI_ACPI_6_2_EINJ_GET_ERROR_TYPE 0x03
2263 #define EFI_ACPI_6_2_EINJ_END_OPERATION 0x04
2264 #define EFI_ACPI_6_2_EINJ_EXECUTE_OPERATION 0x05
2265 #define EFI_ACPI_6_2_EINJ_CHECK_BUSY_STATUS 0x06
2266 #define EFI_ACPI_6_2_EINJ_GET_COMMAND_STATUS 0x07
2267 #define EFI_ACPI_6_2_EINJ_TRIGGER_ERROR 0xFF
2268
2269 ///
2270 /// EINJ Action Command Status
2271 ///
2272 #define EFI_ACPI_6_2_EINJ_STATUS_SUCCESS 0x00
2273 #define EFI_ACPI_6_2_EINJ_STATUS_UNKNOWN_FAILURE 0x01
2274 #define EFI_ACPI_6_2_EINJ_STATUS_INVALID_ACCESS 0x02
2275
2276 ///
2277 /// EINJ Error Type Definition
2278 ///
2279 #define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
2280 #define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
2281 #define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
2282 #define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
2283 #define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
2284 #define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
2285 #define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
2286 #define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
2287 #define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
2288 #define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
2289 #define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
2290 #define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
2291
2292 ///
2293 /// EINJ Injection Instructions
2294 ///
2295 #define EFI_ACPI_6_2_EINJ_READ_REGISTER 0x00
2296 #define EFI_ACPI_6_2_EINJ_READ_REGISTER_VALUE 0x01
2297 #define EFI_ACPI_6_2_EINJ_WRITE_REGISTER 0x02
2298 #define EFI_ACPI_6_2_EINJ_WRITE_REGISTER_VALUE 0x03
2299 #define EFI_ACPI_6_2_EINJ_NOOP 0x04
2300
2301 ///
2302 /// EINJ Instruction Flags
2303 ///
2304 #define EFI_ACPI_6_2_EINJ_PRESERVE_REGISTER 0x01
2305
2306 ///
2307 /// EINJ Injection Instruction Entry
2308 ///
2309 typedef struct {
2310 UINT8 InjectionAction;
2311 UINT8 Instruction;
2312 UINT8 Flags;
2313 UINT8 Reserved0;
2314 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2315 UINT64 Value;
2316 UINT64 Mask;
2317 } EFI_ACPI_6_2_EINJ_INJECTION_INSTRUCTION_ENTRY;
2318
2319 ///
2320 /// EINJ Trigger Action Table
2321 ///
2322 typedef struct {
2323 UINT32 HeaderSize;
2324 UINT32 Revision;
2325 UINT32 TableSize;
2326 UINT32 EntryCount;
2327 } EFI_ACPI_6_2_EINJ_TRIGGER_ACTION_TABLE;
2328
2329 ///
2330 /// Platform Communications Channel Table (PCCT)
2331 ///
2332 typedef struct {
2333 EFI_ACPI_DESCRIPTION_HEADER Header;
2334 UINT32 Flags;
2335 UINT64 Reserved;
2336 } EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
2337
2338 ///
2339 /// PCCT Version (as defined in ACPI 6.2 spec.)
2340 ///
2341 #define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02
2342
2343 ///
2344 /// PCCT Global Flags
2345 ///
2346 #define EFI_ACPI_6_2_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0
2347
2348 //
2349 // PCCT Subspace type
2350 //
2351 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_GENERIC 0x00
2352 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01
2353 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02
2354 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03
2355 #define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04
2356
2357 ///
2358 /// PCC Subspace Structure Header
2359 ///
2360 typedef struct {
2361 UINT8 Type;
2362 UINT8 Length;
2363 } EFI_ACPI_6_2_PCCT_SUBSPACE_HEADER;
2364
2365 ///
2366 /// Generic Communications Subspace Structure
2367 ///
2368 typedef struct {
2369 UINT8 Type;
2370 UINT8 Length;
2371 UINT8 Reserved[6];
2372 UINT64 BaseAddress;
2373 UINT64 AddressLength;
2374 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2375 UINT64 DoorbellPreserve;
2376 UINT64 DoorbellWrite;
2377 UINT32 NominalLatency;
2378 UINT32 MaximumPeriodicAccessRate;
2379 UINT16 MinimumRequestTurnaroundTime;
2380 } EFI_ACPI_6_2_PCCT_SUBSPACE_GENERIC;
2381
2382 ///
2383 /// Generic Communications Channel Shared Memory Region
2384 ///
2385
2386 typedef struct {
2387 UINT8 Command;
2388 UINT8 Reserved:7;
2389 UINT8 NotifyOnCompletion:1;
2390 } EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
2391
2392 typedef struct {
2393 UINT8 CommandComplete:1;
2394 UINT8 PlatformInterrupt:1;
2395 UINT8 Error:1;
2396 UINT8 PlatformNotification:1;
2397 UINT8 Reserved:4;
2398 UINT8 Reserved1;
2399 } EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
2400
2401 typedef struct {
2402 UINT32 Signature;
2403 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
2404 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
2405 } EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
2406
2407 #define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0
2408 #define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1
2409
2410 ///
2411 /// Type 1 HW-Reduced Communications Subspace Structure
2412 ///
2413 typedef struct {
2414 UINT8 Type;
2415 UINT8 Length;
2416 UINT32 PlatformInterrupt;
2417 UINT8 PlatformInterruptFlags;
2418 UINT8 Reserved;
2419 UINT64 BaseAddress;
2420 UINT64 AddressLength;
2421 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2422 UINT64 DoorbellPreserve;
2423 UINT64 DoorbellWrite;
2424 UINT32 NominalLatency;
2425 UINT32 MaximumPeriodicAccessRate;
2426 UINT16 MinimumRequestTurnaroundTime;
2427 } EFI_ACPI_6_2_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;
2428
2429 ///
2430 /// Type 2 HW-Reduced Communications Subspace Structure
2431 ///
2432 typedef struct {
2433 UINT8 Type;
2434 UINT8 Length;
2435 UINT32 PlatformInterrupt;
2436 UINT8 PlatformInterruptFlags;
2437 UINT8 Reserved;
2438 UINT64 BaseAddress;
2439 UINT64 AddressLength;
2440 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2441 UINT64 DoorbellPreserve;
2442 UINT64 DoorbellWrite;
2443 UINT32 NominalLatency;
2444 UINT32 MaximumPeriodicAccessRate;
2445 UINT16 MinimumRequestTurnaroundTime;
2446 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2447 UINT64 PlatformInterruptAckPreserve;
2448 UINT64 PlatformInterruptAckWrite;
2449 } EFI_ACPI_6_2_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;
2450
2451 ///
2452 /// Type 3 Extended PCC Subspace Structure
2453 ///
2454 typedef struct {
2455 UINT8 Type;
2456 UINT8 Length;
2457 UINT32 PlatformInterrupt;
2458 UINT8 PlatformInterruptFlags;
2459 UINT8 Reserved;
2460 UINT64 BaseAddress;
2461 UINT32 AddressLength;
2462 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2463 UINT64 DoorbellPreserve;
2464 UINT64 DoorbellWrite;
2465 UINT32 NominalLatency;
2466 UINT32 MaximumPeriodicAccessRate;
2467 UINT32 MinimumRequestTurnaroundTime;
2468 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2469 UINT64 PlatformInterruptAckPreserve;
2470 UINT64 PlatformInterruptAckSet;
2471 UINT8 Reserved1[8];
2472 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;
2473 UINT64 CommandCompleteCheckMask;
2474 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;
2475 UINT64 CommandCompleteUpdatePreserve;
2476 UINT64 CommandCompleteUpdateSet;
2477 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;
2478 UINT64 ErrorStatusMask;
2479 } EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC;
2480
2481 ///
2482 /// Type 4 Extended PCC Subspace Structure
2483 ///
2484 typedef EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_2_PCCT_SUBSPACE_4_EXTENDED_PCC;
2485
2486 #define EFI_ACPI_6_2_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0
2487
2488 typedef struct {
2489 UINT32 Signature;
2490 UINT32 Flags;
2491 UINT32 Length;
2492 UINT32 Command;
2493 } EFI_ACPI_6_2_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;
2494
2495 ///
2496 /// Platform Debug Trigger Table (PDTT)
2497 ///
2498 typedef struct {
2499 EFI_ACPI_DESCRIPTION_HEADER Header;
2500 UINT8 TriggerCount;
2501 UINT8 Reserved[3];
2502 UINT32 TriggerIdentifierArrayOffset;
2503 } EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;
2504
2505 ///
2506 /// PDTT Revision (as defined in ACPI 6.2 spec.)
2507 ///
2508 #define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00
2509
2510 ///
2511 /// PDTT Platform Communication Channel Identifier Structure
2512 ///
2513 typedef struct {
2514 UINT16 SubChannelIdentifer:8;
2515 UINT16 Runtime:1;
2516 UINT16 WaitForCompletion:1;
2517 UINT16 Reserved:6;
2518 } EFI_ACPI_6_2_PDTT_PCC_IDENTIFIER;
2519
2520 ///
2521 /// PCC Commands Codes used by Platform Debug Trigger Table
2522 ///
2523 #define EFI_ACPI_6_2_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00
2524 #define EFI_ACPI_6_2_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01
2525
2526 ///
2527 /// PPTT Platform Communication Channel
2528 ///
2529 typedef EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_2_PDTT_PCC;
2530
2531 ///
2532 /// Processor Properties Topology Table (PPTT)
2533 ///
2534 typedef struct {
2535 EFI_ACPI_DESCRIPTION_HEADER Header;
2536 } EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;
2537
2538 ///
2539 /// PPTT Revision (as defined in ACPI 6.2 spec.)
2540 ///
2541 #define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
2542
2543 ///
2544 /// PPTT types
2545 ///
2546 #define EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR 0x00
2547 #define EFI_ACPI_6_2_PPTT_TYPE_CACHE 0x01
2548 #define EFI_ACPI_6_2_PPTT_TYPE_ID 0x02
2549
2550 ///
2551 /// PPTT Structure Header
2552 ///
2553 typedef struct {
2554 UINT8 Type;
2555 UINT8 Length;
2556 UINT8 Reserved[2];
2557 } EFI_ACPI_6_2_PPTT_STRUCTURE_HEADER;
2558
2559 ///
2560 /// Processor hierarchy node structure flags
2561 ///
2562 typedef struct {
2563 UINT32 PhysicalPackage:1;
2564 UINT32 AcpiProcessorIdValid:1;
2565 UINT32 Reserved:30;
2566 } EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS;
2567
2568 ///
2569 /// Processor hierarchy node structure
2570 ///
2571 typedef struct {
2572 UINT32 Type;
2573 UINT8 Length;
2574 UINT8 Reserved[2];
2575 EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;
2576 UINT32 Parent;
2577 UINT32 AcpiProcessorId;
2578 UINT32 NumberOfPrivateResources;
2579 } EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR;
2580
2581 ///
2582 /// Cache Type Structure flags
2583 ///
2584 typedef struct {
2585 UINT32 SizePropertyValid:1;
2586 UINT32 NumberOfSetsValid:1;
2587 UINT32 AssociativityValid:1;
2588 UINT32 AllocationTypeValid:1;
2589 UINT32 CacheTypeValid:1;
2590 UINT32 WritePolicyValid:1;
2591 UINT32 LineSizeValid:1;
2592 UINT32 Reserved:25;
2593 } EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS;
2594
2595 ///
2596 /// Cache Type Structure cache attributes
2597 ///
2598 typedef struct {
2599 UINT8 AllocationType:2;
2600 UINT8 CacheType:2;
2601 UINT8 WritePolicy:1;
2602 UINT8 Reserved:3;
2603 } EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES;
2604
2605 ///
2606 /// Cache Type Structure
2607 ///
2608 typedef struct {
2609 UINT8 Type;
2610 UINT8 Length;
2611 UINT8 Reserved[2];
2612 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS Flags;
2613 UINT32 NextLevelOfCache;
2614 UINT32 Size;
2615 UINT32 NumberOfSets;
2616 UINT8 Associativity;
2617 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;
2618 UINT16 LineSize;
2619 } EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE;
2620
2621 ///
2622 /// ID structure
2623 ///
2624 typedef struct {
2625 UINT8 Type;
2626 UINT8 Length;
2627 UINT8 Reserved[2];
2628 UINT32 VendorId;
2629 UINT64 Level1Id;
2630 UINT64 Level2Id;
2631 UINT16 MajorRev;
2632 UINT16 MinorRev;
2633 UINT16 SpinRev;
2634 } EFI_ACPI_6_2_PPTT_STRUCTURE_ID;
2635
2636 //
2637 // Known table signatures
2638 //
2639
2640 ///
2641 /// "RSD PTR " Root System Description Pointer
2642 ///
2643 #define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
2644
2645 ///
2646 /// "APIC" Multiple APIC Description Table
2647 ///
2648 #define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
2649
2650 ///
2651 /// "BERT" Boot Error Record Table
2652 ///
2653 #define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
2654
2655 ///
2656 /// "BGRT" Boot Graphics Resource Table
2657 ///
2658 #define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
2659
2660 ///
2661 /// "CPEP" Corrected Platform Error Polling Table
2662 ///
2663 #define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
2664
2665 ///
2666 /// "DSDT" Differentiated System Description Table
2667 ///
2668 #define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
2669
2670 ///
2671 /// "ECDT" Embedded Controller Boot Resources Table
2672 ///
2673 #define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
2674
2675 ///
2676 /// "EINJ" Error Injection Table
2677 ///
2678 #define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
2679
2680 ///
2681 /// "ERST" Error Record Serialization Table
2682 ///
2683 #define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
2684
2685 ///
2686 /// "FACP" Fixed ACPI Description Table
2687 ///
2688 #define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
2689
2690 ///
2691 /// "FACS" Firmware ACPI Control Structure
2692 ///
2693 #define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
2694
2695 ///
2696 /// "FPDT" Firmware Performance Data Table
2697 ///
2698 #define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
2699
2700 ///
2701 /// "GTDT" Generic Timer Description Table
2702 ///
2703 #define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
2704
2705 ///
2706 /// "HEST" Hardware Error Source Table
2707 ///
2708 #define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
2709
2710 ///
2711 /// "HMAT" Heterogeneous Memory Attribute Table
2712 ///
2713 #define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')
2714
2715 ///
2716 /// "MPST" Memory Power State Table
2717 ///
2718 #define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
2719
2720 ///
2721 /// "MSCT" Maximum System Characteristics Table
2722 ///
2723 #define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
2724
2725 ///
2726 /// "NFIT" NVDIMM Firmware Interface Table
2727 ///
2728 #define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')
2729
2730 ///
2731 /// "PDTT" Platform Debug Trigger Table
2732 ///
2733 #define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')
2734
2735 ///
2736 /// "PMTT" Platform Memory Topology Table
2737 ///
2738 #define EFI_ACPI_6_2_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
2739
2740 ///
2741 /// "PPTT" Processor Properties Topology Table
2742 ///
2743 #define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
2744
2745 ///
2746 /// "PSDT" Persistent System Description Table
2747 ///
2748 #define EFI_ACPI_6_2_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
2749
2750 ///
2751 /// "RASF" ACPI RAS Feature Table
2752 ///
2753 #define EFI_ACPI_6_2_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
2754
2755 ///
2756 /// "RSDT" Root System Description Table
2757 ///
2758 #define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
2759
2760 ///
2761 /// "SBST" Smart Battery Specification Table
2762 ///
2763 #define EFI_ACPI_6_2_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
2764
2765 ///
2766 /// "SDEV" Secure DEVices Table
2767 ///
2768 #define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')
2769
2770 ///
2771 /// "SLIT" System Locality Information Table
2772 ///
2773 #define EFI_ACPI_6_2_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
2774
2775 ///
2776 /// "SRAT" System Resource Affinity Table
2777 ///
2778 #define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
2779
2780 ///
2781 /// "SSDT" Secondary System Description Table
2782 ///
2783 #define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
2784
2785 ///
2786 /// "XSDT" Extended System Description Table
2787 ///
2788 #define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
2789
2790 ///
2791 /// "BOOT" MS Simple Boot Spec
2792 ///
2793 #define EFI_ACPI_6_2_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2794
2795 ///
2796 /// "CSRT" MS Core System Resource Table
2797 ///
2798 #define EFI_ACPI_6_2_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2799
2800 ///
2801 /// "DBG2" MS Debug Port 2 Spec
2802 ///
2803 #define EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2804
2805 ///
2806 /// "DBGP" MS Debug Port Spec
2807 ///
2808 #define EFI_ACPI_6_2_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2809
2810 ///
2811 /// "DMAR" DMA Remapping Table
2812 ///
2813 #define EFI_ACPI_6_2_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2814
2815 ///
2816 /// "DPPT" DMA Protection Policy Table
2817 ///
2818 #define EFI_ACPI_6_2_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T')
2819
2820 ///
2821 /// "DRTM" Dynamic Root of Trust for Measurement Table
2822 ///
2823 #define EFI_ACPI_6_2_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2824
2825 ///
2826 /// "ETDT" Event Timer Description Table
2827 ///
2828 #define EFI_ACPI_6_2_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2829
2830 ///
2831 /// "HPET" IA-PC High Precision Event Timer Table
2832 ///
2833 #define EFI_ACPI_6_2_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2834
2835 ///
2836 /// "iBFT" iSCSI Boot Firmware Table
2837 ///
2838 #define EFI_ACPI_6_2_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2839
2840 ///
2841 /// "IORT" I/O Remapping Table
2842 ///
2843 #define EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')
2844
2845 ///
2846 /// "IVRS" I/O Virtualization Reporting Structure
2847 ///
2848 #define EFI_ACPI_6_2_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2849
2850 ///
2851 /// "LPIT" Low Power Idle Table
2852 ///
2853 #define EFI_ACPI_6_2_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
2854
2855 ///
2856 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2857 ///
2858 #define EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2859
2860 ///
2861 /// "MCHI" Management Controller Host Interface Table
2862 ///
2863 #define EFI_ACPI_6_2_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2864
2865 ///
2866 /// "MSDM" MS Data Management Table
2867 ///
2868 #define EFI_ACPI_6_2_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2869
2870 ///
2871 /// "SDEI" Software Delegated Exceptions Interface Table
2872 ///
2873 #define EFI_ACPI_6_2_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')
2874
2875 ///
2876 /// "SLIC" MS Software Licensing Table Specification
2877 ///
2878 #define EFI_ACPI_6_2_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2879
2880 ///
2881 /// "SPCR" Serial Port Concole Redirection Table
2882 ///
2883 #define EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2884
2885 ///
2886 /// "SPMI" Server Platform Management Interface Table
2887 ///
2888 #define EFI_ACPI_6_2_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2889
2890 ///
2891 /// "STAO" _STA Override Table
2892 ///
2893 #define EFI_ACPI_6_2_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')
2894
2895 ///
2896 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2897 ///
2898 #define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2899
2900 ///
2901 /// "TPM2" Trusted Computing Platform 1 Table
2902 ///
2903 #define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2904
2905 ///
2906 /// "UEFI" UEFI ACPI Data Table
2907 ///
2908 #define EFI_ACPI_6_2_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2909
2910 ///
2911 /// "WAET" Windows ACPI Emulated Devices Table
2912 ///
2913 #define EFI_ACPI_6_2_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2914
2915 ///
2916 /// "WDAT" Watchdog Action Table
2917 ///
2918 #define EFI_ACPI_6_2_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2919
2920 ///
2921 /// "WDRT" Watchdog Resource Table
2922 ///
2923 #define EFI_ACPI_6_2_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2924
2925 ///
2926 /// "WPBT" MS Platform Binary Table
2927 ///
2928 #define EFI_ACPI_6_2_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
2929
2930 ///
2931 /// "WSMT" Windows SMM Security Mitigation Table
2932 ///
2933 #define EFI_ACPI_6_2_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')
2934
2935 ///
2936 /// "XENV" Xen Project Table
2937 ///
2938 #define EFI_ACPI_6_2_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')
2939
2940 #pragma pack()
2941
2942 #endif