MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h

   1 /** @file
   2   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   3   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
   4
   5   Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8   @par Revision Reference:
   9     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
  10       Specification v2.5, Dated November 2017.
  11       http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
  12
  13   @par Glossary:
  14     - HPET - High Precision Event Timer
  15     - NUMA - Non-uniform Memory Access
  16 **/
  17 #ifndef _DMA_REMAPPING_REPORTING_TABLE_H_
  18 #define _DMA_REMAPPING_REPORTING_TABLE_H_
  19
  20 #include <IndustryStandard/Acpi.h>
  21
  22 #pragma pack(1)
  23
  24 ///
  25 /// DMA-Remapping Reporting Structure definitions from section 8.1
  26 ///@{
  27 #define EFI_ACPI_DMAR_REVISION                             0x01
  28
  29 #define EFI_ACPI_DMAR_FLAGS_INTR_REMAP                     BIT0
  30 #define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT                 BIT1
  31 #define EFI_ACPI_DMAR_FLAGS_DMA_CTRL_PLATFORM_OPT_IN_FLAG  BIT2
  32 ///@}
  33
  34 ///
  35 /// Remapping Structure Types definitions from section 8.2
  36 ///@{
  37 #define EFI_ACPI_DMAR_TYPE_DRHD                   0x00
  38 #define EFI_ACPI_DMAR_TYPE_RMRR                   0x01
  39 #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
  40 #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
  41 #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
  42 ///@}
  43
  44 ///
  45 /// DMA-Remapping Hardware Unit definitions from section 8.3
  46 ///
  47 #define EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL  BIT0
  48
  49 ///
  50 /// DMA-Remapping Device Scope Entry Structure definitions from section 8.3.1
  51 ///@{
  52 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT           0x01
  53 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE             0x02
  54 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC                 0x03
  55 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_MSI_CAPABLE_HPET       0x04
  56 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_ACPI_NAMESPACE_DEVICE  0x05
  57 ///@}
  58
  59 ///
  60 /// Root Port ATS Capability Reporting Structure definitions from section 8.5
  61 ///
  62 #define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS                      BIT0
  63
  64 ///
  65 /// Definition for DMA Remapping Structure Header
  66 ///
  67 typedef struct {
  68   UINT16        Type;
  69   UINT16        Length;
  70 } EFI_ACPI_DMAR_STRUCTURE_HEADER;
  71
  72 ///
  73 /// Definition for DMA-Remapping PCI Path
  74 ///
  75 typedef struct {
  76   UINT8         Device;
  77   UINT8         Function;
  78 } EFI_ACPI_DMAR_PCI_PATH;
  79
  80 ///
  81 /// Device Scope Structure is defined in section 8.3.1
  82 ///
  83 typedef struct {
  84   UINT8         Type;
  85   UINT8         Length;
  86   UINT16        Reserved2;
  87   UINT8         EnumerationId;
  88   UINT8         StartBusNumber;
  89 } EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;
  90
  91 /**
  92   DMA-remapping hardware unit definition (DRHD) structure is defined in
  93   section 8.3. This uniquely represents a remapping hardware unit present
  94   in the platform. There must be at least one instance of this structure
  95   for each PCI segment in the platform.
  96 **/
  97 typedef struct {
  98   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
  99   /**
 100     - Bit[0]: INCLUDE_PCI_ALL
 101               - If Set, this remapping hardware unit has under its scope all
 102                 PCI compatible devices in the specified Segment, except devices
 103                 reported under the scope of other remapping hardware units for
 104                 the same Segment.
 105               - If Clear, this remapping hardware unit has under its scope only
 106                 devices in the specified Segment that are explicitly identified
 107                 through the DeviceScope field.
 108     - Bits[7:1] Reserved.
 109   **/
 110   UINT8                           Flags;
 111   UINT8                           Reserved;
 112   ///
 113   /// The PCI Segment associated with this unit.
 114   ///
 115   UINT16                          SegmentNumber;
 116   ///
 117   /// Base address of remapping hardware register-set for this unit.
 118   ///
 119   UINT64                          RegisterBaseAddress;
 120 } EFI_ACPI_DMAR_DRHD_HEADER;
 121
 122 /**
 123   Reserved Memory Region Reporting Structure (RMRR) is described in section 8.4
 124   Reserved memory ranges that may be DMA targets may be reported through the
 125   RMRR structures, along with the devices that requires access to the specified
 126   reserved memory region.
 127 **/
 128 typedef struct {
 129   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 130   UINT8                           Reserved[2];
 131   ///
 132   /// PCI Segment Number associated with devices identified through
 133   /// the Device Scope field.
 134   ///
 135   UINT16                          SegmentNumber;
 136   ///
 137   /// Base address of 4KB-aligned reserved memory region
 138   ///
 139   UINT64                          ReservedMemoryRegionBaseAddress;
 140   /**
 141     Last address of the reserved memory region. Value in this field must be
 142     greater than the value in Reserved Memory Region Base Address field.
 143     The reserved memory region size (Limit - Base + 1) must be an integer
 144     multiple of 4KB.
 145   **/
 146   UINT64                          ReservedMemoryRegionLimitAddress;
 147 } EFI_ACPI_DMAR_RMRR_HEADER;
 148
 149 /**
 150   Root Port ATS Capability Reporting (ATSR) structure is defined in section 8.5.
 151   This structure is applicable only for platforms supporting Device-TLBs as
 152   reported through the Extended Capability Register. For each PCI Segment in
 153   the platform that supports Device-TLBs, BIOS provides an ATSR structure. The
 154   ATSR structures identifies PCI-Express Root-Ports supporting Address
 155   Translation Services (ATS) transactions. Software must enable ATS on endpoint
 156   devices behind a Root Port only if the Root Port is reported as supporting
 157   ATS transactions.
 158 **/
 159 typedef struct {
 160   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 161   /**
 162     - Bit[0]: ALL_PORTS:
 163               - If Set, indicates all PCI Express Root Ports in the specified
 164                 PCI Segment supports ATS transactions.
 165               - If Clear, indicates ATS transactions are supported only on
 166                 Root Ports identified through the Device Scope field.
 167     - Bits[7:1] Reserved.
 168   **/
 169   UINT8                           Flags;
 170   UINT8                           Reserved;
 171   ///
 172   /// The PCI Segment associated with this ATSR structure
 173   ///
 174   UINT16                          SegmentNumber;
 175 } EFI_ACPI_DMAR_ATSR_HEADER;
 176
 177 /**
 178   Remapping Hardware Static Affinity (RHSA) is an optional structure defined
 179   in section 8.6. This is intended to be used only on NUMA platforms with
 180   Remapping hardware units and memory spanned across multiple nodes.
 181   When used, there must be a RHSA structure for each Remapping hardware unit
 182   reported through DRHD structure.
 183 **/
 184 typedef struct {
 185   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 186   UINT8                           Reserved[4];
 187   ///
 188   /// Register Base Address of this Remap hardware unit reported in the
 189   /// corresponding DRHD structure.
 190   ///
 191   UINT64                          RegisterBaseAddress;
 192   ///
 193   /// Proximity Domain to which the Remap hardware unit identified by the
 194   /// Register Base Address field belongs.
 195   ///
 196   UINT32                          ProximityDomain;
 197 } EFI_ACPI_DMAR_RHSA_HEADER;
 198
 199 /**
 200   An ACPI Name-space Device Declaration (ANDD) structure is defined in section
 201   8.7 and uniquely represents an ACPI name-space enumerated device capable of
 202   issuing DMA requests in the platform. ANDD structures are used in conjunction
 203   with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.
 204 **/
 205 typedef struct {
 206   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 207   UINT8                           Reserved[3];
 208   /**
 209     Each ACPI device enumerated through an ANDD structure must have a unique
 210     value for this field. To report an ACPI device with ACPI Device Number
 211     value of X, under the scope of a DRHD unit, a Device-Scope entry of type
 212     ACPI_NAMESPACE_DEVICE is used with value of X in the Enumeration ID field.
 213     The Start Bus Number and Path fields in the Device-Scope together
 214     provides the 16-bit source-id allocated by platform for the ACPI device.
 215   **/
 216   UINT8                           AcpiDeviceNumber;
 217 } EFI_ACPI_DMAR_ANDD_HEADER;
 218
 219 /**
 220   DMA Remapping Reporting Structure Header as defined in section 8.1
 221   This header will be followed by list of Remapping Structures listed below
 222     - DMA Remapping Hardware Unit Definition (DRHD)
 223     - Reserved Memory Region Reporting (RMRR)
 224     - Root Port ATS Capability Reporting (ATSR)
 225     - Remapping Hardware Static Affinity (RHSA)
 226     - ACPI Name-space Device Declaration (ANDD)
 227   These structure types must by reported in numerical order.
 228   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
 229   structures of type 1 (RMRR), and so forth.
 230 **/
 231 typedef struct {
 232   EFI_ACPI_DESCRIPTION_HEADER     Header;
 233   /**
 234     This field indicates the maximum DMA physical addressability supported by
 235     this platform. The system address map reported by the BIOS indicates what
 236     portions of this addresses are populated. The Host Address Width (HAW) of
 237     the platform is computed as (N+1), where N is the value reported in this
 238     field.
 239     For example, for a platform supporting 40 bits of physical addressability,
 240     the value of 100111b is reported in this field.
 241   **/
 242   UINT8                           HostAddressWidth;
 243   /**
 244     - Bit[0]:   INTR_REMAP - If Clear, the platform does not support interrupt
 245                 remapping. If Set, the platform supports interrupt remapping.
 246     - Bit[1]:   X2APIC_OPT_OUT - For firmware compatibility reasons, platform
 247                 firmware may Set this field to request system software to opt
 248                 out of enabling Extended xAPIC (X2APIC) mode. This field is
 249                 valid only when the INTR_REMAP field (bit 0) is Set.
 250     - Bit[2]:   DMA_CTRL_PLATFORM_OPT_IN_FLAG - Platform firmware is
 251                 recommended to Set this field to report any platform initiated
 252                 DMA is restricted to only reserved memory regions (reported in
 253                 RMRR structures) when transferring control to system software
 254                 such as on ExitBootServices().
 255     - Bits[7:3] Reserved.
 256   **/
 257   UINT8                           Flags;
 258   UINT8                           Reserved[10];
 259 } EFI_ACPI_DMAR_HEADER;
 260
 261 #pragma pack()
 262
 263 #endif