MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h

   1 /** @file
   2   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   3   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
   4
   5   Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14   @par Revision Reference:
  15     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
  16       Specification v2.5, Dated November 2017.
  17       http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
  18
  19   @par Glossary:
  20     - HPET - High Precision Event Timer
  21     - NUMA - Non-uniform Memory Access
  22 **/
  23 #ifndef _DMA_REMAPPING_REPORTING_TABLE_H_
  24 #define _DMA_REMAPPING_REPORTING_TABLE_H_
  25
  26 #include <IndustryStandard/Acpi.h>
  27
  28 #pragma pack(1)
  29
  30 ///
  31 /// DMA-Remapping Reporting Structure definitions from section 8.1
  32 ///@{
  33 #define EFI_ACPI_DMAR_REVISION                             0x01
  34
  35 #define EFI_ACPI_DMAR_FLAGS_INTR_REMAP                     BIT0
  36 #define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT                 BIT1
  37 #define EFI_ACPI_DMAR_FLAGS_DMA_CTRL_PLATFORM_OPT_IN_FLAG  BIT2
  38 ///@}
  39
  40 ///
  41 /// Remapping Structure Types definitions from section 8.2
  42 ///@{
  43 #define EFI_ACPI_DMAR_TYPE_DRHD                   0x00
  44 #define EFI_ACPI_DMAR_TYPE_RMRR                   0x01
  45 #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
  46 #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
  47 #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
  48 ///@}
  49
  50 ///
  51 /// DMA-Remapping Hardware Unit definitions from section 8.3
  52 ///
  53 #define EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL  BIT0
  54
  55 ///
  56 /// DMA-Remapping Device Scope Entry Structure definitions from section 8.3.1
  57 ///@{
  58 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT           0x01
  59 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE             0x02
  60 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC                 0x03
  61 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_MSI_CAPABLE_HPET       0x04
  62 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_ACPI_NAMESPACE_DEVICE  0x05
  63 ///@}
  64
  65 ///
  66 /// Root Port ATS Capability Reporting Structure definitions from section 8.5
  67 ///
  68 #define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS                      BIT0
  69
  70 ///
  71 /// Definition for DMA Remapping Structure Header
  72 ///
  73 typedef struct {
  74   UINT16        Type;
  75   UINT16        Length;
  76 } EFI_ACPI_DMAR_STRUCTURE_HEADER;
  77
  78 ///
  79 /// Definition for DMA-Remapping PCI Path
  80 ///
  81 typedef struct {
  82   UINT8         Device;
  83   UINT8         Function;
  84 } EFI_ACPI_DMAR_PCI_PATH;
  85
  86 ///
  87 /// Device Scope Structure is defined in section 8.3.1
  88 ///
  89 typedef struct {
  90   UINT8         Type;
  91   UINT8         Length;
  92   UINT16        Reserved2;
  93   UINT8         EnumerationId;
  94   UINT8         StartBusNumber;
  95 } EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;
  96
  97 /**
  98   DMA-remapping hardware unit definition (DRHD) structure is defined in
  99   section 8.3. This uniquely represents a remapping hardware unit present
 100   in the platform. There must be at least one instance of this structure
 101   for each PCI segment in the platform.
 102 **/
 103 typedef struct {
 104   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 105   /**
 106     - Bit[0]: INCLUDE_PCI_ALL
 107               - If Set, this remapping hardware unit has under its scope all
 108                 PCI compatible devices in the specified Segment, except devices
 109                 reported under the scope of other remapping hardware units for
 110                 the same Segment.
 111               - If Clear, this remapping hardware unit has under its scope only
 112                 devices in the specified Segment that are explicitly identified
 113                 through the DeviceScope field.
 114     - Bits[7:1] Reserved.
 115   **/
 116   UINT8                           Flags;
 117   UINT8                           Reserved;
 118   ///
 119   /// The PCI Segment associated with this unit.
 120   ///
 121   UINT16                          SegmentNumber;
 122   ///
 123   /// Base address of remapping hardware register-set for this unit.
 124   ///
 125   UINT64                          RegisterBaseAddress;
 126 } EFI_ACPI_DMAR_DRHD_HEADER;
 127
 128 /**
 129   Reserved Memory Region Reporting Structure (RMRR) is described in section 8.4
 130   Reserved memory ranges that may be DMA targets may be reported through the
 131   RMRR structures, along with the devices that requires access to the specified
 132   reserved memory region.
 133 **/
 134 typedef struct {
 135   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 136   UINT8                           Reserved[2];
 137   ///
 138   /// PCI Segment Number associated with devices identified through
 139   /// the Device Scope field.
 140   ///
 141   UINT16                          SegmentNumber;
 142   ///
 143   /// Base address of 4KB-aligned reserved memory region
 144   ///
 145   UINT64                          ReservedMemoryRegionBaseAddress;
 146   /**
 147     Last address of the reserved memory region. Value in this field must be
 148     greater than the value in Reserved Memory Region Base Address field.
 149     The reserved memory region size (Limit - Base + 1) must be an integer
 150     multiple of 4KB.
 151   **/
 152   UINT64                          ReservedMemoryRegionLimitAddress;
 153 } EFI_ACPI_DMAR_RMRR_HEADER;
 154
 155 /**
 156   Root Port ATS Capability Reporting (ATSR) structure is defined in section 8.5.
 157   This structure is applicable only for platforms supporting Device-TLBs as
 158   reported through the Extended Capability Register. For each PCI Segment in
 159   the platform that supports Device-TLBs, BIOS provides an ATSR structure. The
 160   ATSR structures identifies PCI-Express Root-Ports supporting Address
 161   Translation Services (ATS) transactions. Software must enable ATS on endpoint
 162   devices behind a Root Port only if the Root Port is reported as supporting
 163   ATS transactions.
 164 **/
 165 typedef struct {
 166   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 167   /**
 168     - Bit[0]: ALL_PORTS:
 169               - If Set, indicates all PCI Express Root Ports in the specified
 170                 PCI Segment supports ATS transactions.
 171               - If Clear, indicates ATS transactions are supported only on
 172                 Root Ports identified through the Device Scope field.
 173     - Bits[7:1] Reserved.
 174   **/
 175   UINT8                           Flags;
 176   UINT8                           Reserved;
 177   ///
 178   /// The PCI Segment associated with this ATSR structure
 179   ///
 180   UINT16                          SegmentNumber;
 181 } EFI_ACPI_DMAR_ATSR_HEADER;
 182
 183 /**
 184   Remapping Hardware Static Affinity (RHSA) is an optional structure defined
 185   in section 8.6. This is intended to be used only on NUMA platforms with
 186   Remapping hardware units and memory spanned across multiple nodes.
 187   When used, there must be a RHSA structure for each Remapping hardware unit
 188   reported through DRHD structure.
 189 **/
 190 typedef struct {
 191   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 192   UINT8                           Reserved[4];
 193   ///
 194   /// Register Base Address of this Remap hardware unit reported in the
 195   /// corresponding DRHD structure.
 196   ///
 197   UINT64                          RegisterBaseAddress;
 198   ///
 199   /// Proximity Domain to which the Remap hardware unit identified by the
 200   /// Register Base Address field belongs.
 201   ///
 202   UINT32                          ProximityDomain;
 203 } EFI_ACPI_DMAR_RHSA_HEADER;
 204
 205 /**
 206   An ACPI Name-space Device Declaration (ANDD) structure is defined in section
 207   8.7 and uniquely represents an ACPI name-space enumerated device capable of
 208   issuing DMA requests in the platform. ANDD structures are used in conjunction
 209   with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.
 210 **/
 211 typedef struct {
 212   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 213   UINT8                           Reserved[3];
 214   /**
 215     Each ACPI device enumerated through an ANDD structure must have a unique
 216     value for this field. To report an ACPI device with ACPI Device Number
 217     value of X, under the scope of a DRHD unit, a Device-Scope entry of type
 218     ACPI_NAMESPACE_DEVICE is used with value of X in the Enumeration ID field.
 219     The Start Bus Number and Path fields in the Device-Scope together
 220     provides the 16-bit source-id allocated by platform for the ACPI device.
 221   **/
 222   UINT8                           AcpiDeviceNumber;
 223 } EFI_ACPI_DMAR_ANDD_HEADER;
 224
 225 /**
 226   DMA Remapping Reporting Structure Header as defined in section 8.1
 227   This header will be followed by list of Remapping Structures listed below
 228     - DMA Remapping Hardware Unit Definition (DRHD)
 229     - Reserved Memory Region Reporting (RMRR)
 230     - Root Port ATS Capability Reporting (ATSR)
 231     - Remapping Hardware Static Affinity (RHSA)
 232     - ACPI Name-space Device Declaration (ANDD)
 233   These structure types must by reported in numerical order.
 234   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
 235   structures of type 1 (RMRR), and so forth.
 236 **/
 237 typedef struct {
 238   EFI_ACPI_DESCRIPTION_HEADER     Header;
 239   /**
 240     This field indicates the maximum DMA physical addressability supported by
 241     this platform. The system address map reported by the BIOS indicates what
 242     portions of this addresses are populated. The Host Address Width (HAW) of
 243     the platform is computed as (N+1), where N is the value reported in this
 244     field.
 245     For example, for a platform supporting 40 bits of physical addressability,
 246     the value of 100111b is reported in this field.
 247   **/
 248   UINT8                           HostAddressWidth;
 249   /**
 250     - Bit[0]:   INTR_REMAP - If Clear, the platform does not support interrupt
 251                 remapping. If Set, the platform supports interrupt remapping.
 252     - Bit[1]:   X2APIC_OPT_OUT - For firmware compatibility reasons, platform
 253                 firmware may Set this field to request system software to opt
 254                 out of enabling Extended xAPIC (X2APIC) mode. This field is
 255                 valid only when the INTR_REMAP field (bit 0) is Set.
 256     - Bit[2]:   DMA_CTRL_PLATFORM_OPT_IN_FLAG - Platform firmware is
 257                 recommended to Set this field to report any platform initiated
 258                 DMA is restricted to only reserved memory regions (reported in
 259                 RMRR structures) when transferring control to system software
 260                 such as on ExitBootServices().
 261     - Bits[7:3] Reserved.
 262   **/
 263   UINT8                           Flags;
 264   UINT8                           Reserved[10];
 265 } EFI_ACPI_DMAR_HEADER;
 266
 267 #pragma pack()
 268
 269 #endif