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1 /** @file
2 Support for PCI 3.0 standard.
3
4 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __PCI30_H__
16 #define __PCI30_H__
17
18
19 #include <IndustryStandard/Pci23.h>
20
21 ///
22 /// PCI_CLASS_MASS_STORAGE, Base Class 01h.
23 ///
24 ///@{
25 #define PCI_CLASS_MASS_STORAGE_SATADPA 0x06
26 #define PCI_IF_MASS_STORAGE_SATA 0x00
27 #define PCI_IF_MASS_STORAGE_AHCI 0x01
28 ///@}
29
30 ///
31 /// PCI_CLASS_WIRELESS, Base Class 0Dh.
32 ///
33 ///@{
34 #define PCI_SUBCLASS_ETHERNET_80211A 0x20
35 #define PCI_SUBCLASS_ETHERNET_80211B 0x21
36 ///@}
37
38 /**
39 Macro that checks whether device is a SATA controller.
40
41 @param _p Specified device.
42
43 @retval TRUE Device is a SATA controller.
44 @retval FALSE Device is not a SATA controller.
45
46 **/
47 #define IS_PCI_SATADPA(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SATADPA)
48
49 ///
50 /// PCI Capability List IDs and records
51 ///
52 #define EFI_PCI_CAPABILITY_ID_PCIEXP 0x10
53
54 #pragma pack(1)
55
56 ///
57 /// PCI Data Structure Format
58 /// Section 5.1.2, PCI Firmware Specification, Revision 3.0
59 ///
60 typedef struct {
61 UINT32 Signature; ///< "PCIR"
62 UINT16 VendorId;
63 UINT16 DeviceId;
64 UINT16 DeviceListOffset;
65 UINT16 Length;
66 UINT8 Revision;
67 UINT8 ClassCode[3];
68 UINT16 ImageLength;
69 UINT16 CodeRevision;
70 UINT8 CodeType;
71 UINT8 Indicator;
72 UINT16 MaxRuntimeImageLength;
73 UINT16 ConfigUtilityCodeHeaderOffset;
74 UINT16 DMTFCLPEntryPointOffset;
75 } PCI_3_0_DATA_STRUCTURE;
76
77 #pragma pack()
78
79 #endif