MdePkg/Include/IndustryStandard/PciExpress21.h

   1 /** @file
   2   Support for the latest PCI standard.
   3
   4   Copyright (c) 2006 - 2009, Intel Corporation
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _PCIEXPRESS21_H_
  16 #define _PCIEXPRESS21_H_
  17
  18 #define EFI_PCIE_CAPABILITY_BASE_OFFSET                             0x100
  19 #define EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL_ARI_HIERARCHY          0x10
  20 #define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_OFFSET            0x24
  21 #define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING    0x20
  22 #define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET                 0x28
  23 #define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_ARI_FORWARDING         0x20
  24
  25 //
  26 // for SR-IOV
  27 //
  28 #define EFI_PCIE_CAPABILITY_ID_ARI        0x0E
  29 #define EFI_PCIE_CAPABILITY_ID_ATS        0x0F
  30 #define EFI_PCIE_CAPABILITY_ID_SRIOV      0x10
  31 #define EFI_PCIE_CAPABILITY_ID_MRIOV      0x11
  32
  33 typedef struct {
  34   UINT32  CapabilityHeader;
  35   UINT32  Capability;
  36   UINT16  Control;
  37   UINT16  Status;
  38   UINT16  InitialVFs;
  39   UINT16  TotalVFs;
  40   UINT16  NumVFs;
  41   UINT8   FunctionDependencyLink;
  42   UINT8   Reserved0;
  43   UINT16  FirstVFOffset;
  44   UINT16  VFStride;
  45   UINT16  Reserved1;
  46   UINT16  VFDeviceID;
  47   UINT32  SupportedPageSize;
  48   UINT32  SystemPageSize;
  49   UINT32  VFBar[6];
  50   UINT32  VFMigrationStateArrayOffset;
  51 } SR_IOV_CAPABILITY_REGISTER;
  52
  53 #define EFI_PCIE_CAPABILITY_ID_SRIOV_CAPABILITIES               0x04
  54 #define EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL                    0x08
  55 #define EFI_PCIE_CAPABILITY_ID_SRIOV_STATUS                     0x0A
  56 #define EFI_PCIE_CAPABILITY_ID_SRIOV_INITIALVFS                 0x0C
  57 #define EFI_PCIE_CAPABILITY_ID_SRIOV_TOTALVFS                   0x0E
  58 #define EFI_PCIE_CAPABILITY_ID_SRIOV_NUMVFS                     0x10
  59 #define EFI_PCIE_CAPABILITY_ID_SRIOV_FUNCTION_DEPENDENCY_LINK   0x12
  60 #define EFI_PCIE_CAPABILITY_ID_SRIOV_FIRSTVF                    0x14
  61 #define EFI_PCIE_CAPABILITY_ID_SRIOV_VFSTRIDE                   0x16
  62 #define EFI_PCIE_CAPABILITY_ID_SRIOV_VFDEVICEID                 0x1A
  63 #define EFI_PCIE_CAPABILITY_ID_SRIOV_SUPPORTED_PAGE_SIZE        0x1C
  64 #define EFI_PCIE_CAPABILITY_ID_SRIOV_SYSTEM_PAGE_SIZE           0x20
  65 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR0                       0x24
  66 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR1                       0x28
  67 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR2                       0x2C
  68 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR3                       0x30
  69 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR4                       0x34
  70 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR5                       0x38
  71 #define EFI_PCIE_CAPABILITY_ID_SRIOV_VF_MIGRATION_STATE         0x3C
  72
  73 #endif