MdePkg/Include/Ipf/Sal.h

   1 /** @file
   2   Main SAL API's defined in SAL 3.0 specification.
   3
   4   Copyright (c) 2006, Intel Corporation
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13   Module Name:  SalApi.h
  14
  15 **/
  16
  17 #ifndef __SAL_API_H__
  18 #define __SAL_API_H__
  19
  20 //
  21 // FIT Types
  22 // Table 2-2 of Intel Itanium Processor Family System Abstraction Layer Specification December 2003
  23 //
  24 #define EFI_SAL_FIT_FIT_HEADER_TYPE 0x00
  25 #define EFI_SAL_FIT_PAL_B_TYPE      0x01
  26 //
  27 // type from 0x02 to 0x0E is reserved.
  28 //
  29 #define EFI_SAL_FIT_PAL_A_TYPE  0x0F
  30 //
  31 // OEM-defined type range is from 0x10 to 0x7E. Here we defined the PEI_CORE type as 0x10
  32 //
  33 #define EFI_SAL_FIT_PEI_CORE_TYPE 0x10
  34 #define EFI_SAL_FIT_UNUSED_TYPE   0x7F
  35
  36 //
  37 // EFI_SAL_STATUS
  38 //
  39 typedef UINTN EFI_SAL_STATUS;
  40
  41 #define EFI_SAL_SUCCESS               ((EFI_SAL_STATUS) 0)
  42 #define EFI_SAL_MORE_RECORDS          ((EFI_SAL_STATUS) 3)
  43 #define EFI_SAL_NOT_IMPLEMENTED       ((EFI_SAL_STATUS) - 1)
  44 #define EFI_SAL_INVALID_ARGUMENT      ((EFI_SAL_STATUS) - 2)
  45 #define EFI_SAL_ERROR                 ((EFI_SAL_STATUS) - 3)
  46 #define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)
  47 #define EFI_SAL_NO_INFORMATION        ((EFI_SAL_STATUS) - 5)
  48 #define EFI_SAL_NOT_ENOUGH_SCRATCH    ((EFI_SAL_STATUS) - 9)
  49
  50 //
  51 //  Return values from SAL
  52 //
  53 typedef struct {
  54   EFI_SAL_STATUS  Status; // register r8
  55   UINTN           r9;
  56   UINTN           r10;
  57   UINTN           r11;
  58 } SAL_RETURN_REGS;
  59
  60 //
  61 //  Delivery Mode of IPF CPU.
  62 //
  63 typedef enum {
  64   EFI_DELIVERY_MODE_INT,
  65   EFI_DELIVERY_MODE_MPreserved1,
  66   EFI_DELIVERY_MODE_PMI,
  67   EFI_DELIVERY_MODE_MPreserved2,
  68   EFI_DELIVERY_MODE_NMI,
  69   EFI_DELIVERY_MODE_INIT,
  70   EFI_DELIVERY_MODE_MPreserved3,
  71   EFI_DELIVERY_MODE_ExtINT
  72 } EFI_DELIVERY_MODE;
  73
  74 typedef SAL_RETURN_REGS (EFIAPI *SAL_PROC)
  75   (
  76     IN UINT64 FunctionId,
  77     IN UINT64 Arg2,
  78     IN UINT64 Arg3,
  79     IN UINT64 Arg4,
  80     IN UINT64 Arg5,
  81     IN UINT64 Arg6,
  82     IN UINT64 Arg7,
  83     IN UINT64 Arg8
  84   );
  85
  86 //
  87 // SAL Procedure FunctionId definition
  88 //
  89 #define EFI_SAL_SET_VECTORS             0x01000000
  90 #define EFI_SAL_GET_STATE_INFO          0x01000001
  91 #define EFI_SAL_GET_STATE_INFO_SIZE     0x01000002
  92 #define EFI_SAL_CLEAR_STATE_INFO        0x01000003
  93 #define EFI_SAL_MC_RENDEZ               0x01000004
  94 #define EFI_SAL_MC_SET_PARAMS           0x01000005
  95 #define EFI_SAL_REGISTER_PHYSICAL_ADDR  0x01000006
  96 #define EFI_SAL_CACHE_FLUSH             0x01000008
  97 #define EFI_SAL_CACHE_INIT              0x01000009
  98 #define EFI_SAL_PCI_CONFIG_READ         0x01000010
  99 #define EFI_SAL_PCI_CONFIG_WRITE        0x01000011
 100 #define EFI_SAL_FREQ_BASE               0x01000012
 101 #define EFI_SAL_UPDATE_PAL              0x01000020
 102
 103 #define EFI_SAL_FUNCTION_ID_MASK        0x0000ffff
 104 #define EFI_SAL_MAX_SAL_FUNCTION_ID     0x00000021
 105
 106 //
 107 // SAL Procedure parameter definitions
 108 // Not much point in using typedefs or enums because all params
 109 // are UINT64 and the entry point is common
 110 //
 111 // EFI_SAL_SET_VECTORS
 112 //
 113 #define EFI_SAL_SET_MCA_VECTOR          0x0
 114 #define EFI_SAL_SET_INIT_VECTOR         0x1
 115 #define EFI_SAL_SET_BOOT_RENDEZ_VECTOR  0x2
 116
 117 typedef struct {
 118   UINT64  Length : 32;
 119   UINT64  ChecksumValid : 1;
 120   UINT64  Reserved1 : 7;
 121   UINT64  ByteChecksum : 8;
 122   UINT64  Reserved2 : 16;
 123 } SAL_SET_VECTORS_CS_N;
 124
 125 //
 126 // EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,
 127 // EFI_SAL_CLEAR_STATE_INFO
 128 //
 129 #define EFI_SAL_MCA_STATE_INFO  0x0
 130 #define EFI_SAL_INIT_STATE_INFO 0x1
 131 #define EFI_SAL_CMC_STATE_INFO  0x2
 132 #define EFI_SAL_CP_STATE_INFO   0x3
 133
 134 //
 135 // EFI_SAL_MC_SET_PARAMS
 136 //
 137 #define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1
 138 #define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2
 139 #define EFI_SAL_MC_SET_CPE_PARAM    0x3
 140
 141 #define EFI_SAL_MC_SET_INTR_PARAM   0x1
 142 #define EFI_SAL_MC_SET_MEM_PARAM    0x2
 143
 144 //
 145 // EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR
 146 //
 147 #define EFI_SAL_REGISTER_PAL_ADDR 0x0
 148
 149 //
 150 // EFI_SAL_CACHE_FLUSH
 151 //
 152 #define EFI_SAL_FLUSH_I_CACHE       0x01
 153 #define EFI_SAL_FLUSH_D_CACHE       0x02
 154 #define EFI_SAL_FLUSH_BOTH_CACHE    0x03
 155 #define EFI_SAL_FLUSH_MAKE_COHERENT 0x04
 156
 157 //
 158 // EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE
 159 //
 160 #define EFI_SAL_PCI_CONFIG_ONE_BYTE   0x1
 161 #define EFI_SAL_PCI_CONFIG_TWO_BYTES  0x2
 162 #define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4
 163
 164 typedef struct {
 165   UINT64  Register : 8;
 166   UINT64  Function : 3;
 167   UINT64  Device : 5;
 168   UINT64  Bus : 8;
 169   UINT64  Segment : 8;
 170   UINT64  Reserved : 32;
 171 } SAL_PCI_ADDRESS;
 172
 173 //
 174 // EFI_SAL_FREQ_BASE
 175 //
 176 #define EFI_SAL_CPU_INPUT_FREQ_BASE     0x0
 177 #define EFI_SAL_PLATFORM_IT_FREQ_BASE   0x1
 178 #define EFI_SAL_PLATFORM_RTC_FREQ_BASE  0x2
 179
 180 //
 181 // EFI_SAL_UPDATE_PAL
 182 //
 183 #define EFI_SAL_UPDATE_BAD_PAL_VERSION  ((UINT64) -1)
 184 #define EFI_SAL_UPDATE_PAL_AUTH_FAIL    ((UINT64) -2)
 185 #define EFI_SAL_UPDATE_PAL_BAD_TYPE     ((UINT64) -3)
 186 #define EFI_SAL_UPDATE_PAL_READONLY     ((UINT64) -4)
 187 #define EFI_SAL_UPDATE_PAL_WRITE_FAIL   ((UINT64) -10)
 188 #define EFI_SAL_UPDATE_PAL_ERASE_FAIL   ((UINT64) -11)
 189 #define EFI_SAL_UPDATE_PAL_READ_FAIL    ((UINT64) -12)
 190 #define EFI_SAL_UPDATE_PAL_CANT_FIT     ((UINT64) -13)
 191
 192 typedef struct {
 193   UINT32  Size;
 194   UINT32  MmddyyyyDate;
 195   UINT16  Version;
 196   UINT8   Type;
 197   UINT8   Reserved[5];
 198   UINT64  FwVendorId;
 199 } SAL_UPDATE_PAL_DATA_BLOCK;
 200
 201 typedef struct _SAL_UPDATE_PAL_INFO_BLOCK {
 202   struct _SAL_UPDATE_PAL_INFO_BLOCK *Next;
 203   struct SAL_UPDATE_PAL_DATA_BLOCK  *DataBlock;
 204   UINT8                             StoreChecksum;
 205   UINT8                             Reserved[15];
 206 } SAL_UPDATE_PAL_INFO_BLOCK;
 207
 208 //
 209 // SAL System Table Definitions
 210 //
 211 #pragma pack(1)
 212 typedef struct {
 213   UINT32  Signature;
 214   UINT32  Length;
 215   UINT16  SalRevision;
 216   UINT16  EntryCount;
 217   UINT8   CheckSum;
 218   UINT8   Reserved[7];
 219   UINT16  SalAVersion;
 220   UINT16  SalBVersion;
 221   UINT8   OemId[32];
 222   UINT8   ProductId[32];
 223   UINT8   Reserved2[8];
 224 } SAL_SYSTEM_TABLE_HEADER;
 225 #pragma pack()
 226
 227 #define EFI_SAL_ST_HEADER_SIGNATURE "SST_"
 228 #define EFI_SAL_REVISION            0x0300
 229 //
 230 // SAL System Types
 231 //
 232 #define EFI_SAL_ST_ENTRY_POINT        0
 233 #define EFI_SAL_ST_MEMORY_DESCRIPTOR  1
 234 #define EFI_SAL_ST_PLATFORM_FEATURES  2
 235 #define EFI_SAL_ST_TR_USAGE           3
 236 #define EFI_SAL_ST_PTC                4
 237 #define EFI_SAL_ST_AP_WAKEUP          5
 238
 239 #pragma pack(1)
 240 typedef struct {
 241   UINT8   Type; //  Type == 0
 242   UINT8   Reserved[7];
 243   UINT64  PalProcEntry;
 244   UINT64  SalProcEntry;
 245   UINT64  SalGlobalDataPointer;
 246   UINT64  Reserved2[2];
 247 } SAL_ST_ENTRY_POINT_DESCRIPTOR;
 248
 249 //
 250 // Not needed for Itanium-based OS boot
 251 //
 252 typedef struct {
 253   UINT8   Type; //  Type == 1
 254   UINT8   NeedVirtualRegistration;
 255   UINT8   MemoryAttributes;
 256   UINT8   PageAccessRights;
 257   UINT8   SupportedAttributes;
 258   UINT8   Reserved;
 259   UINT8   MemoryType;
 260   UINT8   MemoryUsage;
 261   UINT64  PhysicalMemoryAddress;
 262   UINT32  Length;
 263   UINT32  Reserved1;
 264   UINT64  OemReserved;
 265 } SAL_ST_MEMORY_DESCRIPTOR_ENTRY;
 266
 267 #pragma pack()
 268 //
 269 // Memory Attributes
 270 //
 271 #define SAL_MDT_ATTRIB_WB 0x00
 272 //
 273 // #define SAL_MDT_ATTRIB_UC   0x02
 274 //
 275 #define SAL_MDT_ATTRIB_UC   0x04
 276 #define SAL_MDT_ATTRIB_UCE  0x05
 277 #define SAL_MDT_ATTRIB_WC   0x06
 278
 279 //
 280 // Supported memory Attributes
 281 //
 282 #define SAL_MDT_SUPPORT_WB  0x1
 283 #define SAL_MDT_SUPPORT_UC  0x2
 284 #define SAL_MDT_SUPPORT_UCE 0x4
 285 #define SAL_MDT_SUPPORT_WC  0x8
 286
 287 //
 288 // Virtual address registration
 289 //
 290 #define SAL_MDT_NO_VA   0x00
 291 #define SAL_MDT_NEED_VA 0x01
 292 //
 293 // MemoryType info
 294 //
 295 #define SAL_REGULAR_MEMORY  0x0000
 296 #define SAL_MMIO_MAPPING    0x0001
 297 #define SAL_SAPIC_IPI_BLOCK 0x0002
 298 #define SAL_IO_PORT_MAPPING 0x0003
 299 #define SAL_FIRMWARE_MEMORY 0x0004
 300 #define SAL_BLACK_HOLE      0x000A
 301 //
 302 // Memory Usage info
 303 //
 304 #define SAL_MDT_USAGE_UNSPECIFIED 0x00
 305 #define SAL_PAL_CODE              0x01
 306 #define SAL_BOOTSERVICE_CODE      0x02
 307 #define SAL_BOOTSERVICE_DATA      0x03
 308 #define SAL_RUNTIMESERVICE_CODE   0x04
 309 #define SAL_RUNTIMESERVICE_DATA   0x05
 310 #define SAL_IA32_OPTIONROM        0x06
 311 #define SAL_IA32_SYSTEMROM        0x07
 312 #define SAL_PMI_CODE              0x0a
 313 #define SAL_PMI_DATA              0x0b
 314
 315 #pragma pack(1)
 316 typedef struct {
 317   UINT8 Type;                     // Type == 2
 318   UINT8 PlatformFeatures;
 319   UINT8 Reserved[14];
 320 } SAL_ST_PLATFORM_FEATURES;
 321 #pragma pack()
 322
 323 #define SAL_PLAT_FEAT_BUS_LOCK      0x01
 324 #define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02
 325 #define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04
 326
 327 #pragma pack(1)
 328 typedef struct {
 329   UINT8   Type;                   // Type == 3
 330   UINT8   TRType;
 331   UINT8   TRNumber;
 332   UINT8   Reserved[5];
 333   UINT64  VirtualAddress;
 334   UINT64  EncodedPageSize;
 335   UINT64  Reserved1;
 336 } SAL_ST_TR_DECRIPTOR;
 337 #pragma pack()
 338
 339 #define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00
 340 #define EFI_SAL_ST_TR_USAGE_DATA        01
 341
 342 #pragma pack(1)
 343 typedef struct {
 344   UINT64  NumberOfProcessors;
 345   UINT64  LocalIDRegister;
 346 } SAL_COHERENCE_DOMAIN_INFO;
 347 #pragma pack()
 348
 349 #pragma pack(1)
 350 typedef struct {
 351   UINT8                     Type; // Type == 4
 352   UINT8                     Reserved[3];
 353   UINT32                    NumberOfDomains;
 354   SAL_COHERENCE_DOMAIN_INFO *DomainInformation;
 355 } SAL_ST_CACHE_COHERENCE_DECRIPTOR;
 356 #pragma pack()
 357
 358 #pragma pack(1)
 359 typedef struct {
 360   UINT8   Type;                   // Type == 5
 361   UINT8   WakeUpType;
 362   UINT8   Reserved[6];
 363   UINT64  ExternalInterruptVector;
 364 } SAL_ST_AP_WAKEUP_DECRIPTOR;
 365 #pragma pack()
 366 //
 367 // FIT Entry
 368 //
 369 #define EFI_SAL_FIT_ENTRY_PTR   (0x100000000 - 32)  // 4GB - 24
 370 #define EFI_SAL_FIT_PALA_ENTRY  (0x100000000 - 48)  // 4GB - 32
 371 #define EFI_SAL_FIT_PALB_TYPE   01
 372
 373 typedef struct {
 374   UINT64  Address;
 375   UINT8   Size[3];
 376   UINT8   Reserved;
 377   UINT16  Revision;
 378   UINT8   Type : 7;
 379   UINT8   CheckSumValid : 1;
 380   UINT8   CheckSum;
 381 } EFI_SAL_FIT_ENTRY;
 382
 383 //
 384 //  SAL Common Record Header
 385 //
 386 typedef struct {
 387   UINT16  Length;
 388   UINT8   Data[1024];
 389 } SAL_OEM_DATA;
 390
 391 typedef struct {
 392   UINT8 Seconds;
 393   UINT8 Minutes;
 394   UINT8 Hours;
 395   UINT8 Reserved;
 396   UINT8 Day;
 397   UINT8 Month;
 398   UINT8 Year;
 399   UINT8 Century;
 400 } SAL_TIME_STAMP;
 401
 402 typedef struct {
 403   UINT64          RecordId;
 404   UINT16          Revision;
 405   UINT8           ErrorSeverity;
 406   UINT8           ValidationBits;
 407   UINT32          RecordLength;
 408   SAL_TIME_STAMP  TimeStamp;
 409   UINT8           OemPlatformId[16];
 410 } SAL_RECORD_HEADER;
 411
 412 typedef struct {
 413   GUID                  Guid;
 414   UINT16    Revision;
 415   UINT8     ErrorRecoveryInfo;
 416   UINT8     Reserved;
 417   UINT32    SectionLength;
 418 } SAL_SEC_HEADER;
 419
 420 //
 421 // SAL Processor Record
 422 //
 423 #define SAL_PROCESSOR_ERROR_RECORD_INFO \
 424   { \
 425     0xe429faf1, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 426   }
 427
 428 #define CHECK_INFO_VALID_BIT_MASK   0x1
 429 #define REQUESTOR_ID_VALID_BIT_MASK 0x2
 430 #define RESPONDER_ID_VALID_BIT_MASK 0x4
 431 #define TARGER_ID_VALID_BIT_MASK    0x8
 432 #define PRECISE_IP_VALID_BIT_MASK   0x10
 433
 434 typedef struct {
 435   UINT64  InfoValid : 1;
 436   UINT64  ReqValid : 1;
 437   UINT64  RespValid : 1;
 438   UINT64  TargetValid : 1;
 439   UINT64  IpValid : 1;
 440   UINT64  Reserved : 59;
 441   UINT64  Info;
 442   UINT64  Req;
 443   UINT64  Resp;
 444   UINT64  Target;
 445   UINT64  Ip;
 446 } MOD_ERROR_INFO;
 447
 448 typedef struct {
 449   UINT8 CpuidInfo[40];
 450   UINT8 Reserved;
 451 } CPUID_INFO;
 452
 453 typedef struct {
 454   UINT64  FrLow;
 455   UINT64  FrHigh;
 456 } FR_STRUCT;
 457
 458 #define MIN_STATE_VALID_BIT_MASK  0x1
 459 #define BR_VALID_BIT_MASK         0x2
 460 #define CR_VALID_BIT_MASK         0x4
 461 #define AR_VALID_BIT_MASK         0x8
 462 #define RR_VALID_BIT_MASK         0x10
 463 #define FR_VALID_BIT_MASK         0x20
 464
 465 typedef struct {
 466   UINT64    ValidFieldBits;
 467   UINT8     MinStateInfo[1024];
 468   UINT64    Br[8];
 469   UINT64    Cr[128];
 470   UINT64    Ar[128];
 471   UINT64    Rr[8];
 472   FR_STRUCT Fr[128];
 473 } PSI_STATIC_STRUCT;
 474
 475 #define PROC_ERROR_MAP_VALID_BIT_MASK       0x1
 476 #define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2
 477 #define PROC_CR_LID_VALID_BIT_MASK          0x4
 478 #define PROC_STATIC_STRUCT_VALID_BIT_MASK   0x8
 479 #define CPU_INFO_VALID_BIT_MASK             0x1000000
 480
 481 typedef struct {
 482   SAL_SEC_HEADER    SectionHeader;
 483   UINT64            ValidationBits;
 484   UINT64            ProcErrorMap;
 485   UINT64            ProcStateParameter;
 486   UINT64            ProcCrLid;
 487   MOD_ERROR_INFO    CacheError[15];
 488   MOD_ERROR_INFO    TlbError[15];
 489   MOD_ERROR_INFO    BusError[15];
 490   MOD_ERROR_INFO    RegFileCheck[15];
 491   MOD_ERROR_INFO    MsCheck[15];
 492   CPUID_INFO        CpuInfo;
 493   PSI_STATIC_STRUCT PsiValidData;
 494 } SAL_PROCESSOR_ERROR_RECORD;
 495
 496 //
 497 //  Sal Platform memory Error Record
 498 //
 499 #define SAL_MEMORY_ERROR_RECORD_INFO \
 500   { \
 501     0xe429faf2, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 502   }
 503
 504 #define MEMORY_ERROR_STATUS_VALID_BIT_MASK                0x1
 505 #define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK            0x2
 506 #define MEMORY_ADDR_BIT_MASK                              0x4
 507 #define MEMORY_NODE_VALID_BIT_MASK                        0x8
 508 #define MEMORY_CARD_VALID_BIT_MASK                        0x10
 509 #define MEMORY_MODULE_VALID_BIT_MASK                      0x20
 510 #define MEMORY_BANK_VALID_BIT_MASK                        0x40
 511 #define MEMORY_DEVICE_VALID_BIT_MASK                      0x80
 512 #define MEMORY_ROW_VALID_BIT_MASK                         0x100
 513 #define MEMORY_COLUMN_VALID_BIT_MASK                      0x200
 514 #define MEMORY_BIT_POSITION_VALID_BIT_MASK                0x400
 515 #define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK       0x800
 516 #define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK       0x1000
 517 #define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK             0x2000
 518 #define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK  0x4000
 519 #define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK             0x8000
 520 #define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK    0x10000
 521
 522 typedef struct {
 523   SAL_SEC_HEADER  SectionHeader;
 524   UINT64          ValidationBits;
 525   UINT64          MemErrorStatus;
 526   UINT64          MemPhysicalAddress;
 527   UINT64          MemPhysicalAddressMask;
 528   UINT16          MemNode;
 529   UINT16          MemCard;
 530   UINT16          MemModule;
 531   UINT16          MemBank;
 532   UINT16          MemDevice;
 533   UINT16          MemRow;
 534   UINT16          MemColumn;
 535   UINT16          MemBitPosition;
 536   UINT64          ModRequestorId;
 537   UINT64          ModResponderId;
 538   UINT64          ModTargetId;
 539   UINT64          BusSpecificData;
 540   UINT8           MemPlatformOemId[16];
 541 } SAL_MEMORY_ERROR_RECORD;
 542
 543 //
 544 //  PCI BUS Errors
 545 //
 546 #define SAL_PCI_BUS_ERROR_RECORD_INFO \
 547   { \
 548     0xe429faf4, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 549   }
 550
 551 #define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK     0x1
 552 #define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK       0x2
 553 #define PCI_BUS_ID_VALID_BIT_MASK               0x4
 554 #define PCI_BUS_ADDRESS_VALID_BIT_MASK          0x8
 555 #define PCI_BUS_DATA_VALID_BIT_MASK             0x10
 556 #define PCI_BUS_CMD_VALID_BIT_MASK              0x20
 557 #define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK     0x40
 558 #define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK     0x80
 559 #define PCI_BUS_TARGET_VALID_BIT_MASK           0x100
 560 #define PCI_BUS_OEM_ID_VALID_BIT_MASK           0x200
 561 #define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK  0x400
 562
 563 typedef struct {
 564   UINT8 BusNumber;
 565   UINT8 SegmentNumber;
 566 } PCI_BUS_ID;
 567
 568 typedef struct {
 569   SAL_SEC_HEADER  SectionHeader;
 570   UINT64          ValidationBits;
 571   UINT64          PciBusErrorStatus;
 572   UINT16          PciBusErrorType;
 573   PCI_BUS_ID      PciBusId;
 574   UINT32          Reserved;
 575   UINT64          PciBusAddress;
 576   UINT64          PciBusData;
 577   UINT64          PciBusCommand;
 578   UINT64          PciBusRequestorId;
 579   UINT64          PciBusResponderId;
 580   UINT64          PciBusTargetId;
 581   UINT8           PciBusOemId[16];
 582 } SAL_PCI_BUS_ERROR_RECORD;
 583
 584 //
 585 //  PCI Component Errors
 586 //
 587 #define SAL_PCI_COMP_ERROR_RECORD_INFO \
 588   { \
 589     0xe429faf6, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 590   }
 591
 592 #define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK    0x1
 593 #define PCI_COMP_INFO_VALID_BIT_MASK            0x2
 594 #define PCI_COMP_MEM_NUM_VALID_BIT_MASK         0x4
 595 #define PCI_COMP_IO_NUM_VALID_BIT_MASK          0x8
 596 #define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK   0x10
 597 #define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20
 598
 599 typedef struct {
 600   UINT16  VendorId;
 601   UINT16  DeviceId;
 602   UINT8   ClassCode[3];
 603   UINT8   FunctionNumber;
 604   UINT8   DeviceNumber;
 605   UINT8   BusNumber;
 606   UINT8   SegmentNumber;
 607   UINT8   Reserved[5];
 608 } PCI_COMP_INFO;
 609
 610 typedef struct {
 611   SAL_SEC_HEADER  SectionHeader;
 612   UINT64          ValidationBits;
 613   UINT64          PciComponentErrorStatus;
 614   PCI_COMP_INFO   PciComponentInfo;
 615   UINT32          PciComponentMemNum;
 616   UINT32          PciComponentIoNum;
 617   UINT8           PciBusOemId[16];
 618 } SAL_PCI_COMPONENT_ERROR_RECORD;
 619
 620 //
 621 //  Sal Device Errors Info.
 622 //
 623 #define SAL_DEVICE_ERROR_RECORD_INFO \
 624   { \
 625     0xe429faf3, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 626   }
 627
 628 #define SEL_RECORD_ID_VALID_BIT_MASK      0x1;
 629 #define SEL_RECORD_TYPE_VALID_BIT_MASK    0x2;
 630 #define SEL_GENERATOR_ID_VALID_BIT_MASK   0x4;
 631 #define SEL_EVM_REV_VALID_BIT_MASK        0x8;
 632 #define SEL_SENSOR_TYPE_VALID_BIT_MASK    0x10;
 633 #define SEL_SENSOR_NUM_VALID_BIT_MASK     0x20;
 634 #define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;
 635 #define SEL_EVENT_DATA1_VALID_BIT_MASK    0x80;
 636 #define SEL_EVENT_DATA2_VALID_BIT_MASK    0x100;
 637 #define SEL_EVENT_DATA3_VALID_BIT_MASK    0x200;
 638
 639 typedef struct {
 640   SAL_SEC_HEADER  SectionHeader;
 641   UINT64          ValidationBits;
 642   UINT16          SelRecordId;
 643   UINT8           SelRecordType;
 644   UINT32          TimeStamp;
 645   UINT16          GeneratorId;
 646   UINT8           EvmRevision;
 647   UINT8           SensorType;
 648   UINT8           SensorNum;
 649   UINT8           EventDirType;
 650   UINT8           Data1;
 651   UINT8           Data2;
 652   UINT8           Data3;
 653 } SAL_DEVICE_ERROR_RECORD;
 654
 655 //
 656 //  Sal SMBIOS Device Errors Info.
 657 //
 658 #define SAL_SMBIOS_ERROR_RECORD_INFO \
 659   { \
 660     0xe429faf5, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 661   }
 662
 663 #define SMBIOS_EVENT_TYPE_VALID_BIT_MASK  0x1
 664 #define SMBIOS_LENGTH_VALID_BIT_MASK      0x2
 665 #define SMBIOS_TIME_STAMP_VALID_BIT_MASK  0x4
 666 #define SMBIOS_DATA_VALID_BIT_MASK        0x8
 667
 668 typedef struct {
 669   SAL_SEC_HEADER  SectionHeader;
 670   UINT64          ValidationBits;
 671   UINT8           SmbiosEventType;
 672   UINT8           SmbiosLength;
 673   UINT8           SmbiosBcdTimeStamp[6];
 674 } SAL_SMBIOS_DEVICE_ERROR_RECORD;
 675
 676 //
 677 //  Sal Platform Specific Errors Info.
 678 //
 679 #define SAL_PLATFORM_ERROR_RECORD_INFO \
 680   { \
 681     0xe429faf7, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 682   }
 683
 684 #define PLATFORM_ERROR_STATUS_VALID_BIT_MASK    0x1
 685 #define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK    0x2
 686 #define PLATFORM_RESPONDER_ID_VALID_BIT_MASK    0x4
 687 #define PLATFORM_TARGET_VALID_BIT_MASK          0x8
 688 #define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK   0x10
 689 #define PLATFORM_OEM_ID_VALID_BIT_MASK          0x20
 690 #define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40
 691 #define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80
 692
 693 typedef struct {
 694   SAL_SEC_HEADER  SectionHeader;
 695   UINT64          ValidationBits;
 696   UINT64          PlatformErrorStatus;
 697   UINT64          PlatformRequestorId;
 698   UINT64          PlatformResponderId;
 699   UINT64          PlatformTargetId;
 700   UINT64          PlatformBusSpecificData;
 701   UINT8           OemComponentId[16];
 702 } SAL_PLATFORM_SPECIFIC_ERROR_RECORD;
 703
 704 //
 705 // Union of all the possible Sal Record Types
 706 //
 707 typedef union {
 708   SAL_RECORD_HEADER                   *RecordHeader;
 709   SAL_PROCESSOR_ERROR_RECORD          *SalProcessorRecord;
 710   SAL_PCI_BUS_ERROR_RECORD            *SalPciBusRecord;
 711   SAL_PCI_COMPONENT_ERROR_RECORD      *SalPciComponentRecord;
 712   SAL_DEVICE_ERROR_RECORD             *ImpiRecord;
 713   SAL_SMBIOS_DEVICE_ERROR_RECORD      *SmbiosRecord;
 714   SAL_PLATFORM_SPECIFIC_ERROR_RECORD  *PlatformRecord;
 715   SAL_MEMORY_ERROR_RECORD             *MemoryRecord;
 716   UINT8                               *Raw;
 717 } SAL_ERROR_RECORDS_POINTERS;
 718
 719 #pragma pack()
 720
 721 #endif