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1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture-specific functions.
4
5 Copyright (c) 2006 - 2008, Intel Corporation<BR>
6 Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
7 All rights reserved. This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef __BASE_LIB__
18 #define __BASE_LIB__
19
20 //
21 // Definitions for architecture-specific types
22 //
23 #if defined (MDE_CPU_IA32)
24 ///
25 /// IA-32 architecture context buffer used by SetJump() and LongJump()
26 ///
27 typedef struct {
28 UINT32 Ebx;
29 UINT32 Esi;
30 UINT32 Edi;
31 UINT32 Ebp;
32 UINT32 Esp;
33 UINT32 Eip;
34 } BASE_LIBRARY_JUMP_BUFFER;
35
36 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
37
38 #endif // defined (MDE_CPU_IA32)
39
40 #if defined (MDE_CPU_IPF)
41
42 ///
43 /// Itanium architecture context buffer used by SetJump() and LongJump()
44 ///
45 typedef struct {
46 UINT64 F2[2];
47 UINT64 F3[2];
48 UINT64 F4[2];
49 UINT64 F5[2];
50 UINT64 F16[2];
51 UINT64 F17[2];
52 UINT64 F18[2];
53 UINT64 F19[2];
54 UINT64 F20[2];
55 UINT64 F21[2];
56 UINT64 F22[2];
57 UINT64 F23[2];
58 UINT64 F24[2];
59 UINT64 F25[2];
60 UINT64 F26[2];
61 UINT64 F27[2];
62 UINT64 F28[2];
63 UINT64 F29[2];
64 UINT64 F30[2];
65 UINT64 F31[2];
66 UINT64 R4;
67 UINT64 R5;
68 UINT64 R6;
69 UINT64 R7;
70 UINT64 SP;
71 UINT64 BR0;
72 UINT64 BR1;
73 UINT64 BR2;
74 UINT64 BR3;
75 UINT64 BR4;
76 UINT64 BR5;
77 UINT64 InitialUNAT;
78 UINT64 AfterSpillUNAT;
79 UINT64 PFS;
80 UINT64 BSP;
81 UINT64 Predicates;
82 UINT64 LoopCount;
83 UINT64 FPSR;
84 } BASE_LIBRARY_JUMP_BUFFER;
85
86 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
87
88 #endif // defined (MDE_CPU_IPF)
89
90 #if defined (MDE_CPU_X64)
91 ///
92 /// x64 architecture context buffer used by SetJump() and LongJump()
93 ///
94 typedef struct {
95 UINT64 Rbx;
96 UINT64 Rsp;
97 UINT64 Rbp;
98 UINT64 Rdi;
99 UINT64 Rsi;
100 UINT64 R12;
101 UINT64 R13;
102 UINT64 R14;
103 UINT64 R15;
104 UINT64 Rip;
105 UINT64 MxCsr;
106 UINT8 XmmBuffer[160]; ///< XMM6-XMM15
107 } BASE_LIBRARY_JUMP_BUFFER;
108
109 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
110
111 #endif // defined (MDE_CPU_X64)
112
113 #if defined (MDE_CPU_EBC)
114 ///
115 /// EBC context buffer used by SetJump() and LongJump()
116 ///
117 typedef struct {
118 UINT64 R0;
119 UINT64 R1;
120 UINT64 R2;
121 UINT64 R3;
122 UINT64 IP;
123 } BASE_LIBRARY_JUMP_BUFFER;
124
125 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
126
127 #endif // defined (MDE_CPU_EBC)
128
129 #if defined (MDE_CPU_ARM)
130
131 typedef struct {
132 UINT32 R3; ///< Copy of R13
133 UINT32 R4;
134 UINT32 R5;
135 UINT32 R6;
136 UINT32 R7;
137 UINT32 R8;
138 UINT32 R9;
139 UINT32 R10;
140 UINT32 R11;
141 UINT32 R12;
142 UINT32 R14;
143 } BASE_LIBRARY_JUMP_BUFFER;
144
145 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
146
147 #endif // defined (MDE_CPU_ARM)
148
149 //
150 // String Services
151 //
152
153 /**
154 Copies one Null-terminated Unicode string to another Null-terminated Unicode
155 string and returns the new Unicode string.
156
157 This function copies the contents of the Unicode string Source to the Unicode
158 string Destination, and returns Destination. If Source and Destination
159 overlap, then the results are undefined.
160
161 If Destination is NULL, then ASSERT().
162 If Destination is not aligned on a 16-bit boundary, then ASSERT().
163 If Source is NULL, then ASSERT().
164 If Source is not aligned on a 16-bit boundary, then ASSERT().
165 If Source and Destination overlap, then ASSERT().
166 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
167 PcdMaximumUnicodeStringLength Unicode characters not including the
168 Null-terminator, then ASSERT().
169
170 @param Destination Pointer to a Null-terminated Unicode string.
171 @param Source Pointer to a Null-terminated Unicode string.
172
173 @return Destination.
174
175 **/
176 CHAR16 *
177 EFIAPI
178 StrCpy (
179 OUT CHAR16 *Destination,
180 IN CONST CHAR16 *Source
181 );
182
183
184 /**
185 Copies up to a specified length from one Null-terminated Unicode string to
186 another Null-terminated Unicode string and returns the new Unicode string.
187
188 This function copies the contents of the Unicode string Source to the Unicode
189 string Destination, and returns Destination. At most, Length Unicode
190 characters are copied from Source to Destination. If Length is 0, then
191 Destination is returned unmodified. If Length is greater that the number of
192 Unicode characters in Source, then Destination is padded with Null Unicode
193 characters. If Source and Destination overlap, then the results are
194 undefined.
195
196 If Length > 0 and Destination is NULL, then ASSERT().
197 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
198 If Length > 0 and Source is NULL, then ASSERT().
199 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
200 If Source and Destination overlap, then ASSERT().
201 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
202 PcdMaximumUnicodeStringLength, then ASSERT().
203 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
204 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
205 then ASSERT().
206
207 @param Destination Pointer to a Null-terminated Unicode string.
208 @param Source Pointer to a Null-terminated Unicode string.
209 @param Length Maximum number of Unicode characters to copy.
210
211 @return Destination.
212
213 **/
214 CHAR16 *
215 EFIAPI
216 StrnCpy (
217 OUT CHAR16 *Destination,
218 IN CONST CHAR16 *Source,
219 IN UINTN Length
220 );
221
222
223 /**
224 Returns the length of a Null-terminated Unicode string.
225
226 This function returns the number of Unicode characters in the Null-terminated
227 Unicode string specified by String.
228
229 If String is NULL, then ASSERT().
230 If String is not aligned on a 16-bit boundary, then ASSERT().
231 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
232 PcdMaximumUnicodeStringLength Unicode characters not including the
233 Null-terminator, then ASSERT().
234
235 @param String Pointer to a Null-terminated Unicode string.
236
237 @return The length of String.
238
239 **/
240 UINTN
241 EFIAPI
242 StrLen (
243 IN CONST CHAR16 *String
244 );
245
246
247 /**
248 Returns the size of a Null-terminated Unicode string in bytes, including the
249 Null terminator.
250
251 This function returns the size, in bytes, of the Null-terminated Unicode string
252 specified by String.
253
254 If String is NULL, then ASSERT().
255 If String is not aligned on a 16-bit boundary, then ASSERT().
256 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
257 PcdMaximumUnicodeStringLength Unicode characters not including the
258 Null-terminator, then ASSERT().
259
260 @param String Pointer to a Null-terminated Unicode string.
261
262 @return The size of String.
263
264 **/
265 UINTN
266 EFIAPI
267 StrSize (
268 IN CONST CHAR16 *String
269 );
270
271
272 /**
273 Compares two Null-terminated Unicode strings, and returns the difference
274 between the first mismatched Unicode characters.
275
276 This function compares the Null-terminated Unicode string FirstString to the
277 Null-terminated Unicode string SecondString. If FirstString is identical to
278 SecondString, then 0 is returned. Otherwise, the value returned is the first
279 mismatched Unicode character in SecondString subtracted from the first
280 mismatched Unicode character in FirstString.
281
282 If FirstString is NULL, then ASSERT().
283 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
284 If SecondString is NULL, then ASSERT().
285 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
286 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
287 than PcdMaximumUnicodeStringLength Unicode characters not including the
288 Null-terminator, then ASSERT().
289 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
290 than PcdMaximumUnicodeStringLength Unicode characters not including the
291 Null-terminator, then ASSERT().
292
293 @param FirstString Pointer to a Null-terminated Unicode string.
294 @param SecondString Pointer to a Null-terminated Unicode string.
295
296 @retval 0 FirstString is identical to SecondString.
297 @return others FirstString is not identical to SecondString.
298
299 **/
300 INTN
301 EFIAPI
302 StrCmp (
303 IN CONST CHAR16 *FirstString,
304 IN CONST CHAR16 *SecondString
305 );
306
307
308 /**
309 Compares up to a specified length the contents of two Null-terminated Unicode strings,
310 and returns the difference between the first mismatched Unicode characters.
311
312 This function compares the Null-terminated Unicode string FirstString to the
313 Null-terminated Unicode string SecondString. At most, Length Unicode
314 characters will be compared. If Length is 0, then 0 is returned. If
315 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
316 value returned is the first mismatched Unicode character in SecondString
317 subtracted from the first mismatched Unicode character in FirstString.
318
319 If Length > 0 and FirstString is NULL, then ASSERT().
320 If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().
321 If Length > 0 and SecondString is NULL, then ASSERT().
322 If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().
323 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
324 PcdMaximumUnicodeStringLength, then ASSERT().
325 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than
326 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
327 then ASSERT().
328 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than
329 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
330 then ASSERT().
331
332 @param FirstString Pointer to a Null-terminated Unicode string.
333 @param SecondString Pointer to a Null-terminated Unicode string.
334 @param Length Maximum number of Unicode characters to compare.
335
336 @retval 0 FirstString is identical to SecondString.
337 @return others FirstString is not identical to SecondString.
338
339 **/
340 INTN
341 EFIAPI
342 StrnCmp (
343 IN CONST CHAR16 *FirstString,
344 IN CONST CHAR16 *SecondString,
345 IN UINTN Length
346 );
347
348
349 /**
350 Concatenates one Null-terminated Unicode string to another Null-terminated
351 Unicode string, and returns the concatenated Unicode string.
352
353 This function concatenates two Null-terminated Unicode strings. The contents
354 of Null-terminated Unicode string Source are concatenated to the end of
355 Null-terminated Unicode string Destination. The Null-terminated concatenated
356 Unicode String is returned. If Source and Destination overlap, then the
357 results are undefined.
358
359 If Destination is NULL, then ASSERT().
360 If Destination is not aligned on a 16-bit boundary, then ASSERT().
361 If Source is NULL, then ASSERT().
362 If Source is not aligned on a 16-bit boundary, then ASSERT().
363 If Source and Destination overlap, then ASSERT().
364 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
365 than PcdMaximumUnicodeStringLength Unicode characters not including the
366 Null-terminator, then ASSERT().
367 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
368 PcdMaximumUnicodeStringLength Unicode characters not including the
369 Null-terminator, then ASSERT().
370 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
371 and Source results in a Unicode string with more than
372 PcdMaximumUnicodeStringLength Unicode characters not including the
373 Null-terminator, then ASSERT().
374
375 @param Destination Pointer to a Null-terminated Unicode string.
376 @param Source Pointer to a Null-terminated Unicode string.
377
378 @return Destination.
379
380 **/
381 CHAR16 *
382 EFIAPI
383 StrCat (
384 IN OUT CHAR16 *Destination,
385 IN CONST CHAR16 *Source
386 );
387
388
389 /**
390 Concatenates up to a specified length one Null-terminated Unicode to the end
391 of another Null-terminated Unicode string, and returns the concatenated
392 Unicode string.
393
394 This function concatenates two Null-terminated Unicode strings. The contents
395 of Null-terminated Unicode string Source are concatenated to the end of
396 Null-terminated Unicode string Destination, and Destination is returned. At
397 most, Length Unicode characters are concatenated from Source to the end of
398 Destination, and Destination is always Null-terminated. If Length is 0, then
399 Destination is returned unmodified. If Source and Destination overlap, then
400 the results are undefined.
401
402 If Destination is NULL, then ASSERT().
403 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
404 If Length > 0 and Source is NULL, then ASSERT().
405 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
406 If Source and Destination overlap, then ASSERT().
407 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
408 PcdMaximumUnicodeStringLength, then ASSERT().
409 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
410 than PcdMaximumUnicodeStringLength Unicode characters, not including the
411 Null-terminator, then ASSERT().
412 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
413 PcdMaximumUnicodeStringLength Unicode characters, not including the
414 Null-terminator, then ASSERT().
415 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
416 and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
417 Unicode characters, not including the Null-terminator, then ASSERT().
418
419 @param Destination Pointer to a Null-terminated Unicode string.
420 @param Source Pointer to a Null-terminated Unicode string.
421 @param Length Maximum number of Unicode characters to concatenate from
422 Source.
423
424 @return Destination.
425
426 **/
427 CHAR16 *
428 EFIAPI
429 StrnCat (
430 IN OUT CHAR16 *Destination,
431 IN CONST CHAR16 *Source,
432 IN UINTN Length
433 );
434
435 /**
436 Returns the first occurrence of a Null-terminated Unicode sub-string
437 in a Null-terminated Unicode string.
438
439 This function scans the contents of the Null-terminated Unicode string
440 specified by String and returns the first occurrence of SearchString.
441 If SearchString is not found in String, then NULL is returned. If
442 the length of SearchString is zero, then String is
443 returned.
444
445 If String is NULL, then ASSERT().
446 If String is not aligned on a 16-bit boundary, then ASSERT().
447 If SearchString is NULL, then ASSERT().
448 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
449
450 If PcdMaximumUnicodeStringLength is not zero, and SearchString
451 or String contains more than PcdMaximumUnicodeStringLength Unicode
452 characters not including the Null-terminator, then ASSERT().
453
454 @param String Pointer to a Null-terminated Unicode string.
455 @param SearchString Pointer to a Null-terminated Unicode string to search for.
456
457 @retval NULL If the SearchString does not appear in String.
458 @return others If there is a match.
459
460 **/
461 CHAR16 *
462 EFIAPI
463 StrStr (
464 IN CONST CHAR16 *String,
465 IN CONST CHAR16 *SearchString
466 );
467
468 /**
469 Convert a Null-terminated Unicode decimal string to a value of
470 type UINTN.
471
472 This function returns a value of type UINTN by interpreting the contents
473 of the Unicode string specified by String as a decimal number. The format
474 of the input Unicode string String is:
475
476 [spaces] [decimal digits].
477
478 The valid decimal digit character is in the range [0-9]. The
479 function will ignore the pad space, which includes spaces or
480 tab characters, before [decimal digits]. The running zero in the
481 beginning of [decimal digits] will be ignored. Then, the function
482 stops at the first character that is a not a valid decimal character
483 or a Null-terminator, whichever one comes first.
484
485 If String is NULL, then ASSERT().
486 If String is not aligned in a 16-bit boundary, then ASSERT().
487 If String has only pad spaces, then 0 is returned.
488 If String has no pad spaces or valid decimal digits,
489 then 0 is returned.
490 If the number represented by String overflows according
491 to the range defined by UINTN, then ASSERT().
492
493 If PcdMaximumUnicodeStringLength is not zero, and String contains
494 more than PcdMaximumUnicodeStringLength Unicode characters not including
495 the Null-terminator, then ASSERT().
496
497 @param String Pointer to a Null-terminated Unicode string.
498
499 @retval Value translated from String.
500
501 **/
502 UINTN
503 EFIAPI
504 StrDecimalToUintn (
505 IN CONST CHAR16 *String
506 );
507
508 /**
509 Convert a Null-terminated Unicode decimal string to a value of
510 type UINT64.
511
512 This function returns a value of type UINT64 by interpreting the contents
513 of the Unicode string specified by String as a decimal number. The format
514 of the input Unicode string String is:
515
516 [spaces] [decimal digits].
517
518 The valid decimal digit character is in the range [0-9]. The
519 function will ignore the pad space, which includes spaces or
520 tab characters, before [decimal digits]. The running zero in the
521 beginning of [decimal digits] will be ignored. Then, the function
522 stops at the first character that is a not a valid decimal character
523 or a Null-terminator, whichever one comes first.
524
525 If String is NULL, then ASSERT().
526 If String is not aligned in a 16-bit boundary, then ASSERT().
527 If String has only pad spaces, then 0 is returned.
528 If String has no pad spaces or valid decimal digits,
529 then 0 is returned.
530 If the number represented by String overflows according
531 to the range defined by UINT64, then ASSERT().
532
533 If PcdMaximumUnicodeStringLength is not zero, and String contains
534 more than PcdMaximumUnicodeStringLength Unicode characters not including
535 the Null-terminator, then ASSERT().
536
537 @param String Pointer to a Null-terminated Unicode string.
538
539 @retval Value translated from String.
540
541 **/
542 UINT64
543 EFIAPI
544 StrDecimalToUint64 (
545 IN CONST CHAR16 *String
546 );
547
548
549 /**
550 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
551
552 This function returns a value of type UINTN by interpreting the contents
553 of the Unicode string specified by String as a hexadecimal number.
554 The format of the input Unicode string String is:
555
556 [spaces][zeros][x][hexadecimal digits].
557
558 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
559 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
560 If "x" appears in the input string, it must be prefixed with at least one 0.
561 The function will ignore the pad space, which includes spaces or tab characters,
562 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
563 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
564 first valid hexadecimal digit. Then, the function stops at the first character that is
565 a not a valid hexadecimal character or NULL, whichever one comes first.
566
567 If String is NULL, then ASSERT().
568 If String is not aligned in a 16-bit boundary, then ASSERT().
569 If String has only pad spaces, then zero is returned.
570 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
571 then zero is returned.
572 If the number represented by String overflows according to the range defined by
573 UINTN, then ASSERT().
574
575 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
576 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
577 then ASSERT().
578
579 @param String Pointer to a Null-terminated Unicode string.
580
581 @retval Value translated from String.
582
583 **/
584 UINTN
585 EFIAPI
586 StrHexToUintn (
587 IN CONST CHAR16 *String
588 );
589
590
591 /**
592 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
593
594 This function returns a value of type UINT64 by interpreting the contents
595 of the Unicode string specified by String as a hexadecimal number.
596 The format of the input Unicode string String is
597
598 [spaces][zeros][x][hexadecimal digits].
599
600 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
601 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
602 If "x" appears in the input string, it must be prefixed with at least one 0.
603 The function will ignore the pad space, which includes spaces or tab characters,
604 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
605 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
606 first valid hexadecimal digit. Then, the function stops at the first character that is
607 a not a valid hexadecimal character or NULL, whichever one comes first.
608
609 If String is NULL, then ASSERT().
610 If String is not aligned in a 16-bit boundary, then ASSERT().
611 If String has only pad spaces, then zero is returned.
612 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
613 then zero is returned.
614 If the number represented by String overflows according to the range defined by
615 UINT64, then ASSERT().
616
617 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
618 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
619 then ASSERT().
620
621 @param String Pointer to a Null-terminated Unicode string.
622
623 @retval Value translated from String.
624
625 **/
626 UINT64
627 EFIAPI
628 StrHexToUint64 (
629 IN CONST CHAR16 *String
630 );
631
632 /**
633 Convert a Null-terminated Unicode string to a Null-terminated
634 ASCII string and returns the ASCII string.
635
636 This function converts the content of the Unicode string Source
637 to the ASCII string Destination by copying the lower 8 bits of
638 each Unicode character. It returns Destination.
639
640 If any Unicode characters in Source contain non-zero value in
641 the upper 8 bits, then ASSERT().
642
643 If Destination is NULL, then ASSERT().
644 If Source is NULL, then ASSERT().
645 If Source is not aligned on a 16-bit boundary, then ASSERT().
646 If Source and Destination overlap, then ASSERT().
647
648 If PcdMaximumUnicodeStringLength is not zero, and Source contains
649 more than PcdMaximumUnicodeStringLength Unicode characters not including
650 the Null-terminator, then ASSERT().
651
652 If PcdMaximumAsciiStringLength is not zero, and Source contains more
653 than PcdMaximumAsciiStringLength Unicode characters not including the
654 Null-terminator, then ASSERT().
655
656 @param Source Pointer to a Null-terminated Unicode string.
657 @param Destination Pointer to a Null-terminated ASCII string.
658
659 @return Destination.
660
661 **/
662 CHAR8 *
663 EFIAPI
664 UnicodeStrToAsciiStr (
665 IN CONST CHAR16 *Source,
666 OUT CHAR8 *Destination
667 );
668
669
670 /**
671 Copies one Null-terminated ASCII string to another Null-terminated ASCII
672 string and returns the new ASCII string.
673
674 This function copies the contents of the ASCII string Source to the ASCII
675 string Destination, and returns Destination. If Source and Destination
676 overlap, then the results are undefined.
677
678 If Destination is NULL, then ASSERT().
679 If Source is NULL, then ASSERT().
680 If Source and Destination overlap, then ASSERT().
681 If PcdMaximumAsciiStringLength is not zero and Source contains more than
682 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
683 then ASSERT().
684
685 @param Destination Pointer to a Null-terminated ASCII string.
686 @param Source Pointer to a Null-terminated ASCII string.
687
688 @return Destination
689
690 **/
691 CHAR8 *
692 EFIAPI
693 AsciiStrCpy (
694 OUT CHAR8 *Destination,
695 IN CONST CHAR8 *Source
696 );
697
698
699 /**
700 Copies up to a specified length one Null-terminated ASCII string to another
701 Null-terminated ASCII string and returns the new ASCII string.
702
703 This function copies the contents of the ASCII string Source to the ASCII
704 string Destination, and returns Destination. At most, Length ASCII characters
705 are copied from Source to Destination. If Length is 0, then Destination is
706 returned unmodified. If Length is greater that the number of ASCII characters
707 in Source, then Destination is padded with Null ASCII characters. If Source
708 and Destination overlap, then the results are undefined.
709
710 If Destination is NULL, then ASSERT().
711 If Source is NULL, then ASSERT().
712 If Source and Destination overlap, then ASSERT().
713 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
714 PcdMaximumAsciiStringLength, then ASSERT().
715 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
716 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
717 then ASSERT().
718
719 @param Destination Pointer to a Null-terminated ASCII string.
720 @param Source Pointer to a Null-terminated ASCII string.
721 @param Length Maximum number of ASCII characters to copy.
722
723 @return Destination
724
725 **/
726 CHAR8 *
727 EFIAPI
728 AsciiStrnCpy (
729 OUT CHAR8 *Destination,
730 IN CONST CHAR8 *Source,
731 IN UINTN Length
732 );
733
734
735 /**
736 Returns the length of a Null-terminated ASCII string.
737
738 This function returns the number of ASCII characters in the Null-terminated
739 ASCII string specified by String.
740
741 If Length > 0 and Destination is NULL, then ASSERT().
742 If Length > 0 and Source is NULL, then ASSERT().
743 If PcdMaximumAsciiStringLength is not zero and String contains more than
744 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
745 then ASSERT().
746
747 @param String Pointer to a Null-terminated ASCII string.
748
749 @return The length of String.
750
751 **/
752 UINTN
753 EFIAPI
754 AsciiStrLen (
755 IN CONST CHAR8 *String
756 );
757
758
759 /**
760 Returns the size of a Null-terminated ASCII string in bytes, including the
761 Null terminator.
762
763 This function returns the size, in bytes, of the Null-terminated ASCII string
764 specified by String.
765
766 If String is NULL, then ASSERT().
767 If PcdMaximumAsciiStringLength is not zero and String contains more than
768 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
769 then ASSERT().
770
771 @param String Pointer to a Null-terminated ASCII string.
772
773 @return The size of String.
774
775 **/
776 UINTN
777 EFIAPI
778 AsciiStrSize (
779 IN CONST CHAR8 *String
780 );
781
782
783 /**
784 Compares two Null-terminated ASCII strings, and returns the difference
785 between the first mismatched ASCII characters.
786
787 This function compares the Null-terminated ASCII string FirstString to the
788 Null-terminated ASCII string SecondString. If FirstString is identical to
789 SecondString, then 0 is returned. Otherwise, the value returned is the first
790 mismatched ASCII character in SecondString subtracted from the first
791 mismatched ASCII character in FirstString.
792
793 If FirstString is NULL, then ASSERT().
794 If SecondString is NULL, then ASSERT().
795 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
796 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
797 then ASSERT().
798 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
799 than PcdMaximumAsciiStringLength ASCII characters not including the
800 Null-terminator, then ASSERT().
801
802 @param FirstString Pointer to a Null-terminated ASCII string.
803 @param SecondString Pointer to a Null-terminated ASCII string.
804
805 @retval ==0 FirstString is identical to SecondString.
806 @retval !=0 FirstString is not identical to SecondString.
807
808 **/
809 INTN
810 EFIAPI
811 AsciiStrCmp (
812 IN CONST CHAR8 *FirstString,
813 IN CONST CHAR8 *SecondString
814 );
815
816
817 /**
818 Performs a case insensitive comparison of two Null-terminated ASCII strings,
819 and returns the difference between the first mismatched ASCII characters.
820
821 This function performs a case insensitive comparison of the Null-terminated
822 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
823 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
824 value returned is the first mismatched lower case ASCII character in
825 SecondString subtracted from the first mismatched lower case ASCII character
826 in FirstString.
827
828 If FirstString is NULL, then ASSERT().
829 If SecondString is NULL, then ASSERT().
830 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
831 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
832 then ASSERT().
833 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
834 than PcdMaximumAsciiStringLength ASCII characters not including the
835 Null-terminator, then ASSERT().
836
837 @param FirstString Pointer to a Null-terminated ASCII string.
838 @param SecondString Pointer to a Null-terminated ASCII string.
839
840 @retval ==0 FirstString is identical to SecondString using case insensitive
841 comparisons.
842 @retval !=0 FirstString is not identical to SecondString using case
843 insensitive comparisons.
844
845 **/
846 INTN
847 EFIAPI
848 AsciiStriCmp (
849 IN CONST CHAR8 *FirstString,
850 IN CONST CHAR8 *SecondString
851 );
852
853
854 /**
855 Compares two Null-terminated ASCII strings with maximum lengths, and returns
856 the difference between the first mismatched ASCII characters.
857
858 This function compares the Null-terminated ASCII string FirstString to the
859 Null-terminated ASCII string SecondString. At most, Length ASCII characters
860 will be compared. If Length is 0, then 0 is returned. If FirstString is
861 identical to SecondString, then 0 is returned. Otherwise, the value returned
862 is the first mismatched ASCII character in SecondString subtracted from the
863 first mismatched ASCII character in FirstString.
864
865 If Length > 0 and FirstString is NULL, then ASSERT().
866 If Length > 0 and SecondString is NULL, then ASSERT().
867 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
868 PcdMaximumAsciiStringLength, then ASSERT().
869 If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than
870 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
871 then ASSERT().
872 If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than
873 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
874 then ASSERT().
875
876 @param FirstString Pointer to a Null-terminated ASCII string.
877 @param SecondString Pointer to a Null-terminated ASCII string.
878 @param Length Maximum number of ASCII characters for compare.
879
880 @retval ==0 FirstString is identical to SecondString.
881 @retval !=0 FirstString is not identical to SecondString.
882
883 **/
884 INTN
885 EFIAPI
886 AsciiStrnCmp (
887 IN CONST CHAR8 *FirstString,
888 IN CONST CHAR8 *SecondString,
889 IN UINTN Length
890 );
891
892
893 /**
894 Concatenates one Null-terminated ASCII string to another Null-terminated
895 ASCII string, and returns the concatenated ASCII string.
896
897 This function concatenates two Null-terminated ASCII strings. The contents of
898 Null-terminated ASCII string Source are concatenated to the end of Null-
899 terminated ASCII string Destination. The Null-terminated concatenated ASCII
900 String is returned.
901
902 If Destination is NULL, then ASSERT().
903 If Source is NULL, then ASSERT().
904 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
905 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
906 then ASSERT().
907 If PcdMaximumAsciiStringLength is not zero and Source contains more than
908 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
909 then ASSERT().
910 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
911 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
912 ASCII characters, then ASSERT().
913
914 @param Destination Pointer to a Null-terminated ASCII string.
915 @param Source Pointer to a Null-terminated ASCII string.
916
917 @return Destination
918
919 **/
920 CHAR8 *
921 EFIAPI
922 AsciiStrCat (
923 IN OUT CHAR8 *Destination,
924 IN CONST CHAR8 *Source
925 );
926
927
928 /**
929 Concatenates up to a specified length one Null-terminated ASCII string to
930 the end of another Null-terminated ASCII string, and returns the
931 concatenated ASCII string.
932
933 This function concatenates two Null-terminated ASCII strings. The contents
934 of Null-terminated ASCII string Source are concatenated to the end of Null-
935 terminated ASCII string Destination, and Destination is returned. At most,
936 Length ASCII characters are concatenated from Source to the end of
937 Destination, and Destination is always Null-terminated. If Length is 0, then
938 Destination is returned unmodified. If Source and Destination overlap, then
939 the results are undefined.
940
941 If Length > 0 and Destination is NULL, then ASSERT().
942 If Length > 0 and Source is NULL, then ASSERT().
943 If Source and Destination overlap, then ASSERT().
944 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
945 PcdMaximumAsciiStringLength, then ASSERT().
946 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
947 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
948 then ASSERT().
949 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
950 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
951 then ASSERT().
952 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
953 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
954 ASCII characters, not including the Null-terminator, then ASSERT().
955
956 @param Destination Pointer to a Null-terminated ASCII string.
957 @param Source Pointer to a Null-terminated ASCII string.
958 @param Length Maximum number of ASCII characters to concatenate from
959 Source.
960
961 @return Destination
962
963 **/
964 CHAR8 *
965 EFIAPI
966 AsciiStrnCat (
967 IN OUT CHAR8 *Destination,
968 IN CONST CHAR8 *Source,
969 IN UINTN Length
970 );
971
972
973 /**
974 Returns the first occurrence of a Null-terminated ASCII sub-string
975 in a Null-terminated ASCII string.
976
977 This function scans the contents of the ASCII string specified by String
978 and returns the first occurrence of SearchString. If SearchString is not
979 found in String, then NULL is returned. If the length of SearchString is zero,
980 then String is returned.
981
982 If String is NULL, then ASSERT().
983 If SearchString is NULL, then ASSERT().
984
985 If PcdMaximumAsciiStringLength is not zero, and SearchString or
986 String contains more than PcdMaximumAsciiStringLength Unicode characters
987 not including the Null-terminator, then ASSERT().
988
989 @param String Pointer to a Null-terminated ASCII string.
990 @param SearchString Pointer to a Null-terminated ASCII string to search for.
991
992 @retval NULL If the SearchString does not appear in String.
993 @retval others If there is a match return the first occurrence of SearchingString.
994 If the length of SearchString is zero,return String.
995
996 **/
997 CHAR8 *
998 EFIAPI
999 AsciiStrStr (
1000 IN CONST CHAR8 *String,
1001 IN CONST CHAR8 *SearchString
1002 );
1003
1004
1005 /**
1006 Convert a Null-terminated ASCII decimal string to a value of type
1007 UINTN.
1008
1009 This function returns a value of type UINTN by interpreting the contents
1010 of the ASCII string String as a decimal number. The format of the input
1011 ASCII string String is:
1012
1013 [spaces] [decimal digits].
1014
1015 The valid decimal digit character is in the range [0-9]. The function will
1016 ignore the pad space, which includes spaces or tab characters, before the digits.
1017 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1018 function stops at the first character that is a not a valid decimal character or
1019 Null-terminator, whichever on comes first.
1020
1021 If String has only pad spaces, then 0 is returned.
1022 If String has no pad spaces or valid decimal digits, then 0 is returned.
1023 If the number represented by String overflows according to the range defined by
1024 UINTN, then ASSERT().
1025 If String is NULL, then ASSERT().
1026 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1027 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1028 then ASSERT().
1029
1030 @param String Pointer to a Null-terminated ASCII string.
1031
1032 @retval Value translated from String.
1033
1034 **/
1035 UINTN
1036 EFIAPI
1037 AsciiStrDecimalToUintn (
1038 IN CONST CHAR8 *String
1039 );
1040
1041
1042 /**
1043 Convert a Null-terminated ASCII decimal string to a value of type
1044 UINT64.
1045
1046 This function returns a value of type UINT64 by interpreting the contents
1047 of the ASCII string String as a decimal number. The format of the input
1048 ASCII string String is:
1049
1050 [spaces] [decimal digits].
1051
1052 The valid decimal digit character is in the range [0-9]. The function will
1053 ignore the pad space, which includes spaces or tab characters, before the digits.
1054 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1055 function stops at the first character that is a not a valid decimal character or
1056 Null-terminator, whichever on comes first.
1057
1058 If String has only pad spaces, then 0 is returned.
1059 If String has no pad spaces or valid decimal digits, then 0 is returned.
1060 If the number represented by String overflows according to the range defined by
1061 UINT64, then ASSERT().
1062 If String is NULL, then ASSERT().
1063 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1064 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1065 then ASSERT().
1066
1067 @param String Pointer to a Null-terminated ASCII string.
1068
1069 @retval Value translated from String.
1070
1071 **/
1072 UINT64
1073 EFIAPI
1074 AsciiStrDecimalToUint64 (
1075 IN CONST CHAR8 *String
1076 );
1077
1078
1079 /**
1080 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1081
1082 This function returns a value of type UINTN by interpreting the contents of
1083 the ASCII string String as a hexadecimal number. The format of the input ASCII
1084 string String is:
1085
1086 [spaces][zeros][x][hexadecimal digits].
1087
1088 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1089 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1090 appears in the input string, it must be prefixed with at least one 0. The function
1091 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1092 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1093 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1094 digit. Then, the function stops at the first character that is a not a valid
1095 hexadecimal character or Null-terminator, whichever on comes first.
1096
1097 If String has only pad spaces, then 0 is returned.
1098 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1099 0 is returned.
1100
1101 If the number represented by String overflows according to the range defined by UINTN,
1102 then ASSERT().
1103 If String is NULL, then ASSERT().
1104 If PcdMaximumAsciiStringLength is not zero,
1105 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1106 the Null-terminator, then ASSERT().
1107
1108 @param String Pointer to a Null-terminated ASCII string.
1109
1110 @retval Value translated from String.
1111
1112 **/
1113 UINTN
1114 EFIAPI
1115 AsciiStrHexToUintn (
1116 IN CONST CHAR8 *String
1117 );
1118
1119
1120 /**
1121 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1122
1123 This function returns a value of type UINT64 by interpreting the contents of
1124 the ASCII string String as a hexadecimal number. The format of the input ASCII
1125 string String is:
1126
1127 [spaces][zeros][x][hexadecimal digits].
1128
1129 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1130 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1131 appears in the input string, it must be prefixed with at least one 0. The function
1132 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1133 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1134 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1135 digit. Then, the function stops at the first character that is a not a valid
1136 hexadecimal character or Null-terminator, whichever on comes first.
1137
1138 If String has only pad spaces, then 0 is returned.
1139 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1140 0 is returned.
1141
1142 If the number represented by String overflows according to the range defined by UINT64,
1143 then ASSERT().
1144 If String is NULL, then ASSERT().
1145 If PcdMaximumAsciiStringLength is not zero,
1146 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1147 the Null-terminator, then ASSERT().
1148
1149 @param String Pointer to a Null-terminated ASCII string.
1150
1151 @retval Value translated from String.
1152
1153 **/
1154 UINT64
1155 EFIAPI
1156 AsciiStrHexToUint64 (
1157 IN CONST CHAR8 *String
1158 );
1159
1160
1161 /**
1162 Convert one Null-terminated ASCII string to a Null-terminated
1163 Unicode string and returns the Unicode string.
1164
1165 This function converts the contents of the ASCII string Source to the Unicode
1166 string Destination, and returns Destination. The function terminates the
1167 Unicode string Destination by appending a Null-terminator character at the end.
1168 The caller is responsible to make sure Destination points to a buffer with size
1169 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1170
1171 If Destination is NULL, then ASSERT().
1172 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1173 If Source is NULL, then ASSERT().
1174 If Source and Destination overlap, then ASSERT().
1175 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1176 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1177 then ASSERT().
1178 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1179 PcdMaximumUnicodeStringLength ASCII characters not including the
1180 Null-terminator, then ASSERT().
1181
1182 @param Source Pointer to a Null-terminated ASCII string.
1183 @param Destination Pointer to a Null-terminated Unicode string.
1184
1185 @return Destination.
1186
1187 **/
1188 CHAR16 *
1189 EFIAPI
1190 AsciiStrToUnicodeStr (
1191 IN CONST CHAR8 *Source,
1192 OUT CHAR16 *Destination
1193 );
1194
1195
1196 /**
1197 Converts an 8-bit value to an 8-bit BCD value.
1198
1199 Converts the 8-bit value specified by Value to BCD. The BCD value is
1200 returned.
1201
1202 If Value >= 100, then ASSERT().
1203
1204 @param Value The 8-bit value to convert to BCD. Range 0..99.
1205
1206 @return The BCD value.
1207
1208 **/
1209 UINT8
1210 EFIAPI
1211 DecimalToBcd8 (
1212 IN UINT8 Value
1213 );
1214
1215
1216 /**
1217 Converts an 8-bit BCD value to an 8-bit value.
1218
1219 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1220 value is returned.
1221
1222 If Value >= 0xA0, then ASSERT().
1223 If (Value & 0x0F) >= 0x0A, then ASSERT().
1224
1225 @param Value The 8-bit BCD value to convert to an 8-bit value.
1226
1227 @return The 8-bit value is returned.
1228
1229 **/
1230 UINT8
1231 EFIAPI
1232 BcdToDecimal8 (
1233 IN UINT8 Value
1234 );
1235
1236
1237 //
1238 // Linked List Functions and Macros
1239 //
1240
1241 /**
1242 Initializes the head node of a doubly linked list that is declared as a
1243 global variable in a module.
1244
1245 Initializes the forward and backward links of a new linked list. After
1246 initializing a linked list with this macro, the other linked list functions
1247 may be used to add and remove nodes from the linked list. This macro results
1248 in smaller executables by initializing the linked list in the data section,
1249 instead if calling the InitializeListHead() function to perform the
1250 equivalent operation.
1251
1252 @param ListHead The head note of a list to initialize.
1253
1254 **/
1255 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1256
1257
1258 /**
1259 Initializes the head node of a doubly linked list, and returns the pointer to
1260 the head node of the doubly linked list.
1261
1262 Initializes the forward and backward links of a new linked list. After
1263 initializing a linked list with this function, the other linked list
1264 functions may be used to add and remove nodes from the linked list. It is up
1265 to the caller of this function to allocate the memory for ListHead.
1266
1267 If ListHead is NULL, then ASSERT().
1268
1269 @param ListHead A pointer to the head node of a new doubly linked list.
1270
1271 @return ListHead
1272
1273 **/
1274 LIST_ENTRY *
1275 EFIAPI
1276 InitializeListHead (
1277 IN OUT LIST_ENTRY *ListHead
1278 );
1279
1280
1281 /**
1282 Adds a node to the beginning of a doubly linked list, and returns the pointer
1283 to the head node of the doubly linked list.
1284
1285 Adds the node Entry at the beginning of the doubly linked list denoted by
1286 ListHead, and returns ListHead.
1287
1288 If ListHead is NULL, then ASSERT().
1289 If Entry is NULL, then ASSERT().
1290 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1291 InitializeListHead(), then ASSERT().
1292 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1293 of nodes in ListHead, including the ListHead node, is greater than or
1294 equal to PcdMaximumLinkedListLength, then ASSERT().
1295
1296 @param ListHead A pointer to the head node of a doubly linked list.
1297 @param Entry A pointer to a node that is to be inserted at the beginning
1298 of a doubly linked list.
1299
1300 @return ListHead
1301
1302 **/
1303 LIST_ENTRY *
1304 EFIAPI
1305 InsertHeadList (
1306 IN OUT LIST_ENTRY *ListHead,
1307 IN OUT LIST_ENTRY *Entry
1308 );
1309
1310
1311 /**
1312 Adds a node to the end of a doubly linked list, and returns the pointer to
1313 the head node of the doubly linked list.
1314
1315 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1316 and returns ListHead.
1317
1318 If ListHead is NULL, then ASSERT().
1319 If Entry is NULL, then ASSERT().
1320 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1321 InitializeListHead(), then ASSERT().
1322 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1323 of nodes in ListHead, including the ListHead node, is greater than or
1324 equal to PcdMaximumLinkedListLength, then ASSERT().
1325
1326 @param ListHead A pointer to the head node of a doubly linked list.
1327 @param Entry A pointer to a node that is to be added at the end of the
1328 doubly linked list.
1329
1330 @return ListHead
1331
1332 **/
1333 LIST_ENTRY *
1334 EFIAPI
1335 InsertTailList (
1336 IN OUT LIST_ENTRY *ListHead,
1337 IN OUT LIST_ENTRY *Entry
1338 );
1339
1340
1341 /**
1342 Retrieves the first node of a doubly linked list.
1343
1344 Returns the first node of a doubly linked list. List must have been
1345 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1346 If List is empty, then List is returned.
1347
1348 If List is NULL, then ASSERT().
1349 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1350 InitializeListHead(), then ASSERT().
1351 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1352 in List, including the List node, is greater than or equal to
1353 PcdMaximumLinkedListLength, then ASSERT().
1354
1355 @param List A pointer to the head node of a doubly linked list.
1356
1357 @return The first node of a doubly linked list.
1358 @retval NULL The list is empty.
1359
1360 **/
1361 LIST_ENTRY *
1362 EFIAPI
1363 GetFirstNode (
1364 IN CONST LIST_ENTRY *List
1365 );
1366
1367
1368 /**
1369 Retrieves the next node of a doubly linked list.
1370
1371 Returns the node of a doubly linked list that follows Node.
1372 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1373 or InitializeListHead(). If List is empty, then List is returned.
1374
1375 If List is NULL, then ASSERT().
1376 If Node is NULL, then ASSERT().
1377 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1378 InitializeListHead(), then ASSERT().
1379 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1380 PcdMaximumLinkedListLenth nodes, then ASSERT().
1381 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1382
1383 @param List A pointer to the head node of a doubly linked list.
1384 @param Node A pointer to a node in the doubly linked list.
1385
1386 @return Pointer to the next node if one exists. Otherwise a null value which
1387 is actually List is returned.
1388
1389 **/
1390 LIST_ENTRY *
1391 EFIAPI
1392 GetNextNode (
1393 IN CONST LIST_ENTRY *List,
1394 IN CONST LIST_ENTRY *Node
1395 );
1396
1397
1398 /**
1399 Checks to see if a doubly linked list is empty or not.
1400
1401 Checks to see if the doubly linked list is empty. If the linked list contains
1402 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1403
1404 If ListHead is NULL, then ASSERT().
1405 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1406 InitializeListHead(), then ASSERT().
1407 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1408 in List, including the List node, is greater than or equal to
1409 PcdMaximumLinkedListLength, then ASSERT().
1410
1411 @param ListHead A pointer to the head node of a doubly linked list.
1412
1413 @retval TRUE The linked list is empty.
1414 @retval FALSE The linked list is not empty.
1415
1416 **/
1417 BOOLEAN
1418 EFIAPI
1419 IsListEmpty (
1420 IN CONST LIST_ENTRY *ListHead
1421 );
1422
1423
1424 /**
1425 Determines if a node in a doubly linked list is the head node of a the same
1426 doubly linked list. This function is typically used to terminate a loop that
1427 traverses all the nodes in a doubly linked list starting with the head node.
1428
1429 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1430 nodes in the doubly linked list specified by List. List must have been
1431 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1432
1433 If List is NULL, then ASSERT().
1434 If Node is NULL, then ASSERT().
1435 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1436 then ASSERT().
1437 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1438 in List, including the List node, is greater than or equal to
1439 PcdMaximumLinkedListLength, then ASSERT().
1440 If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal
1441 to List, then ASSERT().
1442
1443 @param List A pointer to the head node of a doubly linked list.
1444 @param Node A pointer to a node in the doubly linked list.
1445
1446 @retval TRUE Node is one of the nodes in the doubly linked list.
1447 @retval FALSE Node is not one of the nodes in the doubly linked list.
1448
1449 **/
1450 BOOLEAN
1451 EFIAPI
1452 IsNull (
1453 IN CONST LIST_ENTRY *List,
1454 IN CONST LIST_ENTRY *Node
1455 );
1456
1457
1458 /**
1459 Determines if a node the last node in a doubly linked list.
1460
1461 Returns TRUE if Node is the last node in the doubly linked list specified by
1462 List. Otherwise, FALSE is returned. List must have been initialized with
1463 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1464
1465 If List is NULL, then ASSERT().
1466 If Node is NULL, then ASSERT().
1467 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1468 InitializeListHead(), then ASSERT().
1469 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1470 in List, including the List node, is greater than or equal to
1471 PcdMaximumLinkedListLength, then ASSERT().
1472 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1473
1474 @param List A pointer to the head node of a doubly linked list.
1475 @param Node A pointer to a node in the doubly linked list.
1476
1477 @retval TRUE Node is the last node in the linked list.
1478 @retval FALSE Node is not the last node in the linked list.
1479
1480 **/
1481 BOOLEAN
1482 EFIAPI
1483 IsNodeAtEnd (
1484 IN CONST LIST_ENTRY *List,
1485 IN CONST LIST_ENTRY *Node
1486 );
1487
1488
1489 /**
1490 Swaps the location of two nodes in a doubly linked list, and returns the
1491 first node after the swap.
1492
1493 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1494 Otherwise, the location of the FirstEntry node is swapped with the location
1495 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1496 same double linked list as FirstEntry and that double linked list must have
1497 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1498 SecondEntry is returned after the nodes are swapped.
1499
1500 If FirstEntry is NULL, then ASSERT().
1501 If SecondEntry is NULL, then ASSERT().
1502 If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the
1503 same linked list, then ASSERT().
1504 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1505 linked list containing the FirstEntry and SecondEntry nodes, including
1506 the FirstEntry and SecondEntry nodes, is greater than or equal to
1507 PcdMaximumLinkedListLength, then ASSERT().
1508
1509 @param FirstEntry A pointer to a node in a linked list.
1510 @param SecondEntry A pointer to another node in the same linked list.
1511
1512 @return SecondEntry.
1513
1514 **/
1515 LIST_ENTRY *
1516 EFIAPI
1517 SwapListEntries (
1518 IN OUT LIST_ENTRY *FirstEntry,
1519 IN OUT LIST_ENTRY *SecondEntry
1520 );
1521
1522
1523 /**
1524 Removes a node from a doubly linked list, and returns the node that follows
1525 the removed node.
1526
1527 Removes the node Entry from a doubly linked list. It is up to the caller of
1528 this function to release the memory used by this node if that is required. On
1529 exit, the node following Entry in the doubly linked list is returned. If
1530 Entry is the only node in the linked list, then the head node of the linked
1531 list is returned.
1532
1533 If Entry is NULL, then ASSERT().
1534 If Entry is the head node of an empty list, then ASSERT().
1535 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1536 linked list containing Entry, including the Entry node, is greater than
1537 or equal to PcdMaximumLinkedListLength, then ASSERT().
1538
1539 @param Entry A pointer to a node in a linked list.
1540
1541 @return Entry.
1542
1543 **/
1544 LIST_ENTRY *
1545 EFIAPI
1546 RemoveEntryList (
1547 IN CONST LIST_ENTRY *Entry
1548 );
1549
1550 //
1551 // Math Services
1552 //
1553
1554 /**
1555 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1556 with zeros. The shifted value is returned.
1557
1558 This function shifts the 64-bit value Operand to the left by Count bits. The
1559 low Count bits are set to zero. The shifted value is returned.
1560
1561 If Count is greater than 63, then ASSERT().
1562
1563 @param Operand The 64-bit operand to shift left.
1564 @param Count The number of bits to shift left.
1565
1566 @return Operand << Count.
1567
1568 **/
1569 UINT64
1570 EFIAPI
1571 LShiftU64 (
1572 IN UINT64 Operand,
1573 IN UINTN Count
1574 );
1575
1576
1577 /**
1578 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1579 filled with zeros. The shifted value is returned.
1580
1581 This function shifts the 64-bit value Operand to the right by Count bits. The
1582 high Count bits are set to zero. The shifted value is returned.
1583
1584 If Count is greater than 63, then ASSERT().
1585
1586 @param Operand The 64-bit operand to shift right.
1587 @param Count The number of bits to shift right.
1588
1589 @return Operand >> Count
1590
1591 **/
1592 UINT64
1593 EFIAPI
1594 RShiftU64 (
1595 IN UINT64 Operand,
1596 IN UINTN Count
1597 );
1598
1599
1600 /**
1601 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1602 with original integer's bit 63. The shifted value is returned.
1603
1604 This function shifts the 64-bit value Operand to the right by Count bits. The
1605 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1606
1607 If Count is greater than 63, then ASSERT().
1608
1609 @param Operand The 64-bit operand to shift right.
1610 @param Count The number of bits to shift right.
1611
1612 @return Operand >> Count
1613
1614 **/
1615 UINT64
1616 EFIAPI
1617 ARShiftU64 (
1618 IN UINT64 Operand,
1619 IN UINTN Count
1620 );
1621
1622
1623 /**
1624 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1625 with the high bits that were rotated.
1626
1627 This function rotates the 32-bit value Operand to the left by Count bits. The
1628 low Count bits are fill with the high Count bits of Operand. The rotated
1629 value is returned.
1630
1631 If Count is greater than 31, then ASSERT().
1632
1633 @param Operand The 32-bit operand to rotate left.
1634 @param Count The number of bits to rotate left.
1635
1636 @return Operand << Count
1637
1638 **/
1639 UINT32
1640 EFIAPI
1641 LRotU32 (
1642 IN UINT32 Operand,
1643 IN UINTN Count
1644 );
1645
1646
1647 /**
1648 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1649 with the low bits that were rotated.
1650
1651 This function rotates the 32-bit value Operand to the right by Count bits.
1652 The high Count bits are fill with the low Count bits of Operand. The rotated
1653 value is returned.
1654
1655 If Count is greater than 31, then ASSERT().
1656
1657 @param Operand The 32-bit operand to rotate right.
1658 @param Count The number of bits to rotate right.
1659
1660 @return Operand >> Count
1661
1662 **/
1663 UINT32
1664 EFIAPI
1665 RRotU32 (
1666 IN UINT32 Operand,
1667 IN UINTN Count
1668 );
1669
1670
1671 /**
1672 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1673 with the high bits that were rotated.
1674
1675 This function rotates the 64-bit value Operand to the left by Count bits. The
1676 low Count bits are fill with the high Count bits of Operand. The rotated
1677 value is returned.
1678
1679 If Count is greater than 63, then ASSERT().
1680
1681 @param Operand The 64-bit operand to rotate left.
1682 @param Count The number of bits to rotate left.
1683
1684 @return Operand << Count
1685
1686 **/
1687 UINT64
1688 EFIAPI
1689 LRotU64 (
1690 IN UINT64 Operand,
1691 IN UINTN Count
1692 );
1693
1694
1695 /**
1696 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1697 with the high low bits that were rotated.
1698
1699 This function rotates the 64-bit value Operand to the right by Count bits.
1700 The high Count bits are fill with the low Count bits of Operand. The rotated
1701 value is returned.
1702
1703 If Count is greater than 63, then ASSERT().
1704
1705 @param Operand The 64-bit operand to rotate right.
1706 @param Count The number of bits to rotate right.
1707
1708 @return Operand >> Count
1709
1710 **/
1711 UINT64
1712 EFIAPI
1713 RRotU64 (
1714 IN UINT64 Operand,
1715 IN UINTN Count
1716 );
1717
1718
1719 /**
1720 Returns the bit position of the lowest bit set in a 32-bit value.
1721
1722 This function computes the bit position of the lowest bit set in the 32-bit
1723 value specified by Operand. If Operand is zero, then -1 is returned.
1724 Otherwise, a value between 0 and 31 is returned.
1725
1726 @param Operand The 32-bit operand to evaluate.
1727
1728 @retval 0..31 The lowest bit set in Operand was found.
1729 @retval -1 Operand is zero.
1730
1731 **/
1732 INTN
1733 EFIAPI
1734 LowBitSet32 (
1735 IN UINT32 Operand
1736 );
1737
1738
1739 /**
1740 Returns the bit position of the lowest bit set in a 64-bit value.
1741
1742 This function computes the bit position of the lowest bit set in the 64-bit
1743 value specified by Operand. If Operand is zero, then -1 is returned.
1744 Otherwise, a value between 0 and 63 is returned.
1745
1746 @param Operand The 64-bit operand to evaluate.
1747
1748 @retval 0..63 The lowest bit set in Operand was found.
1749 @retval -1 Operand is zero.
1750
1751
1752 **/
1753 INTN
1754 EFIAPI
1755 LowBitSet64 (
1756 IN UINT64 Operand
1757 );
1758
1759
1760 /**
1761 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1762 to log2(x).
1763
1764 This function computes the bit position of the highest bit set in the 32-bit
1765 value specified by Operand. If Operand is zero, then -1 is returned.
1766 Otherwise, a value between 0 and 31 is returned.
1767
1768 @param Operand The 32-bit operand to evaluate.
1769
1770 @retval 0..31 Position of the highest bit set in Operand if found.
1771 @retval -1 Operand is zero.
1772
1773 **/
1774 INTN
1775 EFIAPI
1776 HighBitSet32 (
1777 IN UINT32 Operand
1778 );
1779
1780
1781 /**
1782 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1783 to log2(x).
1784
1785 This function computes the bit position of the highest bit set in the 64-bit
1786 value specified by Operand. If Operand is zero, then -1 is returned.
1787 Otherwise, a value between 0 and 63 is returned.
1788
1789 @param Operand The 64-bit operand to evaluate.
1790
1791 @retval 0..63 Position of the highest bit set in Operand if found.
1792 @retval -1 Operand is zero.
1793
1794 **/
1795 INTN
1796 EFIAPI
1797 HighBitSet64 (
1798 IN UINT64 Operand
1799 );
1800
1801
1802 /**
1803 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1804 1 << log2(x).
1805
1806 This function computes the value of the highest bit set in the 32-bit value
1807 specified by Operand. If Operand is zero, then zero is returned.
1808
1809 @param Operand The 32-bit operand to evaluate.
1810
1811 @return 1 << HighBitSet32(Operand)
1812 @retval 0 Operand is zero.
1813
1814 **/
1815 UINT32
1816 EFIAPI
1817 GetPowerOfTwo32 (
1818 IN UINT32 Operand
1819 );
1820
1821
1822 /**
1823 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1824 1 << log2(x).
1825
1826 This function computes the value of the highest bit set in the 64-bit value
1827 specified by Operand. If Operand is zero, then zero is returned.
1828
1829 @param Operand The 64-bit operand to evaluate.
1830
1831 @return 1 << HighBitSet64(Operand)
1832 @retval 0 Operand is zero.
1833
1834 **/
1835 UINT64
1836 EFIAPI
1837 GetPowerOfTwo64 (
1838 IN UINT64 Operand
1839 );
1840
1841
1842 /**
1843 Switches the endianess of a 16-bit integer.
1844
1845 This function swaps the bytes in a 16-bit unsigned value to switch the value
1846 from little endian to big endian or vice versa. The byte swapped value is
1847 returned.
1848
1849 @param Value A 16-bit unsigned value.
1850
1851 @return The byte swapped Value.
1852
1853 **/
1854 UINT16
1855 EFIAPI
1856 SwapBytes16 (
1857 IN UINT16 Value
1858 );
1859
1860
1861 /**
1862 Switches the endianess of a 32-bit integer.
1863
1864 This function swaps the bytes in a 32-bit unsigned value to switch the value
1865 from little endian to big endian or vice versa. The byte swapped value is
1866 returned.
1867
1868 @param Value A 32-bit unsigned value.
1869
1870 @return The byte swapped Value.
1871
1872 **/
1873 UINT32
1874 EFIAPI
1875 SwapBytes32 (
1876 IN UINT32 Value
1877 );
1878
1879
1880 /**
1881 Switches the endianess of a 64-bit integer.
1882
1883 This function swaps the bytes in a 64-bit unsigned value to switch the value
1884 from little endian to big endian or vice versa. The byte swapped value is
1885 returned.
1886
1887 @param Value A 64-bit unsigned value.
1888
1889 @return The byte swapped Value.
1890
1891 **/
1892 UINT64
1893 EFIAPI
1894 SwapBytes64 (
1895 IN UINT64 Value
1896 );
1897
1898
1899 /**
1900 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1901 generates a 64-bit unsigned result.
1902
1903 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1904 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1905 bit unsigned result is returned.
1906
1907 @param Multiplicand A 64-bit unsigned value.
1908 @param Multiplier A 32-bit unsigned value.
1909
1910 @return Multiplicand * Multiplier
1911
1912 **/
1913 UINT64
1914 EFIAPI
1915 MultU64x32 (
1916 IN UINT64 Multiplicand,
1917 IN UINT32 Multiplier
1918 );
1919
1920
1921 /**
1922 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1923 generates a 64-bit unsigned result.
1924
1925 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1926 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1927 bit unsigned result is returned.
1928
1929 @param Multiplicand A 64-bit unsigned value.
1930 @param Multiplier A 64-bit unsigned value.
1931
1932 @return Multiplicand * Multiplier
1933
1934 **/
1935 UINT64
1936 EFIAPI
1937 MultU64x64 (
1938 IN UINT64 Multiplicand,
1939 IN UINT64 Multiplier
1940 );
1941
1942
1943 /**
1944 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1945 64-bit signed result.
1946
1947 This function multiples the 64-bit signed value Multiplicand by the 64-bit
1948 signed value Multiplier and generates a 64-bit signed result. This 64-bit
1949 signed result is returned.
1950
1951 @param Multiplicand A 64-bit signed value.
1952 @param Multiplier A 64-bit signed value.
1953
1954 @return Multiplicand * Multiplier
1955
1956 **/
1957 INT64
1958 EFIAPI
1959 MultS64x64 (
1960 IN INT64 Multiplicand,
1961 IN INT64 Multiplier
1962 );
1963
1964
1965 /**
1966 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1967 a 64-bit unsigned result.
1968
1969 This function divides the 64-bit unsigned value Dividend by the 32-bit
1970 unsigned value Divisor and generates a 64-bit unsigned quotient. This
1971 function returns the 64-bit unsigned quotient.
1972
1973 If Divisor is 0, then ASSERT().
1974
1975 @param Dividend A 64-bit unsigned value.
1976 @param Divisor A 32-bit unsigned value.
1977
1978 @return Dividend / Divisor
1979
1980 **/
1981 UINT64
1982 EFIAPI
1983 DivU64x32 (
1984 IN UINT64 Dividend,
1985 IN UINT32 Divisor
1986 );
1987
1988
1989 /**
1990 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1991 a 32-bit unsigned remainder.
1992
1993 This function divides the 64-bit unsigned value Dividend by the 32-bit
1994 unsigned value Divisor and generates a 32-bit remainder. This function
1995 returns the 32-bit unsigned remainder.
1996
1997 If Divisor is 0, then ASSERT().
1998
1999 @param Dividend A 64-bit unsigned value.
2000 @param Divisor A 32-bit unsigned value.
2001
2002 @return Dividend % Divisor
2003
2004 **/
2005 UINT32
2006 EFIAPI
2007 ModU64x32 (
2008 IN UINT64 Dividend,
2009 IN UINT32 Divisor
2010 );
2011
2012
2013 /**
2014 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
2015 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
2016
2017 This function divides the 64-bit unsigned value Dividend by the 32-bit
2018 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2019 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
2020 This function returns the 64-bit unsigned quotient.
2021
2022 If Divisor is 0, then ASSERT().
2023
2024 @param Dividend A 64-bit unsigned value.
2025 @param Divisor A 32-bit unsigned value.
2026 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
2027 optional and may be NULL.
2028
2029 @return Dividend / Divisor
2030
2031 **/
2032 UINT64
2033 EFIAPI
2034 DivU64x32Remainder (
2035 IN UINT64 Dividend,
2036 IN UINT32 Divisor,
2037 OUT UINT32 *Remainder OPTIONAL
2038 );
2039
2040
2041 /**
2042 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2043 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2044
2045 This function divides the 64-bit unsigned value Dividend by the 64-bit
2046 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2047 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2048 This function returns the 64-bit unsigned quotient.
2049
2050 If Divisor is 0, then ASSERT().
2051
2052 @param Dividend A 64-bit unsigned value.
2053 @param Divisor A 64-bit unsigned value.
2054 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2055 optional and may be NULL.
2056
2057 @return Dividend / Divisor
2058
2059 **/
2060 UINT64
2061 EFIAPI
2062 DivU64x64Remainder (
2063 IN UINT64 Dividend,
2064 IN UINT64 Divisor,
2065 OUT UINT64 *Remainder OPTIONAL
2066 );
2067
2068
2069 /**
2070 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2071 64-bit signed result and a optional 64-bit signed remainder.
2072
2073 This function divides the 64-bit signed value Dividend by the 64-bit signed
2074 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2075 NULL, then the 64-bit signed remainder is returned in Remainder. This
2076 function returns the 64-bit signed quotient.
2077
2078 It is the caller's responsibility to not call this function with a Divisor of 0.
2079 If Divisor is 0, then the quotient and remainder should be assumed to be
2080 the largest negative integer.
2081
2082 If Divisor is 0, then ASSERT().
2083
2084 @param Dividend A 64-bit signed value.
2085 @param Divisor A 64-bit signed value.
2086 @param Remainder A pointer to a 64-bit signed value. This parameter is
2087 optional and may be NULL.
2088
2089 @return Dividend / Divisor
2090
2091 **/
2092 INT64
2093 EFIAPI
2094 DivS64x64Remainder (
2095 IN INT64 Dividend,
2096 IN INT64 Divisor,
2097 OUT INT64 *Remainder OPTIONAL
2098 );
2099
2100
2101 /**
2102 Reads a 16-bit value from memory that may be unaligned.
2103
2104 This function returns the 16-bit value pointed to by Buffer. The function
2105 guarantees that the read operation does not produce an alignment fault.
2106
2107 If the Buffer is NULL, then ASSERT().
2108
2109 @param Buffer Pointer to a 16-bit value that may be unaligned.
2110
2111 @return The 16-bit value read from Buffer.
2112
2113 **/
2114 UINT16
2115 EFIAPI
2116 ReadUnaligned16 (
2117 IN CONST UINT16 *Buffer
2118 );
2119
2120
2121 /**
2122 Writes a 16-bit value to memory that may be unaligned.
2123
2124 This function writes the 16-bit value specified by Value to Buffer. Value is
2125 returned. The function guarantees that the write operation does not produce
2126 an alignment fault.
2127
2128 If the Buffer is NULL, then ASSERT().
2129
2130 @param Buffer Pointer to a 16-bit value that may be unaligned.
2131 @param Value 16-bit value to write to Buffer.
2132
2133 @return The 16-bit value to write to Buffer.
2134
2135 **/
2136 UINT16
2137 EFIAPI
2138 WriteUnaligned16 (
2139 OUT UINT16 *Buffer,
2140 IN UINT16 Value
2141 );
2142
2143
2144 /**
2145 Reads a 24-bit value from memory that may be unaligned.
2146
2147 This function returns the 24-bit value pointed to by Buffer. The function
2148 guarantees that the read operation does not produce an alignment fault.
2149
2150 If the Buffer is NULL, then ASSERT().
2151
2152 @param Buffer Pointer to a 24-bit value that may be unaligned.
2153
2154 @return The 24-bit value read from Buffer.
2155
2156 **/
2157 UINT32
2158 EFIAPI
2159 ReadUnaligned24 (
2160 IN CONST UINT32 *Buffer
2161 );
2162
2163
2164 /**
2165 Writes a 24-bit value to memory that may be unaligned.
2166
2167 This function writes the 24-bit value specified by Value to Buffer. Value is
2168 returned. The function guarantees that the write operation does not produce
2169 an alignment fault.
2170
2171 If the Buffer is NULL, then ASSERT().
2172
2173 @param Buffer Pointer to a 24-bit value that may be unaligned.
2174 @param Value 24-bit value to write to Buffer.
2175
2176 @return The 24-bit value to write to Buffer.
2177
2178 **/
2179 UINT32
2180 EFIAPI
2181 WriteUnaligned24 (
2182 OUT UINT32 *Buffer,
2183 IN UINT32 Value
2184 );
2185
2186
2187 /**
2188 Reads a 32-bit value from memory that may be unaligned.
2189
2190 This function returns the 32-bit value pointed to by Buffer. The function
2191 guarantees that the read operation does not produce an alignment fault.
2192
2193 If the Buffer is NULL, then ASSERT().
2194
2195 @param Buffer Pointer to a 32-bit value that may be unaligned.
2196
2197 @return The 32-bit value read from Buffer.
2198
2199 **/
2200 UINT32
2201 EFIAPI
2202 ReadUnaligned32 (
2203 IN CONST UINT32 *Buffer
2204 );
2205
2206
2207 /**
2208 Writes a 32-bit value to memory that may be unaligned.
2209
2210 This function writes the 32-bit value specified by Value to Buffer. Value is
2211 returned. The function guarantees that the write operation does not produce
2212 an alignment fault.
2213
2214 If the Buffer is NULL, then ASSERT().
2215
2216 @param Buffer Pointer to a 32-bit value that may be unaligned.
2217 @param Value 32-bit value to write to Buffer.
2218
2219 @return The 32-bit value to write to Buffer.
2220
2221 **/
2222 UINT32
2223 EFIAPI
2224 WriteUnaligned32 (
2225 OUT UINT32 *Buffer,
2226 IN UINT32 Value
2227 );
2228
2229
2230 /**
2231 Reads a 64-bit value from memory that may be unaligned.
2232
2233 This function returns the 64-bit value pointed to by Buffer. The function
2234 guarantees that the read operation does not produce an alignment fault.
2235
2236 If the Buffer is NULL, then ASSERT().
2237
2238 @param Buffer Pointer to a 64-bit value that may be unaligned.
2239
2240 @return The 64-bit value read from Buffer.
2241
2242 **/
2243 UINT64
2244 EFIAPI
2245 ReadUnaligned64 (
2246 IN CONST UINT64 *Buffer
2247 );
2248
2249
2250 /**
2251 Writes a 64-bit value to memory that may be unaligned.
2252
2253 This function writes the 64-bit value specified by Value to Buffer. Value is
2254 returned. The function guarantees that the write operation does not produce
2255 an alignment fault.
2256
2257 If the Buffer is NULL, then ASSERT().
2258
2259 @param Buffer Pointer to a 64-bit value that may be unaligned.
2260 @param Value 64-bit value to write to Buffer.
2261
2262 @return The 64-bit value to write to Buffer.
2263
2264 **/
2265 UINT64
2266 EFIAPI
2267 WriteUnaligned64 (
2268 OUT UINT64 *Buffer,
2269 IN UINT64 Value
2270 );
2271
2272
2273 //
2274 // Bit Field Functions
2275 //
2276
2277 /**
2278 Returns a bit field from an 8-bit value.
2279
2280 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2281
2282 If 8-bit operations are not supported, then ASSERT().
2283 If StartBit is greater than 7, then ASSERT().
2284 If EndBit is greater than 7, then ASSERT().
2285 If EndBit is less than StartBit, then ASSERT().
2286
2287 @param Operand Operand on which to perform the bitfield operation.
2288 @param StartBit The ordinal of the least significant bit in the bit field.
2289 Range 0..7.
2290 @param EndBit The ordinal of the most significant bit in the bit field.
2291 Range 0..7.
2292
2293 @return The bit field read.
2294
2295 **/
2296 UINT8
2297 EFIAPI
2298 BitFieldRead8 (
2299 IN UINT8 Operand,
2300 IN UINTN StartBit,
2301 IN UINTN EndBit
2302 );
2303
2304
2305 /**
2306 Writes a bit field to an 8-bit value, and returns the result.
2307
2308 Writes Value to the bit field specified by the StartBit and the EndBit in
2309 Operand. All other bits in Operand are preserved. The new 8-bit value is
2310 returned.
2311
2312 If 8-bit operations are not supported, then ASSERT().
2313 If StartBit is greater than 7, then ASSERT().
2314 If EndBit is greater than 7, then ASSERT().
2315 If EndBit is less than StartBit, then ASSERT().
2316
2317 @param Operand Operand on which to perform the bitfield operation.
2318 @param StartBit The ordinal of the least significant bit in the bit field.
2319 Range 0..7.
2320 @param EndBit The ordinal of the most significant bit in the bit field.
2321 Range 0..7.
2322 @param Value New value of the bit field.
2323
2324 @return The new 8-bit value.
2325
2326 **/
2327 UINT8
2328 EFIAPI
2329 BitFieldWrite8 (
2330 IN UINT8 Operand,
2331 IN UINTN StartBit,
2332 IN UINTN EndBit,
2333 IN UINT8 Value
2334 );
2335
2336
2337 /**
2338 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2339 result.
2340
2341 Performs a bitwise OR between the bit field specified by StartBit
2342 and EndBit in Operand and the value specified by OrData. All other bits in
2343 Operand are preserved. The new 8-bit value is returned.
2344
2345 If 8-bit operations are not supported, then ASSERT().
2346 If StartBit is greater than 7, then ASSERT().
2347 If EndBit is greater than 7, then ASSERT().
2348 If EndBit is less than StartBit, then ASSERT().
2349
2350 @param Operand Operand on which to perform the bitfield operation.
2351 @param StartBit The ordinal of the least significant bit in the bit field.
2352 Range 0..7.
2353 @param EndBit The ordinal of the most significant bit in the bit field.
2354 Range 0..7.
2355 @param OrData The value to OR with the read value from the value
2356
2357 @return The new 8-bit value.
2358
2359 **/
2360 UINT8
2361 EFIAPI
2362 BitFieldOr8 (
2363 IN UINT8 Operand,
2364 IN UINTN StartBit,
2365 IN UINTN EndBit,
2366 IN UINT8 OrData
2367 );
2368
2369
2370 /**
2371 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2372 the result.
2373
2374 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2375 in Operand and the value specified by AndData. All other bits in Operand are
2376 preserved. The new 8-bit value is returned.
2377
2378 If 8-bit operations are not supported, then ASSERT().
2379 If StartBit is greater than 7, then ASSERT().
2380 If EndBit is greater than 7, then ASSERT().
2381 If EndBit is less than StartBit, then ASSERT().
2382
2383 @param Operand Operand on which to perform the bitfield operation.
2384 @param StartBit The ordinal of the least significant bit in the bit field.
2385 Range 0..7.
2386 @param EndBit The ordinal of the most significant bit in the bit field.
2387 Range 0..7.
2388 @param AndData The value to AND with the read value from the value.
2389
2390 @return The new 8-bit value.
2391
2392 **/
2393 UINT8
2394 EFIAPI
2395 BitFieldAnd8 (
2396 IN UINT8 Operand,
2397 IN UINTN StartBit,
2398 IN UINTN EndBit,
2399 IN UINT8 AndData
2400 );
2401
2402
2403 /**
2404 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2405 bitwise OR, and returns the result.
2406
2407 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2408 in Operand and the value specified by AndData, followed by a bitwise
2409 OR with value specified by OrData. All other bits in Operand are
2410 preserved. The new 8-bit value is returned.
2411
2412 If 8-bit operations are not supported, then ASSERT().
2413 If StartBit is greater than 7, then ASSERT().
2414 If EndBit is greater than 7, then ASSERT().
2415 If EndBit is less than StartBit, then ASSERT().
2416
2417 @param Operand Operand on which to perform the bitfield operation.
2418 @param StartBit The ordinal of the least significant bit in the bit field.
2419 Range 0..7.
2420 @param EndBit The ordinal of the most significant bit in the bit field.
2421 Range 0..7.
2422 @param AndData The value to AND with the read value from the value.
2423 @param OrData The value to OR with the result of the AND operation.
2424
2425 @return The new 8-bit value.
2426
2427 **/
2428 UINT8
2429 EFIAPI
2430 BitFieldAndThenOr8 (
2431 IN UINT8 Operand,
2432 IN UINTN StartBit,
2433 IN UINTN EndBit,
2434 IN UINT8 AndData,
2435 IN UINT8 OrData
2436 );
2437
2438
2439 /**
2440 Returns a bit field from a 16-bit value.
2441
2442 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2443
2444 If 16-bit operations are not supported, then ASSERT().
2445 If StartBit is greater than 15, then ASSERT().
2446 If EndBit is greater than 15, then ASSERT().
2447 If EndBit is less than StartBit, then ASSERT().
2448
2449 @param Operand Operand on which to perform the bitfield operation.
2450 @param StartBit The ordinal of the least significant bit in the bit field.
2451 Range 0..15.
2452 @param EndBit The ordinal of the most significant bit in the bit field.
2453 Range 0..15.
2454
2455 @return The bit field read.
2456
2457 **/
2458 UINT16
2459 EFIAPI
2460 BitFieldRead16 (
2461 IN UINT16 Operand,
2462 IN UINTN StartBit,
2463 IN UINTN EndBit
2464 );
2465
2466
2467 /**
2468 Writes a bit field to a 16-bit value, and returns the result.
2469
2470 Writes Value to the bit field specified by the StartBit and the EndBit in
2471 Operand. All other bits in Operand are preserved. The new 16-bit value is
2472 returned.
2473
2474 If 16-bit operations are not supported, then ASSERT().
2475 If StartBit is greater than 15, then ASSERT().
2476 If EndBit is greater than 15, then ASSERT().
2477 If EndBit is less than StartBit, then ASSERT().
2478
2479 @param Operand Operand on which to perform the bitfield operation.
2480 @param StartBit The ordinal of the least significant bit in the bit field.
2481 Range 0..15.
2482 @param EndBit The ordinal of the most significant bit in the bit field.
2483 Range 0..15.
2484 @param Value New value of the bit field.
2485
2486 @return The new 16-bit value.
2487
2488 **/
2489 UINT16
2490 EFIAPI
2491 BitFieldWrite16 (
2492 IN UINT16 Operand,
2493 IN UINTN StartBit,
2494 IN UINTN EndBit,
2495 IN UINT16 Value
2496 );
2497
2498
2499 /**
2500 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2501 result.
2502
2503 Performs a bitwise OR between the bit field specified by StartBit
2504 and EndBit in Operand and the value specified by OrData. All other bits in
2505 Operand are preserved. The new 16-bit value is returned.
2506
2507 If 16-bit operations are not supported, then ASSERT().
2508 If StartBit is greater than 15, then ASSERT().
2509 If EndBit is greater than 15, then ASSERT().
2510 If EndBit is less than StartBit, then ASSERT().
2511
2512 @param Operand Operand on which to perform the bitfield operation.
2513 @param StartBit The ordinal of the least significant bit in the bit field.
2514 Range 0..15.
2515 @param EndBit The ordinal of the most significant bit in the bit field.
2516 Range 0..15.
2517 @param OrData The value to OR with the read value from the value
2518
2519 @return The new 16-bit value.
2520
2521 **/
2522 UINT16
2523 EFIAPI
2524 BitFieldOr16 (
2525 IN UINT16 Operand,
2526 IN UINTN StartBit,
2527 IN UINTN EndBit,
2528 IN UINT16 OrData
2529 );
2530
2531
2532 /**
2533 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2534 the result.
2535
2536 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2537 in Operand and the value specified by AndData. All other bits in Operand are
2538 preserved. The new 16-bit value is returned.
2539
2540 If 16-bit operations are not supported, then ASSERT().
2541 If StartBit is greater than 15, then ASSERT().
2542 If EndBit is greater than 15, then ASSERT().
2543 If EndBit is less than StartBit, then ASSERT().
2544
2545 @param Operand Operand on which to perform the bitfield operation.
2546 @param StartBit The ordinal of the least significant bit in the bit field.
2547 Range 0..15.
2548 @param EndBit The ordinal of the most significant bit in the bit field.
2549 Range 0..15.
2550 @param AndData The value to AND with the read value from the value
2551
2552 @return The new 16-bit value.
2553
2554 **/
2555 UINT16
2556 EFIAPI
2557 BitFieldAnd16 (
2558 IN UINT16 Operand,
2559 IN UINTN StartBit,
2560 IN UINTN EndBit,
2561 IN UINT16 AndData
2562 );
2563
2564
2565 /**
2566 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2567 bitwise OR, and returns the result.
2568
2569 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2570 in Operand and the value specified by AndData, followed by a bitwise
2571 OR with value specified by OrData. All other bits in Operand are
2572 preserved. The new 16-bit value is returned.
2573
2574 If 16-bit operations are not supported, then ASSERT().
2575 If StartBit is greater than 15, then ASSERT().
2576 If EndBit is greater than 15, then ASSERT().
2577 If EndBit is less than StartBit, then ASSERT().
2578
2579 @param Operand Operand on which to perform the bitfield operation.
2580 @param StartBit The ordinal of the least significant bit in the bit field.
2581 Range 0..15.
2582 @param EndBit The ordinal of the most significant bit in the bit field.
2583 Range 0..15.
2584 @param AndData The value to AND with the read value from the value.
2585 @param OrData The value to OR with the result of the AND operation.
2586
2587 @return The new 16-bit value.
2588
2589 **/
2590 UINT16
2591 EFIAPI
2592 BitFieldAndThenOr16 (
2593 IN UINT16 Operand,
2594 IN UINTN StartBit,
2595 IN UINTN EndBit,
2596 IN UINT16 AndData,
2597 IN UINT16 OrData
2598 );
2599
2600
2601 /**
2602 Returns a bit field from a 32-bit value.
2603
2604 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2605
2606 If 32-bit operations are not supported, then ASSERT().
2607 If StartBit is greater than 31, then ASSERT().
2608 If EndBit is greater than 31, then ASSERT().
2609 If EndBit is less than StartBit, then ASSERT().
2610
2611 @param Operand Operand on which to perform the bitfield operation.
2612 @param StartBit The ordinal of the least significant bit in the bit field.
2613 Range 0..31.
2614 @param EndBit The ordinal of the most significant bit in the bit field.
2615 Range 0..31.
2616
2617 @return The bit field read.
2618
2619 **/
2620 UINT32
2621 EFIAPI
2622 BitFieldRead32 (
2623 IN UINT32 Operand,
2624 IN UINTN StartBit,
2625 IN UINTN EndBit
2626 );
2627
2628
2629 /**
2630 Writes a bit field to a 32-bit value, and returns the result.
2631
2632 Writes Value to the bit field specified by the StartBit and the EndBit in
2633 Operand. All other bits in Operand are preserved. The new 32-bit value is
2634 returned.
2635
2636 If 32-bit operations are not supported, then ASSERT().
2637 If StartBit is greater than 31, then ASSERT().
2638 If EndBit is greater than 31, then ASSERT().
2639 If EndBit is less than StartBit, then ASSERT().
2640
2641 @param Operand Operand on which to perform the bitfield operation.
2642 @param StartBit The ordinal of the least significant bit in the bit field.
2643 Range 0..31.
2644 @param EndBit The ordinal of the most significant bit in the bit field.
2645 Range 0..31.
2646 @param Value New value of the bit field.
2647
2648 @return The new 32-bit value.
2649
2650 **/
2651 UINT32
2652 EFIAPI
2653 BitFieldWrite32 (
2654 IN UINT32 Operand,
2655 IN UINTN StartBit,
2656 IN UINTN EndBit,
2657 IN UINT32 Value
2658 );
2659
2660
2661 /**
2662 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2663 result.
2664
2665 Performs a bitwise OR between the bit field specified by StartBit
2666 and EndBit in Operand and the value specified by OrData. All other bits in
2667 Operand are preserved. The new 32-bit value is returned.
2668
2669 If 32-bit operations are not supported, then ASSERT().
2670 If StartBit is greater than 31, then ASSERT().
2671 If EndBit is greater than 31, then ASSERT().
2672 If EndBit is less than StartBit, then ASSERT().
2673
2674 @param Operand Operand on which to perform the bitfield operation.
2675 @param StartBit The ordinal of the least significant bit in the bit field.
2676 Range 0..31.
2677 @param EndBit The ordinal of the most significant bit in the bit field.
2678 Range 0..31.
2679 @param OrData The value to OR with the read value from the value
2680
2681 @return The new 32-bit value.
2682
2683 **/
2684 UINT32
2685 EFIAPI
2686 BitFieldOr32 (
2687 IN UINT32 Operand,
2688 IN UINTN StartBit,
2689 IN UINTN EndBit,
2690 IN UINT32 OrData
2691 );
2692
2693
2694 /**
2695 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2696 the result.
2697
2698 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2699 in Operand and the value specified by AndData. All other bits in Operand are
2700 preserved. The new 32-bit value is returned.
2701
2702 If 32-bit operations are not supported, then ASSERT().
2703 If StartBit is greater than 31, then ASSERT().
2704 If EndBit is greater than 31, then ASSERT().
2705 If EndBit is less than StartBit, then ASSERT().
2706
2707 @param Operand Operand on which to perform the bitfield operation.
2708 @param StartBit The ordinal of the least significant bit in the bit field.
2709 Range 0..31.
2710 @param EndBit The ordinal of the most significant bit in the bit field.
2711 Range 0..31.
2712 @param AndData The value to AND with the read value from the value
2713
2714 @return The new 32-bit value.
2715
2716 **/
2717 UINT32
2718 EFIAPI
2719 BitFieldAnd32 (
2720 IN UINT32 Operand,
2721 IN UINTN StartBit,
2722 IN UINTN EndBit,
2723 IN UINT32 AndData
2724 );
2725
2726
2727 /**
2728 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2729 bitwise OR, and returns the result.
2730
2731 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2732 in Operand and the value specified by AndData, followed by a bitwise
2733 OR with value specified by OrData. All other bits in Operand are
2734 preserved. The new 32-bit value is returned.
2735
2736 If 32-bit operations are not supported, then ASSERT().
2737 If StartBit is greater than 31, then ASSERT().
2738 If EndBit is greater than 31, then ASSERT().
2739 If EndBit is less than StartBit, then ASSERT().
2740
2741 @param Operand Operand on which to perform the bitfield operation.
2742 @param StartBit The ordinal of the least significant bit in the bit field.
2743 Range 0..31.
2744 @param EndBit The ordinal of the most significant bit in the bit field.
2745 Range 0..31.
2746 @param AndData The value to AND with the read value from the value.
2747 @param OrData The value to OR with the result of the AND operation.
2748
2749 @return The new 32-bit value.
2750
2751 **/
2752 UINT32
2753 EFIAPI
2754 BitFieldAndThenOr32 (
2755 IN UINT32 Operand,
2756 IN UINTN StartBit,
2757 IN UINTN EndBit,
2758 IN UINT32 AndData,
2759 IN UINT32 OrData
2760 );
2761
2762
2763 /**
2764 Returns a bit field from a 64-bit value.
2765
2766 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2767
2768 If 64-bit operations are not supported, then ASSERT().
2769 If StartBit is greater than 63, then ASSERT().
2770 If EndBit is greater than 63, then ASSERT().
2771 If EndBit is less than StartBit, then ASSERT().
2772
2773 @param Operand Operand on which to perform the bitfield operation.
2774 @param StartBit The ordinal of the least significant bit in the bit field.
2775 Range 0..63.
2776 @param EndBit The ordinal of the most significant bit in the bit field.
2777 Range 0..63.
2778
2779 @return The bit field read.
2780
2781 **/
2782 UINT64
2783 EFIAPI
2784 BitFieldRead64 (
2785 IN UINT64 Operand,
2786 IN UINTN StartBit,
2787 IN UINTN EndBit
2788 );
2789
2790
2791 /**
2792 Writes a bit field to a 64-bit value, and returns the result.
2793
2794 Writes Value to the bit field specified by the StartBit and the EndBit in
2795 Operand. All other bits in Operand are preserved. The new 64-bit value is
2796 returned.
2797
2798 If 64-bit operations are not supported, then ASSERT().
2799 If StartBit is greater than 63, then ASSERT().
2800 If EndBit is greater than 63, then ASSERT().
2801 If EndBit is less than StartBit, then ASSERT().
2802
2803 @param Operand Operand on which to perform the bitfield operation.
2804 @param StartBit The ordinal of the least significant bit in the bit field.
2805 Range 0..63.
2806 @param EndBit The ordinal of the most significant bit in the bit field.
2807 Range 0..63.
2808 @param Value New value of the bit field.
2809
2810 @return The new 64-bit value.
2811
2812 **/
2813 UINT64
2814 EFIAPI
2815 BitFieldWrite64 (
2816 IN UINT64 Operand,
2817 IN UINTN StartBit,
2818 IN UINTN EndBit,
2819 IN UINT64 Value
2820 );
2821
2822
2823 /**
2824 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2825 result.
2826
2827 Performs a bitwise OR between the bit field specified by StartBit
2828 and EndBit in Operand and the value specified by OrData. All other bits in
2829 Operand are preserved. The new 64-bit value is returned.
2830
2831 If 64-bit operations are not supported, then ASSERT().
2832 If StartBit is greater than 63, then ASSERT().
2833 If EndBit is greater than 63, then ASSERT().
2834 If EndBit is less than StartBit, then ASSERT().
2835
2836 @param Operand Operand on which to perform the bitfield operation.
2837 @param StartBit The ordinal of the least significant bit in the bit field.
2838 Range 0..63.
2839 @param EndBit The ordinal of the most significant bit in the bit field.
2840 Range 0..63.
2841 @param OrData The value to OR with the read value from the value
2842
2843 @return The new 64-bit value.
2844
2845 **/
2846 UINT64
2847 EFIAPI
2848 BitFieldOr64 (
2849 IN UINT64 Operand,
2850 IN UINTN StartBit,
2851 IN UINTN EndBit,
2852 IN UINT64 OrData
2853 );
2854
2855
2856 /**
2857 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2858 the result.
2859
2860 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2861 in Operand and the value specified by AndData. All other bits in Operand are
2862 preserved. The new 64-bit value is returned.
2863
2864 If 64-bit operations are not supported, then ASSERT().
2865 If StartBit is greater than 63, then ASSERT().
2866 If EndBit is greater than 63, then ASSERT().
2867 If EndBit is less than StartBit, then ASSERT().
2868
2869 @param Operand Operand on which to perform the bitfield operation.
2870 @param StartBit The ordinal of the least significant bit in the bit field.
2871 Range 0..63.
2872 @param EndBit The ordinal of the most significant bit in the bit field.
2873 Range 0..63.
2874 @param AndData The value to AND with the read value from the value
2875
2876 @return The new 64-bit value.
2877
2878 **/
2879 UINT64
2880 EFIAPI
2881 BitFieldAnd64 (
2882 IN UINT64 Operand,
2883 IN UINTN StartBit,
2884 IN UINTN EndBit,
2885 IN UINT64 AndData
2886 );
2887
2888
2889 /**
2890 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2891 bitwise OR, and returns the result.
2892
2893 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2894 in Operand and the value specified by AndData, followed by a bitwise
2895 OR with value specified by OrData. All other bits in Operand are
2896 preserved. The new 64-bit value is returned.
2897
2898 If 64-bit operations are not supported, then ASSERT().
2899 If StartBit is greater than 63, then ASSERT().
2900 If EndBit is greater than 63, then ASSERT().
2901 If EndBit is less than StartBit, then ASSERT().
2902
2903 @param Operand Operand on which to perform the bitfield operation.
2904 @param StartBit The ordinal of the least significant bit in the bit field.
2905 Range 0..63.
2906 @param EndBit The ordinal of the most significant bit in the bit field.
2907 Range 0..63.
2908 @param AndData The value to AND with the read value from the value.
2909 @param OrData The value to OR with the result of the AND operation.
2910
2911 @return The new 64-bit value.
2912
2913 **/
2914 UINT64
2915 EFIAPI
2916 BitFieldAndThenOr64 (
2917 IN UINT64 Operand,
2918 IN UINTN StartBit,
2919 IN UINTN EndBit,
2920 IN UINT64 AndData,
2921 IN UINT64 OrData
2922 );
2923
2924 //
2925 // Base Library Checksum Functions
2926 //
2927
2928 /**
2929 Returns the sum of all elements in a buffer in unit of UINT8.
2930 During calculation, the carry bits are dropped.
2931
2932 This function calculates the sum of all elements in a buffer
2933 in unit of UINT8. The carry bits in result of addition are dropped.
2934 The result is returned as UINT8. If Length is Zero, then Zero is
2935 returned.
2936
2937 If Buffer is NULL, then ASSERT().
2938 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2939
2940 @param Buffer Pointer to the buffer to carry out the sum operation.
2941 @param Length The size, in bytes, of Buffer.
2942
2943 @return Sum The sum of Buffer with carry bits dropped during additions.
2944
2945 **/
2946 UINT8
2947 EFIAPI
2948 CalculateSum8 (
2949 IN CONST UINT8 *Buffer,
2950 IN UINTN Length
2951 );
2952
2953
2954 /**
2955 Returns the two's complement checksum of all elements in a buffer
2956 of 8-bit values.
2957
2958 This function first calculates the sum of the 8-bit values in the
2959 buffer specified by Buffer and Length. The carry bits in the result
2960 of addition are dropped. Then, the two's complement of the sum is
2961 returned. If Length is 0, then 0 is returned.
2962
2963 If Buffer is NULL, then ASSERT().
2964 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2965
2966 @param Buffer Pointer to the buffer to carry out the checksum operation.
2967 @param Length The size, in bytes, of Buffer.
2968
2969 @return Checksum The 2's complement checksum of Buffer.
2970
2971 **/
2972 UINT8
2973 EFIAPI
2974 CalculateCheckSum8 (
2975 IN CONST UINT8 *Buffer,
2976 IN UINTN Length
2977 );
2978
2979
2980 /**
2981 Returns the sum of all elements in a buffer of 16-bit values. During
2982 calculation, the carry bits are dropped.
2983
2984 This function calculates the sum of the 16-bit values in the buffer
2985 specified by Buffer and Length. The carry bits in result of addition are dropped.
2986 The 16-bit result is returned. If Length is 0, then 0 is returned.
2987
2988 If Buffer is NULL, then ASSERT().
2989 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
2990 If Length is not aligned on a 16-bit boundary, then ASSERT().
2991 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2992
2993 @param Buffer Pointer to the buffer to carry out the sum operation.
2994 @param Length The size, in bytes, of Buffer.
2995
2996 @return Sum The sum of Buffer with carry bits dropped during additions.
2997
2998 **/
2999 UINT16
3000 EFIAPI
3001 CalculateSum16 (
3002 IN CONST UINT16 *Buffer,
3003 IN UINTN Length
3004 );
3005
3006
3007 /**
3008 Returns the two's complement checksum of all elements in a buffer of
3009 16-bit values.
3010
3011 This function first calculates the sum of the 16-bit values in the buffer
3012 specified by Buffer and Length. The carry bits in the result of addition
3013 are dropped. Then, the two's complement of the sum is returned. If Length
3014 is 0, then 0 is returned.
3015
3016 If Buffer is NULL, then ASSERT().
3017 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3018 If Length is not aligned on a 16-bit boundary, then ASSERT().
3019 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3020
3021 @param Buffer Pointer to the buffer to carry out the checksum operation.
3022 @param Length The size, in bytes, of Buffer.
3023
3024 @return Checksum The 2's complement checksum of Buffer.
3025
3026 **/
3027 UINT16
3028 EFIAPI
3029 CalculateCheckSum16 (
3030 IN CONST UINT16 *Buffer,
3031 IN UINTN Length
3032 );
3033
3034
3035 /**
3036 Returns the sum of all elements in a buffer of 32-bit values. During
3037 calculation, the carry bits are dropped.
3038
3039 This function calculates the sum of the 32-bit values in the buffer
3040 specified by Buffer and Length. The carry bits in result of addition are dropped.
3041 The 32-bit result is returned. If Length is 0, then 0 is returned.
3042
3043 If Buffer is NULL, then ASSERT().
3044 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3045 If Length is not aligned on a 32-bit boundary, then ASSERT().
3046 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3047
3048 @param Buffer Pointer to the buffer to carry out the sum operation.
3049 @param Length The size, in bytes, of Buffer.
3050
3051 @return Sum The sum of Buffer with carry bits dropped during additions.
3052
3053 **/
3054 UINT32
3055 EFIAPI
3056 CalculateSum32 (
3057 IN CONST UINT32 *Buffer,
3058 IN UINTN Length
3059 );
3060
3061
3062 /**
3063 Returns the two's complement checksum of all elements in a buffer of
3064 32-bit values.
3065
3066 This function first calculates the sum of the 32-bit values in the buffer
3067 specified by Buffer and Length. The carry bits in the result of addition
3068 are dropped. Then, the two's complement of the sum is returned. If Length
3069 is 0, then 0 is returned.
3070
3071 If Buffer is NULL, then ASSERT().
3072 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3073 If Length is not aligned on a 32-bit boundary, then ASSERT().
3074 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3075
3076 @param Buffer Pointer to the buffer to carry out the checksum operation.
3077 @param Length The size, in bytes, of Buffer.
3078
3079 @return Checksum The 2's complement checksum of Buffer.
3080
3081 **/
3082 UINT32
3083 EFIAPI
3084 CalculateCheckSum32 (
3085 IN CONST UINT32 *Buffer,
3086 IN UINTN Length
3087 );
3088
3089
3090 /**
3091 Returns the sum of all elements in a buffer of 64-bit values. During
3092 calculation, the carry bits are dropped.
3093
3094 This function calculates the sum of the 64-bit values in the buffer
3095 specified by Buffer and Length. The carry bits in result of addition are dropped.
3096 The 64-bit result is returned. If Length is 0, then 0 is returned.
3097
3098 If Buffer is NULL, then ASSERT().
3099 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3100 If Length is not aligned on a 64-bit boundary, then ASSERT().
3101 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3102
3103 @param Buffer Pointer to the buffer to carry out the sum operation.
3104 @param Length The size, in bytes, of Buffer.
3105
3106 @return Sum The sum of Buffer with carry bits dropped during additions.
3107
3108 **/
3109 UINT64
3110 EFIAPI
3111 CalculateSum64 (
3112 IN CONST UINT64 *Buffer,
3113 IN UINTN Length
3114 );
3115
3116
3117 /**
3118 Returns the two's complement checksum of all elements in a buffer of
3119 64-bit values.
3120
3121 This function first calculates the sum of the 64-bit values in the buffer
3122 specified by Buffer and Length. The carry bits in the result of addition
3123 are dropped. Then, the two's complement of the sum is returned. If Length
3124 is 0, then 0 is returned.
3125
3126 If Buffer is NULL, then ASSERT().
3127 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3128 If Length is not aligned on a 64-bit boundary, then ASSERT().
3129 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3130
3131 @param Buffer Pointer to the buffer to carry out the checksum operation.
3132 @param Length The size, in bytes, of Buffer.
3133
3134 @return Checksum The 2's complement checksum of Buffer.
3135
3136 **/
3137 UINT64
3138 EFIAPI
3139 CalculateCheckSum64 (
3140 IN CONST UINT64 *Buffer,
3141 IN UINTN Length
3142 );
3143
3144
3145 //
3146 // Base Library CPU Functions
3147 //
3148
3149 /**
3150 Function entry point used when a stack switch is requested with SwitchStack()
3151
3152 @param Context1 Context1 parameter passed into SwitchStack().
3153 @param Context2 Context2 parameter passed into SwitchStack().
3154
3155 **/
3156 typedef
3157 VOID
3158 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3159 IN VOID *Context1, OPTIONAL
3160 IN VOID *Context2 OPTIONAL
3161 );
3162
3163
3164 /**
3165 Used to serialize load and store operations.
3166
3167 All loads and stores that proceed calls to this function are guaranteed to be
3168 globally visible when this function returns.
3169
3170 **/
3171 VOID
3172 EFIAPI
3173 MemoryFence (
3174 VOID
3175 );
3176
3177
3178 /**
3179 Saves the current CPU context that can be restored with a call to LongJump()
3180 and returns 0.
3181
3182 Saves the current CPU context in the buffer specified by JumpBuffer and
3183 returns 0. The initial call to SetJump() must always return 0. Subsequent
3184 calls to LongJump() cause a non-zero value to be returned by SetJump().
3185
3186 If JumpBuffer is NULL, then ASSERT().
3187 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3188
3189 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3190 The same structure must never be used for more than one CPU architecture context.
3191 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3192 SetJump()/LongJump() is not currently supported for the EBC processor type.
3193
3194 @param JumpBuffer A pointer to CPU context buffer.
3195
3196 @retval 0 Indicates a return from SetJump().
3197
3198 **/
3199 UINTN
3200 EFIAPI
3201 SetJump (
3202 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3203 );
3204
3205
3206 /**
3207 Restores the CPU context that was saved with SetJump().
3208
3209 Restores the CPU context from the buffer specified by JumpBuffer. This
3210 function never returns to the caller. Instead is resumes execution based on
3211 the state of JumpBuffer.
3212
3213 If JumpBuffer is NULL, then ASSERT().
3214 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3215 If Value is 0, then ASSERT().
3216
3217 @param JumpBuffer A pointer to CPU context buffer.
3218 @param Value The value to return when the SetJump() context is
3219 restored and must be non-zero.
3220
3221 **/
3222 VOID
3223 EFIAPI
3224 LongJump (
3225 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3226 IN UINTN Value
3227 );
3228
3229
3230 /**
3231 Enables CPU interrupts.
3232
3233 **/
3234 VOID
3235 EFIAPI
3236 EnableInterrupts (
3237 VOID
3238 );
3239
3240
3241 /**
3242 Disables CPU interrupts.
3243
3244 **/
3245 VOID
3246 EFIAPI
3247 DisableInterrupts (
3248 VOID
3249 );
3250
3251
3252 /**
3253 Disables CPU interrupts and returns the interrupt state prior to the disable
3254 operation.
3255
3256 @retval TRUE CPU interrupts were enabled on entry to this call.
3257 @retval FALSE CPU interrupts were disabled on entry to this call.
3258
3259 **/
3260 BOOLEAN
3261 EFIAPI
3262 SaveAndDisableInterrupts (
3263 VOID
3264 );
3265
3266
3267 /**
3268 Enables CPU interrupts for the smallest window required to capture any
3269 pending interrupts.
3270
3271 **/
3272 VOID
3273 EFIAPI
3274 EnableDisableInterrupts (
3275 VOID
3276 );
3277
3278
3279 /**
3280 Retrieves the current CPU interrupt state.
3281
3282 Returns TRUE is interrupts are currently enabled. Otherwise
3283 returns FALSE.
3284
3285 @retval TRUE CPU interrupts are enabled.
3286 @retval FALSE CPU interrupts are disabled.
3287
3288 **/
3289 BOOLEAN
3290 EFIAPI
3291 GetInterruptState (
3292 VOID
3293 );
3294
3295
3296 /**
3297 Set the current CPU interrupt state.
3298
3299 Sets the current CPU interrupt state to the state specified by
3300 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3301 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3302 returned.
3303
3304 @param InterruptState TRUE if interrupts should enabled. FALSE if
3305 interrupts should be disabled.
3306
3307 @return InterruptState
3308
3309 **/
3310 BOOLEAN
3311 EFIAPI
3312 SetInterruptState (
3313 IN BOOLEAN InterruptState
3314 );
3315
3316
3317 /**
3318 Requests CPU to pause for a short period of time.
3319
3320 Requests CPU to pause for a short period of time. Typically used in MP
3321 systems to prevent memory starvation while waiting for a spin lock.
3322
3323 **/
3324 VOID
3325 EFIAPI
3326 CpuPause (
3327 VOID
3328 );
3329
3330
3331 /**
3332 Transfers control to a function starting with a new stack.
3333
3334 Transfers control to the function specified by EntryPoint using the
3335 new stack specified by NewStack and passing in the parameters specified
3336 by Context1 and Context2. Context1 and Context2 are optional and may
3337 be NULL. The function EntryPoint must never return. This function
3338 supports a variable number of arguments following the NewStack parameter.
3339 These additional arguments are ignored on IA-32, x64, and EBC architectures.
3340 Itanium processors expect one additional parameter of type VOID * that specifies
3341 the new backing store pointer.
3342
3343 If EntryPoint is NULL, then ASSERT().
3344 If NewStack is NULL, then ASSERT().
3345
3346 @param EntryPoint A pointer to function to call with the new stack.
3347 @param Context1 A pointer to the context to pass into the EntryPoint
3348 function.
3349 @param Context2 A pointer to the context to pass into the EntryPoint
3350 function.
3351 @param NewStack A pointer to the new stack to use for the EntryPoint
3352 function.
3353 @param ... This variable argument list is ignored for IA-32, x64, and EBC architectures.
3354 For Itanium processors, this variable argument list is expected to contain
3355 a single parameter of type VOID * that specifies the new backing
3356 store pointer.
3357
3358
3359 **/
3360 VOID
3361 EFIAPI
3362 SwitchStack (
3363 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3364 IN VOID *Context1, OPTIONAL
3365 IN VOID *Context2, OPTIONAL
3366 IN VOID *NewStack,
3367 ...
3368 );
3369
3370
3371 /**
3372 Generates a breakpoint on the CPU.
3373
3374 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3375 that code can resume normal execution after the breakpoint.
3376
3377 **/
3378 VOID
3379 EFIAPI
3380 CpuBreakpoint (
3381 VOID
3382 );
3383
3384
3385 /**
3386 Executes an infinite loop.
3387
3388 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3389 past the loop and the code that follows the loop must execute properly. This
3390 implies that the infinite loop must not cause the code that follow it to be
3391 optimized away.
3392
3393 **/
3394 VOID
3395 EFIAPI
3396 CpuDeadLoop (
3397 VOID
3398 );
3399
3400 #if defined (MDE_CPU_IPF)
3401
3402 /**
3403 Flush a range of cache lines in the cache coherency domain of the calling
3404 CPU.
3405
3406 Flushes the cache lines specified by Address and Length. If Address is not aligned
3407 on a cache line boundary, then entire cache line containing Address is flushed.
3408 If Address + Length is not aligned on a cache line boundary, then the entire cache
3409 line containing Address + Length - 1 is flushed. This function may choose to flush
3410 the entire cache if that is more efficient than flushing the specified range. If
3411 Length is 0, the no cache lines are flushed. Address is returned.
3412 This function is only available on Itanium processors.
3413
3414 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3415
3416 @param Address The base address of the instruction lines to invalidate. If
3417 the CPU is in a physical addressing mode, then Address is a
3418 physical address. If the CPU is in a virtual addressing mode,
3419 then Address is a virtual address.
3420
3421 @param Length The number of bytes to invalidate from the instruction cache.
3422
3423 @return Address.
3424
3425 **/
3426 VOID *
3427 EFIAPI
3428 AsmFlushCacheRange (
3429 IN VOID *Address,
3430 IN UINTN Length
3431 );
3432
3433
3434 /**
3435 Executes a FC instruction
3436 Executes a FC instruction on the cache line specified by Address.
3437 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3438 An implementation may flush a larger region. This function is only available on Itanium processors.
3439
3440 @param Address The Address of cache line to be flushed.
3441
3442 @return The address of FC instruction executed.
3443
3444 **/
3445 UINT64
3446 EFIAPI
3447 AsmFc (
3448 IN UINT64 Address
3449 );
3450
3451
3452 /**
3453 Executes a FC.I instruction.
3454 Executes a FC.I instruction on the cache line specified by Address.
3455 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3456 An implementation may flush a larger region. This function is only available on Itanium processors.
3457
3458 @param Address The Address of cache line to be flushed.
3459
3460 @return The address of FC.I instruction executed.
3461
3462 **/
3463 UINT64
3464 EFIAPI
3465 AsmFci (
3466 IN UINT64 Address
3467 );
3468
3469
3470 /**
3471 Reads the current value of a Processor Identifier Register (CPUID).
3472
3473 Reads and returns the current value of Processor Identifier Register specified by Index.
3474 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3475 registers) is determined by CPUID [3] bits {7:0}.
3476 No parameter checking is performed on Index. If the Index value is beyond the
3477 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3478 must either guarantee that Index is valid, or the caller must set up fault handlers to
3479 catch the faults. This function is only available on Itanium processors.
3480
3481 @param Index The 8-bit Processor Identifier Register index to read.
3482
3483 @return The current value of Processor Identifier Register specified by Index.
3484
3485 **/
3486 UINT64
3487 EFIAPI
3488 AsmReadCpuid (
3489 IN UINT8 Index
3490 );
3491
3492
3493 /**
3494 Reads the current value of 64-bit Processor Status Register (PSR).
3495 This function is only available on Itanium processors.
3496
3497 @return The current value of PSR.
3498
3499 **/
3500 UINT64
3501 EFIAPI
3502 AsmReadPsr (
3503 VOID
3504 );
3505
3506
3507 /**
3508 Writes the current value of 64-bit Processor Status Register (PSR).
3509
3510 No parameter checking is performed on Value. All bits of Value corresponding to
3511 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3512 The caller must either guarantee that Value is valid, or the caller must set up
3513 fault handlers to catch the faults. This function is only available on Itanium processors.
3514
3515 @param Value The 64-bit value to write to PSR.
3516
3517 @return The 64-bit value written to the PSR.
3518
3519 **/
3520 UINT64
3521 EFIAPI
3522 AsmWritePsr (
3523 IN UINT64 Value
3524 );
3525
3526
3527 /**
3528 Reads the current value of 64-bit Kernel Register #0 (KR0).
3529
3530 Reads and returns the current value of KR0.
3531 This function is only available on Itanium processors.
3532
3533 @return The current value of KR0.
3534
3535 **/
3536 UINT64
3537 EFIAPI
3538 AsmReadKr0 (
3539 VOID
3540 );
3541
3542
3543 /**
3544 Reads the current value of 64-bit Kernel Register #1 (KR1).
3545
3546 Reads and returns the current value of KR1.
3547 This function is only available on Itanium processors.
3548
3549 @return The current value of KR1.
3550
3551 **/
3552 UINT64
3553 EFIAPI
3554 AsmReadKr1 (
3555 VOID
3556 );
3557
3558
3559 /**
3560 Reads the current value of 64-bit Kernel Register #2 (KR2).
3561
3562 Reads and returns the current value of KR2.
3563 This function is only available on Itanium processors.
3564
3565 @return The current value of KR2.
3566
3567 **/
3568 UINT64
3569 EFIAPI
3570 AsmReadKr2 (
3571 VOID
3572 );
3573
3574
3575 /**
3576 Reads the current value of 64-bit Kernel Register #3 (KR3).
3577
3578 Reads and returns the current value of KR3.
3579 This function is only available on Itanium processors.
3580
3581 @return The current value of KR3.
3582
3583 **/
3584 UINT64
3585 EFIAPI
3586 AsmReadKr3 (
3587 VOID
3588 );
3589
3590
3591 /**
3592 Reads the current value of 64-bit Kernel Register #4 (KR4).
3593
3594 Reads and returns the current value of KR4.
3595 This function is only available on Itanium processors.
3596
3597 @return The current value of KR4.
3598
3599 **/
3600 UINT64
3601 EFIAPI
3602 AsmReadKr4 (
3603 VOID
3604 );
3605
3606
3607 /**
3608 Reads the current value of 64-bit Kernel Register #5 (KR5).
3609
3610 Reads and returns the current value of KR5.
3611 This function is only available on Itanium processors.
3612
3613 @return The current value of KR5.
3614
3615 **/
3616 UINT64
3617 EFIAPI
3618 AsmReadKr5 (
3619 VOID
3620 );
3621
3622
3623 /**
3624 Reads the current value of 64-bit Kernel Register #6 (KR6).
3625
3626 Reads and returns the current value of KR6.
3627 This function is only available on Itanium processors.
3628
3629 @return The current value of KR6.
3630
3631 **/
3632 UINT64
3633 EFIAPI
3634 AsmReadKr6 (
3635 VOID
3636 );
3637
3638
3639 /**
3640 Reads the current value of 64-bit Kernel Register #7 (KR7).
3641
3642 Reads and returns the current value of KR7.
3643 This function is only available on Itanium processors.
3644
3645 @return The current value of KR7.
3646
3647 **/
3648 UINT64
3649 EFIAPI
3650 AsmReadKr7 (
3651 VOID
3652 );
3653
3654
3655 /**
3656 Write the current value of 64-bit Kernel Register #0 (KR0).
3657
3658 Writes the current value of KR0. The 64-bit value written to
3659 the KR0 is returned. This function is only available on Itanium processors.
3660
3661 @param Value The 64-bit value to write to KR0.
3662
3663 @return The 64-bit value written to the KR0.
3664
3665 **/
3666 UINT64
3667 EFIAPI
3668 AsmWriteKr0 (
3669 IN UINT64 Value
3670 );
3671
3672
3673 /**
3674 Write the current value of 64-bit Kernel Register #1 (KR1).
3675
3676 Writes the current value of KR1. The 64-bit value written to
3677 the KR1 is returned. This function is only available on Itanium processors.
3678
3679 @param Value The 64-bit value to write to KR1.
3680
3681 @return The 64-bit value written to the KR1.
3682
3683 **/
3684 UINT64
3685 EFIAPI
3686 AsmWriteKr1 (
3687 IN UINT64 Value
3688 );
3689
3690
3691 /**
3692 Write the current value of 64-bit Kernel Register #2 (KR2).
3693
3694 Writes the current value of KR2. The 64-bit value written to
3695 the KR2 is returned. This function is only available on Itanium processors.
3696
3697 @param Value The 64-bit value to write to KR2.
3698
3699 @return The 64-bit value written to the KR2.
3700
3701 **/
3702 UINT64
3703 EFIAPI
3704 AsmWriteKr2 (
3705 IN UINT64 Value
3706 );
3707
3708
3709 /**
3710 Write the current value of 64-bit Kernel Register #3 (KR3).
3711
3712 Writes the current value of KR3. The 64-bit value written to
3713 the KR3 is returned. This function is only available on Itanium processors.
3714
3715 @param Value The 64-bit value to write to KR3.
3716
3717 @return The 64-bit value written to the KR3.
3718
3719 **/
3720 UINT64
3721 EFIAPI
3722 AsmWriteKr3 (
3723 IN UINT64 Value
3724 );
3725
3726
3727 /**
3728 Write the current value of 64-bit Kernel Register #4 (KR4).
3729
3730 Writes the current value of KR4. The 64-bit value written to
3731 the KR4 is returned. This function is only available on Itanium processors.
3732
3733 @param Value The 64-bit value to write to KR4.
3734
3735 @return The 64-bit value written to the KR4.
3736
3737 **/
3738 UINT64
3739 EFIAPI
3740 AsmWriteKr4 (
3741 IN UINT64 Value
3742 );
3743
3744
3745 /**
3746 Write the current value of 64-bit Kernel Register #5 (KR5).
3747
3748 Writes the current value of KR5. The 64-bit value written to
3749 the KR5 is returned. This function is only available on Itanium processors.
3750
3751 @param Value The 64-bit value to write to KR5.
3752
3753 @return The 64-bit value written to the KR5.
3754
3755 **/
3756 UINT64
3757 EFIAPI
3758 AsmWriteKr5 (
3759 IN UINT64 Value
3760 );
3761
3762
3763 /**
3764 Write the current value of 64-bit Kernel Register #6 (KR6).
3765
3766 Writes the current value of KR6. The 64-bit value written to
3767 the KR6 is returned. This function is only available on Itanium processors.
3768
3769 @param Value The 64-bit value to write to KR6.
3770
3771 @return The 64-bit value written to the KR6.
3772
3773 **/
3774 UINT64
3775 EFIAPI
3776 AsmWriteKr6 (
3777 IN UINT64 Value
3778 );
3779
3780
3781 /**
3782 Write the current value of 64-bit Kernel Register #7 (KR7).
3783
3784 Writes the current value of KR7. The 64-bit value written to
3785 the KR7 is returned. This function is only available on Itanium processors.
3786
3787 @param Value The 64-bit value to write to KR7.
3788
3789 @return The 64-bit value written to the KR7.
3790
3791 **/
3792 UINT64
3793 EFIAPI
3794 AsmWriteKr7 (
3795 IN UINT64 Value
3796 );
3797
3798
3799 /**
3800 Reads the current value of Interval Timer Counter Register (ITC).
3801
3802 Reads and returns the current value of ITC.
3803 This function is only available on Itanium processors.
3804
3805 @return The current value of ITC.
3806
3807 **/
3808 UINT64
3809 EFIAPI
3810 AsmReadItc (
3811 VOID
3812 );
3813
3814
3815 /**
3816 Reads the current value of Interval Timer Vector Register (ITV).
3817
3818 Reads and returns the current value of ITV.
3819 This function is only available on Itanium processors.
3820
3821 @return The current value of ITV.
3822
3823 **/
3824 UINT64
3825 EFIAPI
3826 AsmReadItv (
3827 VOID
3828 );
3829
3830
3831 /**
3832 Reads the current value of Interval Timer Match Register (ITM).
3833
3834 Reads and returns the current value of ITM.
3835 This function is only available on Itanium processors.
3836
3837 @return The current value of ITM.
3838 **/
3839 UINT64
3840 EFIAPI
3841 AsmReadItm (
3842 VOID
3843 );
3844
3845
3846 /**
3847 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
3848
3849 Writes the current value of ITC. The 64-bit value written to the ITC is returned.
3850 This function is only available on Itanium processors.
3851
3852 @param Value The 64-bit value to write to ITC.
3853
3854 @return The 64-bit value written to the ITC.
3855
3856 **/
3857 UINT64
3858 EFIAPI
3859 AsmWriteItc (
3860 IN UINT64 Value
3861 );
3862
3863
3864 /**
3865 Writes the current value of 64-bit Interval Timer Match Register (ITM).
3866
3867 Writes the current value of ITM. The 64-bit value written to the ITM is returned.
3868 This function is only available on Itanium processors.
3869
3870 @param Value The 64-bit value to write to ITM.
3871
3872 @return The 64-bit value written to the ITM.
3873
3874 **/
3875 UINT64
3876 EFIAPI
3877 AsmWriteItm (
3878 IN UINT64 Value
3879 );
3880
3881
3882 /**
3883 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
3884
3885 Writes the current value of ITV. The 64-bit value written to the ITV is returned.
3886 No parameter checking is performed on Value. All bits of Value corresponding to
3887 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
3888 The caller must either guarantee that Value is valid, or the caller must set up
3889 fault handlers to catch the faults.
3890 This function is only available on Itanium processors.
3891
3892 @param Value The 64-bit value to write to ITV.
3893
3894 @return The 64-bit value written to the ITV.
3895
3896 **/
3897 UINT64
3898 EFIAPI
3899 AsmWriteItv (
3900 IN UINT64 Value
3901 );
3902
3903
3904 /**
3905 Reads the current value of Default Control Register (DCR).
3906
3907 Reads and returns the current value of DCR. This function is only available on Itanium processors.
3908
3909 @return The current value of DCR.
3910
3911 **/
3912 UINT64
3913 EFIAPI
3914 AsmReadDcr (
3915 VOID
3916 );
3917
3918
3919 /**
3920 Reads the current value of Interruption Vector Address Register (IVA).
3921
3922 Reads and returns the current value of IVA. This function is only available on Itanium processors.
3923
3924 @return The current value of IVA.
3925 **/
3926 UINT64
3927 EFIAPI
3928 AsmReadIva (
3929 VOID
3930 );
3931
3932
3933 /**
3934 Reads the current value of Page Table Address Register (PTA).
3935
3936 Reads and returns the current value of PTA. This function is only available on Itanium processors.
3937
3938 @return The current value of PTA.
3939
3940 **/
3941 UINT64
3942 EFIAPI
3943 AsmReadPta (
3944 VOID
3945 );
3946
3947
3948 /**
3949 Writes the current value of 64-bit Default Control Register (DCR).
3950
3951 Writes the current value of DCR. The 64-bit value written to the DCR is returned.
3952 No parameter checking is performed on Value. All bits of Value corresponding to
3953 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
3954 The caller must either guarantee that Value is valid, or the caller must set up
3955 fault handlers to catch the faults.
3956 This function is only available on Itanium processors.
3957
3958 @param Value The 64-bit value to write to DCR.
3959
3960 @return The 64-bit value written to the DCR.
3961
3962 **/
3963 UINT64
3964 EFIAPI
3965 AsmWriteDcr (
3966 IN UINT64 Value
3967 );
3968
3969
3970 /**
3971 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
3972
3973 Writes the current value of IVA. The 64-bit value written to the IVA is returned.
3974 The size of vector table is 32 K bytes and is 32 K bytes aligned
3975 the low 15 bits of Value is ignored when written.
3976 This function is only available on Itanium processors.
3977
3978 @param Value The 64-bit value to write to IVA.
3979
3980 @return The 64-bit value written to the IVA.
3981
3982 **/
3983 UINT64
3984 EFIAPI
3985 AsmWriteIva (
3986 IN UINT64 Value
3987 );
3988
3989
3990 /**
3991 Writes the current value of 64-bit Page Table Address Register (PTA).
3992
3993 Writes the current value of PTA. The 64-bit value written to the PTA is returned.
3994 No parameter checking is performed on Value. All bits of Value corresponding to
3995 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
3996 The caller must either guarantee that Value is valid, or the caller must set up
3997 fault handlers to catch the faults.
3998 This function is only available on Itanium processors.
3999
4000 @param Value The 64-bit value to write to PTA.
4001
4002 @return The 64-bit value written to the PTA.
4003 **/
4004 UINT64
4005 EFIAPI
4006 AsmWritePta (
4007 IN UINT64 Value
4008 );
4009
4010
4011 /**
4012 Reads the current value of Local Interrupt ID Register (LID).
4013
4014 Reads and returns the current value of LID. This function is only available on Itanium processors.
4015
4016 @return The current value of LID.
4017
4018 **/
4019 UINT64
4020 EFIAPI
4021 AsmReadLid (
4022 VOID
4023 );
4024
4025
4026 /**
4027 Reads the current value of External Interrupt Vector Register (IVR).
4028
4029 Reads and returns the current value of IVR. This function is only available on Itanium processors.
4030
4031 @return The current value of IVR.
4032
4033 **/
4034 UINT64
4035 EFIAPI
4036 AsmReadIvr (
4037 VOID
4038 );
4039
4040
4041 /**
4042 Reads the current value of Task Priority Register (TPR).
4043
4044 Reads and returns the current value of TPR. This function is only available on Itanium processors.
4045
4046 @return The current value of TPR.
4047
4048 **/
4049 UINT64
4050 EFIAPI
4051 AsmReadTpr (
4052 VOID
4053 );
4054
4055
4056 /**
4057 Reads the current value of External Interrupt Request Register #0 (IRR0).
4058
4059 Reads and returns the current value of IRR0. This function is only available on Itanium processors.
4060
4061 @return The current value of IRR0.
4062
4063 **/
4064 UINT64
4065 EFIAPI
4066 AsmReadIrr0 (
4067 VOID
4068 );
4069
4070
4071 /**
4072 Reads the current value of External Interrupt Request Register #1 (IRR1).
4073
4074 Reads and returns the current value of IRR1. This function is only available on Itanium processors.
4075
4076 @return The current value of IRR1.
4077
4078 **/
4079 UINT64
4080 EFIAPI
4081 AsmReadIrr1 (
4082 VOID
4083 );
4084
4085
4086 /**
4087 Reads the current value of External Interrupt Request Register #2 (IRR2).
4088
4089 Reads and returns the current value of IRR2. This function is only available on Itanium processors.
4090
4091 @return The current value of IRR2.
4092
4093 **/
4094 UINT64
4095 EFIAPI
4096 AsmReadIrr2 (
4097 VOID
4098 );
4099
4100
4101 /**
4102 Reads the current value of External Interrupt Request Register #3 (IRR3).
4103
4104 Reads and returns the current value of IRR3. This function is only available on Itanium processors.
4105
4106 @return The current value of IRR3.
4107
4108 **/
4109 UINT64
4110 EFIAPI
4111 AsmReadIrr3 (
4112 VOID
4113 );
4114
4115
4116 /**
4117 Reads the current value of Performance Monitor Vector Register (PMV).
4118
4119 Reads and returns the current value of PMV. This function is only available on Itanium processors.
4120
4121 @return The current value of PMV.
4122
4123 **/
4124 UINT64
4125 EFIAPI
4126 AsmReadPmv (
4127 VOID
4128 );
4129
4130
4131 /**
4132 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4133
4134 Reads and returns the current value of CMCV. This function is only available on Itanium processors.
4135
4136 @return The current value of CMCV.
4137
4138 **/
4139 UINT64
4140 EFIAPI
4141 AsmReadCmcv (
4142 VOID
4143 );
4144
4145
4146 /**
4147 Reads the current value of Local Redirection Register #0 (LRR0).
4148
4149 Reads and returns the current value of LRR0. This function is only available on Itanium processors.
4150
4151 @return The current value of LRR0.
4152
4153 **/
4154 UINT64
4155 EFIAPI
4156 AsmReadLrr0 (
4157 VOID
4158 );
4159
4160
4161 /**
4162 Reads the current value of Local Redirection Register #1 (LRR1).
4163
4164 Reads and returns the current value of LRR1. This function is only available on Itanium processors.
4165
4166 @return The current value of LRR1.
4167
4168 **/
4169 UINT64
4170 EFIAPI
4171 AsmReadLrr1 (
4172 VOID
4173 );
4174
4175
4176 /**
4177 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4178
4179 Writes the current value of LID. The 64-bit value written to the LID is returned.
4180 No parameter checking is performed on Value. All bits of Value corresponding to
4181 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4182 The caller must either guarantee that Value is valid, or the caller must set up
4183 fault handlers to catch the faults.
4184 This function is only available on Itanium processors.
4185
4186 @param Value The 64-bit value to write to LID.
4187
4188 @return The 64-bit value written to the LID.
4189
4190 **/
4191 UINT64
4192 EFIAPI
4193 AsmWriteLid (
4194 IN UINT64 Value
4195 );
4196
4197
4198 /**
4199 Writes the current value of 64-bit Task Priority Register (TPR).
4200
4201 Writes the current value of TPR. The 64-bit value written to the TPR is returned.
4202 No parameter checking is performed on Value. All bits of Value corresponding to
4203 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4204 The caller must either guarantee that Value is valid, or the caller must set up
4205 fault handlers to catch the faults.
4206 This function is only available on Itanium processors.
4207
4208 @param Value The 64-bit value to write to TPR.
4209
4210 @return The 64-bit value written to the TPR.
4211
4212 **/
4213 UINT64
4214 EFIAPI
4215 AsmWriteTpr (
4216 IN UINT64 Value
4217 );
4218
4219
4220 /**
4221 Performs a write operation on End OF External Interrupt Register (EOI).
4222
4223 Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.
4224
4225 **/
4226 VOID
4227 EFIAPI
4228 AsmWriteEoi (
4229 VOID
4230 );
4231
4232
4233 /**
4234 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4235
4236 Writes the current value of PMV. The 64-bit value written to the PMV is returned.
4237 No parameter checking is performed on Value. All bits of Value corresponding
4238 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4239 The caller must either guarantee that Value is valid, or the caller must set up
4240 fault handlers to catch the faults.
4241 This function is only available on Itanium processors.
4242
4243 @param Value The 64-bit value to write to PMV.
4244
4245 @return The 64-bit value written to the PMV.
4246
4247 **/
4248 UINT64
4249 EFIAPI
4250 AsmWritePmv (
4251 IN UINT64 Value
4252 );
4253
4254
4255 /**
4256 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4257
4258 Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.
4259 No parameter checking is performed on Value. All bits of Value corresponding
4260 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4261 The caller must either guarantee that Value is valid, or the caller must set up
4262 fault handlers to catch the faults.
4263 This function is only available on Itanium processors.
4264
4265 @param Value The 64-bit value to write to CMCV.
4266
4267 @return The 64-bit value written to the CMCV.
4268
4269 **/
4270 UINT64
4271 EFIAPI
4272 AsmWriteCmcv (
4273 IN UINT64 Value
4274 );
4275
4276
4277 /**
4278 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4279
4280 Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.
4281 No parameter checking is performed on Value. All bits of Value corresponding
4282 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4283 The caller must either guarantee that Value is valid, or the caller must set up
4284 fault handlers to catch the faults.
4285 This function is only available on Itanium processors.
4286
4287 @param Value The 64-bit value to write to LRR0.
4288
4289 @return The 64-bit value written to the LRR0.
4290
4291 **/
4292 UINT64
4293 EFIAPI
4294 AsmWriteLrr0 (
4295 IN UINT64 Value
4296 );
4297
4298
4299 /**
4300 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4301
4302 Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.
4303 No parameter checking is performed on Value. All bits of Value corresponding
4304 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4305 The caller must either guarantee that Value is valid, or the caller must
4306 set up fault handlers to catch the faults.
4307 This function is only available on Itanium processors.
4308
4309 @param Value The 64-bit value to write to LRR1.
4310
4311 @return The 64-bit value written to the LRR1.
4312
4313 **/
4314 UINT64
4315 EFIAPI
4316 AsmWriteLrr1 (
4317 IN UINT64 Value
4318 );
4319
4320
4321 /**
4322 Reads the current value of Instruction Breakpoint Register (IBR).
4323
4324 The Instruction Breakpoint Registers are used in pairs. The even numbered
4325 registers contain breakpoint addresses, and the odd numbered registers contain
4326 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4327 on all processor models. Implemented registers are contiguous starting with
4328 register 0. No parameter checking is performed on Index, and if the Index value
4329 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4330 occur. The caller must either guarantee that Index is valid, or the caller must
4331 set up fault handlers to catch the faults.
4332 This function is only available on Itanium processors.
4333
4334 @param Index The 8-bit Instruction Breakpoint Register index to read.
4335
4336 @return The current value of Instruction Breakpoint Register specified by Index.
4337
4338 **/
4339 UINT64
4340 EFIAPI
4341 AsmReadIbr (
4342 IN UINT8 Index
4343 );
4344
4345
4346 /**
4347 Reads the current value of Data Breakpoint Register (DBR).
4348
4349 The Data Breakpoint Registers are used in pairs. The even numbered registers
4350 contain breakpoint addresses, and odd numbered registers contain breakpoint
4351 mask conditions. At least 4 data registers pairs are implemented on all processor
4352 models. Implemented registers are contiguous starting with register 0.
4353 No parameter checking is performed on Index. If the Index value is beyond
4354 the implemented DBR register range, a Reserved Register/Field fault may occur.
4355 The caller must either guarantee that Index is valid, or the caller must set up
4356 fault handlers to catch the faults.
4357 This function is only available on Itanium processors.
4358
4359 @param Index The 8-bit Data Breakpoint Register index to read.
4360
4361 @return The current value of Data Breakpoint Register specified by Index.
4362
4363 **/
4364 UINT64
4365 EFIAPI
4366 AsmReadDbr (
4367 IN UINT8 Index
4368 );
4369
4370
4371 /**
4372 Reads the current value of Performance Monitor Configuration Register (PMC).
4373
4374 All processor implementations provide at least 4 performance counters
4375 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4376 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4377 additional implementation-dependent PMC and PMD to increase the number of
4378 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4379 register set is implementation dependent. No parameter checking is performed
4380 on Index. If the Index value is beyond the implemented PMC register range,
4381 zero value will be returned.
4382 This function is only available on Itanium processors.
4383
4384 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4385
4386 @return The current value of Performance Monitor Configuration Register
4387 specified by Index.
4388
4389 **/
4390 UINT64
4391 EFIAPI
4392 AsmReadPmc (
4393 IN UINT8 Index
4394 );
4395
4396
4397 /**
4398 Reads the current value of Performance Monitor Data Register (PMD).
4399
4400 All processor implementations provide at least 4 performance counters
4401 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4402 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4403 provide additional implementation-dependent PMC and PMD to increase the number
4404 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4405 register set is implementation dependent. No parameter checking is performed
4406 on Index. If the Index value is beyond the implemented PMD register range,
4407 zero value will be returned.
4408 This function is only available on Itanium processors.
4409
4410 @param Index The 8-bit Performance Monitor Data Register index to read.
4411
4412 @return The current value of Performance Monitor Data Register specified by Index.
4413
4414 **/
4415 UINT64
4416 EFIAPI
4417 AsmReadPmd (
4418 IN UINT8 Index
4419 );
4420
4421
4422 /**
4423 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4424
4425 Writes current value of Instruction Breakpoint Register specified by Index.
4426 The Instruction Breakpoint Registers are used in pairs. The even numbered
4427 registers contain breakpoint addresses, and odd numbered registers contain
4428 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4429 on all processor models. Implemented registers are contiguous starting with
4430 register 0. No parameter checking is performed on Index. If the Index value
4431 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4432 occur. The caller must either guarantee that Index is valid, or the caller must
4433 set up fault handlers to catch the faults.
4434 This function is only available on Itanium processors.
4435
4436 @param Index The 8-bit Instruction Breakpoint Register index to write.
4437 @param Value The 64-bit value to write to IBR.
4438
4439 @return The 64-bit value written to the IBR.
4440
4441 **/
4442 UINT64
4443 EFIAPI
4444 AsmWriteIbr (
4445 IN UINT8 Index,
4446 IN UINT64 Value
4447 );
4448
4449
4450 /**
4451 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4452
4453 Writes current value of Data Breakpoint Register specified by Index.
4454 The Data Breakpoint Registers are used in pairs. The even numbered registers
4455 contain breakpoint addresses, and odd numbered registers contain breakpoint
4456 mask conditions. At least 4 data registers pairs are implemented on all processor
4457 models. Implemented registers are contiguous starting with register 0. No parameter
4458 checking is performed on Index. If the Index value is beyond the implemented
4459 DBR register range, a Reserved Register/Field fault may occur. The caller must
4460 either guarantee that Index is valid, or the caller must set up fault handlers to
4461 catch the faults.
4462 This function is only available on Itanium processors.
4463
4464 @param Index The 8-bit Data Breakpoint Register index to write.
4465 @param Value The 64-bit value to write to DBR.
4466
4467 @return The 64-bit value written to the DBR.
4468
4469 **/
4470 UINT64
4471 EFIAPI
4472 AsmWriteDbr (
4473 IN UINT8 Index,
4474 IN UINT64 Value
4475 );
4476
4477
4478 /**
4479 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4480
4481 Writes current value of Performance Monitor Configuration Register specified by Index.
4482 All processor implementations provide at least 4 performance counters
4483 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
4484 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4485 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4486 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4487 dependent. No parameter checking is performed on Index. If the Index value is
4488 beyond the implemented PMC register range, the write is ignored.
4489 This function is only available on Itanium processors.
4490
4491 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4492 @param Value The 64-bit value to write to PMC.
4493
4494 @return The 64-bit value written to the PMC.
4495
4496 **/
4497 UINT64
4498 EFIAPI
4499 AsmWritePmc (
4500 IN UINT8 Index,
4501 IN UINT64 Value
4502 );
4503
4504
4505 /**
4506 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4507
4508 Writes current value of Performance Monitor Data Register specified by Index.
4509 All processor implementations provide at least 4 performance counters
4510 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4511 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4512 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4513 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4514 is implementation dependent. No parameter checking is performed on Index. If the
4515 Index value is beyond the implemented PMD register range, the write is ignored.
4516 This function is only available on Itanium processors.
4517
4518 @param Index The 8-bit Performance Monitor Data Register index to write.
4519 @param Value The 64-bit value to write to PMD.
4520
4521 @return The 64-bit value written to the PMD.
4522
4523 **/
4524 UINT64
4525 EFIAPI
4526 AsmWritePmd (
4527 IN UINT8 Index,
4528 IN UINT64 Value
4529 );
4530
4531
4532 /**
4533 Reads the current value of 64-bit Global Pointer (GP).
4534
4535 Reads and returns the current value of GP.
4536 This function is only available on Itanium processors.
4537
4538 @return The current value of GP.
4539
4540 **/
4541 UINT64
4542 EFIAPI
4543 AsmReadGp (
4544 VOID
4545 );
4546
4547
4548 /**
4549 Write the current value of 64-bit Global Pointer (GP).
4550
4551 Writes the current value of GP. The 64-bit value written to the GP is returned.
4552 No parameter checking is performed on Value.
4553 This function is only available on Itanium processors.
4554
4555 @param Value The 64-bit value to write to GP.
4556
4557 @return The 64-bit value written to the GP.
4558
4559 **/
4560 UINT64
4561 EFIAPI
4562 AsmWriteGp (
4563 IN UINT64 Value
4564 );
4565
4566
4567 /**
4568 Reads the current value of 64-bit Stack Pointer (SP).
4569
4570 Reads and returns the current value of SP.
4571 This function is only available on Itanium processors.
4572
4573 @return The current value of SP.
4574
4575 **/
4576 UINT64
4577 EFIAPI
4578 AsmReadSp (
4579 VOID
4580 );
4581
4582
4583 ///
4584 /// Valid Index value for AsmReadControlRegister()
4585 ///
4586 #define IPF_CONTROL_REGISTER_DCR 0
4587 #define IPF_CONTROL_REGISTER_ITM 1
4588 #define IPF_CONTROL_REGISTER_IVA 2
4589 #define IPF_CONTROL_REGISTER_PTA 8
4590 #define IPF_CONTROL_REGISTER_IPSR 16
4591 #define IPF_CONTROL_REGISTER_ISR 17
4592 #define IPF_CONTROL_REGISTER_IIP 19
4593 #define IPF_CONTROL_REGISTER_IFA 20
4594 #define IPF_CONTROL_REGISTER_ITIR 21
4595 #define IPF_CONTROL_REGISTER_IIPA 22
4596 #define IPF_CONTROL_REGISTER_IFS 23
4597 #define IPF_CONTROL_REGISTER_IIM 24
4598 #define IPF_CONTROL_REGISTER_IHA 25
4599 #define IPF_CONTROL_REGISTER_LID 64
4600 #define IPF_CONTROL_REGISTER_IVR 65
4601 #define IPF_CONTROL_REGISTER_TPR 66
4602 #define IPF_CONTROL_REGISTER_EOI 67
4603 #define IPF_CONTROL_REGISTER_IRR0 68
4604 #define IPF_CONTROL_REGISTER_IRR1 69
4605 #define IPF_CONTROL_REGISTER_IRR2 70
4606 #define IPF_CONTROL_REGISTER_IRR3 71
4607 #define IPF_CONTROL_REGISTER_ITV 72
4608 #define IPF_CONTROL_REGISTER_PMV 73
4609 #define IPF_CONTROL_REGISTER_CMCV 74
4610 #define IPF_CONTROL_REGISTER_LRR0 80
4611 #define IPF_CONTROL_REGISTER_LRR1 81
4612
4613 /**
4614 Reads a 64-bit control register.
4615
4616 Reads and returns the control register specified by Index. The valid Index valued are defined
4617 above in "Related Definitions".
4618 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.
4619
4620 @param Index The index of the control register to read.
4621
4622 @return The control register specified by Index.
4623
4624 **/
4625 UINT64
4626 EFIAPI
4627 AsmReadControlRegister (
4628 IN UINT64 Index
4629 );
4630
4631
4632 ///
4633 /// Valid Index value for AsmReadApplicationRegister()
4634 ///
4635 #define IPF_APPLICATION_REGISTER_K0 0
4636 #define IPF_APPLICATION_REGISTER_K1 1
4637 #define IPF_APPLICATION_REGISTER_K2 2
4638 #define IPF_APPLICATION_REGISTER_K3 3
4639 #define IPF_APPLICATION_REGISTER_K4 4
4640 #define IPF_APPLICATION_REGISTER_K5 5
4641 #define IPF_APPLICATION_REGISTER_K6 6
4642 #define IPF_APPLICATION_REGISTER_K7 7
4643 #define IPF_APPLICATION_REGISTER_RSC 16
4644 #define IPF_APPLICATION_REGISTER_BSP 17
4645 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4646 #define IPF_APPLICATION_REGISTER_RNAT 19
4647 #define IPF_APPLICATION_REGISTER_FCR 21
4648 #define IPF_APPLICATION_REGISTER_EFLAG 24
4649 #define IPF_APPLICATION_REGISTER_CSD 25
4650 #define IPF_APPLICATION_REGISTER_SSD 26
4651 #define IPF_APPLICATION_REGISTER_CFLG 27
4652 #define IPF_APPLICATION_REGISTER_FSR 28
4653 #define IPF_APPLICATION_REGISTER_FIR 29
4654 #define IPF_APPLICATION_REGISTER_FDR 30
4655 #define IPF_APPLICATION_REGISTER_CCV 32
4656 #define IPF_APPLICATION_REGISTER_UNAT 36
4657 #define IPF_APPLICATION_REGISTER_FPSR 40
4658 #define IPF_APPLICATION_REGISTER_ITC 44
4659 #define IPF_APPLICATION_REGISTER_PFS 64
4660 #define IPF_APPLICATION_REGISTER_LC 65
4661 #define IPF_APPLICATION_REGISTER_EC 66
4662
4663 /**
4664 Reads a 64-bit application register.
4665
4666 Reads and returns the application register specified by Index. The valid Index valued are defined
4667 above in "Related Definitions".
4668 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.
4669
4670 @param Index The index of the application register to read.
4671
4672 @return The application register specified by Index.
4673
4674 **/
4675 UINT64
4676 EFIAPI
4677 AsmReadApplicationRegister (
4678 IN UINT64 Index
4679 );
4680
4681
4682 /**
4683 Reads the current value of a Machine Specific Register (MSR).
4684
4685 Reads and returns the current value of the Machine Specific Register specified by Index. No
4686 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4687 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4688 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4689 only available on Itanium processors.
4690
4691 @param Index The 8-bit Machine Specific Register index to read.
4692
4693 @return The current value of the Machine Specific Register specified by Index.
4694
4695 **/
4696 UINT64
4697 EFIAPI
4698 AsmReadMsr (
4699 IN UINT8 Index
4700 );
4701
4702
4703 /**
4704 Writes the current value of a Machine Specific Register (MSR).
4705
4706 Writes Value to the Machine Specific Register specified by Index. Value is returned. No
4707 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4708 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4709 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4710 only available on Itanium processors.
4711
4712 @param Index The 8-bit Machine Specific Register index to write.
4713 @param Value The 64-bit value to write to the Machine Specific Register.
4714
4715 @return The 64-bit value to write to the Machine Specific Register.
4716
4717 **/
4718 UINT64
4719 EFIAPI
4720 AsmWriteMsr (
4721 IN UINT8 Index,
4722 IN UINT64 Value
4723 );
4724
4725
4726 /**
4727 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4728
4729 Determines the current execution mode of the CPU.
4730 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4731 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4732 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4733 and -1 is returned.
4734 This function is only available on Itanium processors.
4735
4736 @retval 1 The CPU is in virtual mode.
4737 @retval 0 The CPU is in physical mode.
4738 @retval -1 The CPU is in mixed mode.
4739
4740 **/
4741 INT64
4742 EFIAPI
4743 AsmCpuVirtual (
4744 VOID
4745 );
4746
4747
4748 /**
4749 Makes a PAL procedure call.
4750
4751 This is a wrapper function to make a PAL procedure call. Based on the Index
4752 value this API will make static or stacked PAL call. The following table
4753 describes the usage of PAL Procedure Index Assignment. Architected procedures
4754 may be designated as required or optional. If a PAL procedure is specified
4755 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4756 Status field of the PAL_CALL_RETURN structure.
4757 This indicates that the procedure is not present in this PAL implementation.
4758 It is the caller's responsibility to check for this return code after calling
4759 any optional PAL procedure.
4760 No parameter checking is performed on the 5 input parameters, but there are
4761 some common rules that the caller should follow when making a PAL call. Any
4762 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4763 Unaligned addresses may cause undefined results. For those parameters defined
4764 as reserved or some fields defined as reserved must be zero filled or the invalid
4765 argument return value may be returned or undefined result may occur during the
4766 execution of the procedure. If the PalEntryPoint does not point to a valid
4767 PAL entry point then the system behavior is undefined. This function is only
4768 available on Itanium processors.
4769
4770 @param PalEntryPoint The PAL procedure calls entry point.
4771 @param Index The PAL procedure Index number.
4772 @param Arg2 The 2nd parameter for PAL procedure calls.
4773 @param Arg3 The 3rd parameter for PAL procedure calls.
4774 @param Arg4 The 4th parameter for PAL procedure calls.
4775
4776 @return structure returned from the PAL Call procedure, including the status and return value.
4777
4778 **/
4779 PAL_CALL_RETURN
4780 EFIAPI
4781 AsmPalCall (
4782 IN UINT64 PalEntryPoint,
4783 IN UINT64 Index,
4784 IN UINT64 Arg2,
4785 IN UINT64 Arg3,
4786 IN UINT64 Arg4
4787 );
4788 #endif
4789
4790 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4791 ///
4792 /// IA32 and x64 Specific Functions
4793 /// Byte packed structure for 16-bit Real Mode EFLAGS
4794 ///
4795 typedef union {
4796 struct {
4797 UINT32 CF:1; ///< Carry Flag
4798 UINT32 Reserved_0:1; ///< Reserved
4799 UINT32 PF:1; ///< Parity Flag
4800 UINT32 Reserved_1:1; ///< Reserved
4801 UINT32 AF:1; ///< Auxiliary Carry Flag
4802 UINT32 Reserved_2:1; ///< Reserved
4803 UINT32 ZF:1; ///< Zero Flag
4804 UINT32 SF:1; ///< Sign Flag
4805 UINT32 TF:1; ///< Trap Flag
4806 UINT32 IF:1; ///< Interrupt Enable Flag
4807 UINT32 DF:1; ///< Direction Flag
4808 UINT32 OF:1; ///< Overflow Flag
4809 UINT32 IOPL:2; ///< I/O Privilege Level
4810 UINT32 NT:1; ///< Nested Task
4811 UINT32 Reserved_3:1; ///< Reserved
4812 } Bits;
4813 UINT16 Uint16;
4814 } IA32_FLAGS16;
4815
4816 ///
4817 /// Byte packed structure for EFLAGS/RFLAGS
4818 /// 32-bits on IA-32
4819 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4820 ///
4821 typedef union {
4822 struct {
4823 UINT32 CF:1; ///< Carry Flag
4824 UINT32 Reserved_0:1; ///< Reserved
4825 UINT32 PF:1; ///< Parity Flag
4826 UINT32 Reserved_1:1; ///< Reserved
4827 UINT32 AF:1; ///< Auxiliary Carry Flag
4828 UINT32 Reserved_2:1; ///< Reserved
4829 UINT32 ZF:1; ///< Zero Flag
4830 UINT32 SF:1; ///< Sign Flag
4831 UINT32 TF:1; ///< Trap Flag
4832 UINT32 IF:1; ///< Interrupt Enable Flag
4833 UINT32 DF:1; ///< Direction Flag
4834 UINT32 OF:1; ///< Overflow Flag
4835 UINT32 IOPL:2; ///< I/O Privilege Level
4836 UINT32 NT:1; ///< Nested Task
4837 UINT32 Reserved_3:1; ///< Reserved
4838 UINT32 RF:1; ///< Resume Flag
4839 UINT32 VM:1; ///< Virtual 8086 Mode
4840 UINT32 AC:1; ///< Alignment Check
4841 UINT32 VIF:1; ///< Virtual Interrupt Flag
4842 UINT32 VIP:1; ///< Virtual Interrupt Pending
4843 UINT32 ID:1; ///< ID Flag
4844 UINT32 Reserved_4:10; ///< Reserved
4845 } Bits;
4846 UINTN UintN;
4847 } IA32_EFLAGS32;
4848
4849 ///
4850 /// Byte packed structure for Control Register 0 (CR0)
4851 /// 32-bits on IA-32
4852 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4853 ///
4854 typedef union {
4855 struct {
4856 UINT32 PE:1; ///< Protection Enable
4857 UINT32 MP:1; ///< Monitor Coprocessor
4858 UINT32 EM:1; ///< Emulation
4859 UINT32 TS:1; ///< Task Switched
4860 UINT32 ET:1; ///< Extension Type
4861 UINT32 NE:1; ///< Numeric Error
4862 UINT32 Reserved_0:10; ///< Reserved
4863 UINT32 WP:1; ///< Write Protect
4864 UINT32 Reserved_1:1; ///< Reserved
4865 UINT32 AM:1; ///< Alignment Mask
4866 UINT32 Reserved_2:10; ///< Reserved
4867 UINT32 NW:1; ///< Mot Write-through
4868 UINT32 CD:1; ///< Cache Disable
4869 UINT32 PG:1; ///< Paging
4870 } Bits;
4871 UINTN UintN;
4872 } IA32_CR0;
4873
4874 ///
4875 /// Byte packed structure for Control Register 4 (CR4)
4876 /// 32-bits on IA-32
4877 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4878 ///
4879 typedef union {
4880 struct {
4881 UINT32 VME:1; ///< Virtual-8086 Mode Extensions
4882 UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts
4883 UINT32 TSD:1; ///< Time Stamp Disable
4884 UINT32 DE:1; ///< Debugging Extensions
4885 UINT32 PSE:1; ///< Page Size Extensions
4886 UINT32 PAE:1; ///< Physical Address Extension
4887 UINT32 MCE:1; ///< Machine Check Enable
4888 UINT32 PGE:1; ///< Page Global Enable
4889 UINT32 PCE:1; ///< Performance Monitoring Counter
4890 ///< Enable
4891 UINT32 OSFXSR:1; ///< Operating System Support for
4892 ///< FXSAVE and FXRSTOR instructions
4893 UINT32 OSXMMEXCPT:1; ///< Operating System Support for
4894 ///< Unmasked SIMD Floating Point
4895 ///< Exceptions
4896 UINT32 Reserved_0:2; ///< Reserved
4897 UINT32 VMXE:1; ///< VMX Enable
4898 UINT32 Reserved_1:18; ///< Reserved
4899 } Bits;
4900 UINTN UintN;
4901 } IA32_CR4;
4902
4903 ///
4904 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor
4905 ///
4906 #pragma pack (1)
4907 typedef struct {
4908 UINT16 Limit;
4909 UINTN Base;
4910 } IA32_DESCRIPTOR;
4911 #pragma pack ()
4912
4913 #define IA32_IDT_GATE_TYPE_TASK 0x85
4914 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
4915 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
4916 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
4917 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
4918
4919
4920 #if defined (MDE_CPU_IA32)
4921 ///
4922 /// Byte packed structure for an IA-32 Interrupt Gate Descriptor
4923 ///
4924 typedef union {
4925 struct {
4926 UINT32 OffsetLow:16; ///< Offset bits 15..0
4927 UINT32 Selector:16; ///< Selector
4928 UINT32 Reserved_0:8; ///< Reserved
4929 UINT32 GateType:8; ///< Gate Type. See #defines above
4930 UINT32 OffsetHigh:16; ///< Offset bits 31..16
4931 } Bits;
4932 UINT64 Uint64;
4933 } IA32_IDT_GATE_DESCRIPTOR;
4934
4935 #endif
4936
4937 #if defined (MDE_CPU_X64)
4938 ///
4939 /// Byte packed structure for an x64 Interrupt Gate Descriptor
4940 ///
4941 typedef union {
4942 struct {
4943 UINT32 OffsetLow:16; ///< Offset bits 15..0
4944 UINT32 Selector:16; ///< Selector
4945 UINT32 Reserved_0:8; ///< Reserved
4946 UINT32 GateType:8; ///< Gate Type. See #defines above
4947 UINT32 OffsetHigh:16; ///< Offset bits 31..16
4948 UINT32 OffsetUpper:32; ///< Offset bits 63..32
4949 UINT32 Reserved_1:32; ///< Reserved
4950 } Bits;
4951 struct {
4952 UINT64 Uint64;
4953 UINT64 Uint64_1;
4954 } Uint128;
4955 } IA32_IDT_GATE_DESCRIPTOR;
4956
4957 #endif
4958
4959 ///
4960 /// Byte packed structure for an FP/SSE/SSE2 context
4961 ///
4962 typedef struct {
4963 UINT8 Buffer[512];
4964 } IA32_FX_BUFFER;
4965
4966 ///
4967 /// Structures for the 16-bit real mode thunks
4968 ///
4969 typedef struct {
4970 UINT32 Reserved1;
4971 UINT32 Reserved2;
4972 UINT32 Reserved3;
4973 UINT32 Reserved4;
4974 UINT8 BL;
4975 UINT8 BH;
4976 UINT16 Reserved5;
4977 UINT8 DL;
4978 UINT8 DH;
4979 UINT16 Reserved6;
4980 UINT8 CL;
4981 UINT8 CH;
4982 UINT16 Reserved7;
4983 UINT8 AL;
4984 UINT8 AH;
4985 UINT16 Reserved8;
4986 } IA32_BYTE_REGS;
4987
4988 typedef struct {
4989 UINT16 DI;
4990 UINT16 Reserved1;
4991 UINT16 SI;
4992 UINT16 Reserved2;
4993 UINT16 BP;
4994 UINT16 Reserved3;
4995 UINT16 SP;
4996 UINT16 Reserved4;
4997 UINT16 BX;
4998 UINT16 Reserved5;
4999 UINT16 DX;
5000 UINT16 Reserved6;
5001 UINT16 CX;
5002 UINT16 Reserved7;
5003 UINT16 AX;
5004 UINT16 Reserved8;
5005 } IA32_WORD_REGS;
5006
5007 typedef struct {
5008 UINT32 EDI;
5009 UINT32 ESI;
5010 UINT32 EBP;
5011 UINT32 ESP;
5012 UINT32 EBX;
5013 UINT32 EDX;
5014 UINT32 ECX;
5015 UINT32 EAX;
5016 UINT16 DS;
5017 UINT16 ES;
5018 UINT16 FS;
5019 UINT16 GS;
5020 IA32_EFLAGS32 EFLAGS;
5021 UINT32 Eip;
5022 UINT16 CS;
5023 UINT16 SS;
5024 } IA32_DWORD_REGS;
5025
5026 typedef union {
5027 IA32_DWORD_REGS E;
5028 IA32_WORD_REGS X;
5029 IA32_BYTE_REGS H;
5030 } IA32_REGISTER_SET;
5031
5032 ///
5033 /// Byte packed structure for an 16-bit real mode thunks
5034 ///
5035 typedef struct {
5036 IA32_REGISTER_SET *RealModeState;
5037 VOID *RealModeBuffer;
5038 UINT32 RealModeBufferSize;
5039 UINT32 ThunkAttributes;
5040 } THUNK_CONTEXT;
5041
5042 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5043 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5044 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5045
5046 /**
5047 Retrieves CPUID information.
5048
5049 Executes the CPUID instruction with EAX set to the value specified by Index.
5050 This function always returns Index.
5051 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5052 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5053 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5054 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5055 This function is only available on IA-32 and x64.
5056
5057 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5058 instruction.
5059 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5060 instruction. This is an optional parameter that may be NULL.
5061 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5062 instruction. This is an optional parameter that may be NULL.
5063 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5064 instruction. This is an optional parameter that may be NULL.
5065 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5066 instruction. This is an optional parameter that may be NULL.
5067
5068 @return Index.
5069
5070 **/
5071 UINT32
5072 EFIAPI
5073 AsmCpuid (
5074 IN UINT32 Index,
5075 OUT UINT32 *Eax, OPTIONAL
5076 OUT UINT32 *Ebx, OPTIONAL
5077 OUT UINT32 *Ecx, OPTIONAL
5078 OUT UINT32 *Edx OPTIONAL
5079 );
5080
5081
5082 /**
5083 Retrieves CPUID information using an extended leaf identifier.
5084
5085 Executes the CPUID instruction with EAX set to the value specified by Index
5086 and ECX set to the value specified by SubIndex. This function always returns
5087 Index. This function is only available on IA-32 and x64.
5088
5089 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5090 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5091 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5092 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5093
5094 @param Index The 32-bit value to load into EAX prior to invoking the
5095 CPUID instruction.
5096 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5097 CPUID instruction.
5098 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5099 instruction. This is an optional parameter that may be
5100 NULL.
5101 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5102 instruction. This is an optional parameter that may be
5103 NULL.
5104 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5105 instruction. This is an optional parameter that may be
5106 NULL.
5107 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5108 instruction. This is an optional parameter that may be
5109 NULL.
5110
5111 @return Index.
5112
5113 **/
5114 UINT32
5115 EFIAPI
5116 AsmCpuidEx (
5117 IN UINT32 Index,
5118 IN UINT32 SubIndex,
5119 OUT UINT32 *Eax, OPTIONAL
5120 OUT UINT32 *Ebx, OPTIONAL
5121 OUT UINT32 *Ecx, OPTIONAL
5122 OUT UINT32 *Edx OPTIONAL
5123 );
5124
5125
5126 /**
5127 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5128
5129 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5130 and executing a WBINVD instruction. This function is only available on IA-32 and x64.
5131
5132 **/
5133 VOID
5134 EFIAPI
5135 AsmDisableCache (
5136 VOID
5137 );
5138
5139
5140 /**
5141 Perform a WBINVD and clear both the CD and NW bits of CR0.
5142
5143 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5144 bits of CR0 to 0. This function is only available on IA-32 and x64.
5145
5146 **/
5147 VOID
5148 EFIAPI
5149 AsmEnableCache (
5150 VOID
5151 );
5152
5153
5154 /**
5155 Returns the lower 32-bits of a Machine Specific Register(MSR).
5156
5157 Reads and returns the lower 32-bits of the MSR specified by Index.
5158 No parameter checking is performed on Index, and some Index values may cause
5159 CPU exceptions. The caller must either guarantee that Index is valid, or the
5160 caller must set up exception handlers to catch the exceptions. This function
5161 is only available on IA-32 and x64.
5162
5163 @param Index The 32-bit MSR index to read.
5164
5165 @return The lower 32 bits of the MSR identified by Index.
5166
5167 **/
5168 UINT32
5169 EFIAPI
5170 AsmReadMsr32 (
5171 IN UINT32 Index
5172 );
5173
5174
5175 /**
5176 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5177 The upper 32-bits of the MSR are set to zero.
5178
5179 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5180 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5181 the MSR is returned. No parameter checking is performed on Index or Value,
5182 and some of these may cause CPU exceptions. The caller must either guarantee
5183 that Index and Value are valid, or the caller must establish proper exception
5184 handlers. This function is only available on IA-32 and x64.
5185
5186 @param Index The 32-bit MSR index to write.
5187 @param Value The 32-bit value to write to the MSR.
5188
5189 @return Value
5190
5191 **/
5192 UINT32
5193 EFIAPI
5194 AsmWriteMsr32 (
5195 IN UINT32 Index,
5196 IN UINT32 Value
5197 );
5198
5199
5200 /**
5201 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
5202 writes the result back to the 64-bit MSR.
5203
5204 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5205 between the lower 32-bits of the read result and the value specified by
5206 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5207 32-bits of the value written to the MSR is returned. No parameter checking is
5208 performed on Index or OrData, and some of these may cause CPU exceptions. The
5209 caller must either guarantee that Index and OrData are valid, or the caller
5210 must establish proper exception handlers. This function is only available on
5211 IA-32 and x64.
5212
5213 @param Index The 32-bit MSR index to write.
5214 @param OrData The value to OR with the read value from the MSR.
5215
5216 @return The lower 32-bit value written to the MSR.
5217
5218 **/
5219 UINT32
5220 EFIAPI
5221 AsmMsrOr32 (
5222 IN UINT32 Index,
5223 IN UINT32 OrData
5224 );
5225
5226
5227 /**
5228 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5229 the result back to the 64-bit MSR.
5230
5231 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5232 lower 32-bits of the read result and the value specified by AndData, and
5233 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5234 the value written to the MSR is returned. No parameter checking is performed
5235 on Index or AndData, and some of these may cause CPU exceptions. The caller
5236 must either guarantee that Index and AndData are valid, or the caller must
5237 establish proper exception handlers. This function is only available on IA-32
5238 and x64.
5239
5240 @param Index The 32-bit MSR index to write.
5241 @param AndData The value to AND with the read value from the MSR.
5242
5243 @return The lower 32-bit value written to the MSR.
5244
5245 **/
5246 UINT32
5247 EFIAPI
5248 AsmMsrAnd32 (
5249 IN UINT32 Index,
5250 IN UINT32 AndData
5251 );
5252
5253
5254 /**
5255 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
5256 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5257
5258 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5259 lower 32-bits of the read result and the value specified by AndData
5260 preserving the upper 32-bits, performs a bitwise OR between the
5261 result of the AND operation and the value specified by OrData, and writes the
5262 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5263 written to the MSR is returned. No parameter checking is performed on Index,
5264 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5265 must either guarantee that Index, AndData, and OrData are valid, or the
5266 caller must establish proper exception handlers. This function is only
5267 available on IA-32 and x64.
5268
5269 @param Index The 32-bit MSR index to write.
5270 @param AndData The value to AND with the read value from the MSR.
5271 @param OrData The value to OR with the result of the AND operation.
5272
5273 @return The lower 32-bit value written to the MSR.
5274
5275 **/
5276 UINT32
5277 EFIAPI
5278 AsmMsrAndThenOr32 (
5279 IN UINT32 Index,
5280 IN UINT32 AndData,
5281 IN UINT32 OrData
5282 );
5283
5284
5285 /**
5286 Reads a bit field of an MSR.
5287
5288 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5289 specified by the StartBit and the EndBit. The value of the bit field is
5290 returned. The caller must either guarantee that Index is valid, or the caller
5291 must set up exception handlers to catch the exceptions. This function is only
5292 available on IA-32 and x64.
5293
5294 If StartBit is greater than 31, then ASSERT().
5295 If EndBit is greater than 31, then ASSERT().
5296 If EndBit is less than StartBit, then ASSERT().
5297
5298 @param Index The 32-bit MSR index to read.
5299 @param StartBit The ordinal of the least significant bit in the bit field.
5300 Range 0..31.
5301 @param EndBit The ordinal of the most significant bit in the bit field.
5302 Range 0..31.
5303
5304 @return The bit field read from the MSR.
5305
5306 **/
5307 UINT32
5308 EFIAPI
5309 AsmMsrBitFieldRead32 (
5310 IN UINT32 Index,
5311 IN UINTN StartBit,
5312 IN UINTN EndBit
5313 );
5314
5315
5316 /**
5317 Writes a bit field to an MSR.
5318
5319 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5320 field is specified by the StartBit and the EndBit. All other bits in the
5321 destination MSR are preserved. The lower 32-bits of the MSR written is
5322 returned. The caller must either guarantee that Index and the data written
5323 is valid, or the caller must set up exception handlers to catch the exceptions.
5324 This function is only available on IA-32 and x64.
5325
5326 If StartBit is greater than 31, then ASSERT().
5327 If EndBit is greater than 31, then ASSERT().
5328 If EndBit is less than StartBit, then ASSERT().
5329
5330 @param Index The 32-bit MSR index to write.
5331 @param StartBit The ordinal of the least significant bit in the bit field.
5332 Range 0..31.
5333 @param EndBit The ordinal of the most significant bit in the bit field.
5334 Range 0..31.
5335 @param Value New value of the bit field.
5336
5337 @return The lower 32-bit of the value written to the MSR.
5338
5339 **/
5340 UINT32
5341 EFIAPI
5342 AsmMsrBitFieldWrite32 (
5343 IN UINT32 Index,
5344 IN UINTN StartBit,
5345 IN UINTN EndBit,
5346 IN UINT32 Value
5347 );
5348
5349
5350 /**
5351 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5352 result back to the bit field in the 64-bit MSR.
5353
5354 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5355 between the read result and the value specified by OrData, and writes the
5356 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5357 written to the MSR are returned. Extra left bits in OrData are stripped. The
5358 caller must either guarantee that Index and the data written is valid, or
5359 the caller must set up exception handlers to catch the exceptions. This
5360 function is only available on IA-32 and x64.
5361
5362 If StartBit is greater than 31, then ASSERT().
5363 If EndBit is greater than 31, then ASSERT().
5364 If EndBit is less than StartBit, then ASSERT().
5365
5366 @param Index The 32-bit MSR index to write.
5367 @param StartBit The ordinal of the least significant bit in the bit field.
5368 Range 0..31.
5369 @param EndBit The ordinal of the most significant bit in the bit field.
5370 Range 0..31.
5371 @param OrData The value to OR with the read value from the MSR.
5372
5373 @return The lower 32-bit of the value written to the MSR.
5374
5375 **/
5376 UINT32
5377 EFIAPI
5378 AsmMsrBitFieldOr32 (
5379 IN UINT32 Index,
5380 IN UINTN StartBit,
5381 IN UINTN EndBit,
5382 IN UINT32 OrData
5383 );
5384
5385
5386 /**
5387 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5388 result back to the bit field in the 64-bit MSR.
5389
5390 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5391 read result and the value specified by AndData, and writes the result to the
5392 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5393 MSR are returned. Extra left bits in AndData are stripped. The caller must
5394 either guarantee that Index and the data written is valid, or the caller must
5395 set up exception handlers to catch the exceptions. This function is only
5396 available on IA-32 and x64.
5397
5398 If StartBit is greater than 31, then ASSERT().
5399 If EndBit is greater than 31, then ASSERT().
5400 If EndBit is less than StartBit, then ASSERT().
5401
5402 @param Index The 32-bit MSR index to write.
5403 @param StartBit The ordinal of the least significant bit in the bit field.
5404 Range 0..31.
5405 @param EndBit The ordinal of the most significant bit in the bit field.
5406 Range 0..31.
5407 @param AndData The value to AND with the read value from the MSR.
5408
5409 @return The lower 32-bit of the value written to the MSR.
5410
5411 **/
5412 UINT32
5413 EFIAPI
5414 AsmMsrBitFieldAnd32 (
5415 IN UINT32 Index,
5416 IN UINTN StartBit,
5417 IN UINTN EndBit,
5418 IN UINT32 AndData
5419 );
5420
5421
5422 /**
5423 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5424 bitwise OR, and writes the result back to the bit field in the
5425 64-bit MSR.
5426
5427 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5428 bitwise OR between the read result and the value specified by
5429 AndData, and writes the result to the 64-bit MSR specified by Index. The
5430 lower 32-bits of the value written to the MSR are returned. Extra left bits
5431 in both AndData and OrData are stripped. The caller must either guarantee
5432 that Index and the data written is valid, or the caller must set up exception
5433 handlers to catch the exceptions. This function is only available on IA-32
5434 and x64.
5435
5436 If StartBit is greater than 31, then ASSERT().
5437 If EndBit is greater than 31, then ASSERT().
5438 If EndBit is less than StartBit, then ASSERT().
5439
5440 @param Index The 32-bit MSR index to write.
5441 @param StartBit The ordinal of the least significant bit in the bit field.
5442 Range 0..31.
5443 @param EndBit The ordinal of the most significant bit in the bit field.
5444 Range 0..31.
5445 @param AndData The value to AND with the read value from the MSR.
5446 @param OrData The value to OR with the result of the AND operation.
5447
5448 @return The lower 32-bit of the value written to the MSR.
5449
5450 **/
5451 UINT32
5452 EFIAPI
5453 AsmMsrBitFieldAndThenOr32 (
5454 IN UINT32 Index,
5455 IN UINTN StartBit,
5456 IN UINTN EndBit,
5457 IN UINT32 AndData,
5458 IN UINT32 OrData
5459 );
5460
5461
5462 /**
5463 Returns a 64-bit Machine Specific Register(MSR).
5464
5465 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5466 performed on Index, and some Index values may cause CPU exceptions. The
5467 caller must either guarantee that Index is valid, or the caller must set up
5468 exception handlers to catch the exceptions. This function is only available
5469 on IA-32 and x64.
5470
5471 @param Index The 32-bit MSR index to read.
5472
5473 @return The value of the MSR identified by Index.
5474
5475 **/
5476 UINT64
5477 EFIAPI
5478 AsmReadMsr64 (
5479 IN UINT32 Index
5480 );
5481
5482
5483 /**
5484 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5485 value.
5486
5487 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5488 64-bit value written to the MSR is returned. No parameter checking is
5489 performed on Index or Value, and some of these may cause CPU exceptions. The
5490 caller must either guarantee that Index and Value are valid, or the caller
5491 must establish proper exception handlers. This function is only available on
5492 IA-32 and x64.
5493
5494 @param Index The 32-bit MSR index to write.
5495 @param Value The 64-bit value to write to the MSR.
5496
5497 @return Value
5498
5499 **/
5500 UINT64
5501 EFIAPI
5502 AsmWriteMsr64 (
5503 IN UINT32 Index,
5504 IN UINT64 Value
5505 );
5506
5507
5508 /**
5509 Reads a 64-bit MSR, performs a bitwise OR, and writes the result
5510 back to the 64-bit MSR.
5511
5512 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5513 between the read result and the value specified by OrData, and writes the
5514 result to the 64-bit MSR specified by Index. The value written to the MSR is
5515 returned. No parameter checking is performed on Index or OrData, and some of
5516 these may cause CPU exceptions. The caller must either guarantee that Index
5517 and OrData are valid, or the caller must establish proper exception handlers.
5518 This function is only available on IA-32 and x64.
5519
5520 @param Index The 32-bit MSR index to write.
5521 @param OrData The value to OR with the read value from the MSR.
5522
5523 @return The value written back to the MSR.
5524
5525 **/
5526 UINT64
5527 EFIAPI
5528 AsmMsrOr64 (
5529 IN UINT32 Index,
5530 IN UINT64 OrData
5531 );
5532
5533
5534 /**
5535 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5536 64-bit MSR.
5537
5538 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5539 read result and the value specified by OrData, and writes the result to the
5540 64-bit MSR specified by Index. The value written to the MSR is returned. No
5541 parameter checking is performed on Index or OrData, and some of these may
5542 cause CPU exceptions. The caller must either guarantee that Index and OrData
5543 are valid, or the caller must establish proper exception handlers. This
5544 function is only available on IA-32 and x64.
5545
5546 @param Index The 32-bit MSR index to write.
5547 @param AndData The value to AND with the read value from the MSR.
5548
5549 @return The value written back to the MSR.
5550
5551 **/
5552 UINT64
5553 EFIAPI
5554 AsmMsrAnd64 (
5555 IN UINT32 Index,
5556 IN UINT64 AndData
5557 );
5558
5559
5560 /**
5561 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
5562 OR, and writes the result back to the 64-bit MSR.
5563
5564 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5565 result and the value specified by AndData, performs a bitwise OR
5566 between the result of the AND operation and the value specified by OrData,
5567 and writes the result to the 64-bit MSR specified by Index. The value written
5568 to the MSR is returned. No parameter checking is performed on Index, AndData,
5569 or OrData, and some of these may cause CPU exceptions. The caller must either
5570 guarantee that Index, AndData, and OrData are valid, or the caller must
5571 establish proper exception handlers. This function is only available on IA-32
5572 and x64.
5573
5574 @param Index The 32-bit MSR index to write.
5575 @param AndData The value to AND with the read value from the MSR.
5576 @param OrData The value to OR with the result of the AND operation.
5577
5578 @return The value written back to the MSR.
5579
5580 **/
5581 UINT64
5582 EFIAPI
5583 AsmMsrAndThenOr64 (
5584 IN UINT32 Index,
5585 IN UINT64 AndData,
5586 IN UINT64 OrData
5587 );
5588
5589
5590 /**
5591 Reads a bit field of an MSR.
5592
5593 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5594 StartBit and the EndBit. The value of the bit field is returned. The caller
5595 must either guarantee that Index is valid, or the caller must set up
5596 exception handlers to catch the exceptions. This function is only available
5597 on IA-32 and x64.
5598
5599 If StartBit is greater than 63, then ASSERT().
5600 If EndBit is greater than 63, then ASSERT().
5601 If EndBit is less than StartBit, then ASSERT().
5602
5603 @param Index The 32-bit MSR index to read.
5604 @param StartBit The ordinal of the least significant bit in the bit field.
5605 Range 0..63.
5606 @param EndBit The ordinal of the most significant bit in the bit field.
5607 Range 0..63.
5608
5609 @return The value read from the MSR.
5610
5611 **/
5612 UINT64
5613 EFIAPI
5614 AsmMsrBitFieldRead64 (
5615 IN UINT32 Index,
5616 IN UINTN StartBit,
5617 IN UINTN EndBit
5618 );
5619
5620
5621 /**
5622 Writes a bit field to an MSR.
5623
5624 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5625 the StartBit and the EndBit. All other bits in the destination MSR are
5626 preserved. The MSR written is returned. The caller must either guarantee
5627 that Index and the data written is valid, or the caller must set up exception
5628 handlers to catch the exceptions. This function is only available on IA-32 and x64.
5629
5630 If StartBit is greater than 63, then ASSERT().
5631 If EndBit is greater than 63, then ASSERT().
5632 If EndBit is less than StartBit, then ASSERT().
5633
5634 @param Index The 32-bit MSR index to write.
5635 @param StartBit The ordinal of the least significant bit in the bit field.
5636 Range 0..63.
5637 @param EndBit The ordinal of the most significant bit in the bit field.
5638 Range 0..63.
5639 @param Value New value of the bit field.
5640
5641 @return The value written back to the MSR.
5642
5643 **/
5644 UINT64
5645 EFIAPI
5646 AsmMsrBitFieldWrite64 (
5647 IN UINT32 Index,
5648 IN UINTN StartBit,
5649 IN UINTN EndBit,
5650 IN UINT64 Value
5651 );
5652
5653
5654 /**
5655 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
5656 writes the result back to the bit field in the 64-bit MSR.
5657
5658 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5659 between the read result and the value specified by OrData, and writes the
5660 result to the 64-bit MSR specified by Index. The value written to the MSR is
5661 returned. Extra left bits in OrData are stripped. The caller must either
5662 guarantee that Index and the data written is valid, or the caller must set up
5663 exception handlers to catch the exceptions. This function is only available
5664 on IA-32 and x64.
5665
5666 If StartBit is greater than 63, then ASSERT().
5667 If EndBit is greater than 63, then ASSERT().
5668 If EndBit is less than StartBit, then ASSERT().
5669
5670 @param Index The 32-bit MSR index to write.
5671 @param StartBit The ordinal of the least significant bit in the bit field.
5672 Range 0..63.
5673 @param EndBit The ordinal of the most significant bit in the bit field.
5674 Range 0..63.
5675 @param OrData The value to OR with the read value from the bit field.
5676
5677 @return The value written back to the MSR.
5678
5679 **/
5680 UINT64
5681 EFIAPI
5682 AsmMsrBitFieldOr64 (
5683 IN UINT32 Index,
5684 IN UINTN StartBit,
5685 IN UINTN EndBit,
5686 IN UINT64 OrData
5687 );
5688
5689
5690 /**
5691 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5692 result back to the bit field in the 64-bit MSR.
5693
5694 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5695 read result and the value specified by AndData, and writes the result to the
5696 64-bit MSR specified by Index. The value written to the MSR is returned.
5697 Extra left bits in AndData are stripped. The caller must either guarantee
5698 that Index and the data written is valid, or the caller must set up exception
5699 handlers to catch the exceptions. This function is only available on IA-32
5700 and x64.
5701
5702 If StartBit is greater than 63, then ASSERT().
5703 If EndBit is greater than 63, then ASSERT().
5704 If EndBit is less than StartBit, then ASSERT().
5705
5706 @param Index The 32-bit MSR index to write.
5707 @param StartBit The ordinal of the least significant bit in the bit field.
5708 Range 0..63.
5709 @param EndBit The ordinal of the most significant bit in the bit field.
5710 Range 0..63.
5711 @param AndData The value to AND with the read value from the bit field.
5712
5713 @return The value written back to the MSR.
5714
5715 **/
5716 UINT64
5717 EFIAPI
5718 AsmMsrBitFieldAnd64 (
5719 IN UINT32 Index,
5720 IN UINTN StartBit,
5721 IN UINTN EndBit,
5722 IN UINT64 AndData
5723 );
5724
5725
5726 /**
5727 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5728 bitwise OR, and writes the result back to the bit field in the
5729 64-bit MSR.
5730
5731 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5732 a bitwise OR between the read result and the value specified by
5733 AndData, and writes the result to the 64-bit MSR specified by Index. The
5734 value written to the MSR is returned. Extra left bits in both AndData and
5735 OrData are stripped. The caller must either guarantee that Index and the data
5736 written is valid, or the caller must set up exception handlers to catch the
5737 exceptions. This function is only available on IA-32 and x64.
5738
5739 If StartBit is greater than 63, then ASSERT().
5740 If EndBit is greater than 63, then ASSERT().
5741 If EndBit is less than StartBit, then ASSERT().
5742
5743 @param Index The 32-bit MSR index to write.
5744 @param StartBit The ordinal of the least significant bit in the bit field.
5745 Range 0..63.
5746 @param EndBit The ordinal of the most significant bit in the bit field.
5747 Range 0..63.
5748 @param AndData The value to AND with the read value from the bit field.
5749 @param OrData The value to OR with the result of the AND operation.
5750
5751 @return The value written back to the MSR.
5752
5753 **/
5754 UINT64
5755 EFIAPI
5756 AsmMsrBitFieldAndThenOr64 (
5757 IN UINT32 Index,
5758 IN UINTN StartBit,
5759 IN UINTN EndBit,
5760 IN UINT64 AndData,
5761 IN UINT64 OrData
5762 );
5763
5764
5765 /**
5766 Reads the current value of the EFLAGS register.
5767
5768 Reads and returns the current value of the EFLAGS register. This function is
5769 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
5770 64-bit value on x64.
5771
5772 @return EFLAGS on IA-32 or RFLAGS on x64.
5773
5774 **/
5775 UINTN
5776 EFIAPI
5777 AsmReadEflags (
5778 VOID
5779 );
5780
5781
5782 /**
5783 Reads the current value of the Control Register 0 (CR0).
5784
5785 Reads and returns the current value of CR0. This function is only available
5786 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5787 x64.
5788
5789 @return The value of the Control Register 0 (CR0).
5790
5791 **/
5792 UINTN
5793 EFIAPI
5794 AsmReadCr0 (
5795 VOID
5796 );
5797
5798
5799 /**
5800 Reads the current value of the Control Register 2 (CR2).
5801
5802 Reads and returns the current value of CR2. This function is only available
5803 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5804 x64.
5805
5806 @return The value of the Control Register 2 (CR2).
5807
5808 **/
5809 UINTN
5810 EFIAPI
5811 AsmReadCr2 (
5812 VOID
5813 );
5814
5815
5816 /**
5817 Reads the current value of the Control Register 3 (CR3).
5818
5819 Reads and returns the current value of CR3. This function is only available
5820 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5821 x64.
5822
5823 @return The value of the Control Register 3 (CR3).
5824
5825 **/
5826 UINTN
5827 EFIAPI
5828 AsmReadCr3 (
5829 VOID
5830 );
5831
5832
5833 /**
5834 Reads the current value of the Control Register 4 (CR4).
5835
5836 Reads and returns the current value of CR4. This function is only available
5837 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5838 x64.
5839
5840 @return The value of the Control Register 4 (CR4).
5841
5842 **/
5843 UINTN
5844 EFIAPI
5845 AsmReadCr4 (
5846 VOID
5847 );
5848
5849
5850 /**
5851 Writes a value to Control Register 0 (CR0).
5852
5853 Writes and returns a new value to CR0. This function is only available on
5854 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5855
5856 @param Cr0 The value to write to CR0.
5857
5858 @return The value written to CR0.
5859
5860 **/
5861 UINTN
5862 EFIAPI
5863 AsmWriteCr0 (
5864 UINTN Cr0
5865 );
5866
5867
5868 /**
5869 Writes a value to Control Register 2 (CR2).
5870
5871 Writes and returns a new value to CR2. This function is only available on
5872 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5873
5874 @param Cr2 The value to write to CR2.
5875
5876 @return The value written to CR2.
5877
5878 **/
5879 UINTN
5880 EFIAPI
5881 AsmWriteCr2 (
5882 UINTN Cr2
5883 );
5884
5885
5886 /**
5887 Writes a value to Control Register 3 (CR3).
5888
5889 Writes and returns a new value to CR3. This function is only available on
5890 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5891
5892 @param Cr3 The value to write to CR3.
5893
5894 @return The value written to CR3.
5895
5896 **/
5897 UINTN
5898 EFIAPI
5899 AsmWriteCr3 (
5900 UINTN Cr3
5901 );
5902
5903
5904 /**
5905 Writes a value to Control Register 4 (CR4).
5906
5907 Writes and returns a new value to CR4. This function is only available on
5908 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5909
5910 @param Cr4 The value to write to CR4.
5911
5912 @return The value written to CR4.
5913
5914 **/
5915 UINTN
5916 EFIAPI
5917 AsmWriteCr4 (
5918 UINTN Cr4
5919 );
5920
5921
5922 /**
5923 Reads the current value of Debug Register 0 (DR0).
5924
5925 Reads and returns the current value of DR0. This function is only available
5926 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5927 x64.
5928
5929 @return The value of Debug Register 0 (DR0).
5930
5931 **/
5932 UINTN
5933 EFIAPI
5934 AsmReadDr0 (
5935 VOID
5936 );
5937
5938
5939 /**
5940 Reads the current value of Debug Register 1 (DR1).
5941
5942 Reads and returns the current value of DR1. This function is only available
5943 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5944 x64.
5945
5946 @return The value of Debug Register 1 (DR1).
5947
5948 **/
5949 UINTN
5950 EFIAPI
5951 AsmReadDr1 (
5952 VOID
5953 );
5954
5955
5956 /**
5957 Reads the current value of Debug Register 2 (DR2).
5958
5959 Reads and returns the current value of DR2. This function is only available
5960 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5961 x64.
5962
5963 @return The value of Debug Register 2 (DR2).
5964
5965 **/
5966 UINTN
5967 EFIAPI
5968 AsmReadDr2 (
5969 VOID
5970 );
5971
5972
5973 /**
5974 Reads the current value of Debug Register 3 (DR3).
5975
5976 Reads and returns the current value of DR3. This function is only available
5977 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5978 x64.
5979
5980 @return The value of Debug Register 3 (DR3).
5981
5982 **/
5983 UINTN
5984 EFIAPI
5985 AsmReadDr3 (
5986 VOID
5987 );
5988
5989
5990 /**
5991 Reads the current value of Debug Register 4 (DR4).
5992
5993 Reads and returns the current value of DR4. This function is only available
5994 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5995 x64.
5996
5997 @return The value of Debug Register 4 (DR4).
5998
5999 **/
6000 UINTN
6001 EFIAPI
6002 AsmReadDr4 (
6003 VOID
6004 );
6005
6006
6007 /**
6008 Reads the current value of Debug Register 5 (DR5).
6009
6010 Reads and returns the current value of DR5. This function is only available
6011 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6012 x64.
6013
6014 @return The value of Debug Register 5 (DR5).
6015
6016 **/
6017 UINTN
6018 EFIAPI
6019 AsmReadDr5 (
6020 VOID
6021 );
6022
6023
6024 /**
6025 Reads the current value of Debug Register 6 (DR6).
6026
6027 Reads and returns the current value of DR6. This function is only available
6028 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6029 x64.
6030
6031 @return The value of Debug Register 6 (DR6).
6032
6033 **/
6034 UINTN
6035 EFIAPI
6036 AsmReadDr6 (
6037 VOID
6038 );
6039
6040
6041 /**
6042 Reads the current value of Debug Register 7 (DR7).
6043
6044 Reads and returns the current value of DR7. This function is only available
6045 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6046 x64.
6047
6048 @return The value of Debug Register 7 (DR7).
6049
6050 **/
6051 UINTN
6052 EFIAPI
6053 AsmReadDr7 (
6054 VOID
6055 );
6056
6057
6058 /**
6059 Writes a value to Debug Register 0 (DR0).
6060
6061 Writes and returns a new value to DR0. This function is only available on
6062 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6063
6064 @param Dr0 The value to write to Dr0.
6065
6066 @return The value written to Debug Register 0 (DR0).
6067
6068 **/
6069 UINTN
6070 EFIAPI
6071 AsmWriteDr0 (
6072 UINTN Dr0
6073 );
6074
6075
6076 /**
6077 Writes a value to Debug Register 1 (DR1).
6078
6079 Writes and returns a new value to DR1. This function is only available on
6080 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6081
6082 @param Dr1 The value to write to Dr1.
6083
6084 @return The value written to Debug Register 1 (DR1).
6085
6086 **/
6087 UINTN
6088 EFIAPI
6089 AsmWriteDr1 (
6090 UINTN Dr1
6091 );
6092
6093
6094 /**
6095 Writes a value to Debug Register 2 (DR2).
6096
6097 Writes and returns a new value to DR2. This function is only available on
6098 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6099
6100 @param Dr2 The value to write to Dr2.
6101
6102 @return The value written to Debug Register 2 (DR2).
6103
6104 **/
6105 UINTN
6106 EFIAPI
6107 AsmWriteDr2 (
6108 UINTN Dr2
6109 );
6110
6111
6112 /**
6113 Writes a value to Debug Register 3 (DR3).
6114
6115 Writes and returns a new value to DR3. This function is only available on
6116 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6117
6118 @param Dr3 The value to write to Dr3.
6119
6120 @return The value written to Debug Register 3 (DR3).
6121
6122 **/
6123 UINTN
6124 EFIAPI
6125 AsmWriteDr3 (
6126 UINTN Dr3
6127 );
6128
6129
6130 /**
6131 Writes a value to Debug Register 4 (DR4).
6132
6133 Writes and returns a new value to DR4. This function is only available on
6134 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6135
6136 @param Dr4 The value to write to Dr4.
6137
6138 @return The value written to Debug Register 4 (DR4).
6139
6140 **/
6141 UINTN
6142 EFIAPI
6143 AsmWriteDr4 (
6144 UINTN Dr4
6145 );
6146
6147
6148 /**
6149 Writes a value to Debug Register 5 (DR5).
6150
6151 Writes and returns a new value to DR5. This function is only available on
6152 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6153
6154 @param Dr5 The value to write to Dr5.
6155
6156 @return The value written to Debug Register 5 (DR5).
6157
6158 **/
6159 UINTN
6160 EFIAPI
6161 AsmWriteDr5 (
6162 UINTN Dr5
6163 );
6164
6165
6166 /**
6167 Writes a value to Debug Register 6 (DR6).
6168
6169 Writes and returns a new value to DR6. This function is only available on
6170 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6171
6172 @param Dr6 The value to write to Dr6.
6173
6174 @return The value written to Debug Register 6 (DR6).
6175
6176 **/
6177 UINTN
6178 EFIAPI
6179 AsmWriteDr6 (
6180 UINTN Dr6
6181 );
6182
6183
6184 /**
6185 Writes a value to Debug Register 7 (DR7).
6186
6187 Writes and returns a new value to DR7. This function is only available on
6188 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6189
6190 @param Dr7 The value to write to Dr7.
6191
6192 @return The value written to Debug Register 7 (DR7).
6193
6194 **/
6195 UINTN
6196 EFIAPI
6197 AsmWriteDr7 (
6198 UINTN Dr7
6199 );
6200
6201
6202 /**
6203 Reads the current value of Code Segment Register (CS).
6204
6205 Reads and returns the current value of CS. This function is only available on
6206 IA-32 and x64.
6207
6208 @return The current value of CS.
6209
6210 **/
6211 UINT16
6212 EFIAPI
6213 AsmReadCs (
6214 VOID
6215 );
6216
6217
6218 /**
6219 Reads the current value of Data Segment Register (DS).
6220
6221 Reads and returns the current value of DS. This function is only available on
6222 IA-32 and x64.
6223
6224 @return The current value of DS.
6225
6226 **/
6227 UINT16
6228 EFIAPI
6229 AsmReadDs (
6230 VOID
6231 );
6232
6233
6234 /**
6235 Reads the current value of Extra Segment Register (ES).
6236
6237 Reads and returns the current value of ES. This function is only available on
6238 IA-32 and x64.
6239
6240 @return The current value of ES.
6241
6242 **/
6243 UINT16
6244 EFIAPI
6245 AsmReadEs (
6246 VOID
6247 );
6248
6249
6250 /**
6251 Reads the current value of FS Data Segment Register (FS).
6252
6253 Reads and returns the current value of FS. This function is only available on
6254 IA-32 and x64.
6255
6256 @return The current value of FS.
6257
6258 **/
6259 UINT16
6260 EFIAPI
6261 AsmReadFs (
6262 VOID
6263 );
6264
6265
6266 /**
6267 Reads the current value of GS Data Segment Register (GS).
6268
6269 Reads and returns the current value of GS. This function is only available on
6270 IA-32 and x64.
6271
6272 @return The current value of GS.
6273
6274 **/
6275 UINT16
6276 EFIAPI
6277 AsmReadGs (
6278 VOID
6279 );
6280
6281
6282 /**
6283 Reads the current value of Stack Segment Register (SS).
6284
6285 Reads and returns the current value of SS. This function is only available on
6286 IA-32 and x64.
6287
6288 @return The current value of SS.
6289
6290 **/
6291 UINT16
6292 EFIAPI
6293 AsmReadSs (
6294 VOID
6295 );
6296
6297
6298 /**
6299 Reads the current value of Task Register (TR).
6300
6301 Reads and returns the current value of TR. This function is only available on
6302 IA-32 and x64.
6303
6304 @return The current value of TR.
6305
6306 **/
6307 UINT16
6308 EFIAPI
6309 AsmReadTr (
6310 VOID
6311 );
6312
6313
6314 /**
6315 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6316
6317 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6318 function is only available on IA-32 and x64.
6319
6320 If Gdtr is NULL, then ASSERT().
6321
6322 @param Gdtr Pointer to a GDTR descriptor.
6323
6324 **/
6325 VOID
6326 EFIAPI
6327 AsmReadGdtr (
6328 OUT IA32_DESCRIPTOR *Gdtr
6329 );
6330
6331
6332 /**
6333 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6334
6335 Writes and the current GDTR descriptor specified by Gdtr. This function is
6336 only available on IA-32 and x64.
6337
6338 If Gdtr is NULL, then ASSERT().
6339
6340 @param Gdtr Pointer to a GDTR descriptor.
6341
6342 **/
6343 VOID
6344 EFIAPI
6345 AsmWriteGdtr (
6346 IN CONST IA32_DESCRIPTOR *Gdtr
6347 );
6348
6349
6350 /**
6351 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6352
6353 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6354 function is only available on IA-32 and x64.
6355
6356 If Idtr is NULL, then ASSERT().
6357
6358 @param Idtr Pointer to a IDTR descriptor.
6359
6360 **/
6361 VOID
6362 EFIAPI
6363 AsmReadIdtr (
6364 OUT IA32_DESCRIPTOR *Idtr
6365 );
6366
6367
6368 /**
6369 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6370
6371 Writes the current IDTR descriptor and returns it in Idtr. This function is
6372 only available on IA-32 and x64.
6373
6374 If Idtr is NULL, then ASSERT().
6375
6376 @param Idtr Pointer to a IDTR descriptor.
6377
6378 **/
6379 VOID
6380 EFIAPI
6381 AsmWriteIdtr (
6382 IN CONST IA32_DESCRIPTOR *Idtr
6383 );
6384
6385
6386 /**
6387 Reads the current Local Descriptor Table Register(LDTR) selector.
6388
6389 Reads and returns the current 16-bit LDTR descriptor value. This function is
6390 only available on IA-32 and x64.
6391
6392 @return The current selector of LDT.
6393
6394 **/
6395 UINT16
6396 EFIAPI
6397 AsmReadLdtr (
6398 VOID
6399 );
6400
6401
6402 /**
6403 Writes the current Local Descriptor Table Register (LDTR) selector.
6404
6405 Writes and the current LDTR descriptor specified by Ldtr. This function is
6406 only available on IA-32 and x64.
6407
6408 @param Ldtr 16-bit LDTR selector value.
6409
6410 **/
6411 VOID
6412 EFIAPI
6413 AsmWriteLdtr (
6414 IN UINT16 Ldtr
6415 );
6416
6417
6418 /**
6419 Save the current floating point/SSE/SSE2 context to a buffer.
6420
6421 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6422 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6423 available on IA-32 and x64.
6424
6425 If Buffer is NULL, then ASSERT().
6426 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6427
6428 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6429
6430 **/
6431 VOID
6432 EFIAPI
6433 AsmFxSave (
6434 OUT IA32_FX_BUFFER *Buffer
6435 );
6436
6437
6438 /**
6439 Restores the current floating point/SSE/SSE2 context from a buffer.
6440
6441 Restores the current floating point/SSE/SSE2 state from the buffer specified
6442 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6443 only available on IA-32 and x64.
6444
6445 If Buffer is NULL, then ASSERT().
6446 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6447 If Buffer was not saved with AsmFxSave(), then ASSERT().
6448
6449 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6450
6451 **/
6452 VOID
6453 EFIAPI
6454 AsmFxRestore (
6455 IN CONST IA32_FX_BUFFER *Buffer
6456 );
6457
6458
6459 /**
6460 Reads the current value of 64-bit MMX Register #0 (MM0).
6461
6462 Reads and returns the current value of MM0. This function is only available
6463 on IA-32 and x64.
6464
6465 @return The current value of MM0.
6466
6467 **/
6468 UINT64
6469 EFIAPI
6470 AsmReadMm0 (
6471 VOID
6472 );
6473
6474
6475 /**
6476 Reads the current value of 64-bit MMX Register #1 (MM1).
6477
6478 Reads and returns the current value of MM1. This function is only available
6479 on IA-32 and x64.
6480
6481 @return The current value of MM1.
6482
6483 **/
6484 UINT64
6485 EFIAPI
6486 AsmReadMm1 (
6487 VOID
6488 );
6489
6490
6491 /**
6492 Reads the current value of 64-bit MMX Register #2 (MM2).
6493
6494 Reads and returns the current value of MM2. This function is only available
6495 on IA-32 and x64.
6496
6497 @return The current value of MM2.
6498
6499 **/
6500 UINT64
6501 EFIAPI
6502 AsmReadMm2 (
6503 VOID
6504 );
6505
6506
6507 /**
6508 Reads the current value of 64-bit MMX Register #3 (MM3).
6509
6510 Reads and returns the current value of MM3. This function is only available
6511 on IA-32 and x64.
6512
6513 @return The current value of MM3.
6514
6515 **/
6516 UINT64
6517 EFIAPI
6518 AsmReadMm3 (
6519 VOID
6520 );
6521
6522
6523 /**
6524 Reads the current value of 64-bit MMX Register #4 (MM4).
6525
6526 Reads and returns the current value of MM4. This function is only available
6527 on IA-32 and x64.
6528
6529 @return The current value of MM4.
6530
6531 **/
6532 UINT64
6533 EFIAPI
6534 AsmReadMm4 (
6535 VOID
6536 );
6537
6538
6539 /**
6540 Reads the current value of 64-bit MMX Register #5 (MM5).
6541
6542 Reads and returns the current value of MM5. This function is only available
6543 on IA-32 and x64.
6544
6545 @return The current value of MM5.
6546
6547 **/
6548 UINT64
6549 EFIAPI
6550 AsmReadMm5 (
6551 VOID
6552 );
6553
6554
6555 /**
6556 Reads the current value of 64-bit MMX Register #6 (MM6).
6557
6558 Reads and returns the current value of MM6. This function is only available
6559 on IA-32 and x64.
6560
6561 @return The current value of MM6.
6562
6563 **/
6564 UINT64
6565 EFIAPI
6566 AsmReadMm6 (
6567 VOID
6568 );
6569
6570
6571 /**
6572 Reads the current value of 64-bit MMX Register #7 (MM7).
6573
6574 Reads and returns the current value of MM7. This function is only available
6575 on IA-32 and x64.
6576
6577 @return The current value of MM7.
6578
6579 **/
6580 UINT64
6581 EFIAPI
6582 AsmReadMm7 (
6583 VOID
6584 );
6585
6586
6587 /**
6588 Writes the current value of 64-bit MMX Register #0 (MM0).
6589
6590 Writes the current value of MM0. This function is only available on IA32 and
6591 x64.
6592
6593 @param Value The 64-bit value to write to MM0.
6594
6595 **/
6596 VOID
6597 EFIAPI
6598 AsmWriteMm0 (
6599 IN UINT64 Value
6600 );
6601
6602
6603 /**
6604 Writes the current value of 64-bit MMX Register #1 (MM1).
6605
6606 Writes the current value of MM1. This function is only available on IA32 and
6607 x64.
6608
6609 @param Value The 64-bit value to write to MM1.
6610
6611 **/
6612 VOID
6613 EFIAPI
6614 AsmWriteMm1 (
6615 IN UINT64 Value
6616 );
6617
6618
6619 /**
6620 Writes the current value of 64-bit MMX Register #2 (MM2).
6621
6622 Writes the current value of MM2. This function is only available on IA32 and
6623 x64.
6624
6625 @param Value The 64-bit value to write to MM2.
6626
6627 **/
6628 VOID
6629 EFIAPI
6630 AsmWriteMm2 (
6631 IN UINT64 Value
6632 );
6633
6634
6635 /**
6636 Writes the current value of 64-bit MMX Register #3 (MM3).
6637
6638 Writes the current value of MM3. This function is only available on IA32 and
6639 x64.
6640
6641 @param Value The 64-bit value to write to MM3.
6642
6643 **/
6644 VOID
6645 EFIAPI
6646 AsmWriteMm3 (
6647 IN UINT64 Value
6648 );
6649
6650
6651 /**
6652 Writes the current value of 64-bit MMX Register #4 (MM4).
6653
6654 Writes the current value of MM4. This function is only available on IA32 and
6655 x64.
6656
6657 @param Value The 64-bit value to write to MM4.
6658
6659 **/
6660 VOID
6661 EFIAPI
6662 AsmWriteMm4 (
6663 IN UINT64 Value
6664 );
6665
6666
6667 /**
6668 Writes the current value of 64-bit MMX Register #5 (MM5).
6669
6670 Writes the current value of MM5. This function is only available on IA32 and
6671 x64.
6672
6673 @param Value The 64-bit value to write to MM5.
6674
6675 **/
6676 VOID
6677 EFIAPI
6678 AsmWriteMm5 (
6679 IN UINT64 Value
6680 );
6681
6682
6683 /**
6684 Writes the current value of 64-bit MMX Register #6 (MM6).
6685
6686 Writes the current value of MM6. This function is only available on IA32 and
6687 x64.
6688
6689 @param Value The 64-bit value to write to MM6.
6690
6691 **/
6692 VOID
6693 EFIAPI
6694 AsmWriteMm6 (
6695 IN UINT64 Value
6696 );
6697
6698
6699 /**
6700 Writes the current value of 64-bit MMX Register #7 (MM7).
6701
6702 Writes the current value of MM7. This function is only available on IA32 and
6703 x64.
6704
6705 @param Value The 64-bit value to write to MM7.
6706
6707 **/
6708 VOID
6709 EFIAPI
6710 AsmWriteMm7 (
6711 IN UINT64 Value
6712 );
6713
6714
6715 /**
6716 Reads the current value of Time Stamp Counter (TSC).
6717
6718 Reads and returns the current value of TSC. This function is only available
6719 on IA-32 and x64.
6720
6721 @return The current value of TSC
6722
6723 **/
6724 UINT64
6725 EFIAPI
6726 AsmReadTsc (
6727 VOID
6728 );
6729
6730
6731 /**
6732 Reads the current value of a Performance Counter (PMC).
6733
6734 Reads and returns the current value of performance counter specified by
6735 Index. This function is only available on IA-32 and x64.
6736
6737 @param Index The 32-bit Performance Counter index to read.
6738
6739 @return The value of the PMC specified by Index.
6740
6741 **/
6742 UINT64
6743 EFIAPI
6744 AsmReadPmc (
6745 IN UINT32 Index
6746 );
6747
6748
6749 /**
6750 Sets up a monitor buffer that is used by AsmMwait().
6751
6752 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6753 and Edx. Returns Eax. This function is only available on IA-32 and x64.
6754
6755 @param Eax The value to load into EAX or RAX before executing the MONITOR
6756 instruction.
6757 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6758 instruction.
6759 @param Edx The value to load into EDX or RDX before executing the MONITOR
6760 instruction.
6761
6762 @return Eax
6763
6764 **/
6765 UINTN
6766 EFIAPI
6767 AsmMonitor (
6768 IN UINTN Eax,
6769 IN UINTN Ecx,
6770 IN UINTN Edx
6771 );
6772
6773
6774 /**
6775 Executes an MWAIT instruction.
6776
6777 Executes an MWAIT instruction with the register state specified by Eax and
6778 Ecx. Returns Eax. This function is only available on IA-32 and x64.
6779
6780 @param Eax The value to load into EAX or RAX before executing the MONITOR
6781 instruction.
6782 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6783 instruction.
6784
6785 @return Eax
6786
6787 **/
6788 UINTN
6789 EFIAPI
6790 AsmMwait (
6791 IN UINTN Eax,
6792 IN UINTN Ecx
6793 );
6794
6795
6796 /**
6797 Executes a WBINVD instruction.
6798
6799 Executes a WBINVD instruction. This function is only available on IA-32 and
6800 x64.
6801
6802 **/
6803 VOID
6804 EFIAPI
6805 AsmWbinvd (
6806 VOID
6807 );
6808
6809
6810 /**
6811 Executes a INVD instruction.
6812
6813 Executes a INVD instruction. This function is only available on IA-32 and
6814 x64.
6815
6816 **/
6817 VOID
6818 EFIAPI
6819 AsmInvd (
6820 VOID
6821 );
6822
6823
6824 /**
6825 Flushes a cache line from all the instruction and data caches within the
6826 coherency domain of the CPU.
6827
6828 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6829 This function is only available on IA-32 and x64.
6830
6831 @param LinearAddress The address of the cache line to flush. If the CPU is
6832 in a physical addressing mode, then LinearAddress is a
6833 physical address. If the CPU is in a virtual
6834 addressing mode, then LinearAddress is a virtual
6835 address.
6836
6837 @return LinearAddress
6838 **/
6839 VOID *
6840 EFIAPI
6841 AsmFlushCacheLine (
6842 IN VOID *LinearAddress
6843 );
6844
6845
6846 /**
6847 Enables the 32-bit paging mode on the CPU.
6848
6849 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6850 must be properly initialized prior to calling this service. This function
6851 assumes the current execution mode is 32-bit protected mode. This function is
6852 only available on IA-32. After the 32-bit paging mode is enabled, control is
6853 transferred to the function specified by EntryPoint using the new stack
6854 specified by NewStack and passing in the parameters specified by Context1 and
6855 Context2. Context1 and Context2 are optional and may be NULL. The function
6856 EntryPoint must never return.
6857
6858 If the current execution mode is not 32-bit protected mode, then ASSERT().
6859 If EntryPoint is NULL, then ASSERT().
6860 If NewStack is NULL, then ASSERT().
6861
6862 There are a number of constraints that must be followed before calling this
6863 function:
6864 1) Interrupts must be disabled.
6865 2) The caller must be in 32-bit protected mode with flat descriptors. This
6866 means all descriptors must have a base of 0 and a limit of 4GB.
6867 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
6868 descriptors.
6869 4) CR3 must point to valid page tables that will be used once the transition
6870 is complete, and those page tables must guarantee that the pages for this
6871 function and the stack are identity mapped.
6872
6873 @param EntryPoint A pointer to function to call with the new stack after
6874 paging is enabled.
6875 @param Context1 A pointer to the context to pass into the EntryPoint
6876 function as the first parameter after paging is enabled.
6877 @param Context2 A pointer to the context to pass into the EntryPoint
6878 function as the second parameter after paging is enabled.
6879 @param NewStack A pointer to the new stack to use for the EntryPoint
6880 function after paging is enabled.
6881
6882 **/
6883 VOID
6884 EFIAPI
6885 AsmEnablePaging32 (
6886 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6887 IN VOID *Context1, OPTIONAL
6888 IN VOID *Context2, OPTIONAL
6889 IN VOID *NewStack
6890 );
6891
6892
6893 /**
6894 Disables the 32-bit paging mode on the CPU.
6895
6896 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
6897 mode. This function assumes the current execution mode is 32-paged protected
6898 mode. This function is only available on IA-32. After the 32-bit paging mode
6899 is disabled, control is transferred to the function specified by EntryPoint
6900 using the new stack specified by NewStack and passing in the parameters
6901 specified by Context1 and Context2. Context1 and Context2 are optional and
6902 may be NULL. The function EntryPoint must never return.
6903
6904 If the current execution mode is not 32-bit paged mode, then ASSERT().
6905 If EntryPoint is NULL, then ASSERT().
6906 If NewStack is NULL, then ASSERT().
6907
6908 There are a number of constraints that must be followed before calling this
6909 function:
6910 1) Interrupts must be disabled.
6911 2) The caller must be in 32-bit paged mode.
6912 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
6913 4) CR3 must point to valid page tables that guarantee that the pages for
6914 this function and the stack are identity mapped.
6915
6916 @param EntryPoint A pointer to function to call with the new stack after
6917 paging is disabled.
6918 @param Context1 A pointer to the context to pass into the EntryPoint
6919 function as the first parameter after paging is disabled.
6920 @param Context2 A pointer to the context to pass into the EntryPoint
6921 function as the second parameter after paging is
6922 disabled.
6923 @param NewStack A pointer to the new stack to use for the EntryPoint
6924 function after paging is disabled.
6925
6926 **/
6927 VOID
6928 EFIAPI
6929 AsmDisablePaging32 (
6930 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6931 IN VOID *Context1, OPTIONAL
6932 IN VOID *Context2, OPTIONAL
6933 IN VOID *NewStack
6934 );
6935
6936
6937 /**
6938 Enables the 64-bit paging mode on the CPU.
6939
6940 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6941 must be properly initialized prior to calling this service. This function
6942 assumes the current execution mode is 32-bit protected mode with flat
6943 descriptors. This function is only available on IA-32. After the 64-bit
6944 paging mode is enabled, control is transferred to the function specified by
6945 EntryPoint using the new stack specified by NewStack and passing in the
6946 parameters specified by Context1 and Context2. Context1 and Context2 are
6947 optional and may be 0. The function EntryPoint must never return.
6948
6949 If the current execution mode is not 32-bit protected mode with flat
6950 descriptors, then ASSERT().
6951 If EntryPoint is 0, then ASSERT().
6952 If NewStack is 0, then ASSERT().
6953
6954 @param Cs The 16-bit selector to load in the CS before EntryPoint
6955 is called. The descriptor in the GDT that this selector
6956 references must be setup for long mode.
6957 @param EntryPoint The 64-bit virtual address of the function to call with
6958 the new stack after paging is enabled.
6959 @param Context1 The 64-bit virtual address of the context to pass into
6960 the EntryPoint function as the first parameter after
6961 paging is enabled.
6962 @param Context2 The 64-bit virtual address of the context to pass into
6963 the EntryPoint function as the second parameter after
6964 paging is enabled.
6965 @param NewStack The 64-bit virtual address of the new stack to use for
6966 the EntryPoint function after paging is enabled.
6967
6968 **/
6969 VOID
6970 EFIAPI
6971 AsmEnablePaging64 (
6972 IN UINT16 Cs,
6973 IN UINT64 EntryPoint,
6974 IN UINT64 Context1, OPTIONAL
6975 IN UINT64 Context2, OPTIONAL
6976 IN UINT64 NewStack
6977 );
6978
6979
6980 /**
6981 Disables the 64-bit paging mode on the CPU.
6982
6983 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
6984 mode. This function assumes the current execution mode is 64-paging mode.
6985 This function is only available on x64. After the 64-bit paging mode is
6986 disabled, control is transferred to the function specified by EntryPoint
6987 using the new stack specified by NewStack and passing in the parameters
6988 specified by Context1 and Context2. Context1 and Context2 are optional and
6989 may be 0. The function EntryPoint must never return.
6990
6991 If the current execution mode is not 64-bit paged mode, then ASSERT().
6992 If EntryPoint is 0, then ASSERT().
6993 If NewStack is 0, then ASSERT().
6994
6995 @param Cs The 16-bit selector to load in the CS before EntryPoint
6996 is called. The descriptor in the GDT that this selector
6997 references must be setup for 32-bit protected mode.
6998 @param EntryPoint The 64-bit virtual address of the function to call with
6999 the new stack after paging is disabled.
7000 @param Context1 The 64-bit virtual address of the context to pass into
7001 the EntryPoint function as the first parameter after
7002 paging is disabled.
7003 @param Context2 The 64-bit virtual address of the context to pass into
7004 the EntryPoint function as the second parameter after
7005 paging is disabled.
7006 @param NewStack The 64-bit virtual address of the new stack to use for
7007 the EntryPoint function after paging is disabled.
7008
7009 **/
7010 VOID
7011 EFIAPI
7012 AsmDisablePaging64 (
7013 IN UINT16 Cs,
7014 IN UINT32 EntryPoint,
7015 IN UINT32 Context1, OPTIONAL
7016 IN UINT32 Context2, OPTIONAL
7017 IN UINT32 NewStack
7018 );
7019
7020
7021 //
7022 // 16-bit thunking services
7023 //
7024
7025 /**
7026 Retrieves the properties for 16-bit thunk functions.
7027
7028 Computes the size of the buffer and stack below 1MB required to use the
7029 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7030 buffer size is returned in RealModeBufferSize, and the stack size is returned
7031 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7032 then the actual minimum stack size is ExtraStackSize plus the maximum number
7033 of bytes that need to be passed to the 16-bit real mode code.
7034
7035 If RealModeBufferSize is NULL, then ASSERT().
7036 If ExtraStackSize is NULL, then ASSERT().
7037
7038 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7039 required to use the 16-bit thunk functions.
7040 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7041 that the 16-bit thunk functions require for
7042 temporary storage in the transition to and from
7043 16-bit real mode.
7044
7045 **/
7046 VOID
7047 EFIAPI
7048 AsmGetThunk16Properties (
7049 OUT UINT32 *RealModeBufferSize,
7050 OUT UINT32 *ExtraStackSize
7051 );
7052
7053
7054 /**
7055 Prepares all structures a code required to use AsmThunk16().
7056
7057 Prepares all structures and code required to use AsmThunk16().
7058
7059 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7060 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7061
7062 If ThunkContext is NULL, then ASSERT().
7063
7064 @param ThunkContext A pointer to the context structure that describes the
7065 16-bit real mode code to call.
7066
7067 **/
7068 VOID
7069 EFIAPI
7070 AsmPrepareThunk16 (
7071 OUT THUNK_CONTEXT *ThunkContext
7072 );
7073
7074
7075 /**
7076 Transfers control to a 16-bit real mode entry point and returns the results.
7077
7078 Transfers control to a 16-bit real mode entry point and returns the results.
7079 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7080 This function must be called with interrupts disabled.
7081
7082 The register state from the RealModeState field of ThunkContext is restored just prior
7083 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7084 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7085 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7086 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7087 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7088 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7089 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7090 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7091 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7092 after the RETF instruction is executed.
7093
7094 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7095 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7096 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7097
7098 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7099 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7100 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7101
7102 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7103 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7104
7105 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7106 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7107 disable the A20 mask.
7108
7109 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7110 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7111 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7112
7113 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7114 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7115
7116 If ThunkContext is NULL, then ASSERT().
7117 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7118 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7119 ThunkAttributes, then ASSERT().
7120
7121 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7122 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7123
7124 @param ThunkContext A pointer to the context structure that describes the
7125 16-bit real mode code to call.
7126
7127 **/
7128 VOID
7129 EFIAPI
7130 AsmThunk16 (
7131 IN OUT THUNK_CONTEXT *ThunkContext
7132 );
7133
7134
7135 /**
7136 Prepares all structures and code for a 16-bit real mode thunk, transfers
7137 control to a 16-bit real mode entry point, and returns the results.
7138
7139 Prepares all structures and code for a 16-bit real mode thunk, transfers
7140 control to a 16-bit real mode entry point, and returns the results. If the
7141 caller only need to perform a single 16-bit real mode thunk, then this
7142 service should be used. If the caller intends to make more than one 16-bit
7143 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7144 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7145
7146 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7147 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7148
7149 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7150
7151 @param ThunkContext A pointer to the context structure that describes the
7152 16-bit real mode code to call.
7153
7154 **/
7155 VOID
7156 EFIAPI
7157 AsmPrepareAndThunk16 (
7158 IN OUT THUNK_CONTEXT *ThunkContext
7159 );
7160
7161 #endif
7162 #endif
7163
7164