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1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture-specific functions.
4
5 Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
6 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php.
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef __BASE_LIB__
18 #define __BASE_LIB__
19
20 //
21 // Definitions for architecture-specific types
22 //
23 #if defined (MDE_CPU_IA32)
24 ///
25 /// The IA-32 architecture context buffer used by SetJump() and LongJump().
26 ///
27 typedef struct {
28 UINT32 Ebx;
29 UINT32 Esi;
30 UINT32 Edi;
31 UINT32 Ebp;
32 UINT32 Esp;
33 UINT32 Eip;
34 } BASE_LIBRARY_JUMP_BUFFER;
35
36 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
37
38 #endif // defined (MDE_CPU_IA32)
39
40 #if defined (MDE_CPU_IPF)
41
42 ///
43 /// The Itanium architecture context buffer used by SetJump() and LongJump().
44 ///
45 typedef struct {
46 UINT64 F2[2];
47 UINT64 F3[2];
48 UINT64 F4[2];
49 UINT64 F5[2];
50 UINT64 F16[2];
51 UINT64 F17[2];
52 UINT64 F18[2];
53 UINT64 F19[2];
54 UINT64 F20[2];
55 UINT64 F21[2];
56 UINT64 F22[2];
57 UINT64 F23[2];
58 UINT64 F24[2];
59 UINT64 F25[2];
60 UINT64 F26[2];
61 UINT64 F27[2];
62 UINT64 F28[2];
63 UINT64 F29[2];
64 UINT64 F30[2];
65 UINT64 F31[2];
66 UINT64 R4;
67 UINT64 R5;
68 UINT64 R6;
69 UINT64 R7;
70 UINT64 SP;
71 UINT64 BR0;
72 UINT64 BR1;
73 UINT64 BR2;
74 UINT64 BR3;
75 UINT64 BR4;
76 UINT64 BR5;
77 UINT64 InitialUNAT;
78 UINT64 AfterSpillUNAT;
79 UINT64 PFS;
80 UINT64 BSP;
81 UINT64 Predicates;
82 UINT64 LoopCount;
83 UINT64 FPSR;
84 } BASE_LIBRARY_JUMP_BUFFER;
85
86 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
87
88 #endif // defined (MDE_CPU_IPF)
89
90 #if defined (MDE_CPU_X64)
91 ///
92 /// The x64 architecture context buffer used by SetJump() and LongJump().
93 ///
94 typedef struct {
95 UINT64 Rbx;
96 UINT64 Rsp;
97 UINT64 Rbp;
98 UINT64 Rdi;
99 UINT64 Rsi;
100 UINT64 R12;
101 UINT64 R13;
102 UINT64 R14;
103 UINT64 R15;
104 UINT64 Rip;
105 UINT64 MxCsr;
106 UINT8 XmmBuffer[160]; ///< XMM6-XMM15.
107 } BASE_LIBRARY_JUMP_BUFFER;
108
109 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
110
111 #endif // defined (MDE_CPU_X64)
112
113 #if defined (MDE_CPU_EBC)
114 ///
115 /// The EBC context buffer used by SetJump() and LongJump().
116 ///
117 typedef struct {
118 UINT64 R0;
119 UINT64 R1;
120 UINT64 R2;
121 UINT64 R3;
122 UINT64 IP;
123 } BASE_LIBRARY_JUMP_BUFFER;
124
125 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
126
127 #endif // defined (MDE_CPU_EBC)
128
129 #if defined (MDE_CPU_ARM)
130
131 typedef struct {
132 UINT32 R3; ///< A copy of R13.
133 UINT32 R4;
134 UINT32 R5;
135 UINT32 R6;
136 UINT32 R7;
137 UINT32 R8;
138 UINT32 R9;
139 UINT32 R10;
140 UINT32 R11;
141 UINT32 R12;
142 UINT32 R14;
143 } BASE_LIBRARY_JUMP_BUFFER;
144
145 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
146
147 #endif // defined (MDE_CPU_ARM)
148
149 #if defined (MDE_CPU_AARCH64)
150 typedef struct {
151 // GP regs
152 UINT64 X19;
153 UINT64 X20;
154 UINT64 X21;
155 UINT64 X22;
156 UINT64 X23;
157 UINT64 X24;
158 UINT64 X25;
159 UINT64 X26;
160 UINT64 X27;
161 UINT64 X28;
162 UINT64 FP;
163 UINT64 LR;
164 UINT64 IP0;
165
166 // FP regs
167 UINT64 D8;
168 UINT64 D9;
169 UINT64 D10;
170 UINT64 D11;
171 UINT64 D12;
172 UINT64 D13;
173 UINT64 D14;
174 UINT64 D15;
175 } BASE_LIBRARY_JUMP_BUFFER;
176
177 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
178
179 #endif // defined (MDE_CPU_AARCH64)
180
181
182 //
183 // String Services
184 //
185
186 /**
187 Copies one Null-terminated Unicode string to another Null-terminated Unicode
188 string and returns the new Unicode string.
189
190 This function copies the contents of the Unicode string Source to the Unicode
191 string Destination, and returns Destination. If Source and Destination
192 overlap, then the results are undefined.
193
194 If Destination is NULL, then ASSERT().
195 If Destination is not aligned on a 16-bit boundary, then ASSERT().
196 If Source is NULL, then ASSERT().
197 If Source is not aligned on a 16-bit boundary, then ASSERT().
198 If Source and Destination overlap, then ASSERT().
199 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
200 PcdMaximumUnicodeStringLength Unicode characters not including the
201 Null-terminator, then ASSERT().
202
203 @param Destination The pointer to a Null-terminated Unicode string.
204 @param Source The pointer to a Null-terminated Unicode string.
205
206 @return Destination.
207
208 **/
209 CHAR16 *
210 EFIAPI
211 StrCpy (
212 OUT CHAR16 *Destination,
213 IN CONST CHAR16 *Source
214 );
215
216
217 /**
218 Copies up to a specified length from one Null-terminated Unicode string to
219 another Null-terminated Unicode string and returns the new Unicode string.
220
221 This function copies the contents of the Unicode string Source to the Unicode
222 string Destination, and returns Destination. At most, Length Unicode
223 characters are copied from Source to Destination. If Length is 0, then
224 Destination is returned unmodified. If Length is greater that the number of
225 Unicode characters in Source, then Destination is padded with Null Unicode
226 characters. If Source and Destination overlap, then the results are
227 undefined.
228
229 If Length > 0 and Destination is NULL, then ASSERT().
230 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
231 If Length > 0 and Source is NULL, then ASSERT().
232 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
233 If Source and Destination overlap, then ASSERT().
234 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
235 PcdMaximumUnicodeStringLength, then ASSERT().
236 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
237 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
238 then ASSERT().
239
240 @param Destination The pointer to a Null-terminated Unicode string.
241 @param Source The pointer to a Null-terminated Unicode string.
242 @param Length The maximum number of Unicode characters to copy.
243
244 @return Destination.
245
246 **/
247 CHAR16 *
248 EFIAPI
249 StrnCpy (
250 OUT CHAR16 *Destination,
251 IN CONST CHAR16 *Source,
252 IN UINTN Length
253 );
254
255
256 /**
257 Returns the length of a Null-terminated Unicode string.
258
259 This function returns the number of Unicode characters in the Null-terminated
260 Unicode string specified by String.
261
262 If String is NULL, then ASSERT().
263 If String is not aligned on a 16-bit boundary, then ASSERT().
264 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
265 PcdMaximumUnicodeStringLength Unicode characters not including the
266 Null-terminator, then ASSERT().
267
268 @param String Pointer to a Null-terminated Unicode string.
269
270 @return The length of String.
271
272 **/
273 UINTN
274 EFIAPI
275 StrLen (
276 IN CONST CHAR16 *String
277 );
278
279
280 /**
281 Returns the size of a Null-terminated Unicode string in bytes, including the
282 Null terminator.
283
284 This function returns the size, in bytes, of the Null-terminated Unicode string
285 specified by String.
286
287 If String is NULL, then ASSERT().
288 If String is not aligned on a 16-bit boundary, then ASSERT().
289 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
290 PcdMaximumUnicodeStringLength Unicode characters not including the
291 Null-terminator, then ASSERT().
292
293 @param String The pointer to a Null-terminated Unicode string.
294
295 @return The size of String.
296
297 **/
298 UINTN
299 EFIAPI
300 StrSize (
301 IN CONST CHAR16 *String
302 );
303
304
305 /**
306 Compares two Null-terminated Unicode strings, and returns the difference
307 between the first mismatched Unicode characters.
308
309 This function compares the Null-terminated Unicode string FirstString to the
310 Null-terminated Unicode string SecondString. If FirstString is identical to
311 SecondString, then 0 is returned. Otherwise, the value returned is the first
312 mismatched Unicode character in SecondString subtracted from the first
313 mismatched Unicode character in FirstString.
314
315 If FirstString is NULL, then ASSERT().
316 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
317 If SecondString is NULL, then ASSERT().
318 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
319 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
320 than PcdMaximumUnicodeStringLength Unicode characters not including the
321 Null-terminator, then ASSERT().
322 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
323 than PcdMaximumUnicodeStringLength Unicode characters, not including the
324 Null-terminator, then ASSERT().
325
326 @param FirstString The pointer to a Null-terminated Unicode string.
327 @param SecondString The pointer to a Null-terminated Unicode string.
328
329 @retval 0 FirstString is identical to SecondString.
330 @return others FirstString is not identical to SecondString.
331
332 **/
333 INTN
334 EFIAPI
335 StrCmp (
336 IN CONST CHAR16 *FirstString,
337 IN CONST CHAR16 *SecondString
338 );
339
340
341 /**
342 Compares up to a specified length the contents of two Null-terminated Unicode strings,
343 and returns the difference between the first mismatched Unicode characters.
344
345 This function compares the Null-terminated Unicode string FirstString to the
346 Null-terminated Unicode string SecondString. At most, Length Unicode
347 characters will be compared. If Length is 0, then 0 is returned. If
348 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
349 value returned is the first mismatched Unicode character in SecondString
350 subtracted from the first mismatched Unicode character in FirstString.
351
352 If Length > 0 and FirstString is NULL, then ASSERT().
353 If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().
354 If Length > 0 and SecondString is NULL, then ASSERT().
355 If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().
356 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
357 PcdMaximumUnicodeStringLength, then ASSERT().
358 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than
359 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
360 then ASSERT().
361 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than
362 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
363 then ASSERT().
364
365 @param FirstString The pointer to a Null-terminated Unicode string.
366 @param SecondString The pointer to a Null-terminated Unicode string.
367 @param Length The maximum number of Unicode characters to compare.
368
369 @retval 0 FirstString is identical to SecondString.
370 @return others FirstString is not identical to SecondString.
371
372 **/
373 INTN
374 EFIAPI
375 StrnCmp (
376 IN CONST CHAR16 *FirstString,
377 IN CONST CHAR16 *SecondString,
378 IN UINTN Length
379 );
380
381
382 /**
383 Concatenates one Null-terminated Unicode string to another Null-terminated
384 Unicode string, and returns the concatenated Unicode string.
385
386 This function concatenates two Null-terminated Unicode strings. The contents
387 of Null-terminated Unicode string Source are concatenated to the end of
388 Null-terminated Unicode string Destination. The Null-terminated concatenated
389 Unicode String is returned. If Source and Destination overlap, then the
390 results are undefined.
391
392 If Destination is NULL, then ASSERT().
393 If Destination is not aligned on a 16-bit boundary, then ASSERT().
394 If Source is NULL, then ASSERT().
395 If Source is not aligned on a 16-bit boundary, then ASSERT().
396 If Source and Destination overlap, then ASSERT().
397 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
398 than PcdMaximumUnicodeStringLength Unicode characters, not including the
399 Null-terminator, then ASSERT().
400 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
401 PcdMaximumUnicodeStringLength Unicode characters, not including the
402 Null-terminator, then ASSERT().
403 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
404 and Source results in a Unicode string with more than
405 PcdMaximumUnicodeStringLength Unicode characters, not including the
406 Null-terminator, then ASSERT().
407
408 @param Destination The pointer to a Null-terminated Unicode string.
409 @param Source The pointer to a Null-terminated Unicode string.
410
411 @return Destination.
412
413 **/
414 CHAR16 *
415 EFIAPI
416 StrCat (
417 IN OUT CHAR16 *Destination,
418 IN CONST CHAR16 *Source
419 );
420
421
422 /**
423 Concatenates up to a specified length one Null-terminated Unicode to the end
424 of another Null-terminated Unicode string, and returns the concatenated
425 Unicode string.
426
427 This function concatenates two Null-terminated Unicode strings. The contents
428 of Null-terminated Unicode string Source are concatenated to the end of
429 Null-terminated Unicode string Destination, and Destination is returned. At
430 most, Length Unicode characters are concatenated from Source to the end of
431 Destination, and Destination is always Null-terminated. If Length is 0, then
432 Destination is returned unmodified. If Source and Destination overlap, then
433 the results are undefined.
434
435 If Destination is NULL, then ASSERT().
436 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
437 If Length > 0 and Source is NULL, then ASSERT().
438 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
439 If Source and Destination overlap, then ASSERT().
440 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
441 PcdMaximumUnicodeStringLength, then ASSERT().
442 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
443 than PcdMaximumUnicodeStringLength Unicode characters, not including the
444 Null-terminator, then ASSERT().
445 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
446 PcdMaximumUnicodeStringLength Unicode characters, not including the
447 Null-terminator, then ASSERT().
448 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
449 and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
450 Unicode characters, not including the Null-terminator, then ASSERT().
451
452 @param Destination The pointer to a Null-terminated Unicode string.
453 @param Source The pointer to a Null-terminated Unicode string.
454 @param Length The maximum number of Unicode characters to concatenate from
455 Source.
456
457 @return Destination.
458
459 **/
460 CHAR16 *
461 EFIAPI
462 StrnCat (
463 IN OUT CHAR16 *Destination,
464 IN CONST CHAR16 *Source,
465 IN UINTN Length
466 );
467
468 /**
469 Returns the first occurrence of a Null-terminated Unicode sub-string
470 in a Null-terminated Unicode string.
471
472 This function scans the contents of the Null-terminated Unicode string
473 specified by String and returns the first occurrence of SearchString.
474 If SearchString is not found in String, then NULL is returned. If
475 the length of SearchString is zero, then String is returned.
476
477 If String is NULL, then ASSERT().
478 If String is not aligned on a 16-bit boundary, then ASSERT().
479 If SearchString is NULL, then ASSERT().
480 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
481
482 If PcdMaximumUnicodeStringLength is not zero, and SearchString
483 or String contains more than PcdMaximumUnicodeStringLength Unicode
484 characters, not including the Null-terminator, then ASSERT().
485
486 @param String The pointer to a Null-terminated Unicode string.
487 @param SearchString The pointer to a Null-terminated Unicode string to search for.
488
489 @retval NULL If the SearchString does not appear in String.
490 @return others If there is a match.
491
492 **/
493 CHAR16 *
494 EFIAPI
495 StrStr (
496 IN CONST CHAR16 *String,
497 IN CONST CHAR16 *SearchString
498 );
499
500 /**
501 Convert a Null-terminated Unicode decimal string to a value of
502 type UINTN.
503
504 This function returns a value of type UINTN by interpreting the contents
505 of the Unicode string specified by String as a decimal number. The format
506 of the input Unicode string String is:
507
508 [spaces] [decimal digits].
509
510 The valid decimal digit character is in the range [0-9]. The
511 function will ignore the pad space, which includes spaces or
512 tab characters, before [decimal digits]. The running zero in the
513 beginning of [decimal digits] will be ignored. Then, the function
514 stops at the first character that is a not a valid decimal character
515 or a Null-terminator, whichever one comes first.
516
517 If String is NULL, then ASSERT().
518 If String is not aligned in a 16-bit boundary, then ASSERT().
519 If String has only pad spaces, then 0 is returned.
520 If String has no pad spaces or valid decimal digits,
521 then 0 is returned.
522 If the number represented by String overflows according
523 to the range defined by UINTN, then ASSERT().
524
525 If PcdMaximumUnicodeStringLength is not zero, and String contains
526 more than PcdMaximumUnicodeStringLength Unicode characters not including
527 the Null-terminator, then ASSERT().
528
529 @param String The pointer to a Null-terminated Unicode string.
530
531 @retval Value translated from String.
532
533 **/
534 UINTN
535 EFIAPI
536 StrDecimalToUintn (
537 IN CONST CHAR16 *String
538 );
539
540 /**
541 Convert a Null-terminated Unicode decimal string to a value of
542 type UINT64.
543
544 This function returns a value of type UINT64 by interpreting the contents
545 of the Unicode string specified by String as a decimal number. The format
546 of the input Unicode string String is:
547
548 [spaces] [decimal digits].
549
550 The valid decimal digit character is in the range [0-9]. The
551 function will ignore the pad space, which includes spaces or
552 tab characters, before [decimal digits]. The running zero in the
553 beginning of [decimal digits] will be ignored. Then, the function
554 stops at the first character that is a not a valid decimal character
555 or a Null-terminator, whichever one comes first.
556
557 If String is NULL, then ASSERT().
558 If String is not aligned in a 16-bit boundary, then ASSERT().
559 If String has only pad spaces, then 0 is returned.
560 If String has no pad spaces or valid decimal digits,
561 then 0 is returned.
562 If the number represented by String overflows according
563 to the range defined by UINT64, then ASSERT().
564
565 If PcdMaximumUnicodeStringLength is not zero, and String contains
566 more than PcdMaximumUnicodeStringLength Unicode characters not including
567 the Null-terminator, then ASSERT().
568
569 @param String The pointer to a Null-terminated Unicode string.
570
571 @retval Value translated from String.
572
573 **/
574 UINT64
575 EFIAPI
576 StrDecimalToUint64 (
577 IN CONST CHAR16 *String
578 );
579
580
581 /**
582 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
583
584 This function returns a value of type UINTN by interpreting the contents
585 of the Unicode string specified by String as a hexadecimal number.
586 The format of the input Unicode string String is:
587
588 [spaces][zeros][x][hexadecimal digits].
589
590 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
591 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
592 If "x" appears in the input string, it must be prefixed with at least one 0.
593 The function will ignore the pad space, which includes spaces or tab characters,
594 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
595 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
596 first valid hexadecimal digit. Then, the function stops at the first character
597 that is a not a valid hexadecimal character or NULL, whichever one comes first.
598
599 If String is NULL, then ASSERT().
600 If String is not aligned in a 16-bit boundary, then ASSERT().
601 If String has only pad spaces, then zero is returned.
602 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
603 then zero is returned.
604 If the number represented by String overflows according to the range defined by
605 UINTN, then ASSERT().
606
607 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
608 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
609 then ASSERT().
610
611 @param String The pointer to a Null-terminated Unicode string.
612
613 @retval Value translated from String.
614
615 **/
616 UINTN
617 EFIAPI
618 StrHexToUintn (
619 IN CONST CHAR16 *String
620 );
621
622
623 /**
624 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
625
626 This function returns a value of type UINT64 by interpreting the contents
627 of the Unicode string specified by String as a hexadecimal number.
628 The format of the input Unicode string String is
629
630 [spaces][zeros][x][hexadecimal digits].
631
632 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
633 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
634 If "x" appears in the input string, it must be prefixed with at least one 0.
635 The function will ignore the pad space, which includes spaces or tab characters,
636 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
637 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
638 first valid hexadecimal digit. Then, the function stops at the first character that is
639 a not a valid hexadecimal character or NULL, whichever one comes first.
640
641 If String is NULL, then ASSERT().
642 If String is not aligned in a 16-bit boundary, then ASSERT().
643 If String has only pad spaces, then zero is returned.
644 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
645 then zero is returned.
646 If the number represented by String overflows according to the range defined by
647 UINT64, then ASSERT().
648
649 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
650 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
651 then ASSERT().
652
653 @param String The pointer to a Null-terminated Unicode string.
654
655 @retval Value translated from String.
656
657 **/
658 UINT64
659 EFIAPI
660 StrHexToUint64 (
661 IN CONST CHAR16 *String
662 );
663
664 /**
665 Convert a Null-terminated Unicode string to a Null-terminated
666 ASCII string and returns the ASCII string.
667
668 This function converts the content of the Unicode string Source
669 to the ASCII string Destination by copying the lower 8 bits of
670 each Unicode character. It returns Destination.
671
672 The caller is responsible to make sure Destination points to a buffer with size
673 equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.
674
675 If any Unicode characters in Source contain non-zero value in
676 the upper 8 bits, then ASSERT().
677
678 If Destination is NULL, then ASSERT().
679 If Source is NULL, then ASSERT().
680 If Source is not aligned on a 16-bit boundary, then ASSERT().
681 If Source and Destination overlap, then ASSERT().
682
683 If PcdMaximumUnicodeStringLength is not zero, and Source contains
684 more than PcdMaximumUnicodeStringLength Unicode characters not including
685 the Null-terminator, then ASSERT().
686
687 If PcdMaximumAsciiStringLength is not zero, and Source contains more
688 than PcdMaximumAsciiStringLength Unicode characters not including the
689 Null-terminator, then ASSERT().
690
691 @param Source The pointer to a Null-terminated Unicode string.
692 @param Destination The pointer to a Null-terminated ASCII string.
693
694 @return Destination.
695
696 **/
697 CHAR8 *
698 EFIAPI
699 UnicodeStrToAsciiStr (
700 IN CONST CHAR16 *Source,
701 OUT CHAR8 *Destination
702 );
703
704
705 /**
706 Copies one Null-terminated ASCII string to another Null-terminated ASCII
707 string and returns the new ASCII string.
708
709 This function copies the contents of the ASCII string Source to the ASCII
710 string Destination, and returns Destination. If Source and Destination
711 overlap, then the results are undefined.
712
713 If Destination is NULL, then ASSERT().
714 If Source is NULL, then ASSERT().
715 If Source and Destination overlap, then ASSERT().
716 If PcdMaximumAsciiStringLength is not zero and Source contains more than
717 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
718 then ASSERT().
719
720 @param Destination The pointer to a Null-terminated ASCII string.
721 @param Source The pointer to a Null-terminated ASCII string.
722
723 @return Destination
724
725 **/
726 CHAR8 *
727 EFIAPI
728 AsciiStrCpy (
729 OUT CHAR8 *Destination,
730 IN CONST CHAR8 *Source
731 );
732
733
734 /**
735 Copies up to a specified length one Null-terminated ASCII string to another
736 Null-terminated ASCII string and returns the new ASCII string.
737
738 This function copies the contents of the ASCII string Source to the ASCII
739 string Destination, and returns Destination. At most, Length ASCII characters
740 are copied from Source to Destination. If Length is 0, then Destination is
741 returned unmodified. If Length is greater that the number of ASCII characters
742 in Source, then Destination is padded with Null ASCII characters. If Source
743 and Destination overlap, then the results are undefined.
744
745 If Destination is NULL, then ASSERT().
746 If Source is NULL, then ASSERT().
747 If Source and Destination overlap, then ASSERT().
748 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
749 PcdMaximumAsciiStringLength, then ASSERT().
750 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
751 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
752 then ASSERT().
753
754 @param Destination The pointer to a Null-terminated ASCII string.
755 @param Source The pointer to a Null-terminated ASCII string.
756 @param Length The maximum number of ASCII characters to copy.
757
758 @return Destination
759
760 **/
761 CHAR8 *
762 EFIAPI
763 AsciiStrnCpy (
764 OUT CHAR8 *Destination,
765 IN CONST CHAR8 *Source,
766 IN UINTN Length
767 );
768
769
770 /**
771 Returns the length of a Null-terminated ASCII string.
772
773 This function returns the number of ASCII characters in the Null-terminated
774 ASCII string specified by String.
775
776 If Length > 0 and Destination is NULL, then ASSERT().
777 If Length > 0 and Source is NULL, then ASSERT().
778 If PcdMaximumAsciiStringLength is not zero and String contains more than
779 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
780 then ASSERT().
781
782 @param String The pointer to a Null-terminated ASCII string.
783
784 @return The length of String.
785
786 **/
787 UINTN
788 EFIAPI
789 AsciiStrLen (
790 IN CONST CHAR8 *String
791 );
792
793
794 /**
795 Returns the size of a Null-terminated ASCII string in bytes, including the
796 Null terminator.
797
798 This function returns the size, in bytes, of the Null-terminated ASCII string
799 specified by String.
800
801 If String is NULL, then ASSERT().
802 If PcdMaximumAsciiStringLength is not zero and String contains more than
803 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
804 then ASSERT().
805
806 @param String The pointer to a Null-terminated ASCII string.
807
808 @return The size of String.
809
810 **/
811 UINTN
812 EFIAPI
813 AsciiStrSize (
814 IN CONST CHAR8 *String
815 );
816
817
818 /**
819 Compares two Null-terminated ASCII strings, and returns the difference
820 between the first mismatched ASCII characters.
821
822 This function compares the Null-terminated ASCII string FirstString to the
823 Null-terminated ASCII string SecondString. If FirstString is identical to
824 SecondString, then 0 is returned. Otherwise, the value returned is the first
825 mismatched ASCII character in SecondString subtracted from the first
826 mismatched ASCII character in FirstString.
827
828 If FirstString is NULL, then ASSERT().
829 If SecondString is NULL, then ASSERT().
830 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
831 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
832 then ASSERT().
833 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
834 than PcdMaximumAsciiStringLength ASCII characters not including the
835 Null-terminator, then ASSERT().
836
837 @param FirstString The pointer to a Null-terminated ASCII string.
838 @param SecondString The pointer to a Null-terminated ASCII string.
839
840 @retval ==0 FirstString is identical to SecondString.
841 @retval !=0 FirstString is not identical to SecondString.
842
843 **/
844 INTN
845 EFIAPI
846 AsciiStrCmp (
847 IN CONST CHAR8 *FirstString,
848 IN CONST CHAR8 *SecondString
849 );
850
851
852 /**
853 Performs a case insensitive comparison of two Null-terminated ASCII strings,
854 and returns the difference between the first mismatched ASCII characters.
855
856 This function performs a case insensitive comparison of the Null-terminated
857 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
858 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
859 value returned is the first mismatched lower case ASCII character in
860 SecondString subtracted from the first mismatched lower case ASCII character
861 in FirstString.
862
863 If FirstString is NULL, then ASSERT().
864 If SecondString is NULL, then ASSERT().
865 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
866 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
867 then ASSERT().
868 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
869 than PcdMaximumAsciiStringLength ASCII characters not including the
870 Null-terminator, then ASSERT().
871
872 @param FirstString The pointer to a Null-terminated ASCII string.
873 @param SecondString The pointer to a Null-terminated ASCII string.
874
875 @retval ==0 FirstString is identical to SecondString using case insensitive
876 comparisons.
877 @retval !=0 FirstString is not identical to SecondString using case
878 insensitive comparisons.
879
880 **/
881 INTN
882 EFIAPI
883 AsciiStriCmp (
884 IN CONST CHAR8 *FirstString,
885 IN CONST CHAR8 *SecondString
886 );
887
888
889 /**
890 Compares two Null-terminated ASCII strings with maximum lengths, and returns
891 the difference between the first mismatched ASCII characters.
892
893 This function compares the Null-terminated ASCII string FirstString to the
894 Null-terminated ASCII string SecondString. At most, Length ASCII characters
895 will be compared. If Length is 0, then 0 is returned. If FirstString is
896 identical to SecondString, then 0 is returned. Otherwise, the value returned
897 is the first mismatched ASCII character in SecondString subtracted from the
898 first mismatched ASCII character in FirstString.
899
900 If Length > 0 and FirstString is NULL, then ASSERT().
901 If Length > 0 and SecondString is NULL, then ASSERT().
902 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
903 PcdMaximumAsciiStringLength, then ASSERT().
904 If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than
905 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
906 then ASSERT().
907 If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than
908 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
909 then ASSERT().
910
911 @param FirstString The pointer to a Null-terminated ASCII string.
912 @param SecondString The pointer to a Null-terminated ASCII string.
913 @param Length The maximum number of ASCII characters for compare.
914
915 @retval ==0 FirstString is identical to SecondString.
916 @retval !=0 FirstString is not identical to SecondString.
917
918 **/
919 INTN
920 EFIAPI
921 AsciiStrnCmp (
922 IN CONST CHAR8 *FirstString,
923 IN CONST CHAR8 *SecondString,
924 IN UINTN Length
925 );
926
927
928 /**
929 Concatenates one Null-terminated ASCII string to another Null-terminated
930 ASCII string, and returns the concatenated ASCII string.
931
932 This function concatenates two Null-terminated ASCII strings. The contents of
933 Null-terminated ASCII string Source are concatenated to the end of Null-
934 terminated ASCII string Destination. The Null-terminated concatenated ASCII
935 String is returned.
936
937 If Destination is NULL, then ASSERT().
938 If Source is NULL, then ASSERT().
939 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
940 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
941 then ASSERT().
942 If PcdMaximumAsciiStringLength is not zero and Source contains more than
943 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
944 then ASSERT().
945 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
946 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
947 ASCII characters, then ASSERT().
948
949 @param Destination The pointer to a Null-terminated ASCII string.
950 @param Source The pointer to a Null-terminated ASCII string.
951
952 @return Destination
953
954 **/
955 CHAR8 *
956 EFIAPI
957 AsciiStrCat (
958 IN OUT CHAR8 *Destination,
959 IN CONST CHAR8 *Source
960 );
961
962
963 /**
964 Concatenates up to a specified length one Null-terminated ASCII string to
965 the end of another Null-terminated ASCII string, and returns the
966 concatenated ASCII string.
967
968 This function concatenates two Null-terminated ASCII strings. The contents
969 of Null-terminated ASCII string Source are concatenated to the end of Null-
970 terminated ASCII string Destination, and Destination is returned. At most,
971 Length ASCII characters are concatenated from Source to the end of
972 Destination, and Destination is always Null-terminated. If Length is 0, then
973 Destination is returned unmodified. If Source and Destination overlap, then
974 the results are undefined.
975
976 If Length > 0 and Destination is NULL, then ASSERT().
977 If Length > 0 and Source is NULL, then ASSERT().
978 If Source and Destination overlap, then ASSERT().
979 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
980 PcdMaximumAsciiStringLength, then ASSERT().
981 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
982 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
983 then ASSERT().
984 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
985 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
986 then ASSERT().
987 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
988 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
989 ASCII characters, not including the Null-terminator, then ASSERT().
990
991 @param Destination The pointer to a Null-terminated ASCII string.
992 @param Source The pointer to a Null-terminated ASCII string.
993 @param Length The maximum number of ASCII characters to concatenate from
994 Source.
995
996 @return Destination
997
998 **/
999 CHAR8 *
1000 EFIAPI
1001 AsciiStrnCat (
1002 IN OUT CHAR8 *Destination,
1003 IN CONST CHAR8 *Source,
1004 IN UINTN Length
1005 );
1006
1007
1008 /**
1009 Returns the first occurrence of a Null-terminated ASCII sub-string
1010 in a Null-terminated ASCII string.
1011
1012 This function scans the contents of the ASCII string specified by String
1013 and returns the first occurrence of SearchString. If SearchString is not
1014 found in String, then NULL is returned. If the length of SearchString is zero,
1015 then String is returned.
1016
1017 If String is NULL, then ASSERT().
1018 If SearchString is NULL, then ASSERT().
1019
1020 If PcdMaximumAsciiStringLength is not zero, and SearchString or
1021 String contains more than PcdMaximumAsciiStringLength Unicode characters
1022 not including the Null-terminator, then ASSERT().
1023
1024 @param String The pointer to a Null-terminated ASCII string.
1025 @param SearchString The pointer to a Null-terminated ASCII string to search for.
1026
1027 @retval NULL If the SearchString does not appear in String.
1028 @retval others If there is a match return the first occurrence of SearchingString.
1029 If the length of SearchString is zero,return String.
1030
1031 **/
1032 CHAR8 *
1033 EFIAPI
1034 AsciiStrStr (
1035 IN CONST CHAR8 *String,
1036 IN CONST CHAR8 *SearchString
1037 );
1038
1039
1040 /**
1041 Convert a Null-terminated ASCII decimal string to a value of type
1042 UINTN.
1043
1044 This function returns a value of type UINTN by interpreting the contents
1045 of the ASCII string String as a decimal number. The format of the input
1046 ASCII string String is:
1047
1048 [spaces] [decimal digits].
1049
1050 The valid decimal digit character is in the range [0-9]. The function will
1051 ignore the pad space, which includes spaces or tab characters, before the digits.
1052 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1053 function stops at the first character that is a not a valid decimal character or
1054 Null-terminator, whichever on comes first.
1055
1056 If String has only pad spaces, then 0 is returned.
1057 If String has no pad spaces or valid decimal digits, then 0 is returned.
1058 If the number represented by String overflows according to the range defined by
1059 UINTN, then ASSERT().
1060 If String is NULL, then ASSERT().
1061 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1062 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1063 then ASSERT().
1064
1065 @param String The pointer to a Null-terminated ASCII string.
1066
1067 @retval The value translated from String.
1068
1069 **/
1070 UINTN
1071 EFIAPI
1072 AsciiStrDecimalToUintn (
1073 IN CONST CHAR8 *String
1074 );
1075
1076
1077 /**
1078 Convert a Null-terminated ASCII decimal string to a value of type
1079 UINT64.
1080
1081 This function returns a value of type UINT64 by interpreting the contents
1082 of the ASCII string String as a decimal number. The format of the input
1083 ASCII string String is:
1084
1085 [spaces] [decimal digits].
1086
1087 The valid decimal digit character is in the range [0-9]. The function will
1088 ignore the pad space, which includes spaces or tab characters, before the digits.
1089 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1090 function stops at the first character that is a not a valid decimal character or
1091 Null-terminator, whichever on comes first.
1092
1093 If String has only pad spaces, then 0 is returned.
1094 If String has no pad spaces or valid decimal digits, then 0 is returned.
1095 If the number represented by String overflows according to the range defined by
1096 UINT64, then ASSERT().
1097 If String is NULL, then ASSERT().
1098 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1099 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1100 then ASSERT().
1101
1102 @param String The pointer to a Null-terminated ASCII string.
1103
1104 @retval Value translated from String.
1105
1106 **/
1107 UINT64
1108 EFIAPI
1109 AsciiStrDecimalToUint64 (
1110 IN CONST CHAR8 *String
1111 );
1112
1113
1114 /**
1115 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1116
1117 This function returns a value of type UINTN by interpreting the contents of
1118 the ASCII string String as a hexadecimal number. The format of the input ASCII
1119 string String is:
1120
1121 [spaces][zeros][x][hexadecimal digits].
1122
1123 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1124 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1125 appears in the input string, it must be prefixed with at least one 0. The function
1126 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1127 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1128 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1129 digit. Then, the function stops at the first character that is a not a valid
1130 hexadecimal character or Null-terminator, whichever on comes first.
1131
1132 If String has only pad spaces, then 0 is returned.
1133 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1134 0 is returned.
1135
1136 If the number represented by String overflows according to the range defined by UINTN,
1137 then ASSERT().
1138 If String is NULL, then ASSERT().
1139 If PcdMaximumAsciiStringLength is not zero,
1140 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1141 the Null-terminator, then ASSERT().
1142
1143 @param String The pointer to a Null-terminated ASCII string.
1144
1145 @retval Value translated from String.
1146
1147 **/
1148 UINTN
1149 EFIAPI
1150 AsciiStrHexToUintn (
1151 IN CONST CHAR8 *String
1152 );
1153
1154
1155 /**
1156 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1157
1158 This function returns a value of type UINT64 by interpreting the contents of
1159 the ASCII string String as a hexadecimal number. The format of the input ASCII
1160 string String is:
1161
1162 [spaces][zeros][x][hexadecimal digits].
1163
1164 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1165 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1166 appears in the input string, it must be prefixed with at least one 0. The function
1167 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1168 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1169 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1170 digit. Then, the function stops at the first character that is a not a valid
1171 hexadecimal character or Null-terminator, whichever on comes first.
1172
1173 If String has only pad spaces, then 0 is returned.
1174 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1175 0 is returned.
1176
1177 If the number represented by String overflows according to the range defined by UINT64,
1178 then ASSERT().
1179 If String is NULL, then ASSERT().
1180 If PcdMaximumAsciiStringLength is not zero,
1181 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1182 the Null-terminator, then ASSERT().
1183
1184 @param String The pointer to a Null-terminated ASCII string.
1185
1186 @retval Value translated from String.
1187
1188 **/
1189 UINT64
1190 EFIAPI
1191 AsciiStrHexToUint64 (
1192 IN CONST CHAR8 *String
1193 );
1194
1195
1196 /**
1197 Convert one Null-terminated ASCII string to a Null-terminated
1198 Unicode string and returns the Unicode string.
1199
1200 This function converts the contents of the ASCII string Source to the Unicode
1201 string Destination, and returns Destination. The function terminates the
1202 Unicode string Destination by appending a Null-terminator character at the end.
1203 The caller is responsible to make sure Destination points to a buffer with size
1204 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1205
1206 If Destination is NULL, then ASSERT().
1207 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1208 If Source is NULL, then ASSERT().
1209 If Source and Destination overlap, then ASSERT().
1210 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1211 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1212 then ASSERT().
1213 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1214 PcdMaximumUnicodeStringLength ASCII characters not including the
1215 Null-terminator, then ASSERT().
1216
1217 @param Source The pointer to a Null-terminated ASCII string.
1218 @param Destination The pointer to a Null-terminated Unicode string.
1219
1220 @return Destination.
1221
1222 **/
1223 CHAR16 *
1224 EFIAPI
1225 AsciiStrToUnicodeStr (
1226 IN CONST CHAR8 *Source,
1227 OUT CHAR16 *Destination
1228 );
1229
1230
1231 /**
1232 Converts an 8-bit value to an 8-bit BCD value.
1233
1234 Converts the 8-bit value specified by Value to BCD. The BCD value is
1235 returned.
1236
1237 If Value >= 100, then ASSERT().
1238
1239 @param Value The 8-bit value to convert to BCD. Range 0..99.
1240
1241 @return The BCD value.
1242
1243 **/
1244 UINT8
1245 EFIAPI
1246 DecimalToBcd8 (
1247 IN UINT8 Value
1248 );
1249
1250
1251 /**
1252 Converts an 8-bit BCD value to an 8-bit value.
1253
1254 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1255 value is returned.
1256
1257 If Value >= 0xA0, then ASSERT().
1258 If (Value & 0x0F) >= 0x0A, then ASSERT().
1259
1260 @param Value The 8-bit BCD value to convert to an 8-bit value.
1261
1262 @return The 8-bit value is returned.
1263
1264 **/
1265 UINT8
1266 EFIAPI
1267 BcdToDecimal8 (
1268 IN UINT8 Value
1269 );
1270
1271
1272 //
1273 // Linked List Functions and Macros
1274 //
1275
1276 /**
1277 Initializes the head node of a doubly linked list that is declared as a
1278 global variable in a module.
1279
1280 Initializes the forward and backward links of a new linked list. After
1281 initializing a linked list with this macro, the other linked list functions
1282 may be used to add and remove nodes from the linked list. This macro results
1283 in smaller executables by initializing the linked list in the data section,
1284 instead if calling the InitializeListHead() function to perform the
1285 equivalent operation.
1286
1287 @param ListHead The head note of a list to initialize.
1288
1289 **/
1290 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1291
1292
1293 /**
1294 Initializes the head node of a doubly linked list, and returns the pointer to
1295 the head node of the doubly linked list.
1296
1297 Initializes the forward and backward links of a new linked list. After
1298 initializing a linked list with this function, the other linked list
1299 functions may be used to add and remove nodes from the linked list. It is up
1300 to the caller of this function to allocate the memory for ListHead.
1301
1302 If ListHead is NULL, then ASSERT().
1303
1304 @param ListHead A pointer to the head node of a new doubly linked list.
1305
1306 @return ListHead
1307
1308 **/
1309 LIST_ENTRY *
1310 EFIAPI
1311 InitializeListHead (
1312 IN OUT LIST_ENTRY *ListHead
1313 );
1314
1315
1316 /**
1317 Adds a node to the beginning of a doubly linked list, and returns the pointer
1318 to the head node of the doubly linked list.
1319
1320 Adds the node Entry at the beginning of the doubly linked list denoted by
1321 ListHead, and returns ListHead.
1322
1323 If ListHead is NULL, then ASSERT().
1324 If Entry is NULL, then ASSERT().
1325 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1326 InitializeListHead(), then ASSERT().
1327 If PcdMaximumLinkedListLength is not zero, and prior to insertion the number
1328 of nodes in ListHead, including the ListHead node, is greater than or
1329 equal to PcdMaximumLinkedListLength, then ASSERT().
1330
1331 @param ListHead A pointer to the head node of a doubly linked list.
1332 @param Entry A pointer to a node that is to be inserted at the beginning
1333 of a doubly linked list.
1334
1335 @return ListHead
1336
1337 **/
1338 LIST_ENTRY *
1339 EFIAPI
1340 InsertHeadList (
1341 IN OUT LIST_ENTRY *ListHead,
1342 IN OUT LIST_ENTRY *Entry
1343 );
1344
1345
1346 /**
1347 Adds a node to the end of a doubly linked list, and returns the pointer to
1348 the head node of the doubly linked list.
1349
1350 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1351 and returns ListHead.
1352
1353 If ListHead is NULL, then ASSERT().
1354 If Entry is NULL, then ASSERT().
1355 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1356 InitializeListHead(), then ASSERT().
1357 If PcdMaximumLinkedListLength is not zero, and prior to insertion the number
1358 of nodes in ListHead, including the ListHead node, is greater than or
1359 equal to PcdMaximumLinkedListLength, then ASSERT().
1360
1361 @param ListHead A pointer to the head node of a doubly linked list.
1362 @param Entry A pointer to a node that is to be added at the end of the
1363 doubly linked list.
1364
1365 @return ListHead
1366
1367 **/
1368 LIST_ENTRY *
1369 EFIAPI
1370 InsertTailList (
1371 IN OUT LIST_ENTRY *ListHead,
1372 IN OUT LIST_ENTRY *Entry
1373 );
1374
1375
1376 /**
1377 Retrieves the first node of a doubly linked list.
1378
1379 Returns the first node of a doubly linked list. List must have been
1380 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1381 If List is empty, then List is returned.
1382
1383 If List is NULL, then ASSERT().
1384 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1385 InitializeListHead(), then ASSERT().
1386 If PcdMaximumLinkedListLength is not zero, and the number of nodes
1387 in List, including the List node, is greater than or equal to
1388 PcdMaximumLinkedListLength, then ASSERT().
1389
1390 @param List A pointer to the head node of a doubly linked list.
1391
1392 @return The first node of a doubly linked list.
1393 @retval List The list is empty.
1394
1395 **/
1396 LIST_ENTRY *
1397 EFIAPI
1398 GetFirstNode (
1399 IN CONST LIST_ENTRY *List
1400 );
1401
1402
1403 /**
1404 Retrieves the next node of a doubly linked list.
1405
1406 Returns the node of a doubly linked list that follows Node.
1407 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1408 or InitializeListHead(). If List is empty, then List is returned.
1409
1410 If List is NULL, then ASSERT().
1411 If Node is NULL, then ASSERT().
1412 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1413 InitializeListHead(), then ASSERT().
1414 If PcdMaximumLinkedListLength is not zero, and List contains more than
1415 PcdMaximumLinkedListLength nodes, then ASSERT().
1416 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1417
1418 @param List A pointer to the head node of a doubly linked list.
1419 @param Node A pointer to a node in the doubly linked list.
1420
1421 @return The pointer to the next node if one exists. Otherwise List is returned.
1422
1423 **/
1424 LIST_ENTRY *
1425 EFIAPI
1426 GetNextNode (
1427 IN CONST LIST_ENTRY *List,
1428 IN CONST LIST_ENTRY *Node
1429 );
1430
1431
1432 /**
1433 Retrieves the previous node of a doubly linked list.
1434
1435 Returns the node of a doubly linked list that precedes Node.
1436 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1437 or InitializeListHead(). If List is empty, then List is returned.
1438
1439 If List is NULL, then ASSERT().
1440 If Node is NULL, then ASSERT().
1441 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1442 InitializeListHead(), then ASSERT().
1443 If PcdMaximumLinkedListLength is not zero, and List contains more than
1444 PcdMaximumLinkedListLength nodes, then ASSERT().
1445 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1446
1447 @param List A pointer to the head node of a doubly linked list.
1448 @param Node A pointer to a node in the doubly linked list.
1449
1450 @return The pointer to the previous node if one exists. Otherwise List is returned.
1451
1452 **/
1453 LIST_ENTRY *
1454 EFIAPI
1455 GetPreviousNode (
1456 IN CONST LIST_ENTRY *List,
1457 IN CONST LIST_ENTRY *Node
1458 );
1459
1460
1461 /**
1462 Checks to see if a doubly linked list is empty or not.
1463
1464 Checks to see if the doubly linked list is empty. If the linked list contains
1465 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1466
1467 If ListHead is NULL, then ASSERT().
1468 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1469 InitializeListHead(), then ASSERT().
1470 If PcdMaximumLinkedListLength is not zero, and the number of nodes
1471 in List, including the List node, is greater than or equal to
1472 PcdMaximumLinkedListLength, then ASSERT().
1473
1474 @param ListHead A pointer to the head node of a doubly linked list.
1475
1476 @retval TRUE The linked list is empty.
1477 @retval FALSE The linked list is not empty.
1478
1479 **/
1480 BOOLEAN
1481 EFIAPI
1482 IsListEmpty (
1483 IN CONST LIST_ENTRY *ListHead
1484 );
1485
1486
1487 /**
1488 Determines if a node in a doubly linked list is the head node of a the same
1489 doubly linked list. This function is typically used to terminate a loop that
1490 traverses all the nodes in a doubly linked list starting with the head node.
1491
1492 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1493 nodes in the doubly linked list specified by List. List must have been
1494 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1495
1496 If List is NULL, then ASSERT().
1497 If Node is NULL, then ASSERT().
1498 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1499 then ASSERT().
1500 If PcdMaximumLinkedListLength is not zero, and the number of nodes
1501 in List, including the List node, is greater than or equal to
1502 PcdMaximumLinkedListLength, then ASSERT().
1503 If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal
1504 to List, then ASSERT().
1505
1506 @param List A pointer to the head node of a doubly linked list.
1507 @param Node A pointer to a node in the doubly linked list.
1508
1509 @retval TRUE Node is the head of the doubly-linked list pointed by List.
1510 @retval FALSE Node is not the head of the doubly-linked list pointed by List.
1511
1512 **/
1513 BOOLEAN
1514 EFIAPI
1515 IsNull (
1516 IN CONST LIST_ENTRY *List,
1517 IN CONST LIST_ENTRY *Node
1518 );
1519
1520
1521 /**
1522 Determines if a node the last node in a doubly linked list.
1523
1524 Returns TRUE if Node is the last node in the doubly linked list specified by
1525 List. Otherwise, FALSE is returned. List must have been initialized with
1526 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1527
1528 If List is NULL, then ASSERT().
1529 If Node is NULL, then ASSERT().
1530 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1531 InitializeListHead(), then ASSERT().
1532 If PcdMaximumLinkedListLength is not zero, and the number of nodes
1533 in List, including the List node, is greater than or equal to
1534 PcdMaximumLinkedListLength, then ASSERT().
1535 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1536
1537 @param List A pointer to the head node of a doubly linked list.
1538 @param Node A pointer to a node in the doubly linked list.
1539
1540 @retval TRUE Node is the last node in the linked list.
1541 @retval FALSE Node is not the last node in the linked list.
1542
1543 **/
1544 BOOLEAN
1545 EFIAPI
1546 IsNodeAtEnd (
1547 IN CONST LIST_ENTRY *List,
1548 IN CONST LIST_ENTRY *Node
1549 );
1550
1551
1552 /**
1553 Swaps the location of two nodes in a doubly linked list, and returns the
1554 first node after the swap.
1555
1556 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1557 Otherwise, the location of the FirstEntry node is swapped with the location
1558 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1559 same double linked list as FirstEntry and that double linked list must have
1560 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1561 SecondEntry is returned after the nodes are swapped.
1562
1563 If FirstEntry is NULL, then ASSERT().
1564 If SecondEntry is NULL, then ASSERT().
1565 If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the
1566 same linked list, then ASSERT().
1567 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1568 linked list containing the FirstEntry and SecondEntry nodes, including
1569 the FirstEntry and SecondEntry nodes, is greater than or equal to
1570 PcdMaximumLinkedListLength, then ASSERT().
1571
1572 @param FirstEntry A pointer to a node in a linked list.
1573 @param SecondEntry A pointer to another node in the same linked list.
1574
1575 @return SecondEntry.
1576
1577 **/
1578 LIST_ENTRY *
1579 EFIAPI
1580 SwapListEntries (
1581 IN OUT LIST_ENTRY *FirstEntry,
1582 IN OUT LIST_ENTRY *SecondEntry
1583 );
1584
1585
1586 /**
1587 Removes a node from a doubly linked list, and returns the node that follows
1588 the removed node.
1589
1590 Removes the node Entry from a doubly linked list. It is up to the caller of
1591 this function to release the memory used by this node if that is required. On
1592 exit, the node following Entry in the doubly linked list is returned. If
1593 Entry is the only node in the linked list, then the head node of the linked
1594 list is returned.
1595
1596 If Entry is NULL, then ASSERT().
1597 If Entry is the head node of an empty list, then ASSERT().
1598 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1599 linked list containing Entry, including the Entry node, is greater than
1600 or equal to PcdMaximumLinkedListLength, then ASSERT().
1601
1602 @param Entry A pointer to a node in a linked list.
1603
1604 @return Entry.
1605
1606 **/
1607 LIST_ENTRY *
1608 EFIAPI
1609 RemoveEntryList (
1610 IN CONST LIST_ENTRY *Entry
1611 );
1612
1613 //
1614 // Math Services
1615 //
1616
1617 /**
1618 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1619 with zeros. The shifted value is returned.
1620
1621 This function shifts the 64-bit value Operand to the left by Count bits. The
1622 low Count bits are set to zero. The shifted value is returned.
1623
1624 If Count is greater than 63, then ASSERT().
1625
1626 @param Operand The 64-bit operand to shift left.
1627 @param Count The number of bits to shift left.
1628
1629 @return Operand << Count.
1630
1631 **/
1632 UINT64
1633 EFIAPI
1634 LShiftU64 (
1635 IN UINT64 Operand,
1636 IN UINTN Count
1637 );
1638
1639
1640 /**
1641 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1642 filled with zeros. The shifted value is returned.
1643
1644 This function shifts the 64-bit value Operand to the right by Count bits. The
1645 high Count bits are set to zero. The shifted value is returned.
1646
1647 If Count is greater than 63, then ASSERT().
1648
1649 @param Operand The 64-bit operand to shift right.
1650 @param Count The number of bits to shift right.
1651
1652 @return Operand >> Count
1653
1654 **/
1655 UINT64
1656 EFIAPI
1657 RShiftU64 (
1658 IN UINT64 Operand,
1659 IN UINTN Count
1660 );
1661
1662
1663 /**
1664 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1665 with original integer's bit 63. The shifted value is returned.
1666
1667 This function shifts the 64-bit value Operand to the right by Count bits. The
1668 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1669
1670 If Count is greater than 63, then ASSERT().
1671
1672 @param Operand The 64-bit operand to shift right.
1673 @param Count The number of bits to shift right.
1674
1675 @return Operand >> Count
1676
1677 **/
1678 UINT64
1679 EFIAPI
1680 ARShiftU64 (
1681 IN UINT64 Operand,
1682 IN UINTN Count
1683 );
1684
1685
1686 /**
1687 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1688 with the high bits that were rotated.
1689
1690 This function rotates the 32-bit value Operand to the left by Count bits. The
1691 low Count bits are fill with the high Count bits of Operand. The rotated
1692 value is returned.
1693
1694 If Count is greater than 31, then ASSERT().
1695
1696 @param Operand The 32-bit operand to rotate left.
1697 @param Count The number of bits to rotate left.
1698
1699 @return Operand << Count
1700
1701 **/
1702 UINT32
1703 EFIAPI
1704 LRotU32 (
1705 IN UINT32 Operand,
1706 IN UINTN Count
1707 );
1708
1709
1710 /**
1711 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1712 with the low bits that were rotated.
1713
1714 This function rotates the 32-bit value Operand to the right by Count bits.
1715 The high Count bits are fill with the low Count bits of Operand. The rotated
1716 value is returned.
1717
1718 If Count is greater than 31, then ASSERT().
1719
1720 @param Operand The 32-bit operand to rotate right.
1721 @param Count The number of bits to rotate right.
1722
1723 @return Operand >> Count
1724
1725 **/
1726 UINT32
1727 EFIAPI
1728 RRotU32 (
1729 IN UINT32 Operand,
1730 IN UINTN Count
1731 );
1732
1733
1734 /**
1735 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1736 with the high bits that were rotated.
1737
1738 This function rotates the 64-bit value Operand to the left by Count bits. The
1739 low Count bits are fill with the high Count bits of Operand. The rotated
1740 value is returned.
1741
1742 If Count is greater than 63, then ASSERT().
1743
1744 @param Operand The 64-bit operand to rotate left.
1745 @param Count The number of bits to rotate left.
1746
1747 @return Operand << Count
1748
1749 **/
1750 UINT64
1751 EFIAPI
1752 LRotU64 (
1753 IN UINT64 Operand,
1754 IN UINTN Count
1755 );
1756
1757
1758 /**
1759 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1760 with the high low bits that were rotated.
1761
1762 This function rotates the 64-bit value Operand to the right by Count bits.
1763 The high Count bits are fill with the low Count bits of Operand. The rotated
1764 value is returned.
1765
1766 If Count is greater than 63, then ASSERT().
1767
1768 @param Operand The 64-bit operand to rotate right.
1769 @param Count The number of bits to rotate right.
1770
1771 @return Operand >> Count
1772
1773 **/
1774 UINT64
1775 EFIAPI
1776 RRotU64 (
1777 IN UINT64 Operand,
1778 IN UINTN Count
1779 );
1780
1781
1782 /**
1783 Returns the bit position of the lowest bit set in a 32-bit value.
1784
1785 This function computes the bit position of the lowest bit set in the 32-bit
1786 value specified by Operand. If Operand is zero, then -1 is returned.
1787 Otherwise, a value between 0 and 31 is returned.
1788
1789 @param Operand The 32-bit operand to evaluate.
1790
1791 @retval 0..31 The lowest bit set in Operand was found.
1792 @retval -1 Operand is zero.
1793
1794 **/
1795 INTN
1796 EFIAPI
1797 LowBitSet32 (
1798 IN UINT32 Operand
1799 );
1800
1801
1802 /**
1803 Returns the bit position of the lowest bit set in a 64-bit value.
1804
1805 This function computes the bit position of the lowest bit set in the 64-bit
1806 value specified by Operand. If Operand is zero, then -1 is returned.
1807 Otherwise, a value between 0 and 63 is returned.
1808
1809 @param Operand The 64-bit operand to evaluate.
1810
1811 @retval 0..63 The lowest bit set in Operand was found.
1812 @retval -1 Operand is zero.
1813
1814
1815 **/
1816 INTN
1817 EFIAPI
1818 LowBitSet64 (
1819 IN UINT64 Operand
1820 );
1821
1822
1823 /**
1824 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1825 to log2(x).
1826
1827 This function computes the bit position of the highest bit set in the 32-bit
1828 value specified by Operand. If Operand is zero, then -1 is returned.
1829 Otherwise, a value between 0 and 31 is returned.
1830
1831 @param Operand The 32-bit operand to evaluate.
1832
1833 @retval 0..31 Position of the highest bit set in Operand if found.
1834 @retval -1 Operand is zero.
1835
1836 **/
1837 INTN
1838 EFIAPI
1839 HighBitSet32 (
1840 IN UINT32 Operand
1841 );
1842
1843
1844 /**
1845 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1846 to log2(x).
1847
1848 This function computes the bit position of the highest bit set in the 64-bit
1849 value specified by Operand. If Operand is zero, then -1 is returned.
1850 Otherwise, a value between 0 and 63 is returned.
1851
1852 @param Operand The 64-bit operand to evaluate.
1853
1854 @retval 0..63 Position of the highest bit set in Operand if found.
1855 @retval -1 Operand is zero.
1856
1857 **/
1858 INTN
1859 EFIAPI
1860 HighBitSet64 (
1861 IN UINT64 Operand
1862 );
1863
1864
1865 /**
1866 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1867 1 << log2(x).
1868
1869 This function computes the value of the highest bit set in the 32-bit value
1870 specified by Operand. If Operand is zero, then zero is returned.
1871
1872 @param Operand The 32-bit operand to evaluate.
1873
1874 @return 1 << HighBitSet32(Operand)
1875 @retval 0 Operand is zero.
1876
1877 **/
1878 UINT32
1879 EFIAPI
1880 GetPowerOfTwo32 (
1881 IN UINT32 Operand
1882 );
1883
1884
1885 /**
1886 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1887 1 << log2(x).
1888
1889 This function computes the value of the highest bit set in the 64-bit value
1890 specified by Operand. If Operand is zero, then zero is returned.
1891
1892 @param Operand The 64-bit operand to evaluate.
1893
1894 @return 1 << HighBitSet64(Operand)
1895 @retval 0 Operand is zero.
1896
1897 **/
1898 UINT64
1899 EFIAPI
1900 GetPowerOfTwo64 (
1901 IN UINT64 Operand
1902 );
1903
1904
1905 /**
1906 Switches the endianness of a 16-bit integer.
1907
1908 This function swaps the bytes in a 16-bit unsigned value to switch the value
1909 from little endian to big endian or vice versa. The byte swapped value is
1910 returned.
1911
1912 @param Value A 16-bit unsigned value.
1913
1914 @return The byte swapped Value.
1915
1916 **/
1917 UINT16
1918 EFIAPI
1919 SwapBytes16 (
1920 IN UINT16 Value
1921 );
1922
1923
1924 /**
1925 Switches the endianness of a 32-bit integer.
1926
1927 This function swaps the bytes in a 32-bit unsigned value to switch the value
1928 from little endian to big endian or vice versa. The byte swapped value is
1929 returned.
1930
1931 @param Value A 32-bit unsigned value.
1932
1933 @return The byte swapped Value.
1934
1935 **/
1936 UINT32
1937 EFIAPI
1938 SwapBytes32 (
1939 IN UINT32 Value
1940 );
1941
1942
1943 /**
1944 Switches the endianness of a 64-bit integer.
1945
1946 This function swaps the bytes in a 64-bit unsigned value to switch the value
1947 from little endian to big endian or vice versa. The byte swapped value is
1948 returned.
1949
1950 @param Value A 64-bit unsigned value.
1951
1952 @return The byte swapped Value.
1953
1954 **/
1955 UINT64
1956 EFIAPI
1957 SwapBytes64 (
1958 IN UINT64 Value
1959 );
1960
1961
1962 /**
1963 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1964 generates a 64-bit unsigned result.
1965
1966 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1967 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1968 bit unsigned result is returned.
1969
1970 @param Multiplicand A 64-bit unsigned value.
1971 @param Multiplier A 32-bit unsigned value.
1972
1973 @return Multiplicand * Multiplier
1974
1975 **/
1976 UINT64
1977 EFIAPI
1978 MultU64x32 (
1979 IN UINT64 Multiplicand,
1980 IN UINT32 Multiplier
1981 );
1982
1983
1984 /**
1985 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1986 generates a 64-bit unsigned result.
1987
1988 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1989 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1990 bit unsigned result is returned.
1991
1992 @param Multiplicand A 64-bit unsigned value.
1993 @param Multiplier A 64-bit unsigned value.
1994
1995 @return Multiplicand * Multiplier.
1996
1997 **/
1998 UINT64
1999 EFIAPI
2000 MultU64x64 (
2001 IN UINT64 Multiplicand,
2002 IN UINT64 Multiplier
2003 );
2004
2005
2006 /**
2007 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
2008 64-bit signed result.
2009
2010 This function multiples the 64-bit signed value Multiplicand by the 64-bit
2011 signed value Multiplier and generates a 64-bit signed result. This 64-bit
2012 signed result is returned.
2013
2014 @param Multiplicand A 64-bit signed value.
2015 @param Multiplier A 64-bit signed value.
2016
2017 @return Multiplicand * Multiplier
2018
2019 **/
2020 INT64
2021 EFIAPI
2022 MultS64x64 (
2023 IN INT64 Multiplicand,
2024 IN INT64 Multiplier
2025 );
2026
2027
2028 /**
2029 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
2030 a 64-bit unsigned result.
2031
2032 This function divides the 64-bit unsigned value Dividend by the 32-bit
2033 unsigned value Divisor and generates a 64-bit unsigned quotient. This
2034 function returns the 64-bit unsigned quotient.
2035
2036 If Divisor is 0, then ASSERT().
2037
2038 @param Dividend A 64-bit unsigned value.
2039 @param Divisor A 32-bit unsigned value.
2040
2041 @return Dividend / Divisor.
2042
2043 **/
2044 UINT64
2045 EFIAPI
2046 DivU64x32 (
2047 IN UINT64 Dividend,
2048 IN UINT32 Divisor
2049 );
2050
2051
2052 /**
2053 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
2054 a 32-bit unsigned remainder.
2055
2056 This function divides the 64-bit unsigned value Dividend by the 32-bit
2057 unsigned value Divisor and generates a 32-bit remainder. This function
2058 returns the 32-bit unsigned remainder.
2059
2060 If Divisor is 0, then ASSERT().
2061
2062 @param Dividend A 64-bit unsigned value.
2063 @param Divisor A 32-bit unsigned value.
2064
2065 @return Dividend % Divisor.
2066
2067 **/
2068 UINT32
2069 EFIAPI
2070 ModU64x32 (
2071 IN UINT64 Dividend,
2072 IN UINT32 Divisor
2073 );
2074
2075
2076 /**
2077 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
2078 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
2079
2080 This function divides the 64-bit unsigned value Dividend by the 32-bit
2081 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2082 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
2083 This function returns the 64-bit unsigned quotient.
2084
2085 If Divisor is 0, then ASSERT().
2086
2087 @param Dividend A 64-bit unsigned value.
2088 @param Divisor A 32-bit unsigned value.
2089 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
2090 optional and may be NULL.
2091
2092 @return Dividend / Divisor.
2093
2094 **/
2095 UINT64
2096 EFIAPI
2097 DivU64x32Remainder (
2098 IN UINT64 Dividend,
2099 IN UINT32 Divisor,
2100 OUT UINT32 *Remainder OPTIONAL
2101 );
2102
2103
2104 /**
2105 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2106 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2107
2108 This function divides the 64-bit unsigned value Dividend by the 64-bit
2109 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2110 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2111 This function returns the 64-bit unsigned quotient.
2112
2113 If Divisor is 0, then ASSERT().
2114
2115 @param Dividend A 64-bit unsigned value.
2116 @param Divisor A 64-bit unsigned value.
2117 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2118 optional and may be NULL.
2119
2120 @return Dividend / Divisor.
2121
2122 **/
2123 UINT64
2124 EFIAPI
2125 DivU64x64Remainder (
2126 IN UINT64 Dividend,
2127 IN UINT64 Divisor,
2128 OUT UINT64 *Remainder OPTIONAL
2129 );
2130
2131
2132 /**
2133 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2134 64-bit signed result and a optional 64-bit signed remainder.
2135
2136 This function divides the 64-bit signed value Dividend by the 64-bit signed
2137 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2138 NULL, then the 64-bit signed remainder is returned in Remainder. This
2139 function returns the 64-bit signed quotient.
2140
2141 It is the caller's responsibility to not call this function with a Divisor of 0.
2142 If Divisor is 0, then the quotient and remainder should be assumed to be
2143 the largest negative integer.
2144
2145 If Divisor is 0, then ASSERT().
2146
2147 @param Dividend A 64-bit signed value.
2148 @param Divisor A 64-bit signed value.
2149 @param Remainder A pointer to a 64-bit signed value. This parameter is
2150 optional and may be NULL.
2151
2152 @return Dividend / Divisor.
2153
2154 **/
2155 INT64
2156 EFIAPI
2157 DivS64x64Remainder (
2158 IN INT64 Dividend,
2159 IN INT64 Divisor,
2160 OUT INT64 *Remainder OPTIONAL
2161 );
2162
2163
2164 /**
2165 Reads a 16-bit value from memory that may be unaligned.
2166
2167 This function returns the 16-bit value pointed to by Buffer. The function
2168 guarantees that the read operation does not produce an alignment fault.
2169
2170 If the Buffer is NULL, then ASSERT().
2171
2172 @param Buffer The pointer to a 16-bit value that may be unaligned.
2173
2174 @return The 16-bit value read from Buffer.
2175
2176 **/
2177 UINT16
2178 EFIAPI
2179 ReadUnaligned16 (
2180 IN CONST UINT16 *Buffer
2181 );
2182
2183
2184 /**
2185 Writes a 16-bit value to memory that may be unaligned.
2186
2187 This function writes the 16-bit value specified by Value to Buffer. Value is
2188 returned. The function guarantees that the write operation does not produce
2189 an alignment fault.
2190
2191 If the Buffer is NULL, then ASSERT().
2192
2193 @param Buffer The pointer to a 16-bit value that may be unaligned.
2194 @param Value 16-bit value to write to Buffer.
2195
2196 @return The 16-bit value to write to Buffer.
2197
2198 **/
2199 UINT16
2200 EFIAPI
2201 WriteUnaligned16 (
2202 OUT UINT16 *Buffer,
2203 IN UINT16 Value
2204 );
2205
2206
2207 /**
2208 Reads a 24-bit value from memory that may be unaligned.
2209
2210 This function returns the 24-bit value pointed to by Buffer. The function
2211 guarantees that the read operation does not produce an alignment fault.
2212
2213 If the Buffer is NULL, then ASSERT().
2214
2215 @param Buffer The pointer to a 24-bit value that may be unaligned.
2216
2217 @return The 24-bit value read from Buffer.
2218
2219 **/
2220 UINT32
2221 EFIAPI
2222 ReadUnaligned24 (
2223 IN CONST UINT32 *Buffer
2224 );
2225
2226
2227 /**
2228 Writes a 24-bit value to memory that may be unaligned.
2229
2230 This function writes the 24-bit value specified by Value to Buffer. Value is
2231 returned. The function guarantees that the write operation does not produce
2232 an alignment fault.
2233
2234 If the Buffer is NULL, then ASSERT().
2235
2236 @param Buffer The pointer to a 24-bit value that may be unaligned.
2237 @param Value 24-bit value to write to Buffer.
2238
2239 @return The 24-bit value to write to Buffer.
2240
2241 **/
2242 UINT32
2243 EFIAPI
2244 WriteUnaligned24 (
2245 OUT UINT32 *Buffer,
2246 IN UINT32 Value
2247 );
2248
2249
2250 /**
2251 Reads a 32-bit value from memory that may be unaligned.
2252
2253 This function returns the 32-bit value pointed to by Buffer. The function
2254 guarantees that the read operation does not produce an alignment fault.
2255
2256 If the Buffer is NULL, then ASSERT().
2257
2258 @param Buffer The pointer to a 32-bit value that may be unaligned.
2259
2260 @return The 32-bit value read from Buffer.
2261
2262 **/
2263 UINT32
2264 EFIAPI
2265 ReadUnaligned32 (
2266 IN CONST UINT32 *Buffer
2267 );
2268
2269
2270 /**
2271 Writes a 32-bit value to memory that may be unaligned.
2272
2273 This function writes the 32-bit value specified by Value to Buffer. Value is
2274 returned. The function guarantees that the write operation does not produce
2275 an alignment fault.
2276
2277 If the Buffer is NULL, then ASSERT().
2278
2279 @param Buffer The pointer to a 32-bit value that may be unaligned.
2280 @param Value 32-bit value to write to Buffer.
2281
2282 @return The 32-bit value to write to Buffer.
2283
2284 **/
2285 UINT32
2286 EFIAPI
2287 WriteUnaligned32 (
2288 OUT UINT32 *Buffer,
2289 IN UINT32 Value
2290 );
2291
2292
2293 /**
2294 Reads a 64-bit value from memory that may be unaligned.
2295
2296 This function returns the 64-bit value pointed to by Buffer. The function
2297 guarantees that the read operation does not produce an alignment fault.
2298
2299 If the Buffer is NULL, then ASSERT().
2300
2301 @param Buffer The pointer to a 64-bit value that may be unaligned.
2302
2303 @return The 64-bit value read from Buffer.
2304
2305 **/
2306 UINT64
2307 EFIAPI
2308 ReadUnaligned64 (
2309 IN CONST UINT64 *Buffer
2310 );
2311
2312
2313 /**
2314 Writes a 64-bit value to memory that may be unaligned.
2315
2316 This function writes the 64-bit value specified by Value to Buffer. Value is
2317 returned. The function guarantees that the write operation does not produce
2318 an alignment fault.
2319
2320 If the Buffer is NULL, then ASSERT().
2321
2322 @param Buffer The pointer to a 64-bit value that may be unaligned.
2323 @param Value 64-bit value to write to Buffer.
2324
2325 @return The 64-bit value to write to Buffer.
2326
2327 **/
2328 UINT64
2329 EFIAPI
2330 WriteUnaligned64 (
2331 OUT UINT64 *Buffer,
2332 IN UINT64 Value
2333 );
2334
2335
2336 //
2337 // Bit Field Functions
2338 //
2339
2340 /**
2341 Returns a bit field from an 8-bit value.
2342
2343 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2344
2345 If 8-bit operations are not supported, then ASSERT().
2346 If StartBit is greater than 7, then ASSERT().
2347 If EndBit is greater than 7, then ASSERT().
2348 If EndBit is less than StartBit, then ASSERT().
2349
2350 @param Operand Operand on which to perform the bitfield operation.
2351 @param StartBit The ordinal of the least significant bit in the bit field.
2352 Range 0..7.
2353 @param EndBit The ordinal of the most significant bit in the bit field.
2354 Range 0..7.
2355
2356 @return The bit field read.
2357
2358 **/
2359 UINT8
2360 EFIAPI
2361 BitFieldRead8 (
2362 IN UINT8 Operand,
2363 IN UINTN StartBit,
2364 IN UINTN EndBit
2365 );
2366
2367
2368 /**
2369 Writes a bit field to an 8-bit value, and returns the result.
2370
2371 Writes Value to the bit field specified by the StartBit and the EndBit in
2372 Operand. All other bits in Operand are preserved. The new 8-bit value is
2373 returned.
2374
2375 If 8-bit operations are not supported, then ASSERT().
2376 If StartBit is greater than 7, then ASSERT().
2377 If EndBit is greater than 7, then ASSERT().
2378 If EndBit is less than StartBit, then ASSERT().
2379 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2380
2381 @param Operand Operand on which to perform the bitfield operation.
2382 @param StartBit The ordinal of the least significant bit in the bit field.
2383 Range 0..7.
2384 @param EndBit The ordinal of the most significant bit in the bit field.
2385 Range 0..7.
2386 @param Value New value of the bit field.
2387
2388 @return The new 8-bit value.
2389
2390 **/
2391 UINT8
2392 EFIAPI
2393 BitFieldWrite8 (
2394 IN UINT8 Operand,
2395 IN UINTN StartBit,
2396 IN UINTN EndBit,
2397 IN UINT8 Value
2398 );
2399
2400
2401 /**
2402 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2403 result.
2404
2405 Performs a bitwise OR between the bit field specified by StartBit
2406 and EndBit in Operand and the value specified by OrData. All other bits in
2407 Operand are preserved. The new 8-bit value is returned.
2408
2409 If 8-bit operations are not supported, then ASSERT().
2410 If StartBit is greater than 7, then ASSERT().
2411 If EndBit is greater than 7, then ASSERT().
2412 If EndBit is less than StartBit, then ASSERT().
2413 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2414
2415 @param Operand Operand on which to perform the bitfield operation.
2416 @param StartBit The ordinal of the least significant bit in the bit field.
2417 Range 0..7.
2418 @param EndBit The ordinal of the most significant bit in the bit field.
2419 Range 0..7.
2420 @param OrData The value to OR with the read value from the value
2421
2422 @return The new 8-bit value.
2423
2424 **/
2425 UINT8
2426 EFIAPI
2427 BitFieldOr8 (
2428 IN UINT8 Operand,
2429 IN UINTN StartBit,
2430 IN UINTN EndBit,
2431 IN UINT8 OrData
2432 );
2433
2434
2435 /**
2436 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2437 the result.
2438
2439 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2440 in Operand and the value specified by AndData. All other bits in Operand are
2441 preserved. The new 8-bit value is returned.
2442
2443 If 8-bit operations are not supported, then ASSERT().
2444 If StartBit is greater than 7, then ASSERT().
2445 If EndBit is greater than 7, then ASSERT().
2446 If EndBit is less than StartBit, then ASSERT().
2447 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2448
2449 @param Operand Operand on which to perform the bitfield operation.
2450 @param StartBit The ordinal of the least significant bit in the bit field.
2451 Range 0..7.
2452 @param EndBit The ordinal of the most significant bit in the bit field.
2453 Range 0..7.
2454 @param AndData The value to AND with the read value from the value.
2455
2456 @return The new 8-bit value.
2457
2458 **/
2459 UINT8
2460 EFIAPI
2461 BitFieldAnd8 (
2462 IN UINT8 Operand,
2463 IN UINTN StartBit,
2464 IN UINTN EndBit,
2465 IN UINT8 AndData
2466 );
2467
2468
2469 /**
2470 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2471 bitwise OR, and returns the result.
2472
2473 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2474 in Operand and the value specified by AndData, followed by a bitwise
2475 OR with value specified by OrData. All other bits in Operand are
2476 preserved. The new 8-bit value is returned.
2477
2478 If 8-bit operations are not supported, then ASSERT().
2479 If StartBit is greater than 7, then ASSERT().
2480 If EndBit is greater than 7, then ASSERT().
2481 If EndBit is less than StartBit, then ASSERT().
2482 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2483 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2484
2485 @param Operand Operand on which to perform the bitfield operation.
2486 @param StartBit The ordinal of the least significant bit in the bit field.
2487 Range 0..7.
2488 @param EndBit The ordinal of the most significant bit in the bit field.
2489 Range 0..7.
2490 @param AndData The value to AND with the read value from the value.
2491 @param OrData The value to OR with the result of the AND operation.
2492
2493 @return The new 8-bit value.
2494
2495 **/
2496 UINT8
2497 EFIAPI
2498 BitFieldAndThenOr8 (
2499 IN UINT8 Operand,
2500 IN UINTN StartBit,
2501 IN UINTN EndBit,
2502 IN UINT8 AndData,
2503 IN UINT8 OrData
2504 );
2505
2506
2507 /**
2508 Returns a bit field from a 16-bit value.
2509
2510 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2511
2512 If 16-bit operations are not supported, then ASSERT().
2513 If StartBit is greater than 15, then ASSERT().
2514 If EndBit is greater than 15, then ASSERT().
2515 If EndBit is less than StartBit, then ASSERT().
2516
2517 @param Operand Operand on which to perform the bitfield operation.
2518 @param StartBit The ordinal of the least significant bit in the bit field.
2519 Range 0..15.
2520 @param EndBit The ordinal of the most significant bit in the bit field.
2521 Range 0..15.
2522
2523 @return The bit field read.
2524
2525 **/
2526 UINT16
2527 EFIAPI
2528 BitFieldRead16 (
2529 IN UINT16 Operand,
2530 IN UINTN StartBit,
2531 IN UINTN EndBit
2532 );
2533
2534
2535 /**
2536 Writes a bit field to a 16-bit value, and returns the result.
2537
2538 Writes Value to the bit field specified by the StartBit and the EndBit in
2539 Operand. All other bits in Operand are preserved. The new 16-bit value is
2540 returned.
2541
2542 If 16-bit operations are not supported, then ASSERT().
2543 If StartBit is greater than 15, then ASSERT().
2544 If EndBit is greater than 15, then ASSERT().
2545 If EndBit is less than StartBit, then ASSERT().
2546 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2547
2548 @param Operand Operand on which to perform the bitfield operation.
2549 @param StartBit The ordinal of the least significant bit in the bit field.
2550 Range 0..15.
2551 @param EndBit The ordinal of the most significant bit in the bit field.
2552 Range 0..15.
2553 @param Value New value of the bit field.
2554
2555 @return The new 16-bit value.
2556
2557 **/
2558 UINT16
2559 EFIAPI
2560 BitFieldWrite16 (
2561 IN UINT16 Operand,
2562 IN UINTN StartBit,
2563 IN UINTN EndBit,
2564 IN UINT16 Value
2565 );
2566
2567
2568 /**
2569 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2570 result.
2571
2572 Performs a bitwise OR between the bit field specified by StartBit
2573 and EndBit in Operand and the value specified by OrData. All other bits in
2574 Operand are preserved. The new 16-bit value is returned.
2575
2576 If 16-bit operations are not supported, then ASSERT().
2577 If StartBit is greater than 15, then ASSERT().
2578 If EndBit is greater than 15, then ASSERT().
2579 If EndBit is less than StartBit, then ASSERT().
2580 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2581
2582 @param Operand Operand on which to perform the bitfield operation.
2583 @param StartBit The ordinal of the least significant bit in the bit field.
2584 Range 0..15.
2585 @param EndBit The ordinal of the most significant bit in the bit field.
2586 Range 0..15.
2587 @param OrData The value to OR with the read value from the value
2588
2589 @return The new 16-bit value.
2590
2591 **/
2592 UINT16
2593 EFIAPI
2594 BitFieldOr16 (
2595 IN UINT16 Operand,
2596 IN UINTN StartBit,
2597 IN UINTN EndBit,
2598 IN UINT16 OrData
2599 );
2600
2601
2602 /**
2603 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2604 the result.
2605
2606 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2607 in Operand and the value specified by AndData. All other bits in Operand are
2608 preserved. The new 16-bit value is returned.
2609
2610 If 16-bit operations are not supported, then ASSERT().
2611 If StartBit is greater than 15, then ASSERT().
2612 If EndBit is greater than 15, then ASSERT().
2613 If EndBit is less than StartBit, then ASSERT().
2614 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2615
2616 @param Operand Operand on which to perform the bitfield operation.
2617 @param StartBit The ordinal of the least significant bit in the bit field.
2618 Range 0..15.
2619 @param EndBit The ordinal of the most significant bit in the bit field.
2620 Range 0..15.
2621 @param AndData The value to AND with the read value from the value
2622
2623 @return The new 16-bit value.
2624
2625 **/
2626 UINT16
2627 EFIAPI
2628 BitFieldAnd16 (
2629 IN UINT16 Operand,
2630 IN UINTN StartBit,
2631 IN UINTN EndBit,
2632 IN UINT16 AndData
2633 );
2634
2635
2636 /**
2637 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2638 bitwise OR, and returns the result.
2639
2640 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2641 in Operand and the value specified by AndData, followed by a bitwise
2642 OR with value specified by OrData. All other bits in Operand are
2643 preserved. The new 16-bit value is returned.
2644
2645 If 16-bit operations are not supported, then ASSERT().
2646 If StartBit is greater than 15, then ASSERT().
2647 If EndBit is greater than 15, then ASSERT().
2648 If EndBit is less than StartBit, then ASSERT().
2649 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2650 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2651
2652 @param Operand Operand on which to perform the bitfield operation.
2653 @param StartBit The ordinal of the least significant bit in the bit field.
2654 Range 0..15.
2655 @param EndBit The ordinal of the most significant bit in the bit field.
2656 Range 0..15.
2657 @param AndData The value to AND with the read value from the value.
2658 @param OrData The value to OR with the result of the AND operation.
2659
2660 @return The new 16-bit value.
2661
2662 **/
2663 UINT16
2664 EFIAPI
2665 BitFieldAndThenOr16 (
2666 IN UINT16 Operand,
2667 IN UINTN StartBit,
2668 IN UINTN EndBit,
2669 IN UINT16 AndData,
2670 IN UINT16 OrData
2671 );
2672
2673
2674 /**
2675 Returns a bit field from a 32-bit value.
2676
2677 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2678
2679 If 32-bit operations are not supported, then ASSERT().
2680 If StartBit is greater than 31, then ASSERT().
2681 If EndBit is greater than 31, then ASSERT().
2682 If EndBit is less than StartBit, then ASSERT().
2683
2684 @param Operand Operand on which to perform the bitfield operation.
2685 @param StartBit The ordinal of the least significant bit in the bit field.
2686 Range 0..31.
2687 @param EndBit The ordinal of the most significant bit in the bit field.
2688 Range 0..31.
2689
2690 @return The bit field read.
2691
2692 **/
2693 UINT32
2694 EFIAPI
2695 BitFieldRead32 (
2696 IN UINT32 Operand,
2697 IN UINTN StartBit,
2698 IN UINTN EndBit
2699 );
2700
2701
2702 /**
2703 Writes a bit field to a 32-bit value, and returns the result.
2704
2705 Writes Value to the bit field specified by the StartBit and the EndBit in
2706 Operand. All other bits in Operand are preserved. The new 32-bit value is
2707 returned.
2708
2709 If 32-bit operations are not supported, then ASSERT().
2710 If StartBit is greater than 31, then ASSERT().
2711 If EndBit is greater than 31, then ASSERT().
2712 If EndBit is less than StartBit, then ASSERT().
2713 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2714
2715 @param Operand Operand on which to perform the bitfield operation.
2716 @param StartBit The ordinal of the least significant bit in the bit field.
2717 Range 0..31.
2718 @param EndBit The ordinal of the most significant bit in the bit field.
2719 Range 0..31.
2720 @param Value New value of the bit field.
2721
2722 @return The new 32-bit value.
2723
2724 **/
2725 UINT32
2726 EFIAPI
2727 BitFieldWrite32 (
2728 IN UINT32 Operand,
2729 IN UINTN StartBit,
2730 IN UINTN EndBit,
2731 IN UINT32 Value
2732 );
2733
2734
2735 /**
2736 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2737 result.
2738
2739 Performs a bitwise OR between the bit field specified by StartBit
2740 and EndBit in Operand and the value specified by OrData. All other bits in
2741 Operand are preserved. The new 32-bit value is returned.
2742
2743 If 32-bit operations are not supported, then ASSERT().
2744 If StartBit is greater than 31, then ASSERT().
2745 If EndBit is greater than 31, then ASSERT().
2746 If EndBit is less than StartBit, then ASSERT().
2747 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2748
2749 @param Operand Operand on which to perform the bitfield operation.
2750 @param StartBit The ordinal of the least significant bit in the bit field.
2751 Range 0..31.
2752 @param EndBit The ordinal of the most significant bit in the bit field.
2753 Range 0..31.
2754 @param OrData The value to OR with the read value from the value.
2755
2756 @return The new 32-bit value.
2757
2758 **/
2759 UINT32
2760 EFIAPI
2761 BitFieldOr32 (
2762 IN UINT32 Operand,
2763 IN UINTN StartBit,
2764 IN UINTN EndBit,
2765 IN UINT32 OrData
2766 );
2767
2768
2769 /**
2770 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2771 the result.
2772
2773 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2774 in Operand and the value specified by AndData. All other bits in Operand are
2775 preserved. The new 32-bit value is returned.
2776
2777 If 32-bit operations are not supported, then ASSERT().
2778 If StartBit is greater than 31, then ASSERT().
2779 If EndBit is greater than 31, then ASSERT().
2780 If EndBit is less than StartBit, then ASSERT().
2781 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2782
2783 @param Operand Operand on which to perform the bitfield operation.
2784 @param StartBit The ordinal of the least significant bit in the bit field.
2785 Range 0..31.
2786 @param EndBit The ordinal of the most significant bit in the bit field.
2787 Range 0..31.
2788 @param AndData The value to AND with the read value from the value
2789
2790 @return The new 32-bit value.
2791
2792 **/
2793 UINT32
2794 EFIAPI
2795 BitFieldAnd32 (
2796 IN UINT32 Operand,
2797 IN UINTN StartBit,
2798 IN UINTN EndBit,
2799 IN UINT32 AndData
2800 );
2801
2802
2803 /**
2804 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2805 bitwise OR, and returns the result.
2806
2807 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2808 in Operand and the value specified by AndData, followed by a bitwise
2809 OR with value specified by OrData. All other bits in Operand are
2810 preserved. The new 32-bit value is returned.
2811
2812 If 32-bit operations are not supported, then ASSERT().
2813 If StartBit is greater than 31, then ASSERT().
2814 If EndBit is greater than 31, then ASSERT().
2815 If EndBit is less than StartBit, then ASSERT().
2816 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2817 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2818
2819 @param Operand Operand on which to perform the bitfield operation.
2820 @param StartBit The ordinal of the least significant bit in the bit field.
2821 Range 0..31.
2822 @param EndBit The ordinal of the most significant bit in the bit field.
2823 Range 0..31.
2824 @param AndData The value to AND with the read value from the value.
2825 @param OrData The value to OR with the result of the AND operation.
2826
2827 @return The new 32-bit value.
2828
2829 **/
2830 UINT32
2831 EFIAPI
2832 BitFieldAndThenOr32 (
2833 IN UINT32 Operand,
2834 IN UINTN StartBit,
2835 IN UINTN EndBit,
2836 IN UINT32 AndData,
2837 IN UINT32 OrData
2838 );
2839
2840
2841 /**
2842 Returns a bit field from a 64-bit value.
2843
2844 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2845
2846 If 64-bit operations are not supported, then ASSERT().
2847 If StartBit is greater than 63, then ASSERT().
2848 If EndBit is greater than 63, then ASSERT().
2849 If EndBit is less than StartBit, then ASSERT().
2850
2851 @param Operand Operand on which to perform the bitfield operation.
2852 @param StartBit The ordinal of the least significant bit in the bit field.
2853 Range 0..63.
2854 @param EndBit The ordinal of the most significant bit in the bit field.
2855 Range 0..63.
2856
2857 @return The bit field read.
2858
2859 **/
2860 UINT64
2861 EFIAPI
2862 BitFieldRead64 (
2863 IN UINT64 Operand,
2864 IN UINTN StartBit,
2865 IN UINTN EndBit
2866 );
2867
2868
2869 /**
2870 Writes a bit field to a 64-bit value, and returns the result.
2871
2872 Writes Value to the bit field specified by the StartBit and the EndBit in
2873 Operand. All other bits in Operand are preserved. The new 64-bit value is
2874 returned.
2875
2876 If 64-bit operations are not supported, then ASSERT().
2877 If StartBit is greater than 63, then ASSERT().
2878 If EndBit is greater than 63, then ASSERT().
2879 If EndBit is less than StartBit, then ASSERT().
2880 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2881
2882 @param Operand Operand on which to perform the bitfield operation.
2883 @param StartBit The ordinal of the least significant bit in the bit field.
2884 Range 0..63.
2885 @param EndBit The ordinal of the most significant bit in the bit field.
2886 Range 0..63.
2887 @param Value New value of the bit field.
2888
2889 @return The new 64-bit value.
2890
2891 **/
2892 UINT64
2893 EFIAPI
2894 BitFieldWrite64 (
2895 IN UINT64 Operand,
2896 IN UINTN StartBit,
2897 IN UINTN EndBit,
2898 IN UINT64 Value
2899 );
2900
2901
2902 /**
2903 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2904 result.
2905
2906 Performs a bitwise OR between the bit field specified by StartBit
2907 and EndBit in Operand and the value specified by OrData. All other bits in
2908 Operand are preserved. The new 64-bit value is returned.
2909
2910 If 64-bit operations are not supported, then ASSERT().
2911 If StartBit is greater than 63, then ASSERT().
2912 If EndBit is greater than 63, then ASSERT().
2913 If EndBit is less than StartBit, then ASSERT().
2914 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2915
2916 @param Operand Operand on which to perform the bitfield operation.
2917 @param StartBit The ordinal of the least significant bit in the bit field.
2918 Range 0..63.
2919 @param EndBit The ordinal of the most significant bit in the bit field.
2920 Range 0..63.
2921 @param OrData The value to OR with the read value from the value
2922
2923 @return The new 64-bit value.
2924
2925 **/
2926 UINT64
2927 EFIAPI
2928 BitFieldOr64 (
2929 IN UINT64 Operand,
2930 IN UINTN StartBit,
2931 IN UINTN EndBit,
2932 IN UINT64 OrData
2933 );
2934
2935
2936 /**
2937 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2938 the result.
2939
2940 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2941 in Operand and the value specified by AndData. All other bits in Operand are
2942 preserved. The new 64-bit value is returned.
2943
2944 If 64-bit operations are not supported, then ASSERT().
2945 If StartBit is greater than 63, then ASSERT().
2946 If EndBit is greater than 63, then ASSERT().
2947 If EndBit is less than StartBit, then ASSERT().
2948 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2949
2950 @param Operand Operand on which to perform the bitfield operation.
2951 @param StartBit The ordinal of the least significant bit in the bit field.
2952 Range 0..63.
2953 @param EndBit The ordinal of the most significant bit in the bit field.
2954 Range 0..63.
2955 @param AndData The value to AND with the read value from the value
2956
2957 @return The new 64-bit value.
2958
2959 **/
2960 UINT64
2961 EFIAPI
2962 BitFieldAnd64 (
2963 IN UINT64 Operand,
2964 IN UINTN StartBit,
2965 IN UINTN EndBit,
2966 IN UINT64 AndData
2967 );
2968
2969
2970 /**
2971 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2972 bitwise OR, and returns the result.
2973
2974 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2975 in Operand and the value specified by AndData, followed by a bitwise
2976 OR with value specified by OrData. All other bits in Operand are
2977 preserved. The new 64-bit value is returned.
2978
2979 If 64-bit operations are not supported, then ASSERT().
2980 If StartBit is greater than 63, then ASSERT().
2981 If EndBit is greater than 63, then ASSERT().
2982 If EndBit is less than StartBit, then ASSERT().
2983 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2984 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2985
2986 @param Operand Operand on which to perform the bitfield operation.
2987 @param StartBit The ordinal of the least significant bit in the bit field.
2988 Range 0..63.
2989 @param EndBit The ordinal of the most significant bit in the bit field.
2990 Range 0..63.
2991 @param AndData The value to AND with the read value from the value.
2992 @param OrData The value to OR with the result of the AND operation.
2993
2994 @return The new 64-bit value.
2995
2996 **/
2997 UINT64
2998 EFIAPI
2999 BitFieldAndThenOr64 (
3000 IN UINT64 Operand,
3001 IN UINTN StartBit,
3002 IN UINTN EndBit,
3003 IN UINT64 AndData,
3004 IN UINT64 OrData
3005 );
3006
3007 //
3008 // Base Library Checksum Functions
3009 //
3010
3011 /**
3012 Returns the sum of all elements in a buffer in unit of UINT8.
3013 During calculation, the carry bits are dropped.
3014
3015 This function calculates the sum of all elements in a buffer
3016 in unit of UINT8. The carry bits in result of addition are dropped.
3017 The result is returned as UINT8. If Length is Zero, then Zero is
3018 returned.
3019
3020 If Buffer is NULL, then ASSERT().
3021 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3022
3023 @param Buffer The pointer to the buffer to carry out the sum operation.
3024 @param Length The size, in bytes, of Buffer.
3025
3026 @return Sum The sum of Buffer with carry bits dropped during additions.
3027
3028 **/
3029 UINT8
3030 EFIAPI
3031 CalculateSum8 (
3032 IN CONST UINT8 *Buffer,
3033 IN UINTN Length
3034 );
3035
3036
3037 /**
3038 Returns the two's complement checksum of all elements in a buffer
3039 of 8-bit values.
3040
3041 This function first calculates the sum of the 8-bit values in the
3042 buffer specified by Buffer and Length. The carry bits in the result
3043 of addition are dropped. Then, the two's complement of the sum is
3044 returned. If Length is 0, then 0 is returned.
3045
3046 If Buffer is NULL, then ASSERT().
3047 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3048
3049 @param Buffer The pointer to the buffer to carry out the checksum operation.
3050 @param Length The size, in bytes, of Buffer.
3051
3052 @return Checksum The two's complement checksum of Buffer.
3053
3054 **/
3055 UINT8
3056 EFIAPI
3057 CalculateCheckSum8 (
3058 IN CONST UINT8 *Buffer,
3059 IN UINTN Length
3060 );
3061
3062
3063 /**
3064 Returns the sum of all elements in a buffer of 16-bit values. During
3065 calculation, the carry bits are dropped.
3066
3067 This function calculates the sum of the 16-bit values in the buffer
3068 specified by Buffer and Length. The carry bits in result of addition are dropped.
3069 The 16-bit result is returned. If Length is 0, then 0 is returned.
3070
3071 If Buffer is NULL, then ASSERT().
3072 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3073 If Length is not aligned on a 16-bit boundary, then ASSERT().
3074 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3075
3076 @param Buffer The pointer to the buffer to carry out the sum operation.
3077 @param Length The size, in bytes, of Buffer.
3078
3079 @return Sum The sum of Buffer with carry bits dropped during additions.
3080
3081 **/
3082 UINT16
3083 EFIAPI
3084 CalculateSum16 (
3085 IN CONST UINT16 *Buffer,
3086 IN UINTN Length
3087 );
3088
3089
3090 /**
3091 Returns the two's complement checksum of all elements in a buffer of
3092 16-bit values.
3093
3094 This function first calculates the sum of the 16-bit values in the buffer
3095 specified by Buffer and Length. The carry bits in the result of addition
3096 are dropped. Then, the two's complement of the sum is returned. If Length
3097 is 0, then 0 is returned.
3098
3099 If Buffer is NULL, then ASSERT().
3100 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3101 If Length is not aligned on a 16-bit boundary, then ASSERT().
3102 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3103
3104 @param Buffer The pointer to the buffer to carry out the checksum operation.
3105 @param Length The size, in bytes, of Buffer.
3106
3107 @return Checksum The two's complement checksum of Buffer.
3108
3109 **/
3110 UINT16
3111 EFIAPI
3112 CalculateCheckSum16 (
3113 IN CONST UINT16 *Buffer,
3114 IN UINTN Length
3115 );
3116
3117
3118 /**
3119 Returns the sum of all elements in a buffer of 32-bit values. During
3120 calculation, the carry bits are dropped.
3121
3122 This function calculates the sum of the 32-bit values in the buffer
3123 specified by Buffer and Length. The carry bits in result of addition are dropped.
3124 The 32-bit result is returned. If Length is 0, then 0 is returned.
3125
3126 If Buffer is NULL, then ASSERT().
3127 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3128 If Length is not aligned on a 32-bit boundary, then ASSERT().
3129 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3130
3131 @param Buffer The pointer to the buffer to carry out the sum operation.
3132 @param Length The size, in bytes, of Buffer.
3133
3134 @return Sum The sum of Buffer with carry bits dropped during additions.
3135
3136 **/
3137 UINT32
3138 EFIAPI
3139 CalculateSum32 (
3140 IN CONST UINT32 *Buffer,
3141 IN UINTN Length
3142 );
3143
3144
3145 /**
3146 Returns the two's complement checksum of all elements in a buffer of
3147 32-bit values.
3148
3149 This function first calculates the sum of the 32-bit values in the buffer
3150 specified by Buffer and Length. The carry bits in the result of addition
3151 are dropped. Then, the two's complement of the sum is returned. If Length
3152 is 0, then 0 is returned.
3153
3154 If Buffer is NULL, then ASSERT().
3155 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3156 If Length is not aligned on a 32-bit boundary, then ASSERT().
3157 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3158
3159 @param Buffer The pointer to the buffer to carry out the checksum operation.
3160 @param Length The size, in bytes, of Buffer.
3161
3162 @return Checksum The two's complement checksum of Buffer.
3163
3164 **/
3165 UINT32
3166 EFIAPI
3167 CalculateCheckSum32 (
3168 IN CONST UINT32 *Buffer,
3169 IN UINTN Length
3170 );
3171
3172
3173 /**
3174 Returns the sum of all elements in a buffer of 64-bit values. During
3175 calculation, the carry bits are dropped.
3176
3177 This function calculates the sum of the 64-bit values in the buffer
3178 specified by Buffer and Length. The carry bits in result of addition are dropped.
3179 The 64-bit result is returned. If Length is 0, then 0 is returned.
3180
3181 If Buffer is NULL, then ASSERT().
3182 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3183 If Length is not aligned on a 64-bit boundary, then ASSERT().
3184 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3185
3186 @param Buffer The pointer to the buffer to carry out the sum operation.
3187 @param Length The size, in bytes, of Buffer.
3188
3189 @return Sum The sum of Buffer with carry bits dropped during additions.
3190
3191 **/
3192 UINT64
3193 EFIAPI
3194 CalculateSum64 (
3195 IN CONST UINT64 *Buffer,
3196 IN UINTN Length
3197 );
3198
3199
3200 /**
3201 Returns the two's complement checksum of all elements in a buffer of
3202 64-bit values.
3203
3204 This function first calculates the sum of the 64-bit values in the buffer
3205 specified by Buffer and Length. The carry bits in the result of addition
3206 are dropped. Then, the two's complement of the sum is returned. If Length
3207 is 0, then 0 is returned.
3208
3209 If Buffer is NULL, then ASSERT().
3210 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3211 If Length is not aligned on a 64-bit boundary, then ASSERT().
3212 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3213
3214 @param Buffer The pointer to the buffer to carry out the checksum operation.
3215 @param Length The size, in bytes, of Buffer.
3216
3217 @return Checksum The two's complement checksum of Buffer.
3218
3219 **/
3220 UINT64
3221 EFIAPI
3222 CalculateCheckSum64 (
3223 IN CONST UINT64 *Buffer,
3224 IN UINTN Length
3225 );
3226
3227
3228 //
3229 // Base Library CPU Functions
3230 //
3231
3232 /**
3233 Function entry point used when a stack switch is requested with SwitchStack()
3234
3235 @param Context1 Context1 parameter passed into SwitchStack().
3236 @param Context2 Context2 parameter passed into SwitchStack().
3237
3238 **/
3239 typedef
3240 VOID
3241 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3242 IN VOID *Context1, OPTIONAL
3243 IN VOID *Context2 OPTIONAL
3244 );
3245
3246
3247 /**
3248 Used to serialize load and store operations.
3249
3250 All loads and stores that proceed calls to this function are guaranteed to be
3251 globally visible when this function returns.
3252
3253 **/
3254 VOID
3255 EFIAPI
3256 MemoryFence (
3257 VOID
3258 );
3259
3260
3261 /**
3262 Saves the current CPU context that can be restored with a call to LongJump()
3263 and returns 0.
3264
3265 Saves the current CPU context in the buffer specified by JumpBuffer and
3266 returns 0. The initial call to SetJump() must always return 0. Subsequent
3267 calls to LongJump() cause a non-zero value to be returned by SetJump().
3268
3269 If JumpBuffer is NULL, then ASSERT().
3270 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3271
3272 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3273 The same structure must never be used for more than one CPU architecture context.
3274 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3275 SetJump()/LongJump() is not currently supported for the EBC processor type.
3276
3277 @param JumpBuffer A pointer to CPU context buffer.
3278
3279 @retval 0 Indicates a return from SetJump().
3280
3281 **/
3282 UINTN
3283 EFIAPI
3284 SetJump (
3285 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3286 );
3287
3288
3289 /**
3290 Restores the CPU context that was saved with SetJump().
3291
3292 Restores the CPU context from the buffer specified by JumpBuffer. This
3293 function never returns to the caller. Instead is resumes execution based on
3294 the state of JumpBuffer.
3295
3296 If JumpBuffer is NULL, then ASSERT().
3297 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3298 If Value is 0, then ASSERT().
3299
3300 @param JumpBuffer A pointer to CPU context buffer.
3301 @param Value The value to return when the SetJump() context is
3302 restored and must be non-zero.
3303
3304 **/
3305 VOID
3306 EFIAPI
3307 LongJump (
3308 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3309 IN UINTN Value
3310 );
3311
3312
3313 /**
3314 Enables CPU interrupts.
3315
3316 **/
3317 VOID
3318 EFIAPI
3319 EnableInterrupts (
3320 VOID
3321 );
3322
3323
3324 /**
3325 Disables CPU interrupts.
3326
3327 **/
3328 VOID
3329 EFIAPI
3330 DisableInterrupts (
3331 VOID
3332 );
3333
3334
3335 /**
3336 Disables CPU interrupts and returns the interrupt state prior to the disable
3337 operation.
3338
3339 @retval TRUE CPU interrupts were enabled on entry to this call.
3340 @retval FALSE CPU interrupts were disabled on entry to this call.
3341
3342 **/
3343 BOOLEAN
3344 EFIAPI
3345 SaveAndDisableInterrupts (
3346 VOID
3347 );
3348
3349
3350 /**
3351 Enables CPU interrupts for the smallest window required to capture any
3352 pending interrupts.
3353
3354 **/
3355 VOID
3356 EFIAPI
3357 EnableDisableInterrupts (
3358 VOID
3359 );
3360
3361
3362 /**
3363 Retrieves the current CPU interrupt state.
3364
3365 Returns TRUE if interrupts are currently enabled. Otherwise
3366 returns FALSE.
3367
3368 @retval TRUE CPU interrupts are enabled.
3369 @retval FALSE CPU interrupts are disabled.
3370
3371 **/
3372 BOOLEAN
3373 EFIAPI
3374 GetInterruptState (
3375 VOID
3376 );
3377
3378
3379 /**
3380 Set the current CPU interrupt state.
3381
3382 Sets the current CPU interrupt state to the state specified by
3383 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3384 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3385 returned.
3386
3387 @param InterruptState TRUE if interrupts should enabled. FALSE if
3388 interrupts should be disabled.
3389
3390 @return InterruptState
3391
3392 **/
3393 BOOLEAN
3394 EFIAPI
3395 SetInterruptState (
3396 IN BOOLEAN InterruptState
3397 );
3398
3399
3400 /**
3401 Requests CPU to pause for a short period of time.
3402
3403 Requests CPU to pause for a short period of time. Typically used in MP
3404 systems to prevent memory starvation while waiting for a spin lock.
3405
3406 **/
3407 VOID
3408 EFIAPI
3409 CpuPause (
3410 VOID
3411 );
3412
3413
3414 /**
3415 Transfers control to a function starting with a new stack.
3416
3417 Transfers control to the function specified by EntryPoint using the
3418 new stack specified by NewStack and passing in the parameters specified
3419 by Context1 and Context2. Context1 and Context2 are optional and may
3420 be NULL. The function EntryPoint must never return. This function
3421 supports a variable number of arguments following the NewStack parameter.
3422 These additional arguments are ignored on IA-32, x64, and EBC architectures.
3423 Itanium processors expect one additional parameter of type VOID * that specifies
3424 the new backing store pointer.
3425
3426 If EntryPoint is NULL, then ASSERT().
3427 If NewStack is NULL, then ASSERT().
3428
3429 @param EntryPoint A pointer to function to call with the new stack.
3430 @param Context1 A pointer to the context to pass into the EntryPoint
3431 function.
3432 @param Context2 A pointer to the context to pass into the EntryPoint
3433 function.
3434 @param NewStack A pointer to the new stack to use for the EntryPoint
3435 function.
3436 @param ... This variable argument list is ignored for IA-32, x64, and
3437 EBC architectures. For Itanium processors, this variable
3438 argument list is expected to contain a single parameter of
3439 type VOID * that specifies the new backing store pointer.
3440
3441
3442 **/
3443 VOID
3444 EFIAPI
3445 SwitchStack (
3446 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3447 IN VOID *Context1, OPTIONAL
3448 IN VOID *Context2, OPTIONAL
3449 IN VOID *NewStack,
3450 ...
3451 );
3452
3453
3454 /**
3455 Generates a breakpoint on the CPU.
3456
3457 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3458 that code can resume normal execution after the breakpoint.
3459
3460 **/
3461 VOID
3462 EFIAPI
3463 CpuBreakpoint (
3464 VOID
3465 );
3466
3467
3468 /**
3469 Executes an infinite loop.
3470
3471 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3472 past the loop and the code that follows the loop must execute properly. This
3473 implies that the infinite loop must not cause the code that follow it to be
3474 optimized away.
3475
3476 **/
3477 VOID
3478 EFIAPI
3479 CpuDeadLoop (
3480 VOID
3481 );
3482
3483 #if defined (MDE_CPU_IPF)
3484
3485 /**
3486 Flush a range of cache lines in the cache coherency domain of the calling
3487 CPU.
3488
3489 Flushes the cache lines specified by Address and Length. If Address is not aligned
3490 on a cache line boundary, then entire cache line containing Address is flushed.
3491 If Address + Length is not aligned on a cache line boundary, then the entire cache
3492 line containing Address + Length - 1 is flushed. This function may choose to flush
3493 the entire cache if that is more efficient than flushing the specified range. If
3494 Length is 0, the no cache lines are flushed. Address is returned.
3495 This function is only available on Itanium processors.
3496
3497 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3498
3499 @param Address The base address of the instruction lines to invalidate. If
3500 the CPU is in a physical addressing mode, then Address is a
3501 physical address. If the CPU is in a virtual addressing mode,
3502 then Address is a virtual address.
3503
3504 @param Length The number of bytes to invalidate from the instruction cache.
3505
3506 @return Address.
3507
3508 **/
3509 VOID *
3510 EFIAPI
3511 AsmFlushCacheRange (
3512 IN VOID *Address,
3513 IN UINTN Length
3514 );
3515
3516
3517 /**
3518 Executes an FC instruction.
3519 Executes an FC instruction on the cache line specified by Address.
3520 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3521 An implementation may flush a larger region. This function is only available on Itanium processors.
3522
3523 @param Address The Address of cache line to be flushed.
3524
3525 @return The address of FC instruction executed.
3526
3527 **/
3528 UINT64
3529 EFIAPI
3530 AsmFc (
3531 IN UINT64 Address
3532 );
3533
3534
3535 /**
3536 Executes an FC.I instruction.
3537 Executes an FC.I instruction on the cache line specified by Address.
3538 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3539 An implementation may flush a larger region. This function is only available on Itanium processors.
3540
3541 @param Address The Address of cache line to be flushed.
3542
3543 @return The address of the FC.I instruction executed.
3544
3545 **/
3546 UINT64
3547 EFIAPI
3548 AsmFci (
3549 IN UINT64 Address
3550 );
3551
3552
3553 /**
3554 Reads the current value of a Processor Identifier Register (CPUID).
3555
3556 Reads and returns the current value of Processor Identifier Register specified by Index.
3557 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3558 registers) is determined by CPUID [3] bits {7:0}.
3559 No parameter checking is performed on Index. If the Index value is beyond the
3560 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3561 must either guarantee that Index is valid, or the caller must set up fault handlers to
3562 catch the faults. This function is only available on Itanium processors.
3563
3564 @param Index The 8-bit Processor Identifier Register index to read.
3565
3566 @return The current value of Processor Identifier Register specified by Index.
3567
3568 **/
3569 UINT64
3570 EFIAPI
3571 AsmReadCpuid (
3572 IN UINT8 Index
3573 );
3574
3575
3576 /**
3577 Reads the current value of 64-bit Processor Status Register (PSR).
3578 This function is only available on Itanium processors.
3579
3580 @return The current value of PSR.
3581
3582 **/
3583 UINT64
3584 EFIAPI
3585 AsmReadPsr (
3586 VOID
3587 );
3588
3589
3590 /**
3591 Writes the current value of 64-bit Processor Status Register (PSR).
3592
3593 No parameter checking is performed on Value. All bits of Value corresponding to
3594 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3595 The caller must either guarantee that Value is valid, or the caller must set up
3596 fault handlers to catch the faults. This function is only available on Itanium processors.
3597
3598 @param Value The 64-bit value to write to PSR.
3599
3600 @return The 64-bit value written to the PSR.
3601
3602 **/
3603 UINT64
3604 EFIAPI
3605 AsmWritePsr (
3606 IN UINT64 Value
3607 );
3608
3609
3610 /**
3611 Reads the current value of 64-bit Kernel Register #0 (KR0).
3612
3613 Reads and returns the current value of KR0.
3614 This function is only available on Itanium processors.
3615
3616 @return The current value of KR0.
3617
3618 **/
3619 UINT64
3620 EFIAPI
3621 AsmReadKr0 (
3622 VOID
3623 );
3624
3625
3626 /**
3627 Reads the current value of 64-bit Kernel Register #1 (KR1).
3628
3629 Reads and returns the current value of KR1.
3630 This function is only available on Itanium processors.
3631
3632 @return The current value of KR1.
3633
3634 **/
3635 UINT64
3636 EFIAPI
3637 AsmReadKr1 (
3638 VOID
3639 );
3640
3641
3642 /**
3643 Reads the current value of 64-bit Kernel Register #2 (KR2).
3644
3645 Reads and returns the current value of KR2.
3646 This function is only available on Itanium processors.
3647
3648 @return The current value of KR2.
3649
3650 **/
3651 UINT64
3652 EFIAPI
3653 AsmReadKr2 (
3654 VOID
3655 );
3656
3657
3658 /**
3659 Reads the current value of 64-bit Kernel Register #3 (KR3).
3660
3661 Reads and returns the current value of KR3.
3662 This function is only available on Itanium processors.
3663
3664 @return The current value of KR3.
3665
3666 **/
3667 UINT64
3668 EFIAPI
3669 AsmReadKr3 (
3670 VOID
3671 );
3672
3673
3674 /**
3675 Reads the current value of 64-bit Kernel Register #4 (KR4).
3676
3677 Reads and returns the current value of KR4.
3678 This function is only available on Itanium processors.
3679
3680 @return The current value of KR4.
3681
3682 **/
3683 UINT64
3684 EFIAPI
3685 AsmReadKr4 (
3686 VOID
3687 );
3688
3689
3690 /**
3691 Reads the current value of 64-bit Kernel Register #5 (KR5).
3692
3693 Reads and returns the current value of KR5.
3694 This function is only available on Itanium processors.
3695
3696 @return The current value of KR5.
3697
3698 **/
3699 UINT64
3700 EFIAPI
3701 AsmReadKr5 (
3702 VOID
3703 );
3704
3705
3706 /**
3707 Reads the current value of 64-bit Kernel Register #6 (KR6).
3708
3709 Reads and returns the current value of KR6.
3710 This function is only available on Itanium processors.
3711
3712 @return The current value of KR6.
3713
3714 **/
3715 UINT64
3716 EFIAPI
3717 AsmReadKr6 (
3718 VOID
3719 );
3720
3721
3722 /**
3723 Reads the current value of 64-bit Kernel Register #7 (KR7).
3724
3725 Reads and returns the current value of KR7.
3726 This function is only available on Itanium processors.
3727
3728 @return The current value of KR7.
3729
3730 **/
3731 UINT64
3732 EFIAPI
3733 AsmReadKr7 (
3734 VOID
3735 );
3736
3737
3738 /**
3739 Write the current value of 64-bit Kernel Register #0 (KR0).
3740
3741 Writes the current value of KR0. The 64-bit value written to
3742 the KR0 is returned. This function is only available on Itanium processors.
3743
3744 @param Value The 64-bit value to write to KR0.
3745
3746 @return The 64-bit value written to the KR0.
3747
3748 **/
3749 UINT64
3750 EFIAPI
3751 AsmWriteKr0 (
3752 IN UINT64 Value
3753 );
3754
3755
3756 /**
3757 Write the current value of 64-bit Kernel Register #1 (KR1).
3758
3759 Writes the current value of KR1. The 64-bit value written to
3760 the KR1 is returned. This function is only available on Itanium processors.
3761
3762 @param Value The 64-bit value to write to KR1.
3763
3764 @return The 64-bit value written to the KR1.
3765
3766 **/
3767 UINT64
3768 EFIAPI
3769 AsmWriteKr1 (
3770 IN UINT64 Value
3771 );
3772
3773
3774 /**
3775 Write the current value of 64-bit Kernel Register #2 (KR2).
3776
3777 Writes the current value of KR2. The 64-bit value written to
3778 the KR2 is returned. This function is only available on Itanium processors.
3779
3780 @param Value The 64-bit value to write to KR2.
3781
3782 @return The 64-bit value written to the KR2.
3783
3784 **/
3785 UINT64
3786 EFIAPI
3787 AsmWriteKr2 (
3788 IN UINT64 Value
3789 );
3790
3791
3792 /**
3793 Write the current value of 64-bit Kernel Register #3 (KR3).
3794
3795 Writes the current value of KR3. The 64-bit value written to
3796 the KR3 is returned. This function is only available on Itanium processors.
3797
3798 @param Value The 64-bit value to write to KR3.
3799
3800 @return The 64-bit value written to the KR3.
3801
3802 **/
3803 UINT64
3804 EFIAPI
3805 AsmWriteKr3 (
3806 IN UINT64 Value
3807 );
3808
3809
3810 /**
3811 Write the current value of 64-bit Kernel Register #4 (KR4).
3812
3813 Writes the current value of KR4. The 64-bit value written to
3814 the KR4 is returned. This function is only available on Itanium processors.
3815
3816 @param Value The 64-bit value to write to KR4.
3817
3818 @return The 64-bit value written to the KR4.
3819
3820 **/
3821 UINT64
3822 EFIAPI
3823 AsmWriteKr4 (
3824 IN UINT64 Value
3825 );
3826
3827
3828 /**
3829 Write the current value of 64-bit Kernel Register #5 (KR5).
3830
3831 Writes the current value of KR5. The 64-bit value written to
3832 the KR5 is returned. This function is only available on Itanium processors.
3833
3834 @param Value The 64-bit value to write to KR5.
3835
3836 @return The 64-bit value written to the KR5.
3837
3838 **/
3839 UINT64
3840 EFIAPI
3841 AsmWriteKr5 (
3842 IN UINT64 Value
3843 );
3844
3845
3846 /**
3847 Write the current value of 64-bit Kernel Register #6 (KR6).
3848
3849 Writes the current value of KR6. The 64-bit value written to
3850 the KR6 is returned. This function is only available on Itanium processors.
3851
3852 @param Value The 64-bit value to write to KR6.
3853
3854 @return The 64-bit value written to the KR6.
3855
3856 **/
3857 UINT64
3858 EFIAPI
3859 AsmWriteKr6 (
3860 IN UINT64 Value
3861 );
3862
3863
3864 /**
3865 Write the current value of 64-bit Kernel Register #7 (KR7).
3866
3867 Writes the current value of KR7. The 64-bit value written to
3868 the KR7 is returned. This function is only available on Itanium processors.
3869
3870 @param Value The 64-bit value to write to KR7.
3871
3872 @return The 64-bit value written to the KR7.
3873
3874 **/
3875 UINT64
3876 EFIAPI
3877 AsmWriteKr7 (
3878 IN UINT64 Value
3879 );
3880
3881
3882 /**
3883 Reads the current value of Interval Timer Counter Register (ITC).
3884
3885 Reads and returns the current value of ITC.
3886 This function is only available on Itanium processors.
3887
3888 @return The current value of ITC.
3889
3890 **/
3891 UINT64
3892 EFIAPI
3893 AsmReadItc (
3894 VOID
3895 );
3896
3897
3898 /**
3899 Reads the current value of Interval Timer Vector Register (ITV).
3900
3901 Reads and returns the current value of ITV.
3902 This function is only available on Itanium processors.
3903
3904 @return The current value of ITV.
3905
3906 **/
3907 UINT64
3908 EFIAPI
3909 AsmReadItv (
3910 VOID
3911 );
3912
3913
3914 /**
3915 Reads the current value of Interval Timer Match Register (ITM).
3916
3917 Reads and returns the current value of ITM.
3918 This function is only available on Itanium processors.
3919
3920 @return The current value of ITM.
3921 **/
3922 UINT64
3923 EFIAPI
3924 AsmReadItm (
3925 VOID
3926 );
3927
3928
3929 /**
3930 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
3931
3932 Writes the current value of ITC. The 64-bit value written to the ITC is returned.
3933 This function is only available on Itanium processors.
3934
3935 @param Value The 64-bit value to write to ITC.
3936
3937 @return The 64-bit value written to the ITC.
3938
3939 **/
3940 UINT64
3941 EFIAPI
3942 AsmWriteItc (
3943 IN UINT64 Value
3944 );
3945
3946
3947 /**
3948 Writes the current value of 64-bit Interval Timer Match Register (ITM).
3949
3950 Writes the current value of ITM. The 64-bit value written to the ITM is returned.
3951 This function is only available on Itanium processors.
3952
3953 @param Value The 64-bit value to write to ITM.
3954
3955 @return The 64-bit value written to the ITM.
3956
3957 **/
3958 UINT64
3959 EFIAPI
3960 AsmWriteItm (
3961 IN UINT64 Value
3962 );
3963
3964
3965 /**
3966 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
3967
3968 Writes the current value of ITV. The 64-bit value written to the ITV is returned.
3969 No parameter checking is performed on Value. All bits of Value corresponding to
3970 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
3971 The caller must either guarantee that Value is valid, or the caller must set up
3972 fault handlers to catch the faults.
3973 This function is only available on Itanium processors.
3974
3975 @param Value The 64-bit value to write to ITV.
3976
3977 @return The 64-bit value written to the ITV.
3978
3979 **/
3980 UINT64
3981 EFIAPI
3982 AsmWriteItv (
3983 IN UINT64 Value
3984 );
3985
3986
3987 /**
3988 Reads the current value of Default Control Register (DCR).
3989
3990 Reads and returns the current value of DCR. This function is only available on Itanium processors.
3991
3992 @return The current value of DCR.
3993
3994 **/
3995 UINT64
3996 EFIAPI
3997 AsmReadDcr (
3998 VOID
3999 );
4000
4001
4002 /**
4003 Reads the current value of Interruption Vector Address Register (IVA).
4004
4005 Reads and returns the current value of IVA. This function is only available on Itanium processors.
4006
4007 @return The current value of IVA.
4008 **/
4009 UINT64
4010 EFIAPI
4011 AsmReadIva (
4012 VOID
4013 );
4014
4015
4016 /**
4017 Reads the current value of Page Table Address Register (PTA).
4018
4019 Reads and returns the current value of PTA. This function is only available on Itanium processors.
4020
4021 @return The current value of PTA.
4022
4023 **/
4024 UINT64
4025 EFIAPI
4026 AsmReadPta (
4027 VOID
4028 );
4029
4030
4031 /**
4032 Writes the current value of 64-bit Default Control Register (DCR).
4033
4034 Writes the current value of DCR. The 64-bit value written to the DCR is returned.
4035 No parameter checking is performed on Value. All bits of Value corresponding to
4036 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4037 The caller must either guarantee that Value is valid, or the caller must set up
4038 fault handlers to catch the faults.
4039 This function is only available on Itanium processors.
4040
4041 @param Value The 64-bit value to write to DCR.
4042
4043 @return The 64-bit value written to the DCR.
4044
4045 **/
4046 UINT64
4047 EFIAPI
4048 AsmWriteDcr (
4049 IN UINT64 Value
4050 );
4051
4052
4053 /**
4054 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
4055
4056 Writes the current value of IVA. The 64-bit value written to the IVA is returned.
4057 The size of vector table is 32 K bytes and is 32 K bytes aligned
4058 the low 15 bits of Value is ignored when written.
4059 This function is only available on Itanium processors.
4060
4061 @param Value The 64-bit value to write to IVA.
4062
4063 @return The 64-bit value written to the IVA.
4064
4065 **/
4066 UINT64
4067 EFIAPI
4068 AsmWriteIva (
4069 IN UINT64 Value
4070 );
4071
4072
4073 /**
4074 Writes the current value of 64-bit Page Table Address Register (PTA).
4075
4076 Writes the current value of PTA. The 64-bit value written to the PTA is returned.
4077 No parameter checking is performed on Value. All bits of Value corresponding to
4078 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4079 The caller must either guarantee that Value is valid, or the caller must set up
4080 fault handlers to catch the faults.
4081 This function is only available on Itanium processors.
4082
4083 @param Value The 64-bit value to write to PTA.
4084
4085 @return The 64-bit value written to the PTA.
4086 **/
4087 UINT64
4088 EFIAPI
4089 AsmWritePta (
4090 IN UINT64 Value
4091 );
4092
4093
4094 /**
4095 Reads the current value of Local Interrupt ID Register (LID).
4096
4097 Reads and returns the current value of LID. This function is only available on Itanium processors.
4098
4099 @return The current value of LID.
4100
4101 **/
4102 UINT64
4103 EFIAPI
4104 AsmReadLid (
4105 VOID
4106 );
4107
4108
4109 /**
4110 Reads the current value of External Interrupt Vector Register (IVR).
4111
4112 Reads and returns the current value of IVR. This function is only available on Itanium processors.
4113
4114 @return The current value of IVR.
4115
4116 **/
4117 UINT64
4118 EFIAPI
4119 AsmReadIvr (
4120 VOID
4121 );
4122
4123
4124 /**
4125 Reads the current value of Task Priority Register (TPR).
4126
4127 Reads and returns the current value of TPR. This function is only available on Itanium processors.
4128
4129 @return The current value of TPR.
4130
4131 **/
4132 UINT64
4133 EFIAPI
4134 AsmReadTpr (
4135 VOID
4136 );
4137
4138
4139 /**
4140 Reads the current value of External Interrupt Request Register #0 (IRR0).
4141
4142 Reads and returns the current value of IRR0. This function is only available on Itanium processors.
4143
4144 @return The current value of IRR0.
4145
4146 **/
4147 UINT64
4148 EFIAPI
4149 AsmReadIrr0 (
4150 VOID
4151 );
4152
4153
4154 /**
4155 Reads the current value of External Interrupt Request Register #1 (IRR1).
4156
4157 Reads and returns the current value of IRR1. This function is only available on Itanium processors.
4158
4159 @return The current value of IRR1.
4160
4161 **/
4162 UINT64
4163 EFIAPI
4164 AsmReadIrr1 (
4165 VOID
4166 );
4167
4168
4169 /**
4170 Reads the current value of External Interrupt Request Register #2 (IRR2).
4171
4172 Reads and returns the current value of IRR2. This function is only available on Itanium processors.
4173
4174 @return The current value of IRR2.
4175
4176 **/
4177 UINT64
4178 EFIAPI
4179 AsmReadIrr2 (
4180 VOID
4181 );
4182
4183
4184 /**
4185 Reads the current value of External Interrupt Request Register #3 (IRR3).
4186
4187 Reads and returns the current value of IRR3. This function is only available on Itanium processors.
4188
4189 @return The current value of IRR3.
4190
4191 **/
4192 UINT64
4193 EFIAPI
4194 AsmReadIrr3 (
4195 VOID
4196 );
4197
4198
4199 /**
4200 Reads the current value of Performance Monitor Vector Register (PMV).
4201
4202 Reads and returns the current value of PMV. This function is only available on Itanium processors.
4203
4204 @return The current value of PMV.
4205
4206 **/
4207 UINT64
4208 EFIAPI
4209 AsmReadPmv (
4210 VOID
4211 );
4212
4213
4214 /**
4215 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4216
4217 Reads and returns the current value of CMCV. This function is only available on Itanium processors.
4218
4219 @return The current value of CMCV.
4220
4221 **/
4222 UINT64
4223 EFIAPI
4224 AsmReadCmcv (
4225 VOID
4226 );
4227
4228
4229 /**
4230 Reads the current value of Local Redirection Register #0 (LRR0).
4231
4232 Reads and returns the current value of LRR0. This function is only available on Itanium processors.
4233
4234 @return The current value of LRR0.
4235
4236 **/
4237 UINT64
4238 EFIAPI
4239 AsmReadLrr0 (
4240 VOID
4241 );
4242
4243
4244 /**
4245 Reads the current value of Local Redirection Register #1 (LRR1).
4246
4247 Reads and returns the current value of LRR1. This function is only available on Itanium processors.
4248
4249 @return The current value of LRR1.
4250
4251 **/
4252 UINT64
4253 EFIAPI
4254 AsmReadLrr1 (
4255 VOID
4256 );
4257
4258
4259 /**
4260 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4261
4262 Writes the current value of LID. The 64-bit value written to the LID is returned.
4263 No parameter checking is performed on Value. All bits of Value corresponding to
4264 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4265 The caller must either guarantee that Value is valid, or the caller must set up
4266 fault handlers to catch the faults.
4267 This function is only available on Itanium processors.
4268
4269 @param Value The 64-bit value to write to LID.
4270
4271 @return The 64-bit value written to the LID.
4272
4273 **/
4274 UINT64
4275 EFIAPI
4276 AsmWriteLid (
4277 IN UINT64 Value
4278 );
4279
4280
4281 /**
4282 Writes the current value of 64-bit Task Priority Register (TPR).
4283
4284 Writes the current value of TPR. The 64-bit value written to the TPR is returned.
4285 No parameter checking is performed on Value. All bits of Value corresponding to
4286 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4287 The caller must either guarantee that Value is valid, or the caller must set up
4288 fault handlers to catch the faults.
4289 This function is only available on Itanium processors.
4290
4291 @param Value The 64-bit value to write to TPR.
4292
4293 @return The 64-bit value written to the TPR.
4294
4295 **/
4296 UINT64
4297 EFIAPI
4298 AsmWriteTpr (
4299 IN UINT64 Value
4300 );
4301
4302
4303 /**
4304 Performs a write operation on End OF External Interrupt Register (EOI).
4305
4306 Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.
4307
4308 **/
4309 VOID
4310 EFIAPI
4311 AsmWriteEoi (
4312 VOID
4313 );
4314
4315
4316 /**
4317 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4318
4319 Writes the current value of PMV. The 64-bit value written to the PMV is returned.
4320 No parameter checking is performed on Value. All bits of Value corresponding
4321 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4322 The caller must either guarantee that Value is valid, or the caller must set up
4323 fault handlers to catch the faults.
4324 This function is only available on Itanium processors.
4325
4326 @param Value The 64-bit value to write to PMV.
4327
4328 @return The 64-bit value written to the PMV.
4329
4330 **/
4331 UINT64
4332 EFIAPI
4333 AsmWritePmv (
4334 IN UINT64 Value
4335 );
4336
4337
4338 /**
4339 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4340
4341 Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.
4342 No parameter checking is performed on Value. All bits of Value corresponding
4343 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4344 The caller must either guarantee that Value is valid, or the caller must set up
4345 fault handlers to catch the faults.
4346 This function is only available on Itanium processors.
4347
4348 @param Value The 64-bit value to write to CMCV.
4349
4350 @return The 64-bit value written to the CMCV.
4351
4352 **/
4353 UINT64
4354 EFIAPI
4355 AsmWriteCmcv (
4356 IN UINT64 Value
4357 );
4358
4359
4360 /**
4361 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4362
4363 Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.
4364 No parameter checking is performed on Value. All bits of Value corresponding
4365 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4366 The caller must either guarantee that Value is valid, or the caller must set up
4367 fault handlers to catch the faults.
4368 This function is only available on Itanium processors.
4369
4370 @param Value The 64-bit value to write to LRR0.
4371
4372 @return The 64-bit value written to the LRR0.
4373
4374 **/
4375 UINT64
4376 EFIAPI
4377 AsmWriteLrr0 (
4378 IN UINT64 Value
4379 );
4380
4381
4382 /**
4383 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4384
4385 Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.
4386 No parameter checking is performed on Value. All bits of Value corresponding
4387 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4388 The caller must either guarantee that Value is valid, or the caller must
4389 set up fault handlers to catch the faults.
4390 This function is only available on Itanium processors.
4391
4392 @param Value The 64-bit value to write to LRR1.
4393
4394 @return The 64-bit value written to the LRR1.
4395
4396 **/
4397 UINT64
4398 EFIAPI
4399 AsmWriteLrr1 (
4400 IN UINT64 Value
4401 );
4402
4403
4404 /**
4405 Reads the current value of Instruction Breakpoint Register (IBR).
4406
4407 The Instruction Breakpoint Registers are used in pairs. The even numbered
4408 registers contain breakpoint addresses, and the odd numbered registers contain
4409 breakpoint mask conditions. At least four instruction registers pairs are implemented
4410 on all processor models. Implemented registers are contiguous starting with
4411 register 0. No parameter checking is performed on Index, and if the Index value
4412 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4413 occur. The caller must either guarantee that Index is valid, or the caller must
4414 set up fault handlers to catch the faults.
4415 This function is only available on Itanium processors.
4416
4417 @param Index The 8-bit Instruction Breakpoint Register index to read.
4418
4419 @return The current value of Instruction Breakpoint Register specified by Index.
4420
4421 **/
4422 UINT64
4423 EFIAPI
4424 AsmReadIbr (
4425 IN UINT8 Index
4426 );
4427
4428
4429 /**
4430 Reads the current value of Data Breakpoint Register (DBR).
4431
4432 The Data Breakpoint Registers are used in pairs. The even numbered registers
4433 contain breakpoint addresses, and odd numbered registers contain breakpoint
4434 mask conditions. At least four data registers pairs are implemented on all processor
4435 models. Implemented registers are contiguous starting with register 0.
4436 No parameter checking is performed on Index. If the Index value is beyond
4437 the implemented DBR register range, a Reserved Register/Field fault may occur.
4438 The caller must either guarantee that Index is valid, or the caller must set up
4439 fault handlers to catch the faults.
4440 This function is only available on Itanium processors.
4441
4442 @param Index The 8-bit Data Breakpoint Register index to read.
4443
4444 @return The current value of Data Breakpoint Register specified by Index.
4445
4446 **/
4447 UINT64
4448 EFIAPI
4449 AsmReadDbr (
4450 IN UINT8 Index
4451 );
4452
4453
4454 /**
4455 Reads the current value of Performance Monitor Configuration Register (PMC).
4456
4457 All processor implementations provide at least four performance counters
4458 (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
4459 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4460 additional implementation-dependent PMC and PMD to increase the number of
4461 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4462 register set is implementation dependent. No parameter checking is performed
4463 on Index. If the Index value is beyond the implemented PMC register range,
4464 zero value will be returned.
4465 This function is only available on Itanium processors.
4466
4467 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4468
4469 @return The current value of Performance Monitor Configuration Register
4470 specified by Index.
4471
4472 **/
4473 UINT64
4474 EFIAPI
4475 AsmReadPmc (
4476 IN UINT8 Index
4477 );
4478
4479
4480 /**
4481 Reads the current value of Performance Monitor Data Register (PMD).
4482
4483 All processor implementations provide at least 4 performance counters
4484 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4485 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4486 provide additional implementation-dependent PMC and PMD to increase the number
4487 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4488 register set is implementation dependent. No parameter checking is performed
4489 on Index. If the Index value is beyond the implemented PMD register range,
4490 zero value will be returned.
4491 This function is only available on Itanium processors.
4492
4493 @param Index The 8-bit Performance Monitor Data Register index to read.
4494
4495 @return The current value of Performance Monitor Data Register specified by Index.
4496
4497 **/
4498 UINT64
4499 EFIAPI
4500 AsmReadPmd (
4501 IN UINT8 Index
4502 );
4503
4504
4505 /**
4506 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4507
4508 Writes current value of Instruction Breakpoint Register specified by Index.
4509 The Instruction Breakpoint Registers are used in pairs. The even numbered
4510 registers contain breakpoint addresses, and odd numbered registers contain
4511 breakpoint mask conditions. At least four instruction registers pairs are implemented
4512 on all processor models. Implemented registers are contiguous starting with
4513 register 0. No parameter checking is performed on Index. If the Index value
4514 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4515 occur. The caller must either guarantee that Index is valid, or the caller must
4516 set up fault handlers to catch the faults.
4517 This function is only available on Itanium processors.
4518
4519 @param Index The 8-bit Instruction Breakpoint Register index to write.
4520 @param Value The 64-bit value to write to IBR.
4521
4522 @return The 64-bit value written to the IBR.
4523
4524 **/
4525 UINT64
4526 EFIAPI
4527 AsmWriteIbr (
4528 IN UINT8 Index,
4529 IN UINT64 Value
4530 );
4531
4532
4533 /**
4534 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4535
4536 Writes current value of Data Breakpoint Register specified by Index.
4537 The Data Breakpoint Registers are used in pairs. The even numbered registers
4538 contain breakpoint addresses, and odd numbered registers contain breakpoint
4539 mask conditions. At least four data registers pairs are implemented on all processor
4540 models. Implemented registers are contiguous starting with register 0. No parameter
4541 checking is performed on Index. If the Index value is beyond the implemented
4542 DBR register range, a Reserved Register/Field fault may occur. The caller must
4543 either guarantee that Index is valid, or the caller must set up fault handlers to
4544 catch the faults.
4545 This function is only available on Itanium processors.
4546
4547 @param Index The 8-bit Data Breakpoint Register index to write.
4548 @param Value The 64-bit value to write to DBR.
4549
4550 @return The 64-bit value written to the DBR.
4551
4552 **/
4553 UINT64
4554 EFIAPI
4555 AsmWriteDbr (
4556 IN UINT8 Index,
4557 IN UINT64 Value
4558 );
4559
4560
4561 /**
4562 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4563
4564 Writes current value of Performance Monitor Configuration Register specified by Index.
4565 All processor implementations provide at least four performance counters
4566 (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status
4567 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4568 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4569 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4570 dependent. No parameter checking is performed on Index. If the Index value is
4571 beyond the implemented PMC register range, the write is ignored.
4572 This function is only available on Itanium processors.
4573
4574 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4575 @param Value The 64-bit value to write to PMC.
4576
4577 @return The 64-bit value written to the PMC.
4578
4579 **/
4580 UINT64
4581 EFIAPI
4582 AsmWritePmc (
4583 IN UINT8 Index,
4584 IN UINT64 Value
4585 );
4586
4587
4588 /**
4589 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4590
4591 Writes current value of Performance Monitor Data Register specified by Index.
4592 All processor implementations provide at least four performance counters
4593 (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
4594 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4595 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4596 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4597 is implementation dependent. No parameter checking is performed on Index. If the
4598 Index value is beyond the implemented PMD register range, the write is ignored.
4599 This function is only available on Itanium processors.
4600
4601 @param Index The 8-bit Performance Monitor Data Register index to write.
4602 @param Value The 64-bit value to write to PMD.
4603
4604 @return The 64-bit value written to the PMD.
4605
4606 **/
4607 UINT64
4608 EFIAPI
4609 AsmWritePmd (
4610 IN UINT8 Index,
4611 IN UINT64 Value
4612 );
4613
4614
4615 /**
4616 Reads the current value of 64-bit Global Pointer (GP).
4617
4618 Reads and returns the current value of GP.
4619 This function is only available on Itanium processors.
4620
4621 @return The current value of GP.
4622
4623 **/
4624 UINT64
4625 EFIAPI
4626 AsmReadGp (
4627 VOID
4628 );
4629
4630
4631 /**
4632 Write the current value of 64-bit Global Pointer (GP).
4633
4634 Writes the current value of GP. The 64-bit value written to the GP is returned.
4635 No parameter checking is performed on Value.
4636 This function is only available on Itanium processors.
4637
4638 @param Value The 64-bit value to write to GP.
4639
4640 @return The 64-bit value written to the GP.
4641
4642 **/
4643 UINT64
4644 EFIAPI
4645 AsmWriteGp (
4646 IN UINT64 Value
4647 );
4648
4649
4650 /**
4651 Reads the current value of 64-bit Stack Pointer (SP).
4652
4653 Reads and returns the current value of SP.
4654 This function is only available on Itanium processors.
4655
4656 @return The current value of SP.
4657
4658 **/
4659 UINT64
4660 EFIAPI
4661 AsmReadSp (
4662 VOID
4663 );
4664
4665
4666 ///
4667 /// Valid Index value for AsmReadControlRegister().
4668 ///
4669 #define IPF_CONTROL_REGISTER_DCR 0
4670 #define IPF_CONTROL_REGISTER_ITM 1
4671 #define IPF_CONTROL_REGISTER_IVA 2
4672 #define IPF_CONTROL_REGISTER_PTA 8
4673 #define IPF_CONTROL_REGISTER_IPSR 16
4674 #define IPF_CONTROL_REGISTER_ISR 17
4675 #define IPF_CONTROL_REGISTER_IIP 19
4676 #define IPF_CONTROL_REGISTER_IFA 20
4677 #define IPF_CONTROL_REGISTER_ITIR 21
4678 #define IPF_CONTROL_REGISTER_IIPA 22
4679 #define IPF_CONTROL_REGISTER_IFS 23
4680 #define IPF_CONTROL_REGISTER_IIM 24
4681 #define IPF_CONTROL_REGISTER_IHA 25
4682 #define IPF_CONTROL_REGISTER_LID 64
4683 #define IPF_CONTROL_REGISTER_IVR 65
4684 #define IPF_CONTROL_REGISTER_TPR 66
4685 #define IPF_CONTROL_REGISTER_EOI 67
4686 #define IPF_CONTROL_REGISTER_IRR0 68
4687 #define IPF_CONTROL_REGISTER_IRR1 69
4688 #define IPF_CONTROL_REGISTER_IRR2 70
4689 #define IPF_CONTROL_REGISTER_IRR3 71
4690 #define IPF_CONTROL_REGISTER_ITV 72
4691 #define IPF_CONTROL_REGISTER_PMV 73
4692 #define IPF_CONTROL_REGISTER_CMCV 74
4693 #define IPF_CONTROL_REGISTER_LRR0 80
4694 #define IPF_CONTROL_REGISTER_LRR1 81
4695
4696 /**
4697 Reads a 64-bit control register.
4698
4699 Reads and returns the control register specified by Index. The valid Index valued
4700 are defined above in "Related Definitions".
4701 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only
4702 available on Itanium processors.
4703
4704 @param Index The index of the control register to read.
4705
4706 @return The control register specified by Index.
4707
4708 **/
4709 UINT64
4710 EFIAPI
4711 AsmReadControlRegister (
4712 IN UINT64 Index
4713 );
4714
4715
4716 ///
4717 /// Valid Index value for AsmReadApplicationRegister().
4718 ///
4719 #define IPF_APPLICATION_REGISTER_K0 0
4720 #define IPF_APPLICATION_REGISTER_K1 1
4721 #define IPF_APPLICATION_REGISTER_K2 2
4722 #define IPF_APPLICATION_REGISTER_K3 3
4723 #define IPF_APPLICATION_REGISTER_K4 4
4724 #define IPF_APPLICATION_REGISTER_K5 5
4725 #define IPF_APPLICATION_REGISTER_K6 6
4726 #define IPF_APPLICATION_REGISTER_K7 7
4727 #define IPF_APPLICATION_REGISTER_RSC 16
4728 #define IPF_APPLICATION_REGISTER_BSP 17
4729 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4730 #define IPF_APPLICATION_REGISTER_RNAT 19
4731 #define IPF_APPLICATION_REGISTER_FCR 21
4732 #define IPF_APPLICATION_REGISTER_EFLAG 24
4733 #define IPF_APPLICATION_REGISTER_CSD 25
4734 #define IPF_APPLICATION_REGISTER_SSD 26
4735 #define IPF_APPLICATION_REGISTER_CFLG 27
4736 #define IPF_APPLICATION_REGISTER_FSR 28
4737 #define IPF_APPLICATION_REGISTER_FIR 29
4738 #define IPF_APPLICATION_REGISTER_FDR 30
4739 #define IPF_APPLICATION_REGISTER_CCV 32
4740 #define IPF_APPLICATION_REGISTER_UNAT 36
4741 #define IPF_APPLICATION_REGISTER_FPSR 40
4742 #define IPF_APPLICATION_REGISTER_ITC 44
4743 #define IPF_APPLICATION_REGISTER_PFS 64
4744 #define IPF_APPLICATION_REGISTER_LC 65
4745 #define IPF_APPLICATION_REGISTER_EC 66
4746
4747 /**
4748 Reads a 64-bit application register.
4749
4750 Reads and returns the application register specified by Index. The valid Index
4751 valued are defined above in "Related Definitions".
4752 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only
4753 available on Itanium processors.
4754
4755 @param Index The index of the application register to read.
4756
4757 @return The application register specified by Index.
4758
4759 **/
4760 UINT64
4761 EFIAPI
4762 AsmReadApplicationRegister (
4763 IN UINT64 Index
4764 );
4765
4766
4767 /**
4768 Reads the current value of a Machine Specific Register (MSR).
4769
4770 Reads and returns the current value of the Machine Specific Register specified by Index. No
4771 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4772 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4773 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4774 only available on Itanium processors.
4775
4776 @param Index The 8-bit Machine Specific Register index to read.
4777
4778 @return The current value of the Machine Specific Register specified by Index.
4779
4780 **/
4781 UINT64
4782 EFIAPI
4783 AsmReadMsr (
4784 IN UINT8 Index
4785 );
4786
4787
4788 /**
4789 Writes the current value of a Machine Specific Register (MSR).
4790
4791 Writes Value to the Machine Specific Register specified by Index. Value is returned. No
4792 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4793 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4794 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4795 only available on Itanium processors.
4796
4797 @param Index The 8-bit Machine Specific Register index to write.
4798 @param Value The 64-bit value to write to the Machine Specific Register.
4799
4800 @return The 64-bit value to write to the Machine Specific Register.
4801
4802 **/
4803 UINT64
4804 EFIAPI
4805 AsmWriteMsr (
4806 IN UINT8 Index,
4807 IN UINT64 Value
4808 );
4809
4810
4811 /**
4812 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4813
4814 Determines the current execution mode of the CPU.
4815 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4816 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4817 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4818 and -1 is returned.
4819 This function is only available on Itanium processors.
4820
4821 @retval 1 The CPU is in virtual mode.
4822 @retval 0 The CPU is in physical mode.
4823 @retval -1 The CPU is in mixed mode.
4824
4825 **/
4826 INT64
4827 EFIAPI
4828 AsmCpuVirtual (
4829 VOID
4830 );
4831
4832
4833 /**
4834 Makes a PAL procedure call.
4835
4836 This is a wrapper function to make a PAL procedure call. Based on the Index
4837 value this API will make static or stacked PAL call. The following table
4838 describes the usage of PAL Procedure Index Assignment. Architected procedures
4839 may be designated as required or optional. If a PAL procedure is specified
4840 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4841 Status field of the PAL_CALL_RETURN structure.
4842 This indicates that the procedure is not present in this PAL implementation.
4843 It is the caller's responsibility to check for this return code after calling
4844 any optional PAL procedure.
4845 No parameter checking is performed on the 5 input parameters, but there are
4846 some common rules that the caller should follow when making a PAL call. Any
4847 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4848 Unaligned addresses may cause undefined results. For those parameters defined
4849 as reserved or some fields defined as reserved must be zero filled or the invalid
4850 argument return value may be returned or undefined result may occur during the
4851 execution of the procedure. If the PalEntryPoint does not point to a valid
4852 PAL entry point then the system behavior is undefined. This function is only
4853 available on Itanium processors.
4854
4855 @param PalEntryPoint The PAL procedure calls entry point.
4856 @param Index The PAL procedure Index number.
4857 @param Arg2 The 2nd parameter for PAL procedure calls.
4858 @param Arg3 The 3rd parameter for PAL procedure calls.
4859 @param Arg4 The 4th parameter for PAL procedure calls.
4860
4861 @return structure returned from the PAL Call procedure, including the status and return value.
4862
4863 **/
4864 PAL_CALL_RETURN
4865 EFIAPI
4866 AsmPalCall (
4867 IN UINT64 PalEntryPoint,
4868 IN UINT64 Index,
4869 IN UINT64 Arg2,
4870 IN UINT64 Arg3,
4871 IN UINT64 Arg4
4872 );
4873 #endif
4874
4875 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4876 ///
4877 /// IA32 and x64 Specific Functions.
4878 /// Byte packed structure for 16-bit Real Mode EFLAGS.
4879 ///
4880 typedef union {
4881 struct {
4882 UINT32 CF:1; ///< Carry Flag.
4883 UINT32 Reserved_0:1; ///< Reserved.
4884 UINT32 PF:1; ///< Parity Flag.
4885 UINT32 Reserved_1:1; ///< Reserved.
4886 UINT32 AF:1; ///< Auxiliary Carry Flag.
4887 UINT32 Reserved_2:1; ///< Reserved.
4888 UINT32 ZF:1; ///< Zero Flag.
4889 UINT32 SF:1; ///< Sign Flag.
4890 UINT32 TF:1; ///< Trap Flag.
4891 UINT32 IF:1; ///< Interrupt Enable Flag.
4892 UINT32 DF:1; ///< Direction Flag.
4893 UINT32 OF:1; ///< Overflow Flag.
4894 UINT32 IOPL:2; ///< I/O Privilege Level.
4895 UINT32 NT:1; ///< Nested Task.
4896 UINT32 Reserved_3:1; ///< Reserved.
4897 } Bits;
4898 UINT16 Uint16;
4899 } IA32_FLAGS16;
4900
4901 ///
4902 /// Byte packed structure for EFLAGS/RFLAGS.
4903 /// 32-bits on IA-32.
4904 /// 64-bits on x64. The upper 32-bits on x64 are reserved.
4905 ///
4906 typedef union {
4907 struct {
4908 UINT32 CF:1; ///< Carry Flag.
4909 UINT32 Reserved_0:1; ///< Reserved.
4910 UINT32 PF:1; ///< Parity Flag.
4911 UINT32 Reserved_1:1; ///< Reserved.
4912 UINT32 AF:1; ///< Auxiliary Carry Flag.
4913 UINT32 Reserved_2:1; ///< Reserved.
4914 UINT32 ZF:1; ///< Zero Flag.
4915 UINT32 SF:1; ///< Sign Flag.
4916 UINT32 TF:1; ///< Trap Flag.
4917 UINT32 IF:1; ///< Interrupt Enable Flag.
4918 UINT32 DF:1; ///< Direction Flag.
4919 UINT32 OF:1; ///< Overflow Flag.
4920 UINT32 IOPL:2; ///< I/O Privilege Level.
4921 UINT32 NT:1; ///< Nested Task.
4922 UINT32 Reserved_3:1; ///< Reserved.
4923 UINT32 RF:1; ///< Resume Flag.
4924 UINT32 VM:1; ///< Virtual 8086 Mode.
4925 UINT32 AC:1; ///< Alignment Check.
4926 UINT32 VIF:1; ///< Virtual Interrupt Flag.
4927 UINT32 VIP:1; ///< Virtual Interrupt Pending.
4928 UINT32 ID:1; ///< ID Flag.
4929 UINT32 Reserved_4:10; ///< Reserved.
4930 } Bits;
4931 UINTN UintN;
4932 } IA32_EFLAGS32;
4933
4934 ///
4935 /// Byte packed structure for Control Register 0 (CR0).
4936 /// 32-bits on IA-32.
4937 /// 64-bits on x64. The upper 32-bits on x64 are reserved.
4938 ///
4939 typedef union {
4940 struct {
4941 UINT32 PE:1; ///< Protection Enable.
4942 UINT32 MP:1; ///< Monitor Coprocessor.
4943 UINT32 EM:1; ///< Emulation.
4944 UINT32 TS:1; ///< Task Switched.
4945 UINT32 ET:1; ///< Extension Type.
4946 UINT32 NE:1; ///< Numeric Error.
4947 UINT32 Reserved_0:10; ///< Reserved.
4948 UINT32 WP:1; ///< Write Protect.
4949 UINT32 Reserved_1:1; ///< Reserved.
4950 UINT32 AM:1; ///< Alignment Mask.
4951 UINT32 Reserved_2:10; ///< Reserved.
4952 UINT32 NW:1; ///< Mot Write-through.
4953 UINT32 CD:1; ///< Cache Disable.
4954 UINT32 PG:1; ///< Paging.
4955 } Bits;
4956 UINTN UintN;
4957 } IA32_CR0;
4958
4959 ///
4960 /// Byte packed structure for Control Register 4 (CR4).
4961 /// 32-bits on IA-32.
4962 /// 64-bits on x64. The upper 32-bits on x64 are reserved.
4963 ///
4964 typedef union {
4965 struct {
4966 UINT32 VME:1; ///< Virtual-8086 Mode Extensions.
4967 UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.
4968 UINT32 TSD:1; ///< Time Stamp Disable.
4969 UINT32 DE:1; ///< Debugging Extensions.
4970 UINT32 PSE:1; ///< Page Size Extensions.
4971 UINT32 PAE:1; ///< Physical Address Extension.
4972 UINT32 MCE:1; ///< Machine Check Enable.
4973 UINT32 PGE:1; ///< Page Global Enable.
4974 UINT32 PCE:1; ///< Performance Monitoring Counter
4975 ///< Enable.
4976 UINT32 OSFXSR:1; ///< Operating System Support for
4977 ///< FXSAVE and FXRSTOR instructions
4978 UINT32 OSXMMEXCPT:1; ///< Operating System Support for
4979 ///< Unmasked SIMD Floating Point
4980 ///< Exceptions.
4981 UINT32 Reserved_0:2; ///< Reserved.
4982 UINT32 VMXE:1; ///< VMX Enable
4983 UINT32 Reserved_1:18; ///< Reserved.
4984 } Bits;
4985 UINTN UintN;
4986 } IA32_CR4;
4987
4988 ///
4989 /// Byte packed structure for a segment descriptor in a GDT/LDT.
4990 ///
4991 typedef union {
4992 struct {
4993 UINT32 LimitLow:16;
4994 UINT32 BaseLow:16;
4995 UINT32 BaseMid:8;
4996 UINT32 Type:4;
4997 UINT32 S:1;
4998 UINT32 DPL:2;
4999 UINT32 P:1;
5000 UINT32 LimitHigh:4;
5001 UINT32 AVL:1;
5002 UINT32 L:1;
5003 UINT32 DB:1;
5004 UINT32 G:1;
5005 UINT32 BaseHigh:8;
5006 } Bits;
5007 UINT64 Uint64;
5008 } IA32_SEGMENT_DESCRIPTOR;
5009
5010 ///
5011 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor.
5012 ///
5013 #pragma pack (1)
5014 typedef struct {
5015 UINT16 Limit;
5016 UINTN Base;
5017 } IA32_DESCRIPTOR;
5018 #pragma pack ()
5019
5020 #define IA32_IDT_GATE_TYPE_TASK 0x85
5021 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
5022 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
5023 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
5024 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
5025
5026
5027 #if defined (MDE_CPU_IA32)
5028 ///
5029 /// Byte packed structure for an IA-32 Interrupt Gate Descriptor.
5030 ///
5031 typedef union {
5032 struct {
5033 UINT32 OffsetLow:16; ///< Offset bits 15..0.
5034 UINT32 Selector:16; ///< Selector.
5035 UINT32 Reserved_0:8; ///< Reserved.
5036 UINT32 GateType:8; ///< Gate Type. See #defines above.
5037 UINT32 OffsetHigh:16; ///< Offset bits 31..16.
5038 } Bits;
5039 UINT64 Uint64;
5040 } IA32_IDT_GATE_DESCRIPTOR;
5041
5042 #endif
5043
5044 #if defined (MDE_CPU_X64)
5045 ///
5046 /// Byte packed structure for an x64 Interrupt Gate Descriptor.
5047 ///
5048 typedef union {
5049 struct {
5050 UINT32 OffsetLow:16; ///< Offset bits 15..0.
5051 UINT32 Selector:16; ///< Selector.
5052 UINT32 Reserved_0:8; ///< Reserved.
5053 UINT32 GateType:8; ///< Gate Type. See #defines above.
5054 UINT32 OffsetHigh:16; ///< Offset bits 31..16.
5055 UINT32 OffsetUpper:32; ///< Offset bits 63..32.
5056 UINT32 Reserved_1:32; ///< Reserved.
5057 } Bits;
5058 struct {
5059 UINT64 Uint64;
5060 UINT64 Uint64_1;
5061 } Uint128;
5062 } IA32_IDT_GATE_DESCRIPTOR;
5063
5064 #endif
5065
5066 ///
5067 /// Byte packed structure for an FP/SSE/SSE2 context.
5068 ///
5069 typedef struct {
5070 UINT8 Buffer[512];
5071 } IA32_FX_BUFFER;
5072
5073 ///
5074 /// Structures for the 16-bit real mode thunks.
5075 ///
5076 typedef struct {
5077 UINT32 Reserved1;
5078 UINT32 Reserved2;
5079 UINT32 Reserved3;
5080 UINT32 Reserved4;
5081 UINT8 BL;
5082 UINT8 BH;
5083 UINT16 Reserved5;
5084 UINT8 DL;
5085 UINT8 DH;
5086 UINT16 Reserved6;
5087 UINT8 CL;
5088 UINT8 CH;
5089 UINT16 Reserved7;
5090 UINT8 AL;
5091 UINT8 AH;
5092 UINT16 Reserved8;
5093 } IA32_BYTE_REGS;
5094
5095 typedef struct {
5096 UINT16 DI;
5097 UINT16 Reserved1;
5098 UINT16 SI;
5099 UINT16 Reserved2;
5100 UINT16 BP;
5101 UINT16 Reserved3;
5102 UINT16 SP;
5103 UINT16 Reserved4;
5104 UINT16 BX;
5105 UINT16 Reserved5;
5106 UINT16 DX;
5107 UINT16 Reserved6;
5108 UINT16 CX;
5109 UINT16 Reserved7;
5110 UINT16 AX;
5111 UINT16 Reserved8;
5112 } IA32_WORD_REGS;
5113
5114 typedef struct {
5115 UINT32 EDI;
5116 UINT32 ESI;
5117 UINT32 EBP;
5118 UINT32 ESP;
5119 UINT32 EBX;
5120 UINT32 EDX;
5121 UINT32 ECX;
5122 UINT32 EAX;
5123 UINT16 DS;
5124 UINT16 ES;
5125 UINT16 FS;
5126 UINT16 GS;
5127 IA32_EFLAGS32 EFLAGS;
5128 UINT32 Eip;
5129 UINT16 CS;
5130 UINT16 SS;
5131 } IA32_DWORD_REGS;
5132
5133 typedef union {
5134 IA32_DWORD_REGS E;
5135 IA32_WORD_REGS X;
5136 IA32_BYTE_REGS H;
5137 } IA32_REGISTER_SET;
5138
5139 ///
5140 /// Byte packed structure for an 16-bit real mode thunks.
5141 ///
5142 typedef struct {
5143 IA32_REGISTER_SET *RealModeState;
5144 VOID *RealModeBuffer;
5145 UINT32 RealModeBufferSize;
5146 UINT32 ThunkAttributes;
5147 } THUNK_CONTEXT;
5148
5149 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5150 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5151 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5152
5153 /**
5154 Retrieves CPUID information.
5155
5156 Executes the CPUID instruction with EAX set to the value specified by Index.
5157 This function always returns Index.
5158 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5159 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5160 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5161 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5162 This function is only available on IA-32 and x64.
5163
5164 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5165 instruction.
5166 @param Eax The pointer to the 32-bit EAX value returned by the CPUID
5167 instruction. This is an optional parameter that may be NULL.
5168 @param Ebx The pointer to the 32-bit EBX value returned by the CPUID
5169 instruction. This is an optional parameter that may be NULL.
5170 @param Ecx The pointer to the 32-bit ECX value returned by the CPUID
5171 instruction. This is an optional parameter that may be NULL.
5172 @param Edx The pointer to the 32-bit EDX value returned by the CPUID
5173 instruction. This is an optional parameter that may be NULL.
5174
5175 @return Index.
5176
5177 **/
5178 UINT32
5179 EFIAPI
5180 AsmCpuid (
5181 IN UINT32 Index,
5182 OUT UINT32 *Eax, OPTIONAL
5183 OUT UINT32 *Ebx, OPTIONAL
5184 OUT UINT32 *Ecx, OPTIONAL
5185 OUT UINT32 *Edx OPTIONAL
5186 );
5187
5188
5189 /**
5190 Retrieves CPUID information using an extended leaf identifier.
5191
5192 Executes the CPUID instruction with EAX set to the value specified by Index
5193 and ECX set to the value specified by SubIndex. This function always returns
5194 Index. This function is only available on IA-32 and x64.
5195
5196 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5197 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5198 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5199 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5200
5201 @param Index The 32-bit value to load into EAX prior to invoking the
5202 CPUID instruction.
5203 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5204 CPUID instruction.
5205 @param Eax The pointer to the 32-bit EAX value returned by the CPUID
5206 instruction. This is an optional parameter that may be
5207 NULL.
5208 @param Ebx The pointer to the 32-bit EBX value returned by the CPUID
5209 instruction. This is an optional parameter that may be
5210 NULL.
5211 @param Ecx The pointer to the 32-bit ECX value returned by the CPUID
5212 instruction. This is an optional parameter that may be
5213 NULL.
5214 @param Edx The pointer to the 32-bit EDX value returned by the CPUID
5215 instruction. This is an optional parameter that may be
5216 NULL.
5217
5218 @return Index.
5219
5220 **/
5221 UINT32
5222 EFIAPI
5223 AsmCpuidEx (
5224 IN UINT32 Index,
5225 IN UINT32 SubIndex,
5226 OUT UINT32 *Eax, OPTIONAL
5227 OUT UINT32 *Ebx, OPTIONAL
5228 OUT UINT32 *Ecx, OPTIONAL
5229 OUT UINT32 *Edx OPTIONAL
5230 );
5231
5232
5233 /**
5234 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5235
5236 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5237 and executing a WBINVD instruction. This function is only available on IA-32 and x64.
5238
5239 **/
5240 VOID
5241 EFIAPI
5242 AsmDisableCache (
5243 VOID
5244 );
5245
5246
5247 /**
5248 Perform a WBINVD and clear both the CD and NW bits of CR0.
5249
5250 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5251 bits of CR0 to 0. This function is only available on IA-32 and x64.
5252
5253 **/
5254 VOID
5255 EFIAPI
5256 AsmEnableCache (
5257 VOID
5258 );
5259
5260
5261 /**
5262 Returns the lower 32-bits of a Machine Specific Register(MSR).
5263
5264 Reads and returns the lower 32-bits of the MSR specified by Index.
5265 No parameter checking is performed on Index, and some Index values may cause
5266 CPU exceptions. The caller must either guarantee that Index is valid, or the
5267 caller must set up exception handlers to catch the exceptions. This function
5268 is only available on IA-32 and x64.
5269
5270 @param Index The 32-bit MSR index to read.
5271
5272 @return The lower 32 bits of the MSR identified by Index.
5273
5274 **/
5275 UINT32
5276 EFIAPI
5277 AsmReadMsr32 (
5278 IN UINT32 Index
5279 );
5280
5281
5282 /**
5283 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5284 The upper 32-bits of the MSR are set to zero.
5285
5286 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5287 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5288 the MSR is returned. No parameter checking is performed on Index or Value,
5289 and some of these may cause CPU exceptions. The caller must either guarantee
5290 that Index and Value are valid, or the caller must establish proper exception
5291 handlers. This function is only available on IA-32 and x64.
5292
5293 @param Index The 32-bit MSR index to write.
5294 @param Value The 32-bit value to write to the MSR.
5295
5296 @return Value
5297
5298 **/
5299 UINT32
5300 EFIAPI
5301 AsmWriteMsr32 (
5302 IN UINT32 Index,
5303 IN UINT32 Value
5304 );
5305
5306
5307 /**
5308 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
5309 writes the result back to the 64-bit MSR.
5310
5311 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5312 between the lower 32-bits of the read result and the value specified by
5313 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5314 32-bits of the value written to the MSR is returned. No parameter checking is
5315 performed on Index or OrData, and some of these may cause CPU exceptions. The
5316 caller must either guarantee that Index and OrData are valid, or the caller
5317 must establish proper exception handlers. This function is only available on
5318 IA-32 and x64.
5319
5320 @param Index The 32-bit MSR index to write.
5321 @param OrData The value to OR with the read value from the MSR.
5322
5323 @return The lower 32-bit value written to the MSR.
5324
5325 **/
5326 UINT32
5327 EFIAPI
5328 AsmMsrOr32 (
5329 IN UINT32 Index,
5330 IN UINT32 OrData
5331 );
5332
5333
5334 /**
5335 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5336 the result back to the 64-bit MSR.
5337
5338 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5339 lower 32-bits of the read result and the value specified by AndData, and
5340 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5341 the value written to the MSR is returned. No parameter checking is performed
5342 on Index or AndData, and some of these may cause CPU exceptions. The caller
5343 must either guarantee that Index and AndData are valid, or the caller must
5344 establish proper exception handlers. This function is only available on IA-32
5345 and x64.
5346
5347 @param Index The 32-bit MSR index to write.
5348 @param AndData The value to AND with the read value from the MSR.
5349
5350 @return The lower 32-bit value written to the MSR.
5351
5352 **/
5353 UINT32
5354 EFIAPI
5355 AsmMsrAnd32 (
5356 IN UINT32 Index,
5357 IN UINT32 AndData
5358 );
5359
5360
5361 /**
5362 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
5363 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5364
5365 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5366 lower 32-bits of the read result and the value specified by AndData
5367 preserving the upper 32-bits, performs a bitwise OR between the
5368 result of the AND operation and the value specified by OrData, and writes the
5369 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5370 written to the MSR is returned. No parameter checking is performed on Index,
5371 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5372 must either guarantee that Index, AndData, and OrData are valid, or the
5373 caller must establish proper exception handlers. This function is only
5374 available on IA-32 and x64.
5375
5376 @param Index The 32-bit MSR index to write.
5377 @param AndData The value to AND with the read value from the MSR.
5378 @param OrData The value to OR with the result of the AND operation.
5379
5380 @return The lower 32-bit value written to the MSR.
5381
5382 **/
5383 UINT32
5384 EFIAPI
5385 AsmMsrAndThenOr32 (
5386 IN UINT32 Index,
5387 IN UINT32 AndData,
5388 IN UINT32 OrData
5389 );
5390
5391
5392 /**
5393 Reads a bit field of an MSR.
5394
5395 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5396 specified by the StartBit and the EndBit. The value of the bit field is
5397 returned. The caller must either guarantee that Index is valid, or the caller
5398 must set up exception handlers to catch the exceptions. This function is only
5399 available on IA-32 and x64.
5400
5401 If StartBit is greater than 31, then ASSERT().
5402 If EndBit is greater than 31, then ASSERT().
5403 If EndBit is less than StartBit, then ASSERT().
5404
5405 @param Index The 32-bit MSR index to read.
5406 @param StartBit The ordinal of the least significant bit in the bit field.
5407 Range 0..31.
5408 @param EndBit The ordinal of the most significant bit in the bit field.
5409 Range 0..31.
5410
5411 @return The bit field read from the MSR.
5412
5413 **/
5414 UINT32
5415 EFIAPI
5416 AsmMsrBitFieldRead32 (
5417 IN UINT32 Index,
5418 IN UINTN StartBit,
5419 IN UINTN EndBit
5420 );
5421
5422
5423 /**
5424 Writes a bit field to an MSR.
5425
5426 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5427 field is specified by the StartBit and the EndBit. All other bits in the
5428 destination MSR are preserved. The lower 32-bits of the MSR written is
5429 returned. The caller must either guarantee that Index and the data written
5430 is valid, or the caller must set up exception handlers to catch the exceptions.
5431 This function is only available on IA-32 and x64.
5432
5433 If StartBit is greater than 31, then ASSERT().
5434 If EndBit is greater than 31, then ASSERT().
5435 If EndBit is less than StartBit, then ASSERT().
5436 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5437
5438 @param Index The 32-bit MSR index to write.
5439 @param StartBit The ordinal of the least significant bit in the bit field.
5440 Range 0..31.
5441 @param EndBit The ordinal of the most significant bit in the bit field.
5442 Range 0..31.
5443 @param Value New value of the bit field.
5444
5445 @return The lower 32-bit of the value written to the MSR.
5446
5447 **/
5448 UINT32
5449 EFIAPI
5450 AsmMsrBitFieldWrite32 (
5451 IN UINT32 Index,
5452 IN UINTN StartBit,
5453 IN UINTN EndBit,
5454 IN UINT32 Value
5455 );
5456
5457
5458 /**
5459 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5460 result back to the bit field in the 64-bit MSR.
5461
5462 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5463 between the read result and the value specified by OrData, and writes the
5464 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5465 written to the MSR are returned. Extra left bits in OrData are stripped. The
5466 caller must either guarantee that Index and the data written is valid, or
5467 the caller must set up exception handlers to catch the exceptions. This
5468 function is only available on IA-32 and x64.
5469
5470 If StartBit is greater than 31, then ASSERT().
5471 If EndBit is greater than 31, then ASSERT().
5472 If EndBit is less than StartBit, then ASSERT().
5473 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5474
5475 @param Index The 32-bit MSR index to write.
5476 @param StartBit The ordinal of the least significant bit in the bit field.
5477 Range 0..31.
5478 @param EndBit The ordinal of the most significant bit in the bit field.
5479 Range 0..31.
5480 @param OrData The value to OR with the read value from the MSR.
5481
5482 @return The lower 32-bit of the value written to the MSR.
5483
5484 **/
5485 UINT32
5486 EFIAPI
5487 AsmMsrBitFieldOr32 (
5488 IN UINT32 Index,
5489 IN UINTN StartBit,
5490 IN UINTN EndBit,
5491 IN UINT32 OrData
5492 );
5493
5494
5495 /**
5496 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5497 result back to the bit field in the 64-bit MSR.
5498
5499 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5500 read result and the value specified by AndData, and writes the result to the
5501 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5502 MSR are returned. Extra left bits in AndData are stripped. The caller must
5503 either guarantee that Index and the data written is valid, or the caller must
5504 set up exception handlers to catch the exceptions. This function is only
5505 available on IA-32 and x64.
5506
5507 If StartBit is greater than 31, then ASSERT().
5508 If EndBit is greater than 31, then ASSERT().
5509 If EndBit is less than StartBit, then ASSERT().
5510 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5511
5512 @param Index The 32-bit MSR index to write.
5513 @param StartBit The ordinal of the least significant bit in the bit field.
5514 Range 0..31.
5515 @param EndBit The ordinal of the most significant bit in the bit field.
5516 Range 0..31.
5517 @param AndData The value to AND with the read value from the MSR.
5518
5519 @return The lower 32-bit of the value written to the MSR.
5520
5521 **/
5522 UINT32
5523 EFIAPI
5524 AsmMsrBitFieldAnd32 (
5525 IN UINT32 Index,
5526 IN UINTN StartBit,
5527 IN UINTN EndBit,
5528 IN UINT32 AndData
5529 );
5530
5531
5532 /**
5533 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5534 bitwise OR, and writes the result back to the bit field in the
5535 64-bit MSR.
5536
5537 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5538 bitwise OR between the read result and the value specified by
5539 AndData, and writes the result to the 64-bit MSR specified by Index. The
5540 lower 32-bits of the value written to the MSR are returned. Extra left bits
5541 in both AndData and OrData are stripped. The caller must either guarantee
5542 that Index and the data written is valid, or the caller must set up exception
5543 handlers to catch the exceptions. This function is only available on IA-32
5544 and x64.
5545
5546 If StartBit is greater than 31, then ASSERT().
5547 If EndBit is greater than 31, then ASSERT().
5548 If EndBit is less than StartBit, then ASSERT().
5549 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5550 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5551
5552 @param Index The 32-bit MSR index to write.
5553 @param StartBit The ordinal of the least significant bit in the bit field.
5554 Range 0..31.
5555 @param EndBit The ordinal of the most significant bit in the bit field.
5556 Range 0..31.
5557 @param AndData The value to AND with the read value from the MSR.
5558 @param OrData The value to OR with the result of the AND operation.
5559
5560 @return The lower 32-bit of the value written to the MSR.
5561
5562 **/
5563 UINT32
5564 EFIAPI
5565 AsmMsrBitFieldAndThenOr32 (
5566 IN UINT32 Index,
5567 IN UINTN StartBit,
5568 IN UINTN EndBit,
5569 IN UINT32 AndData,
5570 IN UINT32 OrData
5571 );
5572
5573
5574 /**
5575 Returns a 64-bit Machine Specific Register(MSR).
5576
5577 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5578 performed on Index, and some Index values may cause CPU exceptions. The
5579 caller must either guarantee that Index is valid, or the caller must set up
5580 exception handlers to catch the exceptions. This function is only available
5581 on IA-32 and x64.
5582
5583 @param Index The 32-bit MSR index to read.
5584
5585 @return The value of the MSR identified by Index.
5586
5587 **/
5588 UINT64
5589 EFIAPI
5590 AsmReadMsr64 (
5591 IN UINT32 Index
5592 );
5593
5594
5595 /**
5596 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5597 value.
5598
5599 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5600 64-bit value written to the MSR is returned. No parameter checking is
5601 performed on Index or Value, and some of these may cause CPU exceptions. The
5602 caller must either guarantee that Index and Value are valid, or the caller
5603 must establish proper exception handlers. This function is only available on
5604 IA-32 and x64.
5605
5606 @param Index The 32-bit MSR index to write.
5607 @param Value The 64-bit value to write to the MSR.
5608
5609 @return Value
5610
5611 **/
5612 UINT64
5613 EFIAPI
5614 AsmWriteMsr64 (
5615 IN UINT32 Index,
5616 IN UINT64 Value
5617 );
5618
5619
5620 /**
5621 Reads a 64-bit MSR, performs a bitwise OR, and writes the result
5622 back to the 64-bit MSR.
5623
5624 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5625 between the read result and the value specified by OrData, and writes the
5626 result to the 64-bit MSR specified by Index. The value written to the MSR is
5627 returned. No parameter checking is performed on Index or OrData, and some of
5628 these may cause CPU exceptions. The caller must either guarantee that Index
5629 and OrData are valid, or the caller must establish proper exception handlers.
5630 This function is only available on IA-32 and x64.
5631
5632 @param Index The 32-bit MSR index to write.
5633 @param OrData The value to OR with the read value from the MSR.
5634
5635 @return The value written back to the MSR.
5636
5637 **/
5638 UINT64
5639 EFIAPI
5640 AsmMsrOr64 (
5641 IN UINT32 Index,
5642 IN UINT64 OrData
5643 );
5644
5645
5646 /**
5647 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5648 64-bit MSR.
5649
5650 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5651 read result and the value specified by OrData, and writes the result to the
5652 64-bit MSR specified by Index. The value written to the MSR is returned. No
5653 parameter checking is performed on Index or OrData, and some of these may
5654 cause CPU exceptions. The caller must either guarantee that Index and OrData
5655 are valid, or the caller must establish proper exception handlers. This
5656 function is only available on IA-32 and x64.
5657
5658 @param Index The 32-bit MSR index to write.
5659 @param AndData The value to AND with the read value from the MSR.
5660
5661 @return The value written back to the MSR.
5662
5663 **/
5664 UINT64
5665 EFIAPI
5666 AsmMsrAnd64 (
5667 IN UINT32 Index,
5668 IN UINT64 AndData
5669 );
5670
5671
5672 /**
5673 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
5674 OR, and writes the result back to the 64-bit MSR.
5675
5676 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5677 result and the value specified by AndData, performs a bitwise OR
5678 between the result of the AND operation and the value specified by OrData,
5679 and writes the result to the 64-bit MSR specified by Index. The value written
5680 to the MSR is returned. No parameter checking is performed on Index, AndData,
5681 or OrData, and some of these may cause CPU exceptions. The caller must either
5682 guarantee that Index, AndData, and OrData are valid, or the caller must
5683 establish proper exception handlers. This function is only available on IA-32
5684 and x64.
5685
5686 @param Index The 32-bit MSR index to write.
5687 @param AndData The value to AND with the read value from the MSR.
5688 @param OrData The value to OR with the result of the AND operation.
5689
5690 @return The value written back to the MSR.
5691
5692 **/
5693 UINT64
5694 EFIAPI
5695 AsmMsrAndThenOr64 (
5696 IN UINT32 Index,
5697 IN UINT64 AndData,
5698 IN UINT64 OrData
5699 );
5700
5701
5702 /**
5703 Reads a bit field of an MSR.
5704
5705 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5706 StartBit and the EndBit. The value of the bit field is returned. The caller
5707 must either guarantee that Index is valid, or the caller must set up
5708 exception handlers to catch the exceptions. This function is only available
5709 on IA-32 and x64.
5710
5711 If StartBit is greater than 63, then ASSERT().
5712 If EndBit is greater than 63, then ASSERT().
5713 If EndBit is less than StartBit, then ASSERT().
5714
5715 @param Index The 32-bit MSR index to read.
5716 @param StartBit The ordinal of the least significant bit in the bit field.
5717 Range 0..63.
5718 @param EndBit The ordinal of the most significant bit in the bit field.
5719 Range 0..63.
5720
5721 @return The value read from the MSR.
5722
5723 **/
5724 UINT64
5725 EFIAPI
5726 AsmMsrBitFieldRead64 (
5727 IN UINT32 Index,
5728 IN UINTN StartBit,
5729 IN UINTN EndBit
5730 );
5731
5732
5733 /**
5734 Writes a bit field to an MSR.
5735
5736 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5737 the StartBit and the EndBit. All other bits in the destination MSR are
5738 preserved. The MSR written is returned. The caller must either guarantee
5739 that Index and the data written is valid, or the caller must set up exception
5740 handlers to catch the exceptions. This function is only available on IA-32 and x64.
5741
5742 If StartBit is greater than 63, then ASSERT().
5743 If EndBit is greater than 63, then ASSERT().
5744 If EndBit is less than StartBit, then ASSERT().
5745 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5746
5747 @param Index The 32-bit MSR index to write.
5748 @param StartBit The ordinal of the least significant bit in the bit field.
5749 Range 0..63.
5750 @param EndBit The ordinal of the most significant bit in the bit field.
5751 Range 0..63.
5752 @param Value New value of the bit field.
5753
5754 @return The value written back to the MSR.
5755
5756 **/
5757 UINT64
5758 EFIAPI
5759 AsmMsrBitFieldWrite64 (
5760 IN UINT32 Index,
5761 IN UINTN StartBit,
5762 IN UINTN EndBit,
5763 IN UINT64 Value
5764 );
5765
5766
5767 /**
5768 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
5769 writes the result back to the bit field in the 64-bit MSR.
5770
5771 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5772 between the read result and the value specified by OrData, and writes the
5773 result to the 64-bit MSR specified by Index. The value written to the MSR is
5774 returned. Extra left bits in OrData are stripped. The caller must either
5775 guarantee that Index and the data written is valid, or the caller must set up
5776 exception handlers to catch the exceptions. This function is only available
5777 on IA-32 and x64.
5778
5779 If StartBit is greater than 63, then ASSERT().
5780 If EndBit is greater than 63, then ASSERT().
5781 If EndBit is less than StartBit, then ASSERT().
5782 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5783
5784 @param Index The 32-bit MSR index to write.
5785 @param StartBit The ordinal of the least significant bit in the bit field.
5786 Range 0..63.
5787 @param EndBit The ordinal of the most significant bit in the bit field.
5788 Range 0..63.
5789 @param OrData The value to OR with the read value from the bit field.
5790
5791 @return The value written back to the MSR.
5792
5793 **/
5794 UINT64
5795 EFIAPI
5796 AsmMsrBitFieldOr64 (
5797 IN UINT32 Index,
5798 IN UINTN StartBit,
5799 IN UINTN EndBit,
5800 IN UINT64 OrData
5801 );
5802
5803
5804 /**
5805 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5806 result back to the bit field in the 64-bit MSR.
5807
5808 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5809 read result and the value specified by AndData, and writes the result to the
5810 64-bit MSR specified by Index. The value written to the MSR is returned.
5811 Extra left bits in AndData are stripped. The caller must either guarantee
5812 that Index and the data written is valid, or the caller must set up exception
5813 handlers to catch the exceptions. This function is only available on IA-32
5814 and x64.
5815
5816 If StartBit is greater than 63, then ASSERT().
5817 If EndBit is greater than 63, then ASSERT().
5818 If EndBit is less than StartBit, then ASSERT().
5819 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5820
5821 @param Index The 32-bit MSR index to write.
5822 @param StartBit The ordinal of the least significant bit in the bit field.
5823 Range 0..63.
5824 @param EndBit The ordinal of the most significant bit in the bit field.
5825 Range 0..63.
5826 @param AndData The value to AND with the read value from the bit field.
5827
5828 @return The value written back to the MSR.
5829
5830 **/
5831 UINT64
5832 EFIAPI
5833 AsmMsrBitFieldAnd64 (
5834 IN UINT32 Index,
5835 IN UINTN StartBit,
5836 IN UINTN EndBit,
5837 IN UINT64 AndData
5838 );
5839
5840
5841 /**
5842 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5843 bitwise OR, and writes the result back to the bit field in the
5844 64-bit MSR.
5845
5846 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5847 a bitwise OR between the read result and the value specified by
5848 AndData, and writes the result to the 64-bit MSR specified by Index. The
5849 value written to the MSR is returned. Extra left bits in both AndData and
5850 OrData are stripped. The caller must either guarantee that Index and the data
5851 written is valid, or the caller must set up exception handlers to catch the
5852 exceptions. This function is only available on IA-32 and x64.
5853
5854 If StartBit is greater than 63, then ASSERT().
5855 If EndBit is greater than 63, then ASSERT().
5856 If EndBit is less than StartBit, then ASSERT().
5857 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5858 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5859
5860 @param Index The 32-bit MSR index to write.
5861 @param StartBit The ordinal of the least significant bit in the bit field.
5862 Range 0..63.
5863 @param EndBit The ordinal of the most significant bit in the bit field.
5864 Range 0..63.
5865 @param AndData The value to AND with the read value from the bit field.
5866 @param OrData The value to OR with the result of the AND operation.
5867
5868 @return The value written back to the MSR.
5869
5870 **/
5871 UINT64
5872 EFIAPI
5873 AsmMsrBitFieldAndThenOr64 (
5874 IN UINT32 Index,
5875 IN UINTN StartBit,
5876 IN UINTN EndBit,
5877 IN UINT64 AndData,
5878 IN UINT64 OrData
5879 );
5880
5881
5882 /**
5883 Reads the current value of the EFLAGS register.
5884
5885 Reads and returns the current value of the EFLAGS register. This function is
5886 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
5887 64-bit value on x64.
5888
5889 @return EFLAGS on IA-32 or RFLAGS on x64.
5890
5891 **/
5892 UINTN
5893 EFIAPI
5894 AsmReadEflags (
5895 VOID
5896 );
5897
5898
5899 /**
5900 Reads the current value of the Control Register 0 (CR0).
5901
5902 Reads and returns the current value of CR0. This function is only available
5903 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5904 x64.
5905
5906 @return The value of the Control Register 0 (CR0).
5907
5908 **/
5909 UINTN
5910 EFIAPI
5911 AsmReadCr0 (
5912 VOID
5913 );
5914
5915
5916 /**
5917 Reads the current value of the Control Register 2 (CR2).
5918
5919 Reads and returns the current value of CR2. This function is only available
5920 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5921 x64.
5922
5923 @return The value of the Control Register 2 (CR2).
5924
5925 **/
5926 UINTN
5927 EFIAPI
5928 AsmReadCr2 (
5929 VOID
5930 );
5931
5932
5933 /**
5934 Reads the current value of the Control Register 3 (CR3).
5935
5936 Reads and returns the current value of CR3. This function is only available
5937 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5938 x64.
5939
5940 @return The value of the Control Register 3 (CR3).
5941
5942 **/
5943 UINTN
5944 EFIAPI
5945 AsmReadCr3 (
5946 VOID
5947 );
5948
5949
5950 /**
5951 Reads the current value of the Control Register 4 (CR4).
5952
5953 Reads and returns the current value of CR4. This function is only available
5954 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5955 x64.
5956
5957 @return The value of the Control Register 4 (CR4).
5958
5959 **/
5960 UINTN
5961 EFIAPI
5962 AsmReadCr4 (
5963 VOID
5964 );
5965
5966
5967 /**
5968 Writes a value to Control Register 0 (CR0).
5969
5970 Writes and returns a new value to CR0. This function is only available on
5971 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5972
5973 @param Cr0 The value to write to CR0.
5974
5975 @return The value written to CR0.
5976
5977 **/
5978 UINTN
5979 EFIAPI
5980 AsmWriteCr0 (
5981 UINTN Cr0
5982 );
5983
5984
5985 /**
5986 Writes a value to Control Register 2 (CR2).
5987
5988 Writes and returns a new value to CR2. This function is only available on
5989 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5990
5991 @param Cr2 The value to write to CR2.
5992
5993 @return The value written to CR2.
5994
5995 **/
5996 UINTN
5997 EFIAPI
5998 AsmWriteCr2 (
5999 UINTN Cr2
6000 );
6001
6002
6003 /**
6004 Writes a value to Control Register 3 (CR3).
6005
6006 Writes and returns a new value to CR3. This function is only available on
6007 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6008
6009 @param Cr3 The value to write to CR3.
6010
6011 @return The value written to CR3.
6012
6013 **/
6014 UINTN
6015 EFIAPI
6016 AsmWriteCr3 (
6017 UINTN Cr3
6018 );
6019
6020
6021 /**
6022 Writes a value to Control Register 4 (CR4).
6023
6024 Writes and returns a new value to CR4. This function is only available on
6025 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6026
6027 @param Cr4 The value to write to CR4.
6028
6029 @return The value written to CR4.
6030
6031 **/
6032 UINTN
6033 EFIAPI
6034 AsmWriteCr4 (
6035 UINTN Cr4
6036 );
6037
6038
6039 /**
6040 Reads the current value of Debug Register 0 (DR0).
6041
6042 Reads and returns the current value of DR0. This function is only available
6043 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6044 x64.
6045
6046 @return The value of Debug Register 0 (DR0).
6047
6048 **/
6049 UINTN
6050 EFIAPI
6051 AsmReadDr0 (
6052 VOID
6053 );
6054
6055
6056 /**
6057 Reads the current value of Debug Register 1 (DR1).
6058
6059 Reads and returns the current value of DR1. This function is only available
6060 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6061 x64.
6062
6063 @return The value of Debug Register 1 (DR1).
6064
6065 **/
6066 UINTN
6067 EFIAPI
6068 AsmReadDr1 (
6069 VOID
6070 );
6071
6072
6073 /**
6074 Reads the current value of Debug Register 2 (DR2).
6075
6076 Reads and returns the current value of DR2. This function is only available
6077 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6078 x64.
6079
6080 @return The value of Debug Register 2 (DR2).
6081
6082 **/
6083 UINTN
6084 EFIAPI
6085 AsmReadDr2 (
6086 VOID
6087 );
6088
6089
6090 /**
6091 Reads the current value of Debug Register 3 (DR3).
6092
6093 Reads and returns the current value of DR3. This function is only available
6094 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6095 x64.
6096
6097 @return The value of Debug Register 3 (DR3).
6098
6099 **/
6100 UINTN
6101 EFIAPI
6102 AsmReadDr3 (
6103 VOID
6104 );
6105
6106
6107 /**
6108 Reads the current value of Debug Register 4 (DR4).
6109
6110 Reads and returns the current value of DR4. This function is only available
6111 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6112 x64.
6113
6114 @return The value of Debug Register 4 (DR4).
6115
6116 **/
6117 UINTN
6118 EFIAPI
6119 AsmReadDr4 (
6120 VOID
6121 );
6122
6123
6124 /**
6125 Reads the current value of Debug Register 5 (DR5).
6126
6127 Reads and returns the current value of DR5. This function is only available
6128 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6129 x64.
6130
6131 @return The value of Debug Register 5 (DR5).
6132
6133 **/
6134 UINTN
6135 EFIAPI
6136 AsmReadDr5 (
6137 VOID
6138 );
6139
6140
6141 /**
6142 Reads the current value of Debug Register 6 (DR6).
6143
6144 Reads and returns the current value of DR6. This function is only available
6145 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6146 x64.
6147
6148 @return The value of Debug Register 6 (DR6).
6149
6150 **/
6151 UINTN
6152 EFIAPI
6153 AsmReadDr6 (
6154 VOID
6155 );
6156
6157
6158 /**
6159 Reads the current value of Debug Register 7 (DR7).
6160
6161 Reads and returns the current value of DR7. This function is only available
6162 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6163 x64.
6164
6165 @return The value of Debug Register 7 (DR7).
6166
6167 **/
6168 UINTN
6169 EFIAPI
6170 AsmReadDr7 (
6171 VOID
6172 );
6173
6174
6175 /**
6176 Writes a value to Debug Register 0 (DR0).
6177
6178 Writes and returns a new value to DR0. This function is only available on
6179 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6180
6181 @param Dr0 The value to write to Dr0.
6182
6183 @return The value written to Debug Register 0 (DR0).
6184
6185 **/
6186 UINTN
6187 EFIAPI
6188 AsmWriteDr0 (
6189 UINTN Dr0
6190 );
6191
6192
6193 /**
6194 Writes a value to Debug Register 1 (DR1).
6195
6196 Writes and returns a new value to DR1. This function is only available on
6197 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6198
6199 @param Dr1 The value to write to Dr1.
6200
6201 @return The value written to Debug Register 1 (DR1).
6202
6203 **/
6204 UINTN
6205 EFIAPI
6206 AsmWriteDr1 (
6207 UINTN Dr1
6208 );
6209
6210
6211 /**
6212 Writes a value to Debug Register 2 (DR2).
6213
6214 Writes and returns a new value to DR2. This function is only available on
6215 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6216
6217 @param Dr2 The value to write to Dr2.
6218
6219 @return The value written to Debug Register 2 (DR2).
6220
6221 **/
6222 UINTN
6223 EFIAPI
6224 AsmWriteDr2 (
6225 UINTN Dr2
6226 );
6227
6228
6229 /**
6230 Writes a value to Debug Register 3 (DR3).
6231
6232 Writes and returns a new value to DR3. This function is only available on
6233 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6234
6235 @param Dr3 The value to write to Dr3.
6236
6237 @return The value written to Debug Register 3 (DR3).
6238
6239 **/
6240 UINTN
6241 EFIAPI
6242 AsmWriteDr3 (
6243 UINTN Dr3
6244 );
6245
6246
6247 /**
6248 Writes a value to Debug Register 4 (DR4).
6249
6250 Writes and returns a new value to DR4. This function is only available on
6251 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6252
6253 @param Dr4 The value to write to Dr4.
6254
6255 @return The value written to Debug Register 4 (DR4).
6256
6257 **/
6258 UINTN
6259 EFIAPI
6260 AsmWriteDr4 (
6261 UINTN Dr4
6262 );
6263
6264
6265 /**
6266 Writes a value to Debug Register 5 (DR5).
6267
6268 Writes and returns a new value to DR5. This function is only available on
6269 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6270
6271 @param Dr5 The value to write to Dr5.
6272
6273 @return The value written to Debug Register 5 (DR5).
6274
6275 **/
6276 UINTN
6277 EFIAPI
6278 AsmWriteDr5 (
6279 UINTN Dr5
6280 );
6281
6282
6283 /**
6284 Writes a value to Debug Register 6 (DR6).
6285
6286 Writes and returns a new value to DR6. This function is only available on
6287 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6288
6289 @param Dr6 The value to write to Dr6.
6290
6291 @return The value written to Debug Register 6 (DR6).
6292
6293 **/
6294 UINTN
6295 EFIAPI
6296 AsmWriteDr6 (
6297 UINTN Dr6
6298 );
6299
6300
6301 /**
6302 Writes a value to Debug Register 7 (DR7).
6303
6304 Writes and returns a new value to DR7. This function is only available on
6305 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6306
6307 @param Dr7 The value to write to Dr7.
6308
6309 @return The value written to Debug Register 7 (DR7).
6310
6311 **/
6312 UINTN
6313 EFIAPI
6314 AsmWriteDr7 (
6315 UINTN Dr7
6316 );
6317
6318
6319 /**
6320 Reads the current value of Code Segment Register (CS).
6321
6322 Reads and returns the current value of CS. This function is only available on
6323 IA-32 and x64.
6324
6325 @return The current value of CS.
6326
6327 **/
6328 UINT16
6329 EFIAPI
6330 AsmReadCs (
6331 VOID
6332 );
6333
6334
6335 /**
6336 Reads the current value of Data Segment Register (DS).
6337
6338 Reads and returns the current value of DS. This function is only available on
6339 IA-32 and x64.
6340
6341 @return The current value of DS.
6342
6343 **/
6344 UINT16
6345 EFIAPI
6346 AsmReadDs (
6347 VOID
6348 );
6349
6350
6351 /**
6352 Reads the current value of Extra Segment Register (ES).
6353
6354 Reads and returns the current value of ES. This function is only available on
6355 IA-32 and x64.
6356
6357 @return The current value of ES.
6358
6359 **/
6360 UINT16
6361 EFIAPI
6362 AsmReadEs (
6363 VOID
6364 );
6365
6366
6367 /**
6368 Reads the current value of FS Data Segment Register (FS).
6369
6370 Reads and returns the current value of FS. This function is only available on
6371 IA-32 and x64.
6372
6373 @return The current value of FS.
6374
6375 **/
6376 UINT16
6377 EFIAPI
6378 AsmReadFs (
6379 VOID
6380 );
6381
6382
6383 /**
6384 Reads the current value of GS Data Segment Register (GS).
6385
6386 Reads and returns the current value of GS. This function is only available on
6387 IA-32 and x64.
6388
6389 @return The current value of GS.
6390
6391 **/
6392 UINT16
6393 EFIAPI
6394 AsmReadGs (
6395 VOID
6396 );
6397
6398
6399 /**
6400 Reads the current value of Stack Segment Register (SS).
6401
6402 Reads and returns the current value of SS. This function is only available on
6403 IA-32 and x64.
6404
6405 @return The current value of SS.
6406
6407 **/
6408 UINT16
6409 EFIAPI
6410 AsmReadSs (
6411 VOID
6412 );
6413
6414
6415 /**
6416 Reads the current value of Task Register (TR).
6417
6418 Reads and returns the current value of TR. This function is only available on
6419 IA-32 and x64.
6420
6421 @return The current value of TR.
6422
6423 **/
6424 UINT16
6425 EFIAPI
6426 AsmReadTr (
6427 VOID
6428 );
6429
6430
6431 /**
6432 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6433
6434 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6435 function is only available on IA-32 and x64.
6436
6437 If Gdtr is NULL, then ASSERT().
6438
6439 @param Gdtr The pointer to a GDTR descriptor.
6440
6441 **/
6442 VOID
6443 EFIAPI
6444 AsmReadGdtr (
6445 OUT IA32_DESCRIPTOR *Gdtr
6446 );
6447
6448
6449 /**
6450 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6451
6452 Writes and the current GDTR descriptor specified by Gdtr. This function is
6453 only available on IA-32 and x64.
6454
6455 If Gdtr is NULL, then ASSERT().
6456
6457 @param Gdtr The pointer to a GDTR descriptor.
6458
6459 **/
6460 VOID
6461 EFIAPI
6462 AsmWriteGdtr (
6463 IN CONST IA32_DESCRIPTOR *Gdtr
6464 );
6465
6466
6467 /**
6468 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6469
6470 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6471 function is only available on IA-32 and x64.
6472
6473 If Idtr is NULL, then ASSERT().
6474
6475 @param Idtr The pointer to a IDTR descriptor.
6476
6477 **/
6478 VOID
6479 EFIAPI
6480 AsmReadIdtr (
6481 OUT IA32_DESCRIPTOR *Idtr
6482 );
6483
6484
6485 /**
6486 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6487
6488 Writes the current IDTR descriptor and returns it in Idtr. This function is
6489 only available on IA-32 and x64.
6490
6491 If Idtr is NULL, then ASSERT().
6492
6493 @param Idtr The pointer to a IDTR descriptor.
6494
6495 **/
6496 VOID
6497 EFIAPI
6498 AsmWriteIdtr (
6499 IN CONST IA32_DESCRIPTOR *Idtr
6500 );
6501
6502
6503 /**
6504 Reads the current Local Descriptor Table Register(LDTR) selector.
6505
6506 Reads and returns the current 16-bit LDTR descriptor value. This function is
6507 only available on IA-32 and x64.
6508
6509 @return The current selector of LDT.
6510
6511 **/
6512 UINT16
6513 EFIAPI
6514 AsmReadLdtr (
6515 VOID
6516 );
6517
6518
6519 /**
6520 Writes the current Local Descriptor Table Register (LDTR) selector.
6521
6522 Writes and the current LDTR descriptor specified by Ldtr. This function is
6523 only available on IA-32 and x64.
6524
6525 @param Ldtr 16-bit LDTR selector value.
6526
6527 **/
6528 VOID
6529 EFIAPI
6530 AsmWriteLdtr (
6531 IN UINT16 Ldtr
6532 );
6533
6534
6535 /**
6536 Save the current floating point/SSE/SSE2 context to a buffer.
6537
6538 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6539 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6540 available on IA-32 and x64.
6541
6542 If Buffer is NULL, then ASSERT().
6543 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6544
6545 @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.
6546
6547 **/
6548 VOID
6549 EFIAPI
6550 AsmFxSave (
6551 OUT IA32_FX_BUFFER *Buffer
6552 );
6553
6554
6555 /**
6556 Restores the current floating point/SSE/SSE2 context from a buffer.
6557
6558 Restores the current floating point/SSE/SSE2 state from the buffer specified
6559 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6560 only available on IA-32 and x64.
6561
6562 If Buffer is NULL, then ASSERT().
6563 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6564 If Buffer was not saved with AsmFxSave(), then ASSERT().
6565
6566 @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.
6567
6568 **/
6569 VOID
6570 EFIAPI
6571 AsmFxRestore (
6572 IN CONST IA32_FX_BUFFER *Buffer
6573 );
6574
6575
6576 /**
6577 Reads the current value of 64-bit MMX Register #0 (MM0).
6578
6579 Reads and returns the current value of MM0. This function is only available
6580 on IA-32 and x64.
6581
6582 @return The current value of MM0.
6583
6584 **/
6585 UINT64
6586 EFIAPI
6587 AsmReadMm0 (
6588 VOID
6589 );
6590
6591
6592 /**
6593 Reads the current value of 64-bit MMX Register #1 (MM1).
6594
6595 Reads and returns the current value of MM1. This function is only available
6596 on IA-32 and x64.
6597
6598 @return The current value of MM1.
6599
6600 **/
6601 UINT64
6602 EFIAPI
6603 AsmReadMm1 (
6604 VOID
6605 );
6606
6607
6608 /**
6609 Reads the current value of 64-bit MMX Register #2 (MM2).
6610
6611 Reads and returns the current value of MM2. This function is only available
6612 on IA-32 and x64.
6613
6614 @return The current value of MM2.
6615
6616 **/
6617 UINT64
6618 EFIAPI
6619 AsmReadMm2 (
6620 VOID
6621 );
6622
6623
6624 /**
6625 Reads the current value of 64-bit MMX Register #3 (MM3).
6626
6627 Reads and returns the current value of MM3. This function is only available
6628 on IA-32 and x64.
6629
6630 @return The current value of MM3.
6631
6632 **/
6633 UINT64
6634 EFIAPI
6635 AsmReadMm3 (
6636 VOID
6637 );
6638
6639
6640 /**
6641 Reads the current value of 64-bit MMX Register #4 (MM4).
6642
6643 Reads and returns the current value of MM4. This function is only available
6644 on IA-32 and x64.
6645
6646 @return The current value of MM4.
6647
6648 **/
6649 UINT64
6650 EFIAPI
6651 AsmReadMm4 (
6652 VOID
6653 );
6654
6655
6656 /**
6657 Reads the current value of 64-bit MMX Register #5 (MM5).
6658
6659 Reads and returns the current value of MM5. This function is only available
6660 on IA-32 and x64.
6661
6662 @return The current value of MM5.
6663
6664 **/
6665 UINT64
6666 EFIAPI
6667 AsmReadMm5 (
6668 VOID
6669 );
6670
6671
6672 /**
6673 Reads the current value of 64-bit MMX Register #6 (MM6).
6674
6675 Reads and returns the current value of MM6. This function is only available
6676 on IA-32 and x64.
6677
6678 @return The current value of MM6.
6679
6680 **/
6681 UINT64
6682 EFIAPI
6683 AsmReadMm6 (
6684 VOID
6685 );
6686
6687
6688 /**
6689 Reads the current value of 64-bit MMX Register #7 (MM7).
6690
6691 Reads and returns the current value of MM7. This function is only available
6692 on IA-32 and x64.
6693
6694 @return The current value of MM7.
6695
6696 **/
6697 UINT64
6698 EFIAPI
6699 AsmReadMm7 (
6700 VOID
6701 );
6702
6703
6704 /**
6705 Writes the current value of 64-bit MMX Register #0 (MM0).
6706
6707 Writes the current value of MM0. This function is only available on IA32 and
6708 x64.
6709
6710 @param Value The 64-bit value to write to MM0.
6711
6712 **/
6713 VOID
6714 EFIAPI
6715 AsmWriteMm0 (
6716 IN UINT64 Value
6717 );
6718
6719
6720 /**
6721 Writes the current value of 64-bit MMX Register #1 (MM1).
6722
6723 Writes the current value of MM1. This function is only available on IA32 and
6724 x64.
6725
6726 @param Value The 64-bit value to write to MM1.
6727
6728 **/
6729 VOID
6730 EFIAPI
6731 AsmWriteMm1 (
6732 IN UINT64 Value
6733 );
6734
6735
6736 /**
6737 Writes the current value of 64-bit MMX Register #2 (MM2).
6738
6739 Writes the current value of MM2. This function is only available on IA32 and
6740 x64.
6741
6742 @param Value The 64-bit value to write to MM2.
6743
6744 **/
6745 VOID
6746 EFIAPI
6747 AsmWriteMm2 (
6748 IN UINT64 Value
6749 );
6750
6751
6752 /**
6753 Writes the current value of 64-bit MMX Register #3 (MM3).
6754
6755 Writes the current value of MM3. This function is only available on IA32 and
6756 x64.
6757
6758 @param Value The 64-bit value to write to MM3.
6759
6760 **/
6761 VOID
6762 EFIAPI
6763 AsmWriteMm3 (
6764 IN UINT64 Value
6765 );
6766
6767
6768 /**
6769 Writes the current value of 64-bit MMX Register #4 (MM4).
6770
6771 Writes the current value of MM4. This function is only available on IA32 and
6772 x64.
6773
6774 @param Value The 64-bit value to write to MM4.
6775
6776 **/
6777 VOID
6778 EFIAPI
6779 AsmWriteMm4 (
6780 IN UINT64 Value
6781 );
6782
6783
6784 /**
6785 Writes the current value of 64-bit MMX Register #5 (MM5).
6786
6787 Writes the current value of MM5. This function is only available on IA32 and
6788 x64.
6789
6790 @param Value The 64-bit value to write to MM5.
6791
6792 **/
6793 VOID
6794 EFIAPI
6795 AsmWriteMm5 (
6796 IN UINT64 Value
6797 );
6798
6799
6800 /**
6801 Writes the current value of 64-bit MMX Register #6 (MM6).
6802
6803 Writes the current value of MM6. This function is only available on IA32 and
6804 x64.
6805
6806 @param Value The 64-bit value to write to MM6.
6807
6808 **/
6809 VOID
6810 EFIAPI
6811 AsmWriteMm6 (
6812 IN UINT64 Value
6813 );
6814
6815
6816 /**
6817 Writes the current value of 64-bit MMX Register #7 (MM7).
6818
6819 Writes the current value of MM7. This function is only available on IA32 and
6820 x64.
6821
6822 @param Value The 64-bit value to write to MM7.
6823
6824 **/
6825 VOID
6826 EFIAPI
6827 AsmWriteMm7 (
6828 IN UINT64 Value
6829 );
6830
6831
6832 /**
6833 Reads the current value of Time Stamp Counter (TSC).
6834
6835 Reads and returns the current value of TSC. This function is only available
6836 on IA-32 and x64.
6837
6838 @return The current value of TSC
6839
6840 **/
6841 UINT64
6842 EFIAPI
6843 AsmReadTsc (
6844 VOID
6845 );
6846
6847
6848 /**
6849 Reads the current value of a Performance Counter (PMC).
6850
6851 Reads and returns the current value of performance counter specified by
6852 Index. This function is only available on IA-32 and x64.
6853
6854 @param Index The 32-bit Performance Counter index to read.
6855
6856 @return The value of the PMC specified by Index.
6857
6858 **/
6859 UINT64
6860 EFIAPI
6861 AsmReadPmc (
6862 IN UINT32 Index
6863 );
6864
6865
6866 /**
6867 Sets up a monitor buffer that is used by AsmMwait().
6868
6869 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6870 and Edx. Returns Eax. This function is only available on IA-32 and x64.
6871
6872 @param Eax The value to load into EAX or RAX before executing the MONITOR
6873 instruction.
6874 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6875 instruction.
6876 @param Edx The value to load into EDX or RDX before executing the MONITOR
6877 instruction.
6878
6879 @return Eax
6880
6881 **/
6882 UINTN
6883 EFIAPI
6884 AsmMonitor (
6885 IN UINTN Eax,
6886 IN UINTN Ecx,
6887 IN UINTN Edx
6888 );
6889
6890
6891 /**
6892 Executes an MWAIT instruction.
6893
6894 Executes an MWAIT instruction with the register state specified by Eax and
6895 Ecx. Returns Eax. This function is only available on IA-32 and x64.
6896
6897 @param Eax The value to load into EAX or RAX before executing the MONITOR
6898 instruction.
6899 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6900 instruction.
6901
6902 @return Eax
6903
6904 **/
6905 UINTN
6906 EFIAPI
6907 AsmMwait (
6908 IN UINTN Eax,
6909 IN UINTN Ecx
6910 );
6911
6912
6913 /**
6914 Executes a WBINVD instruction.
6915
6916 Executes a WBINVD instruction. This function is only available on IA-32 and
6917 x64.
6918
6919 **/
6920 VOID
6921 EFIAPI
6922 AsmWbinvd (
6923 VOID
6924 );
6925
6926
6927 /**
6928 Executes a INVD instruction.
6929
6930 Executes a INVD instruction. This function is only available on IA-32 and
6931 x64.
6932
6933 **/
6934 VOID
6935 EFIAPI
6936 AsmInvd (
6937 VOID
6938 );
6939
6940
6941 /**
6942 Flushes a cache line from all the instruction and data caches within the
6943 coherency domain of the CPU.
6944
6945 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6946 This function is only available on IA-32 and x64.
6947
6948 @param LinearAddress The address of the cache line to flush. If the CPU is
6949 in a physical addressing mode, then LinearAddress is a
6950 physical address. If the CPU is in a virtual
6951 addressing mode, then LinearAddress is a virtual
6952 address.
6953
6954 @return LinearAddress.
6955 **/
6956 VOID *
6957 EFIAPI
6958 AsmFlushCacheLine (
6959 IN VOID *LinearAddress
6960 );
6961
6962
6963 /**
6964 Enables the 32-bit paging mode on the CPU.
6965
6966 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6967 must be properly initialized prior to calling this service. This function
6968 assumes the current execution mode is 32-bit protected mode. This function is
6969 only available on IA-32. After the 32-bit paging mode is enabled, control is
6970 transferred to the function specified by EntryPoint using the new stack
6971 specified by NewStack and passing in the parameters specified by Context1 and
6972 Context2. Context1 and Context2 are optional and may be NULL. The function
6973 EntryPoint must never return.
6974
6975 If the current execution mode is not 32-bit protected mode, then ASSERT().
6976 If EntryPoint is NULL, then ASSERT().
6977 If NewStack is NULL, then ASSERT().
6978
6979 There are a number of constraints that must be followed before calling this
6980 function:
6981 1) Interrupts must be disabled.
6982 2) The caller must be in 32-bit protected mode with flat descriptors. This
6983 means all descriptors must have a base of 0 and a limit of 4GB.
6984 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
6985 descriptors.
6986 4) CR3 must point to valid page tables that will be used once the transition
6987 is complete, and those page tables must guarantee that the pages for this
6988 function and the stack are identity mapped.
6989
6990 @param EntryPoint A pointer to function to call with the new stack after
6991 paging is enabled.
6992 @param Context1 A pointer to the context to pass into the EntryPoint
6993 function as the first parameter after paging is enabled.
6994 @param Context2 A pointer to the context to pass into the EntryPoint
6995 function as the second parameter after paging is enabled.
6996 @param NewStack A pointer to the new stack to use for the EntryPoint
6997 function after paging is enabled.
6998
6999 **/
7000 VOID
7001 EFIAPI
7002 AsmEnablePaging32 (
7003 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
7004 IN VOID *Context1, OPTIONAL
7005 IN VOID *Context2, OPTIONAL
7006 IN VOID *NewStack
7007 );
7008
7009
7010 /**
7011 Disables the 32-bit paging mode on the CPU.
7012
7013 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
7014 mode. This function assumes the current execution mode is 32-paged protected
7015 mode. This function is only available on IA-32. After the 32-bit paging mode
7016 is disabled, control is transferred to the function specified by EntryPoint
7017 using the new stack specified by NewStack and passing in the parameters
7018 specified by Context1 and Context2. Context1 and Context2 are optional and
7019 may be NULL. The function EntryPoint must never return.
7020
7021 If the current execution mode is not 32-bit paged mode, then ASSERT().
7022 If EntryPoint is NULL, then ASSERT().
7023 If NewStack is NULL, then ASSERT().
7024
7025 There are a number of constraints that must be followed before calling this
7026 function:
7027 1) Interrupts must be disabled.
7028 2) The caller must be in 32-bit paged mode.
7029 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
7030 4) CR3 must point to valid page tables that guarantee that the pages for
7031 this function and the stack are identity mapped.
7032
7033 @param EntryPoint A pointer to function to call with the new stack after
7034 paging is disabled.
7035 @param Context1 A pointer to the context to pass into the EntryPoint
7036 function as the first parameter after paging is disabled.
7037 @param Context2 A pointer to the context to pass into the EntryPoint
7038 function as the second parameter after paging is
7039 disabled.
7040 @param NewStack A pointer to the new stack to use for the EntryPoint
7041 function after paging is disabled.
7042
7043 **/
7044 VOID
7045 EFIAPI
7046 AsmDisablePaging32 (
7047 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
7048 IN VOID *Context1, OPTIONAL
7049 IN VOID *Context2, OPTIONAL
7050 IN VOID *NewStack
7051 );
7052
7053
7054 /**
7055 Enables the 64-bit paging mode on the CPU.
7056
7057 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
7058 must be properly initialized prior to calling this service. This function
7059 assumes the current execution mode is 32-bit protected mode with flat
7060 descriptors. This function is only available on IA-32. After the 64-bit
7061 paging mode is enabled, control is transferred to the function specified by
7062 EntryPoint using the new stack specified by NewStack and passing in the
7063 parameters specified by Context1 and Context2. Context1 and Context2 are
7064 optional and may be 0. The function EntryPoint must never return.
7065
7066 If the current execution mode is not 32-bit protected mode with flat
7067 descriptors, then ASSERT().
7068 If EntryPoint is 0, then ASSERT().
7069 If NewStack is 0, then ASSERT().
7070
7071 @param Cs The 16-bit selector to load in the CS before EntryPoint
7072 is called. The descriptor in the GDT that this selector
7073 references must be setup for long mode.
7074 @param EntryPoint The 64-bit virtual address of the function to call with
7075 the new stack after paging is enabled.
7076 @param Context1 The 64-bit virtual address of the context to pass into
7077 the EntryPoint function as the first parameter after
7078 paging is enabled.
7079 @param Context2 The 64-bit virtual address of the context to pass into
7080 the EntryPoint function as the second parameter after
7081 paging is enabled.
7082 @param NewStack The 64-bit virtual address of the new stack to use for
7083 the EntryPoint function after paging is enabled.
7084
7085 **/
7086 VOID
7087 EFIAPI
7088 AsmEnablePaging64 (
7089 IN UINT16 Cs,
7090 IN UINT64 EntryPoint,
7091 IN UINT64 Context1, OPTIONAL
7092 IN UINT64 Context2, OPTIONAL
7093 IN UINT64 NewStack
7094 );
7095
7096
7097 /**
7098 Disables the 64-bit paging mode on the CPU.
7099
7100 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
7101 mode. This function assumes the current execution mode is 64-paging mode.
7102 This function is only available on x64. After the 64-bit paging mode is
7103 disabled, control is transferred to the function specified by EntryPoint
7104 using the new stack specified by NewStack and passing in the parameters
7105 specified by Context1 and Context2. Context1 and Context2 are optional and
7106 may be 0. The function EntryPoint must never return.
7107
7108 If the current execution mode is not 64-bit paged mode, then ASSERT().
7109 If EntryPoint is 0, then ASSERT().
7110 If NewStack is 0, then ASSERT().
7111
7112 @param Cs The 16-bit selector to load in the CS before EntryPoint
7113 is called. The descriptor in the GDT that this selector
7114 references must be setup for 32-bit protected mode.
7115 @param EntryPoint The 64-bit virtual address of the function to call with
7116 the new stack after paging is disabled.
7117 @param Context1 The 64-bit virtual address of the context to pass into
7118 the EntryPoint function as the first parameter after
7119 paging is disabled.
7120 @param Context2 The 64-bit virtual address of the context to pass into
7121 the EntryPoint function as the second parameter after
7122 paging is disabled.
7123 @param NewStack The 64-bit virtual address of the new stack to use for
7124 the EntryPoint function after paging is disabled.
7125
7126 **/
7127 VOID
7128 EFIAPI
7129 AsmDisablePaging64 (
7130 IN UINT16 Cs,
7131 IN UINT32 EntryPoint,
7132 IN UINT32 Context1, OPTIONAL
7133 IN UINT32 Context2, OPTIONAL
7134 IN UINT32 NewStack
7135 );
7136
7137
7138 //
7139 // 16-bit thunking services
7140 //
7141
7142 /**
7143 Retrieves the properties for 16-bit thunk functions.
7144
7145 Computes the size of the buffer and stack below 1MB required to use the
7146 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7147 buffer size is returned in RealModeBufferSize, and the stack size is returned
7148 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7149 then the actual minimum stack size is ExtraStackSize plus the maximum number
7150 of bytes that need to be passed to the 16-bit real mode code.
7151
7152 If RealModeBufferSize is NULL, then ASSERT().
7153 If ExtraStackSize is NULL, then ASSERT().
7154
7155 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7156 required to use the 16-bit thunk functions.
7157 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7158 that the 16-bit thunk functions require for
7159 temporary storage in the transition to and from
7160 16-bit real mode.
7161
7162 **/
7163 VOID
7164 EFIAPI
7165 AsmGetThunk16Properties (
7166 OUT UINT32 *RealModeBufferSize,
7167 OUT UINT32 *ExtraStackSize
7168 );
7169
7170
7171 /**
7172 Prepares all structures a code required to use AsmThunk16().
7173
7174 Prepares all structures and code required to use AsmThunk16().
7175
7176 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7177 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7178
7179 If ThunkContext is NULL, then ASSERT().
7180
7181 @param ThunkContext A pointer to the context structure that describes the
7182 16-bit real mode code to call.
7183
7184 **/
7185 VOID
7186 EFIAPI
7187 AsmPrepareThunk16 (
7188 IN OUT THUNK_CONTEXT *ThunkContext
7189 );
7190
7191
7192 /**
7193 Transfers control to a 16-bit real mode entry point and returns the results.
7194
7195 Transfers control to a 16-bit real mode entry point and returns the results.
7196 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7197 This function must be called with interrupts disabled.
7198
7199 The register state from the RealModeState field of ThunkContext is restored just prior
7200 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7201 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7202 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7203 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7204 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7205 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7206 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7207 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7208 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7209 after the RETF instruction is executed.
7210
7211 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7212 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7213 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7214
7215 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7216 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7217 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7218
7219 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7220 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7221
7222 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7223 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7224 disable the A20 mask.
7225
7226 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7227 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7228 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7229
7230 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7231 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7232
7233 If ThunkContext is NULL, then ASSERT().
7234 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7235 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7236 ThunkAttributes, then ASSERT().
7237
7238 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7239 virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.
7240
7241 @param ThunkContext A pointer to the context structure that describes the
7242 16-bit real mode code to call.
7243
7244 **/
7245 VOID
7246 EFIAPI
7247 AsmThunk16 (
7248 IN OUT THUNK_CONTEXT *ThunkContext
7249 );
7250
7251
7252 /**
7253 Prepares all structures and code for a 16-bit real mode thunk, transfers
7254 control to a 16-bit real mode entry point, and returns the results.
7255
7256 Prepares all structures and code for a 16-bit real mode thunk, transfers
7257 control to a 16-bit real mode entry point, and returns the results. If the
7258 caller only need to perform a single 16-bit real mode thunk, then this
7259 service should be used. If the caller intends to make more than one 16-bit
7260 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7261 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7262
7263 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7264 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7265
7266 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7267
7268 @param ThunkContext A pointer to the context structure that describes the
7269 16-bit real mode code to call.
7270
7271 **/
7272 VOID
7273 EFIAPI
7274 AsmPrepareAndThunk16 (
7275 IN OUT THUNK_CONTEXT *ThunkContext
7276 );
7277
7278 #endif
7279 #endif
7280
7281