]> git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Include/Library/BaseLib.h
Add AsmEnableCache() and AsmDisableCache() as the IA32 & x64 specific BaseLib API.
[mirror_edk2.git] / MdePkg / Include / Library / BaseLib.h
1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture specific functions.
4
5 Copyright (c) 2006 - 2008, Intel Corporation
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef __BASE_LIB__
17 #define __BASE_LIB__
18
19 ///
20 /// Definitions for SPIN_LOCK
21 ///
22 typedef volatile UINTN SPIN_LOCK;
23
24 //
25 // Definitions for architecture specific types
26 //
27 #if defined (MDE_CPU_IA32)
28 ///
29 /// IA32 context buffer used by SetJump() and LongJump()
30 ///
31 typedef struct {
32 UINT32 Ebx;
33 UINT32 Esi;
34 UINT32 Edi;
35 UINT32 Ebp;
36 UINT32 Esp;
37 UINT32 Eip;
38 } BASE_LIBRARY_JUMP_BUFFER;
39
40 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
41
42 #endif // defined (MDE_CPU_IA32)
43
44 #if defined (MDE_CPU_IPF)
45
46 ///
47 /// IPF context buffer used by SetJump() and LongJump()
48 ///
49 typedef struct {
50 UINT64 F2[2];
51 UINT64 F3[2];
52 UINT64 F4[2];
53 UINT64 F5[2];
54 UINT64 F16[2];
55 UINT64 F17[2];
56 UINT64 F18[2];
57 UINT64 F19[2];
58 UINT64 F20[2];
59 UINT64 F21[2];
60 UINT64 F22[2];
61 UINT64 F23[2];
62 UINT64 F24[2];
63 UINT64 F25[2];
64 UINT64 F26[2];
65 UINT64 F27[2];
66 UINT64 F28[2];
67 UINT64 F29[2];
68 UINT64 F30[2];
69 UINT64 F31[2];
70 UINT64 R4;
71 UINT64 R5;
72 UINT64 R6;
73 UINT64 R7;
74 UINT64 SP;
75 UINT64 BR0;
76 UINT64 BR1;
77 UINT64 BR2;
78 UINT64 BR3;
79 UINT64 BR4;
80 UINT64 BR5;
81 UINT64 InitialUNAT;
82 UINT64 AfterSpillUNAT;
83 UINT64 PFS;
84 UINT64 BSP;
85 UINT64 Predicates;
86 UINT64 LoopCount;
87 UINT64 FPSR;
88 } BASE_LIBRARY_JUMP_BUFFER;
89
90 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
91
92 #endif // defined (MDE_CPU_IPF)
93
94 #if defined (MDE_CPU_X64)
95 ///
96 /// X64 context buffer used by SetJump() and LongJump()
97 ///
98 typedef struct {
99 UINT64 Rbx;
100 UINT64 Rsp;
101 UINT64 Rbp;
102 UINT64 Rdi;
103 UINT64 Rsi;
104 UINT64 R12;
105 UINT64 R13;
106 UINT64 R14;
107 UINT64 R15;
108 UINT64 Rip;
109 } BASE_LIBRARY_JUMP_BUFFER;
110
111 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
112
113 #endif // defined (MDE_CPU_X64)
114
115 #if defined (MDE_CPU_EBC)
116 ///
117 /// EBC context buffer used by SetJump() and LongJump()
118 ///
119 typedef struct {
120 UINT64 R0;
121 UINT64 R1;
122 UINT64 R2;
123 UINT64 R3;
124 UINT64 IP;
125 } BASE_LIBRARY_JUMP_BUFFER;
126
127 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
128
129 #endif // defined (MDE_CPU_EBC)
130
131 //
132 // String Services
133 //
134
135 /**
136 Copies one Null-terminated Unicode string to another Null-terminated Unicode
137 string and returns the new Unicode string.
138
139 This function copies the contents of the Unicode string Source to the Unicode
140 string Destination, and returns Destination. If Source and Destination
141 overlap, then the results are undefined.
142
143 If Destination is NULL, then ASSERT().
144 If Destination is not aligned on a 16-bit boundary, then ASSERT().
145 If Source is NULL, then ASSERT().
146 If Source is not aligned on a 16-bit boundary, then ASSERT().
147 If Source and Destination overlap, then ASSERT().
148 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
149 PcdMaximumUnicodeStringLength Unicode characters not including the
150 Null-terminator, then ASSERT().
151
152 @param Destination Pointer to a Null-terminated Unicode string.
153 @param Source Pointer to a Null-terminated Unicode string.
154
155 @return Destination.
156
157 **/
158 CHAR16 *
159 EFIAPI
160 StrCpy (
161 OUT CHAR16 *Destination,
162 IN CONST CHAR16 *Source
163 );
164
165
166 /**
167 Copies up to a specified length from one Null-terminated Unicode string to
168 another Null-terminated Unicode string and returns the new Unicode string.
169
170 This function copies the contents of the Unicode string Source to the Unicode
171 string Destination, and returns Destination. At most, Length Unicode
172 characters are copied from Source to Destination. If Length is 0, then
173 Destination is returned unmodified. If Length is greater that the number of
174 Unicode characters in Source, then Destination is padded with Null Unicode
175 characters. If Source and Destination overlap, then the results are
176 undefined.
177
178 If Length > 0 and Destination is NULL, then ASSERT().
179 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
180 If Length > 0 and Source is NULL, then ASSERT().
181 If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().
182 If Source and Destination overlap, then ASSERT().
183 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
184 PcdMaximumUnicodeStringLength Unicode characters not including the
185 Null-terminator, then ASSERT().
186
187 @param Destination Pointer to a Null-terminated Unicode string.
188 @param Source Pointer to a Null-terminated Unicode string.
189 @param Length Maximum number of Unicode characters to copy.
190
191 @return Destination.
192
193 **/
194 CHAR16 *
195 EFIAPI
196 StrnCpy (
197 OUT CHAR16 *Destination,
198 IN CONST CHAR16 *Source,
199 IN UINTN Length
200 );
201
202
203 /**
204 Returns the length of a Null-terminated Unicode string.
205
206 This function returns the number of Unicode characters in the Null-terminated
207 Unicode string specified by String.
208
209 If String is NULL, then ASSERT().
210 If String is not aligned on a 16-bit boundary, then ASSERT().
211 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
212 PcdMaximumUnicodeStringLength Unicode characters not including the
213 Null-terminator, then ASSERT().
214
215 @param String Pointer to a Null-terminated Unicode string.
216
217 @return The length of String.
218
219 **/
220 UINTN
221 EFIAPI
222 StrLen (
223 IN CONST CHAR16 *String
224 );
225
226
227 /**
228 Returns the size of a Null-terminated Unicode string in bytes, including the
229 Null terminator.
230
231 This function returns the size, in bytes, of the Null-terminated Unicode string
232 specified by String.
233
234 If String is NULL, then ASSERT().
235 If String is not aligned on a 16-bit boundary, then ASSERT().
236 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
237 PcdMaximumUnicodeStringLength Unicode characters not including the
238 Null-terminator, then ASSERT().
239
240 @param String Pointer to a Null-terminated Unicode string.
241
242 @return The size of String.
243
244 **/
245 UINTN
246 EFIAPI
247 StrSize (
248 IN CONST CHAR16 *String
249 );
250
251
252 /**
253 Compares two Null-terminated Unicode strings, and returns the difference
254 between the first mismatched Unicode characters.
255
256 This function compares the Null-terminated Unicode string FirstString to the
257 Null-terminated Unicode string SecondString. If FirstString is identical to
258 SecondString, then 0 is returned. Otherwise, the value returned is the first
259 mismatched Unicode character in SecondString subtracted from the first
260 mismatched Unicode character in FirstString.
261
262 If FirstString is NULL, then ASSERT().
263 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
264 If SecondString is NULL, then ASSERT().
265 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
266 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
267 than PcdMaximumUnicodeStringLength Unicode characters not including the
268 Null-terminator, then ASSERT().
269 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
270 than PcdMaximumUnicodeStringLength Unicode characters not including the
271 Null-terminator, then ASSERT().
272
273 @param FirstString Pointer to a Null-terminated Unicode string.
274 @param SecondString Pointer to a Null-terminated Unicode string.
275
276 @retval 0 FirstString is identical to SecondString.
277 @return others FirstString is not identical to SecondString.
278
279 **/
280 INTN
281 EFIAPI
282 StrCmp (
283 IN CONST CHAR16 *FirstString,
284 IN CONST CHAR16 *SecondString
285 );
286
287
288 /**
289 Compares up to a specified length the contents of two Null-terminated Unicode strings,
290 and returns the difference between the first mismatched Unicode characters.
291
292 This function compares the Null-terminated Unicode string FirstString to the
293 Null-terminated Unicode string SecondString. At most, Length Unicode
294 characters will be compared. If Length is 0, then 0 is returned. If
295 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
296 value returned is the first mismatched Unicode character in SecondString
297 subtracted from the first mismatched Unicode character in FirstString.
298
299 If Length > 0 and FirstString is NULL, then ASSERT().
300 If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().
301 If Length > 0 and SecondString is NULL, then ASSERT().
302 If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().
303 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
304 than PcdMaximumUnicodeStringLength Unicode characters not including the
305 Null-terminator, then ASSERT().
306 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
307 than PcdMaximumUnicodeStringLength Unicode characters not including the
308 Null-terminator, then ASSERT().
309
310 @param FirstString Pointer to a Null-terminated Unicode string.
311 @param SecondString Pointer to a Null-terminated Unicode string.
312 @param Length Maximum number of Unicode characters to compare.
313
314 @retval 0 FirstString is identical to SecondString.
315 @return others FirstString is not identical to SecondString.
316
317 **/
318 INTN
319 EFIAPI
320 StrnCmp (
321 IN CONST CHAR16 *FirstString,
322 IN CONST CHAR16 *SecondString,
323 IN UINTN Length
324 );
325
326
327 /**
328 Concatenates one Null-terminated Unicode string to another Null-terminated
329 Unicode string, and returns the concatenated Unicode string.
330
331 This function concatenates two Null-terminated Unicode strings. The contents
332 of Null-terminated Unicode string Source are concatenated to the end of
333 Null-terminated Unicode string Destination. The Null-terminated concatenated
334 Unicode String is returned. If Source and Destination overlap, then the
335 results are undefined.
336
337 If Destination is NULL, then ASSERT().
338 If Destination is not aligned on a 16-bit bounadary, then ASSERT().
339 If Source is NULL, then ASSERT().
340 If Source is not aligned on a 16-bit bounadary, then ASSERT().
341 If Source and Destination overlap, then ASSERT().
342 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
343 than PcdMaximumUnicodeStringLength Unicode characters not including the
344 Null-terminator, then ASSERT().
345 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
346 PcdMaximumUnicodeStringLength Unicode characters not including the
347 Null-terminator, then ASSERT().
348 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
349 and Source results in a Unicode string with more than
350 PcdMaximumUnicodeStringLength Unicode characters not including the
351 Null-terminator, then ASSERT().
352
353 @param Destination Pointer to a Null-terminated Unicode string.
354 @param Source Pointer to a Null-terminated Unicode string.
355
356 @return Destination.
357
358 **/
359 CHAR16 *
360 EFIAPI
361 StrCat (
362 IN OUT CHAR16 *Destination,
363 IN CONST CHAR16 *Source
364 );
365
366
367 /**
368 Concatenates up to a specified length one Null-terminated Unicode to the end
369 of another Null-terminated Unicode string, and returns the concatenated
370 Unicode string.
371
372 This function concatenates two Null-terminated Unicode strings. The contents
373 of Null-terminated Unicode string Source are concatenated to the end of
374 Null-terminated Unicode string Destination, and Destination is returned. At
375 most, Length Unicode characters are concatenated from Source to the end of
376 Destination, and Destination is always Null-terminated. If Length is 0, then
377 Destination is returned unmodified. If Source and Destination overlap, then
378 the results are undefined.
379
380 If Destination is NULL, then ASSERT().
381 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
382 If Length > 0 and Source is NULL, then ASSERT().
383 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
384 If Source and Destination overlap, then ASSERT().
385 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
386 than PcdMaximumUnicodeStringLength Unicode characters not including the
387 Null-terminator, then ASSERT().
388 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
389 PcdMaximumUnicodeStringLength Unicode characters not including the
390 Null-terminator, then ASSERT().
391 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
392 and Source results in a Unicode string with more than
393 PcdMaximumUnicodeStringLength Unicode characters not including the
394 Null-terminator, then ASSERT().
395
396 @param Destination Pointer to a Null-terminated Unicode string.
397 @param Source Pointer to a Null-terminated Unicode string.
398 @param Length Maximum number of Unicode characters to concatenate from
399 Source.
400
401 @return Destination.
402
403 **/
404 CHAR16 *
405 EFIAPI
406 StrnCat (
407 IN OUT CHAR16 *Destination,
408 IN CONST CHAR16 *Source,
409 IN UINTN Length
410 );
411
412 /**
413 Returns the first occurrence of a Null-terminated Unicode sub-string
414 in a Null-terminated Unicode string.
415
416 This function scans the contents of the Null-terminated Unicode string
417 specified by String and returns the first occurrence of SearchString.
418 If SearchString is not found in String, then NULL is returned. If
419 the length of SearchString is zero, then String is
420 returned.
421
422 If String is NULL, then ASSERT().
423 If String is not aligned on a 16-bit boundary, then ASSERT().
424 If SearchString is NULL, then ASSERT().
425 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
426
427 If PcdMaximumUnicodeStringLength is not zero, and SearchString
428 or String contains more than PcdMaximumUnicodeStringLength Unicode
429 characters not including the Null-terminator, then ASSERT().
430
431 @param String Pointer to a Null-terminated Unicode string.
432 @param SearchString Pointer to a Null-terminated Unicode string to search for.
433
434 @retval NULL If the SearchString does not appear in String.
435 @return others If there is a match.
436
437 **/
438 CHAR16 *
439 EFIAPI
440 StrStr (
441 IN CONST CHAR16 *String,
442 IN CONST CHAR16 *SearchString
443 );
444
445 /**
446 Convert a Null-terminated Unicode decimal string to a value of
447 type UINTN.
448
449 This function returns a value of type UINTN by interpreting the contents
450 of the Unicode string specified by String as a decimal number. The format
451 of the input Unicode string String is:
452
453 [spaces] [decimal digits].
454
455 The valid decimal digit character is in the range [0-9]. The
456 function will ignore the pad space, which includes spaces or
457 tab characters, before [decimal digits]. The running zero in the
458 beginning of [decimal digits] will be ignored. Then, the function
459 stops at the first character that is a not a valid decimal character
460 or a Null-terminator, whichever one comes first.
461
462 If String is NULL, then ASSERT().
463 If String is not aligned in a 16-bit boundary, then ASSERT().
464 If String has only pad spaces, then 0 is returned.
465 If String has no pad spaces or valid decimal digits,
466 then 0 is returned.
467 If the number represented by String overflows according
468 to the range defined by UINTN, then ASSERT().
469
470 If PcdMaximumUnicodeStringLength is not zero, and String contains
471 more than PcdMaximumUnicodeStringLength Unicode characters not including
472 the Null-terminator, then ASSERT().
473
474 @param String Pointer to a Null-terminated Unicode string.
475
476 @retval Value translated from String.
477
478 **/
479 UINTN
480 EFIAPI
481 StrDecimalToUintn (
482 IN CONST CHAR16 *String
483 );
484
485 /**
486 Convert a Null-terminated Unicode decimal string to a value of
487 type UINT64.
488
489 This function returns a value of type UINT64 by interpreting the contents
490 of the Unicode string specified by String as a decimal number. The format
491 of the input Unicode string String is:
492
493 [spaces] [decimal digits].
494
495 The valid decimal digit character is in the range [0-9]. The
496 function will ignore the pad space, which includes spaces or
497 tab characters, before [decimal digits]. The running zero in the
498 beginning of [decimal digits] will be ignored. Then, the function
499 stops at the first character that is a not a valid decimal character
500 or a Null-terminator, whichever one comes first.
501
502 If String is NULL, then ASSERT().
503 If String is not aligned in a 16-bit boundary, then ASSERT().
504 If String has only pad spaces, then 0 is returned.
505 If String has no pad spaces or valid decimal digits,
506 then 0 is returned.
507 If the number represented by String overflows according
508 to the range defined by UINT64, then ASSERT().
509
510 If PcdMaximumUnicodeStringLength is not zero, and String contains
511 more than PcdMaximumUnicodeStringLength Unicode characters not including
512 the Null-terminator, then ASSERT().
513
514 @param String Pointer to a Null-terminated Unicode string.
515
516 @retval Value translated from String.
517
518 **/
519 UINT64
520 EFIAPI
521 StrDecimalToUint64 (
522 IN CONST CHAR16 *String
523 );
524
525
526 /**
527 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
528
529 This function returns a value of type UINTN by interpreting the contents
530 of the Unicode string specified by String as a hexadecimal number.
531 The format of the input Unicode string String is:
532
533 [spaces][zeros][x][hexadecimal digits].
534
535 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
536 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
537 If "x" appears in the input string, it must be prefixed with at least one 0.
538 The function will ignore the pad space, which includes spaces or tab characters,
539 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
540 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
541 first valid hexadecimal digit. Then, the function stops at the first character that is
542 a not a valid hexadecimal character or NULL, whichever one comes first.
543
544 If String is NULL, then ASSERT().
545 If String is not aligned in a 16-bit boundary, then ASSERT().
546 If String has only pad spaces, then zero is returned.
547 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
548 then zero is returned.
549 If the number represented by String overflows according to the range defined by
550 UINTN, then ASSERT().
551
552 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
553 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
554 then ASSERT().
555
556 @param String Pointer to a Null-terminated Unicode string.
557
558 @retval Value translated from String.
559
560 **/
561 UINTN
562 EFIAPI
563 StrHexToUintn (
564 IN CONST CHAR16 *String
565 );
566
567
568 /**
569 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
570
571 This function returns a value of type UINT64 by interpreting the contents
572 of the Unicode string specified by String as a hexadecimal number.
573 The format of the input Unicode string String is
574
575 [spaces][zeros][x][hexadecimal digits].
576
577 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
578 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
579 If "x" appears in the input string, it must be prefixed with at least one 0.
580 The function will ignore the pad space, which includes spaces or tab characters,
581 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
582 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
583 first valid hexadecimal digit. Then, the function stops at the first character that is
584 a not a valid hexadecimal character or NULL, whichever one comes first.
585
586 If String is NULL, then ASSERT().
587 If String is not aligned in a 16-bit boundary, then ASSERT().
588 If String has only pad spaces, then zero is returned.
589 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
590 then zero is returned.
591 If the number represented by String overflows according to the range defined by
592 UINT64, then ASSERT().
593
594 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
595 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
596 then ASSERT().
597
598 @param String Pointer to a Null-terminated Unicode string.
599
600 @retval Value translated from String.
601
602 **/
603 UINT64
604 EFIAPI
605 StrHexToUint64 (
606 IN CONST CHAR16 *String
607 );
608
609 /**
610 Convert a Null-terminated Unicode string to a Null-terminated
611 ASCII string and returns the ASCII string.
612
613 This function converts the content of the Unicode string Source
614 to the ASCII string Destination by copying the lower 8 bits of
615 each Unicode character. It returns Destination.
616
617 If any Unicode characters in Source contain non-zero value in
618 the upper 8 bits, then ASSERT().
619
620 If Destination is NULL, then ASSERT().
621 If Source is NULL, then ASSERT().
622 If Source is not aligned on a 16-bit boundary, then ASSERT().
623 If Source and Destination overlap, then ASSERT().
624
625 If PcdMaximumUnicodeStringLength is not zero, and Source contains
626 more than PcdMaximumUnicodeStringLength Unicode characters not including
627 the Null-terminator, then ASSERT().
628
629 If PcdMaximumAsciiStringLength is not zero, and Source contains more
630 than PcdMaximumAsciiStringLength Unicode characters not including the
631 Null-terminator, then ASSERT().
632
633 @param Source Pointer to a Null-terminated Unicode string.
634 @param Destination Pointer to a Null-terminated ASCII string.
635
636 @return Destination.
637
638 **/
639 CHAR8 *
640 EFIAPI
641 UnicodeStrToAsciiStr (
642 IN CONST CHAR16 *Source,
643 OUT CHAR8 *Destination
644 );
645
646
647 /**
648 Copies one Null-terminated ASCII string to another Null-terminated ASCII
649 string and returns the new ASCII string.
650
651 This function copies the contents of the ASCII string Source to the ASCII
652 string Destination, and returns Destination. If Source and Destination
653 overlap, then the results are undefined.
654
655 If Destination is NULL, then ASSERT().
656 If Source is NULL, then ASSERT().
657 If Source and Destination overlap, then ASSERT().
658 If PcdMaximumAsciiStringLength is not zero and Source contains more than
659 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
660 then ASSERT().
661
662 @param Destination Pointer to a Null-terminated ASCII string.
663 @param Source Pointer to a Null-terminated ASCII string.
664
665 @return Destination
666
667 **/
668 CHAR8 *
669 EFIAPI
670 AsciiStrCpy (
671 OUT CHAR8 *Destination,
672 IN CONST CHAR8 *Source
673 );
674
675
676 /**
677 Copies up to a specified length one Null-terminated ASCII string to another
678 Null-terminated ASCII string and returns the new ASCII string.
679
680 This function copies the contents of the ASCII string Source to the ASCII
681 string Destination, and returns Destination. At most, Length ASCII characters
682 are copied from Source to Destination. If Length is 0, then Destination is
683 returned unmodified. If Length is greater that the number of ASCII characters
684 in Source, then Destination is padded with Null ASCII characters. If Source
685 and Destination overlap, then the results are undefined.
686
687 If Destination is NULL, then ASSERT().
688 If Source is NULL, then ASSERT().
689 If Source and Destination overlap, then ASSERT().
690 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
691 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
692 then ASSERT().
693
694 @param Destination Pointer to a Null-terminated ASCII string.
695 @param Source Pointer to a Null-terminated ASCII string.
696 @param Length Maximum number of ASCII characters to copy.
697
698 @return Destination
699
700 **/
701 CHAR8 *
702 EFIAPI
703 AsciiStrnCpy (
704 OUT CHAR8 *Destination,
705 IN CONST CHAR8 *Source,
706 IN UINTN Length
707 );
708
709
710 /**
711 Returns the length of a Null-terminated ASCII string.
712
713 This function returns the number of ASCII characters in the Null-terminated
714 ASCII string specified by String.
715
716 If Length > 0 and Destination is NULL, then ASSERT().
717 If Length > 0 and Source is NULL, then ASSERT().
718 If PcdMaximumAsciiStringLength is not zero and String contains more than
719 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
720 then ASSERT().
721
722 @param String Pointer to a Null-terminated ASCII string.
723
724 @return The length of String.
725
726 **/
727 UINTN
728 EFIAPI
729 AsciiStrLen (
730 IN CONST CHAR8 *String
731 );
732
733
734 /**
735 Returns the size of a Null-terminated ASCII string in bytes, including the
736 Null terminator.
737
738 This function returns the size, in bytes, of the Null-terminated ASCII string
739 specified by String.
740
741 If String is NULL, then ASSERT().
742 If PcdMaximumAsciiStringLength is not zero and String contains more than
743 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
744 then ASSERT().
745
746 @param String Pointer to a Null-terminated ASCII string.
747
748 @return The size of String.
749
750 **/
751 UINTN
752 EFIAPI
753 AsciiStrSize (
754 IN CONST CHAR8 *String
755 );
756
757
758 /**
759 Compares two Null-terminated ASCII strings, and returns the difference
760 between the first mismatched ASCII characters.
761
762 This function compares the Null-terminated ASCII string FirstString to the
763 Null-terminated ASCII string SecondString. If FirstString is identical to
764 SecondString, then 0 is returned. Otherwise, the value returned is the first
765 mismatched ASCII character in SecondString subtracted from the first
766 mismatched ASCII character in FirstString.
767
768 If FirstString is NULL, then ASSERT().
769 If SecondString is NULL, then ASSERT().
770 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
771 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
772 then ASSERT().
773 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
774 than PcdMaximumAsciiStringLength ASCII characters not including the
775 Null-terminator, then ASSERT().
776
777 @param FirstString Pointer to a Null-terminated ASCII string.
778 @param SecondString Pointer to a Null-terminated ASCII string.
779
780 @retval ==0 FirstString is identical to SecondString.
781 @retval !=0 FirstString is not identical to SecondString.
782
783 **/
784 INTN
785 EFIAPI
786 AsciiStrCmp (
787 IN CONST CHAR8 *FirstString,
788 IN CONST CHAR8 *SecondString
789 );
790
791
792 /**
793 Performs a case insensitive comparison of two Null-terminated ASCII strings,
794 and returns the difference between the first mismatched ASCII characters.
795
796 This function performs a case insensitive comparison of the Null-terminated
797 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
798 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
799 value returned is the first mismatched lower case ASCII character in
800 SecondString subtracted from the first mismatched lower case ASCII character
801 in FirstString.
802
803 If FirstString is NULL, then ASSERT().
804 If SecondString is NULL, then ASSERT().
805 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
806 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
807 then ASSERT().
808 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
809 than PcdMaximumAsciiStringLength ASCII characters not including the
810 Null-terminator, then ASSERT().
811
812 @param FirstString Pointer to a Null-terminated ASCII string.
813 @param SecondString Pointer to a Null-terminated ASCII string.
814
815 @retval ==0 FirstString is identical to SecondString using case insensitive
816 comparisons.
817 @retval !=0 FirstString is not identical to SecondString using case
818 insensitive comparisons.
819
820 **/
821 INTN
822 EFIAPI
823 AsciiStriCmp (
824 IN CONST CHAR8 *FirstString,
825 IN CONST CHAR8 *SecondString
826 );
827
828
829 /**
830 Compares two Null-terminated ASCII strings with maximum lengths, and returns
831 the difference between the first mismatched ASCII characters.
832
833 This function compares the Null-terminated ASCII string FirstString to the
834 Null-terminated ASCII string SecondString. At most, Length ASCII characters
835 will be compared. If Length is 0, then 0 is returned. If FirstString is
836 identical to SecondString, then 0 is returned. Otherwise, the value returned
837 is the first mismatched ASCII character in SecondString subtracted from the
838 first mismatched ASCII character in FirstString.
839
840 If Length > 0 and FirstString is NULL, then ASSERT().
841 If Length > 0 and SecondString is NULL, then ASSERT().
842 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
843 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
844 then ASSERT().
845 If PcdMaximumAsciiStringLength is not zero and SecondString contains more than
846 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
847 then ASSERT().
848
849 @param FirstString Pointer to a Null-terminated ASCII string.
850 @param SecondString Pointer to a Null-terminated ASCII string.
851 @param Length Maximum number of ASCII characters for compare.
852
853 @retval ==0 FirstString is identical to SecondString.
854 @retval !=0 FirstString is not identical to SecondString.
855
856 **/
857 INTN
858 EFIAPI
859 AsciiStrnCmp (
860 IN CONST CHAR8 *FirstString,
861 IN CONST CHAR8 *SecondString,
862 IN UINTN Length
863 );
864
865
866 /**
867 Concatenates one Null-terminated ASCII string to another Null-terminated
868 ASCII string, and returns the concatenated ASCII string.
869
870 This function concatenates two Null-terminated ASCII strings. The contents of
871 Null-terminated ASCII string Source are concatenated to the end of Null-
872 terminated ASCII string Destination. The Null-terminated concatenated ASCII
873 String is returned.
874
875 If Destination is NULL, then ASSERT().
876 If Source is NULL, then ASSERT().
877 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
878 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
879 then ASSERT().
880 If PcdMaximumAsciiStringLength is not zero and Source contains more than
881 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
882 then ASSERT().
883 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
884 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
885 ASCII characters, then ASSERT().
886
887 @param Destination Pointer to a Null-terminated ASCII string.
888 @param Source Pointer to a Null-terminated ASCII string.
889
890 @return Destination
891
892 **/
893 CHAR8 *
894 EFIAPI
895 AsciiStrCat (
896 IN OUT CHAR8 *Destination,
897 IN CONST CHAR8 *Source
898 );
899
900
901 /**
902 Concatenates up to a specified length one Null-terminated ASCII string to
903 the end of another Null-terminated ASCII string, and returns the
904 concatenated ASCII string.
905
906 This function concatenates two Null-terminated ASCII strings. The contents
907 of Null-terminated ASCII string Source are concatenated to the end of Null-
908 terminated ASCII string Destination, and Destination is returned. At most,
909 Length ASCII characters are concatenated from Source to the end of
910 Destination, and Destination is always Null-terminated. If Length is 0, then
911 Destination is returned unmodified. If Source and Destination overlap, then
912 the results are undefined.
913
914 If Length > 0 and Destination is NULL, then ASSERT().
915 If Length > 0 and Source is NULL, then ASSERT().
916 If Source and Destination overlap, then ASSERT().
917 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
918 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
919 then ASSERT().
920 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
921 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
922 then ASSERT().
923 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
924 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
925 ASCII characters not including the Null-terminator, then ASSERT().
926
927 @param Destination Pointer to a Null-terminated ASCII string.
928 @param Source Pointer to a Null-terminated ASCII string.
929 @param Length Maximum number of ASCII characters to concatenate from
930 Source.
931
932 @return Destination
933
934 **/
935 CHAR8 *
936 EFIAPI
937 AsciiStrnCat (
938 IN OUT CHAR8 *Destination,
939 IN CONST CHAR8 *Source,
940 IN UINTN Length
941 );
942
943
944 /**
945 Returns the first occurrence of a Null-terminated ASCII sub-string
946 in a Null-terminated ASCII string.
947
948 This function scans the contents of the ASCII string specified by String
949 and returns the first occurrence of SearchString. If SearchString is not
950 found in String, then NULL is returned. If the length of SearchString is zero,
951 then String is returned.
952
953 If String is NULL, then ASSERT().
954 If SearchString is NULL, then ASSERT().
955
956 If PcdMaximumAsciiStringLength is not zero, and SearchString or
957 String contains more than PcdMaximumAsciiStringLength Unicode characters
958 not including the Null-terminator, then ASSERT().
959
960 @param String Pointer to a Null-terminated ASCII string.
961 @param SearchString Pointer to a Null-terminated ASCII string to search for.
962
963 @retval NULL If the SearchString does not appear in String.
964 @retval others If there is a match return the first occurrence of SearchingString.
965 If the length of SearchString is zero,return String.
966
967 **/
968 CHAR8 *
969 EFIAPI
970 AsciiStrStr (
971 IN CONST CHAR8 *String,
972 IN CONST CHAR8 *SearchString
973 );
974
975
976 /**
977 Convert a Null-terminated ASCII decimal string to a value of type
978 UINTN.
979
980 This function returns a value of type UINTN by interpreting the contents
981 of the ASCII string String as a decimal number. The format of the input
982 ASCII string String is:
983
984 [spaces] [decimal digits].
985
986 The valid decimal digit character is in the range [0-9]. The function will
987 ignore the pad space, which includes spaces or tab characters, before the digits.
988 The running zero in the beginning of [decimal digits] will be ignored. Then, the
989 function stops at the first character that is a not a valid decimal character or
990 Null-terminator, whichever on comes first.
991
992 If String has only pad spaces, then 0 is returned.
993 If String has no pad spaces or valid decimal digits, then 0 is returned.
994 If the number represented by String overflows according to the range defined by
995 UINTN, then ASSERT().
996 If String is NULL, then ASSERT().
997 If PcdMaximumAsciiStringLength is not zero, and String contains more than
998 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
999 then ASSERT().
1000
1001 @param String Pointer to a Null-terminated ASCII string.
1002
1003 @retval Value translated from String.
1004
1005 **/
1006 UINTN
1007 EFIAPI
1008 AsciiStrDecimalToUintn (
1009 IN CONST CHAR8 *String
1010 );
1011
1012
1013 /**
1014 Convert a Null-terminated ASCII decimal string to a value of type
1015 UINT64.
1016
1017 This function returns a value of type UINT64 by interpreting the contents
1018 of the ASCII string String as a decimal number. The format of the input
1019 ASCII string String is:
1020
1021 [spaces] [decimal digits].
1022
1023 The valid decimal digit character is in the range [0-9]. The function will
1024 ignore the pad space, which includes spaces or tab characters, before the digits.
1025 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1026 function stops at the first character that is a not a valid decimal character or
1027 Null-terminator, whichever on comes first.
1028
1029 If String has only pad spaces, then 0 is returned.
1030 If String has no pad spaces or valid decimal digits, then 0 is returned.
1031 If the number represented by String overflows according to the range defined by
1032 UINT64, then ASSERT().
1033 If String is NULL, then ASSERT().
1034 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1035 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1036 then ASSERT().
1037
1038 @param String Pointer to a Null-terminated ASCII string.
1039
1040 @retval Value translated from String.
1041
1042 **/
1043 UINT64
1044 EFIAPI
1045 AsciiStrDecimalToUint64 (
1046 IN CONST CHAR8 *String
1047 );
1048
1049
1050 /**
1051 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1052
1053 This function returns a value of type UINTN by interpreting the contents of
1054 the ASCII string String as a hexadecimal number. The format of the input ASCII
1055 string String is:
1056
1057 [spaces][zeros][x][hexadecimal digits].
1058
1059 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1060 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1061 appears in the input string, it must be prefixed with at least one 0. The function
1062 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1063 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1064 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1065 digit. Then, the function stops at the first character that is a not a valid
1066 hexadecimal character or Null-terminator, whichever on comes first.
1067
1068 If String has only pad spaces, then 0 is returned.
1069 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1070 0 is returned.
1071
1072 If the number represented by String overflows according to the range defined by UINTN,
1073 then ASSERT().
1074 If String is NULL, then ASSERT().
1075 If PcdMaximumAsciiStringLength is not zero,
1076 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1077 the Null-terminator, then ASSERT().
1078
1079 @param String Pointer to a Null-terminated ASCII string.
1080
1081 @retval Value translated from String.
1082
1083 **/
1084 UINTN
1085 EFIAPI
1086 AsciiStrHexToUintn (
1087 IN CONST CHAR8 *String
1088 );
1089
1090
1091 /**
1092 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1093
1094 This function returns a value of type UINT64 by interpreting the contents of
1095 the ASCII string String as a hexadecimal number. The format of the input ASCII
1096 string String is:
1097
1098 [spaces][zeros][x][hexadecimal digits].
1099
1100 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1101 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1102 appears in the input string, it must be prefixed with at least one 0. The function
1103 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1104 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1105 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1106 digit. Then, the function stops at the first character that is a not a valid
1107 hexadecimal character or Null-terminator, whichever on comes first.
1108
1109 If String has only pad spaces, then 0 is returned.
1110 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1111 0 is returned.
1112
1113 If the number represented by String overflows according to the range defined by UINT64,
1114 then ASSERT().
1115 If String is NULL, then ASSERT().
1116 If PcdMaximumAsciiStringLength is not zero,
1117 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1118 the Null-terminator, then ASSERT().
1119
1120 @param String Pointer to a Null-terminated ASCII string.
1121
1122 @retval Value translated from String.
1123
1124 **/
1125 UINT64
1126 EFIAPI
1127 AsciiStrHexToUint64 (
1128 IN CONST CHAR8 *String
1129 );
1130
1131
1132 /**
1133 Convert one Null-terminated ASCII string to a Null-terminated
1134 Unicode string and returns the Unicode string.
1135
1136 This function converts the contents of the ASCII string Source to the Unicode
1137 string Destination, and returns Destination. The function terminates the
1138 Unicode string Destination by appending a Null-terminator character at the end.
1139 The caller is responsible to make sure Destination points to a buffer with size
1140 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1141
1142 If Destination is NULL, then ASSERT().
1143 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1144 If Source is NULL, then ASSERT().
1145 If Source and Destination overlap, then ASSERT().
1146 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1147 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1148 then ASSERT().
1149 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1150 PcdMaximumUnicodeStringLength ASCII characters not including the
1151 Null-terminator, then ASSERT().
1152
1153 @param Source Pointer to a Null-terminated ASCII string.
1154 @param Destination Pointer to a Null-terminated Unicode string.
1155
1156 @return Destination.
1157
1158 **/
1159 CHAR16 *
1160 EFIAPI
1161 AsciiStrToUnicodeStr (
1162 IN CONST CHAR8 *Source,
1163 OUT CHAR16 *Destination
1164 );
1165
1166
1167 /**
1168 Converts an 8-bit value to an 8-bit BCD value.
1169
1170 Converts the 8-bit value specified by Value to BCD. The BCD value is
1171 returned.
1172
1173 If Value >= 100, then ASSERT().
1174
1175 @param Value The 8-bit value to convert to BCD. Range 0..99.
1176
1177 @return The BCD value.
1178
1179 **/
1180 UINT8
1181 EFIAPI
1182 DecimalToBcd8 (
1183 IN UINT8 Value
1184 );
1185
1186
1187 /**
1188 Converts an 8-bit BCD value to an 8-bit value.
1189
1190 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1191 value is returned.
1192
1193 If Value >= 0xA0, then ASSERT().
1194 If (Value & 0x0F) >= 0x0A, then ASSERT().
1195
1196 @param Value The 8-bit BCD value to convert to an 8-bit value.
1197
1198 @return The 8-bit value is returned.
1199
1200 **/
1201 UINT8
1202 EFIAPI
1203 BcdToDecimal8 (
1204 IN UINT8 Value
1205 );
1206
1207
1208 //
1209 // Linked List Functions and Macros
1210 //
1211
1212 /**
1213 Initializes the head node of a doubly linked list that is declared as a
1214 global variable in a module.
1215
1216 Initializes the forward and backward links of a new linked list. After
1217 initializing a linked list with this macro, the other linked list functions
1218 may be used to add and remove nodes from the linked list. This macro results
1219 in smaller executables by initializing the linked list in the data section,
1220 instead if calling the InitializeListHead() function to perform the
1221 equivalent operation.
1222
1223 @param ListHead The head note of a list to initiailize.
1224
1225 **/
1226 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1227
1228
1229 /**
1230 Initializes the head node of a doubly linked list, and returns the pointer to
1231 the head node of the doubly linked list.
1232
1233 Initializes the forward and backward links of a new linked list. After
1234 initializing a linked list with this function, the other linked list
1235 functions may be used to add and remove nodes from the linked list. It is up
1236 to the caller of this function to allocate the memory for ListHead.
1237
1238 If ListHead is NULL, then ASSERT().
1239
1240 @param ListHead A pointer to the head node of a new doubly linked list.
1241
1242 @return ListHead
1243
1244 **/
1245 LIST_ENTRY *
1246 EFIAPI
1247 InitializeListHead (
1248 IN OUT LIST_ENTRY *ListHead
1249 );
1250
1251
1252 /**
1253 Adds a node to the beginning of a doubly linked list, and returns the pointer
1254 to the head node of the doubly linked list.
1255
1256 Adds the node Entry at the beginning of the doubly linked list denoted by
1257 ListHead, and returns ListHead.
1258
1259 If ListHead is NULL, then ASSERT().
1260 If Entry is NULL, then ASSERT().
1261 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1262 InitializeListHead(), then ASSERT().
1263 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1264 of nodes in ListHead, including the ListHead node, is greater than or
1265 equal to PcdMaximumLinkedListLength, then ASSERT().
1266
1267 @param ListHead A pointer to the head node of a doubly linked list.
1268 @param Entry A pointer to a node that is to be inserted at the beginning
1269 of a doubly linked list.
1270
1271 @return ListHead
1272
1273 **/
1274 LIST_ENTRY *
1275 EFIAPI
1276 InsertHeadList (
1277 IN OUT LIST_ENTRY *ListHead,
1278 IN OUT LIST_ENTRY *Entry
1279 );
1280
1281
1282 /**
1283 Adds a node to the end of a doubly linked list, and returns the pointer to
1284 the head node of the doubly linked list.
1285
1286 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1287 and returns ListHead.
1288
1289 If ListHead is NULL, then ASSERT().
1290 If Entry is NULL, then ASSERT().
1291 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1292 InitializeListHead(), then ASSERT().
1293 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1294 of nodes in ListHead, including the ListHead node, is greater than or
1295 equal to PcdMaximumLinkedListLength, then ASSERT().
1296
1297 @param ListHead A pointer to the head node of a doubly linked list.
1298 @param Entry A pointer to a node that is to be added at the end of the
1299 doubly linked list.
1300
1301 @return ListHead
1302
1303 **/
1304 LIST_ENTRY *
1305 EFIAPI
1306 InsertTailList (
1307 IN OUT LIST_ENTRY *ListHead,
1308 IN OUT LIST_ENTRY *Entry
1309 );
1310
1311
1312 /**
1313 Retrieves the first node of a doubly linked list.
1314
1315 Returns the first node of a doubly linked list. List must have been
1316 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1317 If List is empty, then List is returned.
1318
1319 If List is NULL, then ASSERT().
1320 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1321 InitializeListHead(), then ASSERT().
1322 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1323 in List, including the List node, is greater than or equal to
1324 PcdMaximumLinkedListLength, then ASSERT().
1325
1326 @param List A pointer to the head node of a doubly linked list.
1327
1328 @return The first node of a doubly linked list.
1329 @retval NULL The list is empty.
1330
1331 **/
1332 LIST_ENTRY *
1333 EFIAPI
1334 GetFirstNode (
1335 IN CONST LIST_ENTRY *List
1336 );
1337
1338
1339 /**
1340 Retrieves the next node of a doubly linked list.
1341
1342 Returns the node of a doubly linked list that follows Node.
1343 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1344 or InitializeListHead(). If List is empty, then List is returned.
1345
1346 If List is NULL, then ASSERT().
1347 If Node is NULL, then ASSERT().
1348 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1349 InitializeListHead(), then ASSERT().
1350 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1351 PcdMaximumLinkedListLenth nodes, then ASSERT().
1352 If Node is not a node in List, then ASSERT().
1353
1354 @param List A pointer to the head node of a doubly linked list.
1355 @param Node A pointer to a node in the doubly linked list.
1356
1357 @return Pointer to the next node if one exists. Otherwise a null value which
1358 is actually List is returned.
1359
1360 **/
1361 LIST_ENTRY *
1362 EFIAPI
1363 GetNextNode (
1364 IN CONST LIST_ENTRY *List,
1365 IN CONST LIST_ENTRY *Node
1366 );
1367
1368
1369 /**
1370 Checks to see if a doubly linked list is empty or not.
1371
1372 Checks to see if the doubly linked list is empty. If the linked list contains
1373 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1374
1375 If ListHead is NULL, then ASSERT().
1376 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1377 InitializeListHead(), then ASSERT().
1378 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1379 in List, including the List node, is greater than or equal to
1380 PcdMaximumLinkedListLength, then ASSERT().
1381
1382 @param ListHead A pointer to the head node of a doubly linked list.
1383
1384 @retval TRUE The linked list is empty.
1385 @retval FALSE The linked list is not empty.
1386
1387 **/
1388 BOOLEAN
1389 EFIAPI
1390 IsListEmpty (
1391 IN CONST LIST_ENTRY *ListHead
1392 );
1393
1394
1395 /**
1396 Determines if a node in a doubly linked list is the head node of a the same
1397 doubly linked list. This function is typically used to terminate a loop that
1398 traverses all the nodes in a doubly linked list starting with the head node.
1399
1400 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1401 nodes in the doubly linked list specified by List. List must have been
1402 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1403
1404 If List is NULL, then ASSERT().
1405 If Node is NULL, then ASSERT().
1406 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1407 then ASSERT().
1408 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1409 in List, including the List node, is greater than or equal to
1410 PcdMaximumLinkedListLength, then ASSERT().
1411 If Node is not a node in List and Node is not equal to List, then ASSERT().
1412
1413 @param List A pointer to the head node of a doubly linked list.
1414 @param Node A pointer to a node in the doubly linked list.
1415
1416 @retval TRUE Node is one of the nodes in the doubly linked list.
1417 @retval FALSE Node is not one of the nodes in the doubly linked list.
1418
1419 **/
1420 BOOLEAN
1421 EFIAPI
1422 IsNull (
1423 IN CONST LIST_ENTRY *List,
1424 IN CONST LIST_ENTRY *Node
1425 );
1426
1427
1428 /**
1429 Determines if a node the last node in a doubly linked list.
1430
1431 Returns TRUE if Node is the last node in the doubly linked list specified by
1432 List. Otherwise, FALSE is returned. List must have been initialized with
1433 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1434
1435 If List is NULL, then ASSERT().
1436 If Node is NULL, then ASSERT().
1437 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1438 InitializeListHead(), then ASSERT().
1439 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1440 in List, including the List node, is greater than or equal to
1441 PcdMaximumLinkedListLength, then ASSERT().
1442 If Node is not a node in List, then ASSERT().
1443
1444 @param List A pointer to the head node of a doubly linked list.
1445 @param Node A pointer to a node in the doubly linked list.
1446
1447 @retval TRUE Node is the last node in the linked list.
1448 @retval FALSE Node is not the last node in the linked list.
1449
1450 **/
1451 BOOLEAN
1452 EFIAPI
1453 IsNodeAtEnd (
1454 IN CONST LIST_ENTRY *List,
1455 IN CONST LIST_ENTRY *Node
1456 );
1457
1458
1459 /**
1460 Swaps the location of two nodes in a doubly linked list, and returns the
1461 first node after the swap.
1462
1463 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1464 Otherwise, the location of the FirstEntry node is swapped with the location
1465 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1466 same double linked list as FirstEntry and that double linked list must have
1467 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1468 SecondEntry is returned after the nodes are swapped.
1469
1470 If FirstEntry is NULL, then ASSERT().
1471 If SecondEntry is NULL, then ASSERT().
1472 If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
1473 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1474 linked list containing the FirstEntry and SecondEntry nodes, including
1475 the FirstEntry and SecondEntry nodes, is greater than or equal to
1476 PcdMaximumLinkedListLength, then ASSERT().
1477
1478 @param FirstEntry A pointer to a node in a linked list.
1479 @param SecondEntry A pointer to another node in the same linked list.
1480
1481 @return SecondEntry.
1482
1483 **/
1484 LIST_ENTRY *
1485 EFIAPI
1486 SwapListEntries (
1487 IN OUT LIST_ENTRY *FirstEntry,
1488 IN OUT LIST_ENTRY *SecondEntry
1489 );
1490
1491
1492 /**
1493 Removes a node from a doubly linked list, and returns the node that follows
1494 the removed node.
1495
1496 Removes the node Entry from a doubly linked list. It is up to the caller of
1497 this function to release the memory used by this node if that is required. On
1498 exit, the node following Entry in the doubly linked list is returned. If
1499 Entry is the only node in the linked list, then the head node of the linked
1500 list is returned.
1501
1502 If Entry is NULL, then ASSERT().
1503 If Entry is the head node of an empty list, then ASSERT().
1504 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1505 linked list containing Entry, including the Entry node, is greater than
1506 or equal to PcdMaximumLinkedListLength, then ASSERT().
1507
1508 @param Entry A pointer to a node in a linked list.
1509
1510 @return Entry.
1511
1512 **/
1513 LIST_ENTRY *
1514 EFIAPI
1515 RemoveEntryList (
1516 IN CONST LIST_ENTRY *Entry
1517 );
1518
1519 //
1520 // Math Services
1521 //
1522
1523 /**
1524 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1525 with zeros. The shifted value is returned.
1526
1527 This function shifts the 64-bit value Operand to the left by Count bits. The
1528 low Count bits are set to zero. The shifted value is returned.
1529
1530 If Count is greater than 63, then ASSERT().
1531
1532 @param Operand The 64-bit operand to shift left.
1533 @param Count The number of bits to shift left.
1534
1535 @return Operand << Count.
1536
1537 **/
1538 UINT64
1539 EFIAPI
1540 LShiftU64 (
1541 IN UINT64 Operand,
1542 IN UINTN Count
1543 );
1544
1545
1546 /**
1547 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1548 filled with zeros. The shifted value is returned.
1549
1550 This function shifts the 64-bit value Operand to the right by Count bits. The
1551 high Count bits are set to zero. The shifted value is returned.
1552
1553 If Count is greater than 63, then ASSERT().
1554
1555 @param Operand The 64-bit operand to shift right.
1556 @param Count The number of bits to shift right.
1557
1558 @return Operand >> Count
1559
1560 **/
1561 UINT64
1562 EFIAPI
1563 RShiftU64 (
1564 IN UINT64 Operand,
1565 IN UINTN Count
1566 );
1567
1568
1569 /**
1570 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1571 with original integer's bit 63. The shifted value is returned.
1572
1573 This function shifts the 64-bit value Operand to the right by Count bits. The
1574 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1575
1576 If Count is greater than 63, then ASSERT().
1577
1578 @param Operand The 64-bit operand to shift right.
1579 @param Count The number of bits to shift right.
1580
1581 @return Operand >> Count
1582
1583 **/
1584 UINT64
1585 EFIAPI
1586 ARShiftU64 (
1587 IN UINT64 Operand,
1588 IN UINTN Count
1589 );
1590
1591
1592 /**
1593 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1594 with the high bits that were rotated.
1595
1596 This function rotates the 32-bit value Operand to the left by Count bits. The
1597 low Count bits are fill with the high Count bits of Operand. The rotated
1598 value is returned.
1599
1600 If Count is greater than 31, then ASSERT().
1601
1602 @param Operand The 32-bit operand to rotate left.
1603 @param Count The number of bits to rotate left.
1604
1605 @return Operand << Count
1606
1607 **/
1608 UINT32
1609 EFIAPI
1610 LRotU32 (
1611 IN UINT32 Operand,
1612 IN UINTN Count
1613 );
1614
1615
1616 /**
1617 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1618 with the low bits that were rotated.
1619
1620 This function rotates the 32-bit value Operand to the right by Count bits.
1621 The high Count bits are fill with the low Count bits of Operand. The rotated
1622 value is returned.
1623
1624 If Count is greater than 31, then ASSERT().
1625
1626 @param Operand The 32-bit operand to rotate right.
1627 @param Count The number of bits to rotate right.
1628
1629 @return Operand >>> Count
1630
1631 **/
1632 UINT32
1633 EFIAPI
1634 RRotU32 (
1635 IN UINT32 Operand,
1636 IN UINTN Count
1637 );
1638
1639
1640 /**
1641 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1642 with the high bits that were rotated.
1643
1644 This function rotates the 64-bit value Operand to the left by Count bits. The
1645 low Count bits are fill with the high Count bits of Operand. The rotated
1646 value is returned.
1647
1648 If Count is greater than 63, then ASSERT().
1649
1650 @param Operand The 64-bit operand to rotate left.
1651 @param Count The number of bits to rotate left.
1652
1653 @return Operand << Count
1654
1655 **/
1656 UINT64
1657 EFIAPI
1658 LRotU64 (
1659 IN UINT64 Operand,
1660 IN UINTN Count
1661 );
1662
1663
1664 /**
1665 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1666 with the high low bits that were rotated.
1667
1668 This function rotates the 64-bit value Operand to the right by Count bits.
1669 The high Count bits are fill with the low Count bits of Operand. The rotated
1670 value is returned.
1671
1672 If Count is greater than 63, then ASSERT().
1673
1674 @param Operand The 64-bit operand to rotate right.
1675 @param Count The number of bits to rotate right.
1676
1677 @return Operand >> Count
1678
1679 **/
1680 UINT64
1681 EFIAPI
1682 RRotU64 (
1683 IN UINT64 Operand,
1684 IN UINTN Count
1685 );
1686
1687
1688 /**
1689 Returns the bit position of the lowest bit set in a 32-bit value.
1690
1691 This function computes the bit position of the lowest bit set in the 32-bit
1692 value specified by Operand. If Operand is zero, then -1 is returned.
1693 Otherwise, a value between 0 and 31 is returned.
1694
1695 @param Operand The 32-bit operand to evaluate.
1696
1697 @retval 0..31 The lowest bit set in Operand was found.
1698 @retval -1 Operand is zero.
1699
1700 **/
1701 INTN
1702 EFIAPI
1703 LowBitSet32 (
1704 IN UINT32 Operand
1705 );
1706
1707
1708 /**
1709 Returns the bit position of the lowest bit set in a 64-bit value.
1710
1711 This function computes the bit position of the lowest bit set in the 64-bit
1712 value specified by Operand. If Operand is zero, then -1 is returned.
1713 Otherwise, a value between 0 and 63 is returned.
1714
1715 @param Operand The 64-bit operand to evaluate.
1716
1717 @retval 0..63 The lowest bit set in Operand was found.
1718 @retval -1 Operand is zero.
1719
1720
1721 **/
1722 INTN
1723 EFIAPI
1724 LowBitSet64 (
1725 IN UINT64 Operand
1726 );
1727
1728
1729 /**
1730 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1731 to log2(x).
1732
1733 This function computes the bit position of the highest bit set in the 32-bit
1734 value specified by Operand. If Operand is zero, then -1 is returned.
1735 Otherwise, a value between 0 and 31 is returned.
1736
1737 @param Operand The 32-bit operand to evaluate.
1738
1739 @retval 0..31 Position of the highest bit set in Operand if found.
1740 @retval -1 Operand is zero.
1741
1742 **/
1743 INTN
1744 EFIAPI
1745 HighBitSet32 (
1746 IN UINT32 Operand
1747 );
1748
1749
1750 /**
1751 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1752 to log2(x).
1753
1754 This function computes the bit position of the highest bit set in the 64-bit
1755 value specified by Operand. If Operand is zero, then -1 is returned.
1756 Otherwise, a value between 0 and 63 is returned.
1757
1758 @param Operand The 64-bit operand to evaluate.
1759
1760 @retval 0..63 Position of the highest bit set in Operand if found.
1761 @retval -1 Operand is zero.
1762
1763 **/
1764 INTN
1765 EFIAPI
1766 HighBitSet64 (
1767 IN UINT64 Operand
1768 );
1769
1770
1771 /**
1772 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1773 1 << log2(x).
1774
1775 This function computes the value of the highest bit set in the 32-bit value
1776 specified by Operand. If Operand is zero, then zero is returned.
1777
1778 @param Operand The 32-bit operand to evaluate.
1779
1780 @return 1 << HighBitSet32(Operand)
1781 @retval 0 Operand is zero.
1782
1783 **/
1784 UINT32
1785 EFIAPI
1786 GetPowerOfTwo32 (
1787 IN UINT32 Operand
1788 );
1789
1790
1791 /**
1792 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1793 1 << log2(x).
1794
1795 This function computes the value of the highest bit set in the 64-bit value
1796 specified by Operand. If Operand is zero, then zero is returned.
1797
1798 @param Operand The 64-bit operand to evaluate.
1799
1800 @return 1 << HighBitSet64(Operand)
1801 @retval 0 Operand is zero.
1802
1803 **/
1804 UINT64
1805 EFIAPI
1806 GetPowerOfTwo64 (
1807 IN UINT64 Operand
1808 );
1809
1810
1811 /**
1812 Switches the endianess of a 16-bit integer.
1813
1814 This function swaps the bytes in a 16-bit unsigned value to switch the value
1815 from little endian to big endian or vice versa. The byte swapped value is
1816 returned.
1817
1818 @param Value Operand A 16-bit unsigned value.
1819
1820 @return The byte swapped Operand.
1821
1822 **/
1823 UINT16
1824 EFIAPI
1825 SwapBytes16 (
1826 IN UINT16 Value
1827 );
1828
1829
1830 /**
1831 Switches the endianess of a 32-bit integer.
1832
1833 This function swaps the bytes in a 32-bit unsigned value to switch the value
1834 from little endian to big endian or vice versa. The byte swapped value is
1835 returned.
1836
1837 @param Value Operand A 32-bit unsigned value.
1838
1839 @return The byte swapped Operand.
1840
1841 **/
1842 UINT32
1843 EFIAPI
1844 SwapBytes32 (
1845 IN UINT32 Value
1846 );
1847
1848
1849 /**
1850 Switches the endianess of a 64-bit integer.
1851
1852 This function swaps the bytes in a 64-bit unsigned value to switch the value
1853 from little endian to big endian or vice versa. The byte swapped value is
1854 returned.
1855
1856 @param Value Operand A 64-bit unsigned value.
1857
1858 @return The byte swapped Operand.
1859
1860 **/
1861 UINT64
1862 EFIAPI
1863 SwapBytes64 (
1864 IN UINT64 Value
1865 );
1866
1867
1868 /**
1869 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1870 generates a 64-bit unsigned result.
1871
1872 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1873 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1874 bit unsigned result is returned.
1875
1876 @param Multiplicand A 64-bit unsigned value.
1877 @param Multiplier A 32-bit unsigned value.
1878
1879 @return Multiplicand * Multiplier
1880
1881 **/
1882 UINT64
1883 EFIAPI
1884 MultU64x32 (
1885 IN UINT64 Multiplicand,
1886 IN UINT32 Multiplier
1887 );
1888
1889
1890 /**
1891 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1892 generates a 64-bit unsigned result.
1893
1894 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1895 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1896 bit unsigned result is returned.
1897
1898 If the result overflows, then ASSERT().
1899
1900 @param Multiplicand A 64-bit unsigned value.
1901 @param Multiplier A 64-bit unsigned value.
1902
1903 @return Multiplicand * Multiplier
1904
1905 **/
1906 UINT64
1907 EFIAPI
1908 MultU64x64 (
1909 IN UINT64 Multiplicand,
1910 IN UINT64 Multiplier
1911 );
1912
1913
1914 /**
1915 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1916 64-bit signed result.
1917
1918 This function multiples the 64-bit signed value Multiplicand by the 64-bit
1919 signed value Multiplier and generates a 64-bit signed result. This 64-bit
1920 signed result is returned.
1921
1922 @param Multiplicand A 64-bit signed value.
1923 @param Multiplier A 64-bit signed value.
1924
1925 @return Multiplicand * Multiplier
1926
1927 **/
1928 INT64
1929 EFIAPI
1930 MultS64x64 (
1931 IN INT64 Multiplicand,
1932 IN INT64 Multiplier
1933 );
1934
1935
1936 /**
1937 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1938 a 64-bit unsigned result.
1939
1940 This function divides the 64-bit unsigned value Dividend by the 32-bit
1941 unsigned value Divisor and generates a 64-bit unsigned quotient. This
1942 function returns the 64-bit unsigned quotient.
1943
1944 If Divisor is 0, then ASSERT().
1945
1946 @param Dividend A 64-bit unsigned value.
1947 @param Divisor A 32-bit unsigned value.
1948
1949 @return Dividend / Divisor
1950
1951 **/
1952 UINT64
1953 EFIAPI
1954 DivU64x32 (
1955 IN UINT64 Dividend,
1956 IN UINT32 Divisor
1957 );
1958
1959
1960 /**
1961 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1962 a 32-bit unsigned remainder.
1963
1964 This function divides the 64-bit unsigned value Dividend by the 32-bit
1965 unsigned value Divisor and generates a 32-bit remainder. This function
1966 returns the 32-bit unsigned remainder.
1967
1968 If Divisor is 0, then ASSERT().
1969
1970 @param Dividend A 64-bit unsigned value.
1971 @param Divisor A 32-bit unsigned value.
1972
1973 @return Dividend % Divisor
1974
1975 **/
1976 UINT32
1977 EFIAPI
1978 ModU64x32 (
1979 IN UINT64 Dividend,
1980 IN UINT32 Divisor
1981 );
1982
1983
1984 /**
1985 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1986 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
1987
1988 This function divides the 64-bit unsigned value Dividend by the 32-bit
1989 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
1990 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
1991 This function returns the 64-bit unsigned quotient.
1992
1993 If Divisor is 0, then ASSERT().
1994
1995 @param Dividend A 64-bit unsigned value.
1996 @param Divisor A 32-bit unsigned value.
1997 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
1998 optional and may be NULL.
1999
2000 @return Dividend / Divisor
2001
2002 **/
2003 UINT64
2004 EFIAPI
2005 DivU64x32Remainder (
2006 IN UINT64 Dividend,
2007 IN UINT32 Divisor,
2008 OUT UINT32 *Remainder OPTIONAL
2009 );
2010
2011
2012 /**
2013 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2014 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2015
2016 This function divides the 64-bit unsigned value Dividend by the 64-bit
2017 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2018 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2019 This function returns the 64-bit unsigned quotient.
2020
2021 If Divisor is 0, then ASSERT().
2022
2023 @param Dividend A 64-bit unsigned value.
2024 @param Divisor A 64-bit unsigned value.
2025 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2026 optional and may be NULL.
2027
2028 @return Dividend / Divisor
2029
2030 **/
2031 UINT64
2032 EFIAPI
2033 DivU64x64Remainder (
2034 IN UINT64 Dividend,
2035 IN UINT64 Divisor,
2036 OUT UINT64 *Remainder OPTIONAL
2037 );
2038
2039
2040 /**
2041 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2042 64-bit signed result and a optional 64-bit signed remainder.
2043
2044 This function divides the 64-bit signed value Dividend by the 64-bit signed
2045 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2046 NULL, then the 64-bit signed remainder is returned in Remainder. This
2047 function returns the 64-bit signed quotient.
2048
2049 It is the caller's responsibility to not call this function with a Divisor of 0.
2050 If Divisor is 0, then the quotient and remainder should be assumed to be
2051 the largest negative integer.
2052
2053 If Divisor is 0, then ASSERT().
2054
2055 @param Dividend A 64-bit signed value.
2056 @param Divisor A 64-bit signed value.
2057 @param Remainder A pointer to a 64-bit signed value. This parameter is
2058 optional and may be NULL.
2059
2060 @return Dividend / Divisor
2061
2062 **/
2063 INT64
2064 EFIAPI
2065 DivS64x64Remainder (
2066 IN INT64 Dividend,
2067 IN INT64 Divisor,
2068 OUT INT64 *Remainder OPTIONAL
2069 );
2070
2071
2072 /**
2073 Reads a 16-bit value from memory that may be unaligned.
2074
2075 This function returns the 16-bit value pointed to by Buffer. The function
2076 guarantees that the read operation does not produce an alignment fault.
2077
2078 If the Buffer is NULL, then ASSERT().
2079
2080 @param Buffer Pointer to a 16-bit value that may be unaligned.
2081
2082 @return The 16-bit value read from Buffer.
2083
2084 **/
2085 UINT16
2086 EFIAPI
2087 ReadUnaligned16 (
2088 IN CONST UINT16 *Buffer
2089 );
2090
2091
2092 /**
2093 Writes a 16-bit value to memory that may be unaligned.
2094
2095 This function writes the 16-bit value specified by Value to Buffer. Value is
2096 returned. The function guarantees that the write operation does not produce
2097 an alignment fault.
2098
2099 If the Buffer is NULL, then ASSERT().
2100
2101 @param Buffer Pointer to a 16-bit value that may be unaligned.
2102 @param Value 16-bit value to write to Buffer.
2103
2104 @return The 16-bit value to write to Buffer.
2105
2106 **/
2107 UINT16
2108 EFIAPI
2109 WriteUnaligned16 (
2110 OUT UINT16 *Buffer,
2111 IN UINT16 Value
2112 );
2113
2114
2115 /**
2116 Reads a 24-bit value from memory that may be unaligned.
2117
2118 This function returns the 24-bit value pointed to by Buffer. The function
2119 guarantees that the read operation does not produce an alignment fault.
2120
2121 If the Buffer is NULL, then ASSERT().
2122
2123 @param Buffer Pointer to a 24-bit value that may be unaligned.
2124
2125 @return The 24-bit value read from Buffer.
2126
2127 **/
2128 UINT32
2129 EFIAPI
2130 ReadUnaligned24 (
2131 IN CONST UINT32 *Buffer
2132 );
2133
2134
2135 /**
2136 Writes a 24-bit value to memory that may be unaligned.
2137
2138 This function writes the 24-bit value specified by Value to Buffer. Value is
2139 returned. The function guarantees that the write operation does not produce
2140 an alignment fault.
2141
2142 If the Buffer is NULL, then ASSERT().
2143
2144 @param Buffer Pointer to a 24-bit value that may be unaligned.
2145 @param Value 24-bit value to write to Buffer.
2146
2147 @return The 24-bit value to write to Buffer.
2148
2149 **/
2150 UINT32
2151 EFIAPI
2152 WriteUnaligned24 (
2153 OUT UINT32 *Buffer,
2154 IN UINT32 Value
2155 );
2156
2157
2158 /**
2159 Reads a 32-bit value from memory that may be unaligned.
2160
2161 This function returns the 32-bit value pointed to by Buffer. The function
2162 guarantees that the read operation does not produce an alignment fault.
2163
2164 If the Buffer is NULL, then ASSERT().
2165
2166 @param Buffer Pointer to a 32-bit value that may be unaligned.
2167
2168 @return The 32-bit value read from Buffer.
2169
2170 **/
2171 UINT32
2172 EFIAPI
2173 ReadUnaligned32 (
2174 IN CONST UINT32 *Buffer
2175 );
2176
2177
2178 /**
2179 Writes a 32-bit value to memory that may be unaligned.
2180
2181 This function writes the 32-bit value specified by Value to Buffer. Value is
2182 returned. The function guarantees that the write operation does not produce
2183 an alignment fault.
2184
2185 If the Buffer is NULL, then ASSERT().
2186
2187 @param Buffer Pointer to a 32-bit value that may be unaligned.
2188 @param Value 32-bit value to write to Buffer.
2189
2190 @return The 32-bit value to write to Buffer.
2191
2192 **/
2193 UINT32
2194 EFIAPI
2195 WriteUnaligned32 (
2196 OUT UINT32 *Buffer,
2197 IN UINT32 Value
2198 );
2199
2200
2201 /**
2202 Reads a 64-bit value from memory that may be unaligned.
2203
2204 This function returns the 64-bit value pointed to by Buffer. The function
2205 guarantees that the read operation does not produce an alignment fault.
2206
2207 If the Buffer is NULL, then ASSERT().
2208
2209 @param Buffer Pointer to a 64-bit value that may be unaligned.
2210
2211 @return The 64-bit value read from Buffer.
2212
2213 **/
2214 UINT64
2215 EFIAPI
2216 ReadUnaligned64 (
2217 IN CONST UINT64 *Buffer
2218 );
2219
2220
2221 /**
2222 Writes a 64-bit value to memory that may be unaligned.
2223
2224 This function writes the 64-bit value specified by Value to Buffer. Value is
2225 returned. The function guarantees that the write operation does not produce
2226 an alignment fault.
2227
2228 If the Buffer is NULL, then ASSERT().
2229
2230 @param Buffer Pointer to a 64-bit value that may be unaligned.
2231 @param Value 64-bit value to write to Buffer.
2232
2233 @return The 64-bit value to write to Buffer.
2234
2235 **/
2236 UINT64
2237 EFIAPI
2238 WriteUnaligned64 (
2239 OUT UINT64 *Buffer,
2240 IN UINT64 Value
2241 );
2242
2243
2244 //
2245 // Bit Field Functions
2246 //
2247
2248 /**
2249 Returns a bit field from an 8-bit value.
2250
2251 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2252
2253 If 8-bit operations are not supported, then ASSERT().
2254 If StartBit is greater than 7, then ASSERT().
2255 If EndBit is greater than 7, then ASSERT().
2256 If EndBit is less than StartBit, then ASSERT().
2257
2258 @param Operand Operand on which to perform the bitfield operation.
2259 @param StartBit The ordinal of the least significant bit in the bit field.
2260 Range 0..7.
2261 @param EndBit The ordinal of the most significant bit in the bit field.
2262 Range 0..7.
2263
2264 @return The bit field read.
2265
2266 **/
2267 UINT8
2268 EFIAPI
2269 BitFieldRead8 (
2270 IN UINT8 Operand,
2271 IN UINTN StartBit,
2272 IN UINTN EndBit
2273 );
2274
2275
2276 /**
2277 Writes a bit field to an 8-bit value, and returns the result.
2278
2279 Writes Value to the bit field specified by the StartBit and the EndBit in
2280 Operand. All other bits in Operand are preserved. The new 8-bit value is
2281 returned.
2282
2283 If 8-bit operations are not supported, then ASSERT().
2284 If StartBit is greater than 7, then ASSERT().
2285 If EndBit is greater than 7, then ASSERT().
2286 If EndBit is less than StartBit, then ASSERT().
2287
2288 @param Operand Operand on which to perform the bitfield operation.
2289 @param StartBit The ordinal of the least significant bit in the bit field.
2290 Range 0..7.
2291 @param EndBit The ordinal of the most significant bit in the bit field.
2292 Range 0..7.
2293 @param Value New value of the bit field.
2294
2295 @return The new 8-bit value.
2296
2297 **/
2298 UINT8
2299 EFIAPI
2300 BitFieldWrite8 (
2301 IN UINT8 Operand,
2302 IN UINTN StartBit,
2303 IN UINTN EndBit,
2304 IN UINT8 Value
2305 );
2306
2307
2308 /**
2309 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2310 result.
2311
2312 Performs a bitwise inclusive OR between the bit field specified by StartBit
2313 and EndBit in Operand and the value specified by OrData. All other bits in
2314 Operand are preserved. The new 8-bit value is returned.
2315
2316 If 8-bit operations are not supported, then ASSERT().
2317 If StartBit is greater than 7, then ASSERT().
2318 If EndBit is greater than 7, then ASSERT().
2319 If EndBit is less than StartBit, then ASSERT().
2320
2321 @param Operand Operand on which to perform the bitfield operation.
2322 @param StartBit The ordinal of the least significant bit in the bit field.
2323 Range 0..7.
2324 @param EndBit The ordinal of the most significant bit in the bit field.
2325 Range 0..7.
2326 @param OrData The value to OR with the read value from the value
2327
2328 @return The new 8-bit value.
2329
2330 **/
2331 UINT8
2332 EFIAPI
2333 BitFieldOr8 (
2334 IN UINT8 Operand,
2335 IN UINTN StartBit,
2336 IN UINTN EndBit,
2337 IN UINT8 OrData
2338 );
2339
2340
2341 /**
2342 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2343 the result.
2344
2345 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2346 in Operand and the value specified by AndData. All other bits in Operand are
2347 preserved. The new 8-bit value is returned.
2348
2349 If 8-bit operations are not supported, then ASSERT().
2350 If StartBit is greater than 7, then ASSERT().
2351 If EndBit is greater than 7, then ASSERT().
2352 If EndBit is less than StartBit, then ASSERT().
2353
2354 @param Operand Operand on which to perform the bitfield operation.
2355 @param StartBit The ordinal of the least significant bit in the bit field.
2356 Range 0..7.
2357 @param EndBit The ordinal of the most significant bit in the bit field.
2358 Range 0..7.
2359 @param AndData The value to AND with the read value from the value.
2360
2361 @return The new 8-bit value.
2362
2363 **/
2364 UINT8
2365 EFIAPI
2366 BitFieldAnd8 (
2367 IN UINT8 Operand,
2368 IN UINTN StartBit,
2369 IN UINTN EndBit,
2370 IN UINT8 AndData
2371 );
2372
2373
2374 /**
2375 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2376 bitwise OR, and returns the result.
2377
2378 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2379 in Operand and the value specified by AndData, followed by a bitwise
2380 inclusive OR with value specified by OrData. All other bits in Operand are
2381 preserved. The new 8-bit value is returned.
2382
2383 If 8-bit operations are not supported, then ASSERT().
2384 If StartBit is greater than 7, then ASSERT().
2385 If EndBit is greater than 7, then ASSERT().
2386 If EndBit is less than StartBit, then ASSERT().
2387
2388 @param Operand Operand on which to perform the bitfield operation.
2389 @param StartBit The ordinal of the least significant bit in the bit field.
2390 Range 0..7.
2391 @param EndBit The ordinal of the most significant bit in the bit field.
2392 Range 0..7.
2393 @param AndData The value to AND with the read value from the value.
2394 @param OrData The value to OR with the result of the AND operation.
2395
2396 @return The new 8-bit value.
2397
2398 **/
2399 UINT8
2400 EFIAPI
2401 BitFieldAndThenOr8 (
2402 IN UINT8 Operand,
2403 IN UINTN StartBit,
2404 IN UINTN EndBit,
2405 IN UINT8 AndData,
2406 IN UINT8 OrData
2407 );
2408
2409
2410 /**
2411 Returns a bit field from a 16-bit value.
2412
2413 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2414
2415 If 16-bit operations are not supported, then ASSERT().
2416 If StartBit is greater than 15, then ASSERT().
2417 If EndBit is greater than 15, then ASSERT().
2418 If EndBit is less than StartBit, then ASSERT().
2419
2420 @param Operand Operand on which to perform the bitfield operation.
2421 @param StartBit The ordinal of the least significant bit in the bit field.
2422 Range 0..15.
2423 @param EndBit The ordinal of the most significant bit in the bit field.
2424 Range 0..15.
2425
2426 @return The bit field read.
2427
2428 **/
2429 UINT16
2430 EFIAPI
2431 BitFieldRead16 (
2432 IN UINT16 Operand,
2433 IN UINTN StartBit,
2434 IN UINTN EndBit
2435 );
2436
2437
2438 /**
2439 Writes a bit field to a 16-bit value, and returns the result.
2440
2441 Writes Value to the bit field specified by the StartBit and the EndBit in
2442 Operand. All other bits in Operand are preserved. The new 16-bit value is
2443 returned.
2444
2445 If 16-bit operations are not supported, then ASSERT().
2446 If StartBit is greater than 15, then ASSERT().
2447 If EndBit is greater than 15, then ASSERT().
2448 If EndBit is less than StartBit, then ASSERT().
2449
2450 @param Operand Operand on which to perform the bitfield operation.
2451 @param StartBit The ordinal of the least significant bit in the bit field.
2452 Range 0..15.
2453 @param EndBit The ordinal of the most significant bit in the bit field.
2454 Range 0..15.
2455 @param Value New value of the bit field.
2456
2457 @return The new 16-bit value.
2458
2459 **/
2460 UINT16
2461 EFIAPI
2462 BitFieldWrite16 (
2463 IN UINT16 Operand,
2464 IN UINTN StartBit,
2465 IN UINTN EndBit,
2466 IN UINT16 Value
2467 );
2468
2469
2470 /**
2471 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2472 result.
2473
2474 Performs a bitwise inclusive OR between the bit field specified by StartBit
2475 and EndBit in Operand and the value specified by OrData. All other bits in
2476 Operand are preserved. The new 16-bit value is returned.
2477
2478 If 16-bit operations are not supported, then ASSERT().
2479 If StartBit is greater than 15, then ASSERT().
2480 If EndBit is greater than 15, then ASSERT().
2481 If EndBit is less than StartBit, then ASSERT().
2482
2483 @param Operand Operand on which to perform the bitfield operation.
2484 @param StartBit The ordinal of the least significant bit in the bit field.
2485 Range 0..15.
2486 @param EndBit The ordinal of the most significant bit in the bit field.
2487 Range 0..15.
2488 @param OrData The value to OR with the read value from the value
2489
2490 @return The new 16-bit value.
2491
2492 **/
2493 UINT16
2494 EFIAPI
2495 BitFieldOr16 (
2496 IN UINT16 Operand,
2497 IN UINTN StartBit,
2498 IN UINTN EndBit,
2499 IN UINT16 OrData
2500 );
2501
2502
2503 /**
2504 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2505 the result.
2506
2507 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2508 in Operand and the value specified by AndData. All other bits in Operand are
2509 preserved. The new 16-bit value is returned.
2510
2511 If 16-bit operations are not supported, then ASSERT().
2512 If StartBit is greater than 15, then ASSERT().
2513 If EndBit is greater than 15, then ASSERT().
2514 If EndBit is less than StartBit, then ASSERT().
2515
2516 @param Operand Operand on which to perform the bitfield operation.
2517 @param StartBit The ordinal of the least significant bit in the bit field.
2518 Range 0..15.
2519 @param EndBit The ordinal of the most significant bit in the bit field.
2520 Range 0..15.
2521 @param AndData The value to AND with the read value from the value
2522
2523 @return The new 16-bit value.
2524
2525 **/
2526 UINT16
2527 EFIAPI
2528 BitFieldAnd16 (
2529 IN UINT16 Operand,
2530 IN UINTN StartBit,
2531 IN UINTN EndBit,
2532 IN UINT16 AndData
2533 );
2534
2535
2536 /**
2537 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2538 bitwise OR, and returns the result.
2539
2540 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2541 in Operand and the value specified by AndData, followed by a bitwise
2542 inclusive OR with value specified by OrData. All other bits in Operand are
2543 preserved. The new 16-bit value is returned.
2544
2545 If 16-bit operations are not supported, then ASSERT().
2546 If StartBit is greater than 15, then ASSERT().
2547 If EndBit is greater than 15, then ASSERT().
2548 If EndBit is less than StartBit, then ASSERT().
2549
2550 @param Operand Operand on which to perform the bitfield operation.
2551 @param StartBit The ordinal of the least significant bit in the bit field.
2552 Range 0..15.
2553 @param EndBit The ordinal of the most significant bit in the bit field.
2554 Range 0..15.
2555 @param AndData The value to AND with the read value from the value.
2556 @param OrData The value to OR with the result of the AND operation.
2557
2558 @return The new 16-bit value.
2559
2560 **/
2561 UINT16
2562 EFIAPI
2563 BitFieldAndThenOr16 (
2564 IN UINT16 Operand,
2565 IN UINTN StartBit,
2566 IN UINTN EndBit,
2567 IN UINT16 AndData,
2568 IN UINT16 OrData
2569 );
2570
2571
2572 /**
2573 Returns a bit field from a 32-bit value.
2574
2575 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2576
2577 If 32-bit operations are not supported, then ASSERT().
2578 If StartBit is greater than 31, then ASSERT().
2579 If EndBit is greater than 31, then ASSERT().
2580 If EndBit is less than StartBit, then ASSERT().
2581
2582 @param Operand Operand on which to perform the bitfield operation.
2583 @param StartBit The ordinal of the least significant bit in the bit field.
2584 Range 0..31.
2585 @param EndBit The ordinal of the most significant bit in the bit field.
2586 Range 0..31.
2587
2588 @return The bit field read.
2589
2590 **/
2591 UINT32
2592 EFIAPI
2593 BitFieldRead32 (
2594 IN UINT32 Operand,
2595 IN UINTN StartBit,
2596 IN UINTN EndBit
2597 );
2598
2599
2600 /**
2601 Writes a bit field to a 32-bit value, and returns the result.
2602
2603 Writes Value to the bit field specified by the StartBit and the EndBit in
2604 Operand. All other bits in Operand are preserved. The new 32-bit value is
2605 returned.
2606
2607 If 32-bit operations are not supported, then ASSERT().
2608 If StartBit is greater than 31, then ASSERT().
2609 If EndBit is greater than 31, then ASSERT().
2610 If EndBit is less than StartBit, then ASSERT().
2611
2612 @param Operand Operand on which to perform the bitfield operation.
2613 @param StartBit The ordinal of the least significant bit in the bit field.
2614 Range 0..31.
2615 @param EndBit The ordinal of the most significant bit in the bit field.
2616 Range 0..31.
2617 @param Value New value of the bit field.
2618
2619 @return The new 32-bit value.
2620
2621 **/
2622 UINT32
2623 EFIAPI
2624 BitFieldWrite32 (
2625 IN UINT32 Operand,
2626 IN UINTN StartBit,
2627 IN UINTN EndBit,
2628 IN UINT32 Value
2629 );
2630
2631
2632 /**
2633 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2634 result.
2635
2636 Performs a bitwise inclusive OR between the bit field specified by StartBit
2637 and EndBit in Operand and the value specified by OrData. All other bits in
2638 Operand are preserved. The new 32-bit value is returned.
2639
2640 If 32-bit operations are not supported, then ASSERT().
2641 If StartBit is greater than 31, then ASSERT().
2642 If EndBit is greater than 31, then ASSERT().
2643 If EndBit is less than StartBit, then ASSERT().
2644
2645 @param Operand Operand on which to perform the bitfield operation.
2646 @param StartBit The ordinal of the least significant bit in the bit field.
2647 Range 0..31.
2648 @param EndBit The ordinal of the most significant bit in the bit field.
2649 Range 0..31.
2650 @param OrData The value to OR with the read value from the value
2651
2652 @return The new 32-bit value.
2653
2654 **/
2655 UINT32
2656 EFIAPI
2657 BitFieldOr32 (
2658 IN UINT32 Operand,
2659 IN UINTN StartBit,
2660 IN UINTN EndBit,
2661 IN UINT32 OrData
2662 );
2663
2664
2665 /**
2666 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2667 the result.
2668
2669 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2670 in Operand and the value specified by AndData. All other bits in Operand are
2671 preserved. The new 32-bit value is returned.
2672
2673 If 32-bit operations are not supported, then ASSERT().
2674 If StartBit is greater than 31, then ASSERT().
2675 If EndBit is greater than 31, then ASSERT().
2676 If EndBit is less than StartBit, then ASSERT().
2677
2678 @param Operand Operand on which to perform the bitfield operation.
2679 @param StartBit The ordinal of the least significant bit in the bit field.
2680 Range 0..31.
2681 @param EndBit The ordinal of the most significant bit in the bit field.
2682 Range 0..31.
2683 @param AndData The value to AND with the read value from the value
2684
2685 @return The new 32-bit value.
2686
2687 **/
2688 UINT32
2689 EFIAPI
2690 BitFieldAnd32 (
2691 IN UINT32 Operand,
2692 IN UINTN StartBit,
2693 IN UINTN EndBit,
2694 IN UINT32 AndData
2695 );
2696
2697
2698 /**
2699 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2700 bitwise OR, and returns the result.
2701
2702 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2703 in Operand and the value specified by AndData, followed by a bitwise
2704 inclusive OR with value specified by OrData. All other bits in Operand are
2705 preserved. The new 32-bit value is returned.
2706
2707 If 32-bit operations are not supported, then ASSERT().
2708 If StartBit is greater than 31, then ASSERT().
2709 If EndBit is greater than 31, then ASSERT().
2710 If EndBit is less than StartBit, then ASSERT().
2711
2712 @param Operand Operand on which to perform the bitfield operation.
2713 @param StartBit The ordinal of the least significant bit in the bit field.
2714 Range 0..31.
2715 @param EndBit The ordinal of the most significant bit in the bit field.
2716 Range 0..31.
2717 @param AndData The value to AND with the read value from the value.
2718 @param OrData The value to OR with the result of the AND operation.
2719
2720 @return The new 32-bit value.
2721
2722 **/
2723 UINT32
2724 EFIAPI
2725 BitFieldAndThenOr32 (
2726 IN UINT32 Operand,
2727 IN UINTN StartBit,
2728 IN UINTN EndBit,
2729 IN UINT32 AndData,
2730 IN UINT32 OrData
2731 );
2732
2733
2734 /**
2735 Returns a bit field from a 64-bit value.
2736
2737 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2738
2739 If 64-bit operations are not supported, then ASSERT().
2740 If StartBit is greater than 63, then ASSERT().
2741 If EndBit is greater than 63, then ASSERT().
2742 If EndBit is less than StartBit, then ASSERT().
2743
2744 @param Operand Operand on which to perform the bitfield operation.
2745 @param StartBit The ordinal of the least significant bit in the bit field.
2746 Range 0..63.
2747 @param EndBit The ordinal of the most significant bit in the bit field.
2748 Range 0..63.
2749
2750 @return The bit field read.
2751
2752 **/
2753 UINT64
2754 EFIAPI
2755 BitFieldRead64 (
2756 IN UINT64 Operand,
2757 IN UINTN StartBit,
2758 IN UINTN EndBit
2759 );
2760
2761
2762 /**
2763 Writes a bit field to a 64-bit value, and returns the result.
2764
2765 Writes Value to the bit field specified by the StartBit and the EndBit in
2766 Operand. All other bits in Operand are preserved. The new 64-bit value is
2767 returned.
2768
2769 If 64-bit operations are not supported, then ASSERT().
2770 If StartBit is greater than 63, then ASSERT().
2771 If EndBit is greater than 63, then ASSERT().
2772 If EndBit is less than StartBit, then ASSERT().
2773
2774 @param Operand Operand on which to perform the bitfield operation.
2775 @param StartBit The ordinal of the least significant bit in the bit field.
2776 Range 0..63.
2777 @param EndBit The ordinal of the most significant bit in the bit field.
2778 Range 0..63.
2779 @param Value New value of the bit field.
2780
2781 @return The new 64-bit value.
2782
2783 **/
2784 UINT64
2785 EFIAPI
2786 BitFieldWrite64 (
2787 IN UINT64 Operand,
2788 IN UINTN StartBit,
2789 IN UINTN EndBit,
2790 IN UINT64 Value
2791 );
2792
2793
2794 /**
2795 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2796 result.
2797
2798 Performs a bitwise inclusive OR between the bit field specified by StartBit
2799 and EndBit in Operand and the value specified by OrData. All other bits in
2800 Operand are preserved. The new 64-bit value is returned.
2801
2802 If 64-bit operations are not supported, then ASSERT().
2803 If StartBit is greater than 63, then ASSERT().
2804 If EndBit is greater than 63, then ASSERT().
2805 If EndBit is less than StartBit, then ASSERT().
2806
2807 @param Operand Operand on which to perform the bitfield operation.
2808 @param StartBit The ordinal of the least significant bit in the bit field.
2809 Range 0..63.
2810 @param EndBit The ordinal of the most significant bit in the bit field.
2811 Range 0..63.
2812 @param OrData The value to OR with the read value from the value
2813
2814 @return The new 64-bit value.
2815
2816 **/
2817 UINT64
2818 EFIAPI
2819 BitFieldOr64 (
2820 IN UINT64 Operand,
2821 IN UINTN StartBit,
2822 IN UINTN EndBit,
2823 IN UINT64 OrData
2824 );
2825
2826
2827 /**
2828 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2829 the result.
2830
2831 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2832 in Operand and the value specified by AndData. All other bits in Operand are
2833 preserved. The new 64-bit value is returned.
2834
2835 If 64-bit operations are not supported, then ASSERT().
2836 If StartBit is greater than 63, then ASSERT().
2837 If EndBit is greater than 63, then ASSERT().
2838 If EndBit is less than StartBit, then ASSERT().
2839
2840 @param Operand Operand on which to perform the bitfield operation.
2841 @param StartBit The ordinal of the least significant bit in the bit field.
2842 Range 0..63.
2843 @param EndBit The ordinal of the most significant bit in the bit field.
2844 Range 0..63.
2845 @param AndData The value to AND with the read value from the value
2846
2847 @return The new 64-bit value.
2848
2849 **/
2850 UINT64
2851 EFIAPI
2852 BitFieldAnd64 (
2853 IN UINT64 Operand,
2854 IN UINTN StartBit,
2855 IN UINTN EndBit,
2856 IN UINT64 AndData
2857 );
2858
2859
2860 /**
2861 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2862 bitwise OR, and returns the result.
2863
2864 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2865 in Operand and the value specified by AndData, followed by a bitwise
2866 inclusive OR with value specified by OrData. All other bits in Operand are
2867 preserved. The new 64-bit value is returned.
2868
2869 If 64-bit operations are not supported, then ASSERT().
2870 If StartBit is greater than 63, then ASSERT().
2871 If EndBit is greater than 63, then ASSERT().
2872 If EndBit is less than StartBit, then ASSERT().
2873
2874 @param Operand Operand on which to perform the bitfield operation.
2875 @param StartBit The ordinal of the least significant bit in the bit field.
2876 Range 0..63.
2877 @param EndBit The ordinal of the most significant bit in the bit field.
2878 Range 0..63.
2879 @param AndData The value to AND with the read value from the value.
2880 @param OrData The value to OR with the result of the AND operation.
2881
2882 @return The new 64-bit value.
2883
2884 **/
2885 UINT64
2886 EFIAPI
2887 BitFieldAndThenOr64 (
2888 IN UINT64 Operand,
2889 IN UINTN StartBit,
2890 IN UINTN EndBit,
2891 IN UINT64 AndData,
2892 IN UINT64 OrData
2893 );
2894
2895
2896 //
2897 // Base Library Synchronization Functions
2898 //
2899
2900 /**
2901 Retrieves the architecture specific spin lock alignment requirements for
2902 optimal spin lock performance.
2903
2904 This function retrieves the spin lock alignment requirements for optimal
2905 performance on a given CPU architecture. The spin lock alignment must be a
2906 power of two and is returned by this function. If there are no alignment
2907 requirements, then 1 must be returned. The spin lock synchronization
2908 functions must function correctly if the spin lock size and alignment values
2909 returned by this function are not used at all. These values are hints to the
2910 consumers of the spin lock synchronization functions to obtain optimal spin
2911 lock performance.
2912
2913 @return The architecture specific spin lock alignment.
2914
2915 **/
2916 UINTN
2917 EFIAPI
2918 GetSpinLockProperties (
2919 VOID
2920 );
2921
2922
2923 /**
2924 Initializes a spin lock to the released state and returns the spin lock.
2925
2926 This function initializes the spin lock specified by SpinLock to the released
2927 state, and returns SpinLock. Optimal performance can be achieved by calling
2928 GetSpinLockProperties() to determine the size and alignment requirements for
2929 SpinLock.
2930
2931 If SpinLock is NULL, then ASSERT().
2932
2933 @param SpinLock A pointer to the spin lock to initialize to the released
2934 state.
2935
2936 @return SpinLock in release state.
2937
2938 **/
2939 SPIN_LOCK *
2940 EFIAPI
2941 InitializeSpinLock (
2942 OUT SPIN_LOCK *SpinLock
2943 );
2944
2945
2946 /**
2947 Waits until a spin lock can be placed in the acquired state.
2948
2949 This function checks the state of the spin lock specified by SpinLock. If
2950 SpinLock is in the released state, then this function places SpinLock in the
2951 acquired state and returns SpinLock. Otherwise, this function waits
2952 indefinitely for the spin lock to be released, and then places it in the
2953 acquired state and returns SpinLock. All state transitions of SpinLock must
2954 be performed using MP safe mechanisms.
2955
2956 If SpinLock is NULL, then ASSERT().
2957 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
2958 If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
2959 PcdSpinLockTimeout microseconds, then ASSERT().
2960
2961 @param SpinLock A pointer to the spin lock to place in the acquired state.
2962
2963 @return SpinLock acquired lock.
2964
2965 **/
2966 SPIN_LOCK *
2967 EFIAPI
2968 AcquireSpinLock (
2969 IN OUT SPIN_LOCK *SpinLock
2970 );
2971
2972
2973 /**
2974 Attempts to place a spin lock in the acquired state.
2975
2976 This function checks the state of the spin lock specified by SpinLock. If
2977 SpinLock is in the released state, then this function places SpinLock in the
2978 acquired state and returns TRUE. Otherwise, FALSE is returned. All state
2979 transitions of SpinLock must be performed using MP safe mechanisms.
2980
2981 If SpinLock is NULL, then ASSERT().
2982 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
2983
2984 @param SpinLock A pointer to the spin lock to place in the acquired state.
2985
2986 @retval TRUE SpinLock was placed in the acquired state.
2987 @retval FALSE SpinLock could not be acquired.
2988
2989 **/
2990 BOOLEAN
2991 EFIAPI
2992 AcquireSpinLockOrFail (
2993 IN OUT SPIN_LOCK *SpinLock
2994 );
2995
2996
2997 /**
2998 Releases a spin lock.
2999
3000 This function places the spin lock specified by SpinLock in the release state
3001 and returns SpinLock.
3002
3003 If SpinLock is NULL, then ASSERT().
3004 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
3005
3006 @param SpinLock A pointer to the spin lock to release.
3007
3008 @return SpinLock released lock.
3009
3010 **/
3011 SPIN_LOCK *
3012 EFIAPI
3013 ReleaseSpinLock (
3014 IN OUT SPIN_LOCK *SpinLock
3015 );
3016
3017
3018 /**
3019 Performs an atomic increment of an 32-bit unsigned integer.
3020
3021 Performs an atomic increment of the 32-bit unsigned integer specified by
3022 Value and returns the incremented value. The increment operation must be
3023 performed using MP safe mechanisms. The state of the return value is not
3024 guaranteed to be MP safe.
3025
3026 If Value is NULL, then ASSERT().
3027
3028 @param Value A pointer to the 32-bit value to increment.
3029
3030 @return The incremented value.
3031
3032 **/
3033 UINT32
3034 EFIAPI
3035 InterlockedIncrement (
3036 IN UINT32 *Value
3037 );
3038
3039
3040 /**
3041 Performs an atomic decrement of an 32-bit unsigned integer.
3042
3043 Performs an atomic decrement of the 32-bit unsigned integer specified by
3044 Value and returns the decremented value. The decrement operation must be
3045 performed using MP safe mechanisms. The state of the return value is not
3046 guaranteed to be MP safe.
3047
3048 If Value is NULL, then ASSERT().
3049
3050 @param Value A pointer to the 32-bit value to decrement.
3051
3052 @return The decremented value.
3053
3054 **/
3055 UINT32
3056 EFIAPI
3057 InterlockedDecrement (
3058 IN UINT32 *Value
3059 );
3060
3061
3062 /**
3063 Performs an atomic compare exchange operation on a 32-bit unsigned integer.
3064
3065 Performs an atomic compare exchange operation on the 32-bit unsigned integer
3066 specified by Value. If Value is equal to CompareValue, then Value is set to
3067 ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
3068 then Value is returned. The compare exchange operation must be performed using
3069 MP safe mechanisms.
3070
3071 If Value is NULL, then ASSERT().
3072
3073 @param Value A pointer to the 32-bit value for the compare exchange
3074 operation.
3075 @param CompareValue 32-bit value used in compare operation.
3076 @param ExchangeValue 32-bit value used in exchange operation.
3077
3078 @return The original *Value before exchange.
3079
3080 **/
3081 UINT32
3082 EFIAPI
3083 InterlockedCompareExchange32 (
3084 IN OUT UINT32 *Value,
3085 IN UINT32 CompareValue,
3086 IN UINT32 ExchangeValue
3087 );
3088
3089
3090 /**
3091 Performs an atomic compare exchange operation on a 64-bit unsigned integer.
3092
3093 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
3094 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
3095 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
3096 The compare exchange operation must be performed using MP safe mechanisms.
3097
3098 If Value is NULL, then ASSERT().
3099
3100 @param Value A pointer to the 64-bit value for the compare exchange
3101 operation.
3102 @param CompareValue 64-bit value used in compare operation.
3103 @param ExchangeValue 64-bit value used in exchange operation.
3104
3105 @return The original *Value before exchange.
3106
3107 **/
3108 UINT64
3109 EFIAPI
3110 InterlockedCompareExchange64 (
3111 IN OUT UINT64 *Value,
3112 IN UINT64 CompareValue,
3113 IN UINT64 ExchangeValue
3114 );
3115
3116
3117 /**
3118 Performs an atomic compare exchange operation on a pointer value.
3119
3120 Performs an atomic compare exchange operation on the pointer value specified
3121 by Value. If Value is equal to CompareValue, then Value is set to
3122 ExchangeValue and CompareValue is returned. If Value is not equal to
3123 CompareValue, then Value is returned. The compare exchange operation must be
3124 performed using MP safe mechanisms.
3125
3126 If Value is NULL, then ASSERT().
3127
3128 @param Value A pointer to the pointer value for the compare exchange
3129 operation.
3130 @param CompareValue Pointer value used in compare operation.
3131 @param ExchangeValue Pointer value used in exchange operation.
3132
3133 @return The original *Value before exchange.
3134 **/
3135 VOID *
3136 EFIAPI
3137 InterlockedCompareExchangePointer (
3138 IN OUT VOID **Value,
3139 IN VOID *CompareValue,
3140 IN VOID *ExchangeValue
3141 );
3142
3143
3144 //
3145 // Base Library Checksum Functions
3146 //
3147
3148 /**
3149 Returns the sum of all elements in a buffer in unit of UINT8.
3150 During calculation, the carry bits are dropped.
3151
3152 This function calculates the sum of all elements in a buffer
3153 in unit of UINT8. The carry bits in result of addition are dropped.
3154 The result is returned as UINT8. If Length is Zero, then Zero is
3155 returned.
3156
3157 If Buffer is NULL, then ASSERT().
3158 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3159
3160 @param Buffer Pointer to the buffer to carry out the sum operation.
3161 @param Length The size, in bytes, of Buffer.
3162
3163 @return Sum The sum of Buffer with carry bits dropped during additions.
3164
3165 **/
3166 UINT8
3167 EFIAPI
3168 CalculateSum8 (
3169 IN CONST UINT8 *Buffer,
3170 IN UINTN Length
3171 );
3172
3173
3174 /**
3175 Returns the two's complement checksum of all elements in a buffer
3176 of 8-bit values.
3177
3178 This function first calculates the sum of the 8-bit values in the
3179 buffer specified by Buffer and Length. The carry bits in the result
3180 of addition are dropped. Then, the two's complement of the sum is
3181 returned. If Length is 0, then 0 is returned.
3182
3183 If Buffer is NULL, then ASSERT().
3184 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3185
3186 @param Buffer Pointer to the buffer to carry out the checksum operation.
3187 @param Length The size, in bytes, of Buffer.
3188
3189 @return Checksum The 2's complement checksum of Buffer.
3190
3191 **/
3192 UINT8
3193 EFIAPI
3194 CalculateCheckSum8 (
3195 IN CONST UINT8 *Buffer,
3196 IN UINTN Length
3197 );
3198
3199
3200 /**
3201 Returns the sum of all elements in a buffer of 16-bit values. During
3202 calculation, the carry bits are dropped.
3203
3204 This function calculates the sum of the 16-bit values in the buffer
3205 specified by Buffer and Length. The carry bits in result of addition are dropped.
3206 The 16-bit result is returned. If Length is 0, then 0 is returned.
3207
3208 If Buffer is NULL, then ASSERT().
3209 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3210 If Length is not aligned on a 16-bit boundary, then ASSERT().
3211 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3212
3213 @param Buffer Pointer to the buffer to carry out the sum operation.
3214 @param Length The size, in bytes, of Buffer.
3215
3216 @return Sum The sum of Buffer with carry bits dropped during additions.
3217
3218 **/
3219 UINT16
3220 EFIAPI
3221 CalculateSum16 (
3222 IN CONST UINT16 *Buffer,
3223 IN UINTN Length
3224 );
3225
3226
3227 /**
3228 Returns the two's complement checksum of all elements in a buffer of
3229 16-bit values.
3230
3231 This function first calculates the sum of the 16-bit values in the buffer
3232 specified by Buffer and Length. The carry bits in the result of addition
3233 are dropped. Then, the two's complement of the sum is returned. If Length
3234 is 0, then 0 is returned.
3235
3236 If Buffer is NULL, then ASSERT().
3237 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3238 If Length is not aligned on a 16-bit boundary, then ASSERT().
3239 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3240
3241 @param Buffer Pointer to the buffer to carry out the checksum operation.
3242 @param Length The size, in bytes, of Buffer.
3243
3244 @return Checksum The 2's complement checksum of Buffer.
3245
3246 **/
3247 UINT16
3248 EFIAPI
3249 CalculateCheckSum16 (
3250 IN CONST UINT16 *Buffer,
3251 IN UINTN Length
3252 );
3253
3254
3255 /**
3256 Returns the sum of all elements in a buffer of 32-bit values. During
3257 calculation, the carry bits are dropped.
3258
3259 This function calculates the sum of the 32-bit values in the buffer
3260 specified by Buffer and Length. The carry bits in result of addition are dropped.
3261 The 32-bit result is returned. If Length is 0, then 0 is returned.
3262
3263 If Buffer is NULL, then ASSERT().
3264 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3265 If Length is not aligned on a 32-bit boundary, then ASSERT().
3266 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3267
3268 @param Buffer Pointer to the buffer to carry out the sum operation.
3269 @param Length The size, in bytes, of Buffer.
3270
3271 @return Sum The sum of Buffer with carry bits dropped during additions.
3272
3273 **/
3274 UINT32
3275 EFIAPI
3276 CalculateSum32 (
3277 IN CONST UINT32 *Buffer,
3278 IN UINTN Length
3279 );
3280
3281
3282 /**
3283 Returns the two's complement checksum of all elements in a buffer of
3284 32-bit values.
3285
3286 This function first calculates the sum of the 32-bit values in the buffer
3287 specified by Buffer and Length. The carry bits in the result of addition
3288 are dropped. Then, the two's complement of the sum is returned. If Length
3289 is 0, then 0 is returned.
3290
3291 If Buffer is NULL, then ASSERT().
3292 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3293 If Length is not aligned on a 32-bit boundary, then ASSERT().
3294 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3295
3296 @param Buffer Pointer to the buffer to carry out the checksum operation.
3297 @param Length The size, in bytes, of Buffer.
3298
3299 @return Checksum The 2's complement checksum of Buffer.
3300
3301 **/
3302 UINT32
3303 EFIAPI
3304 CalculateCheckSum32 (
3305 IN CONST UINT32 *Buffer,
3306 IN UINTN Length
3307 );
3308
3309
3310 /**
3311 Returns the sum of all elements in a buffer of 64-bit values. During
3312 calculation, the carry bits are dropped.
3313
3314 This function calculates the sum of the 64-bit values in the buffer
3315 specified by Buffer and Length. The carry bits in result of addition are dropped.
3316 The 64-bit result is returned. If Length is 0, then 0 is returned.
3317
3318 If Buffer is NULL, then ASSERT().
3319 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3320 If Length is not aligned on a 64-bit boundary, then ASSERT().
3321 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3322
3323 @param Buffer Pointer to the buffer to carry out the sum operation.
3324 @param Length The size, in bytes, of Buffer.
3325
3326 @return Sum The sum of Buffer with carry bits dropped during additions.
3327
3328 **/
3329 UINT64
3330 EFIAPI
3331 CalculateSum64 (
3332 IN CONST UINT64 *Buffer,
3333 IN UINTN Length
3334 );
3335
3336
3337 /**
3338 Returns the two's complement checksum of all elements in a buffer of
3339 64-bit values.
3340
3341 This function first calculates the sum of the 64-bit values in the buffer
3342 specified by Buffer and Length. The carry bits in the result of addition
3343 are dropped. Then, the two's complement of the sum is returned. If Length
3344 is 0, then 0 is returned.
3345
3346 If Buffer is NULL, then ASSERT().
3347 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3348 If Length is not aligned on a 64-bit boundary, then ASSERT().
3349 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3350
3351 @param Buffer Pointer to the buffer to carry out the checksum operation.
3352 @param Length The size, in bytes, of Buffer.
3353
3354 @return Checksum The 2's complement checksum of Buffer.
3355
3356 **/
3357 UINT64
3358 EFIAPI
3359 CalculateCheckSum64 (
3360 IN CONST UINT64 *Buffer,
3361 IN UINTN Length
3362 );
3363
3364
3365 ///
3366 /// Base Library CPU Functions
3367 ///
3368 typedef
3369 VOID
3370 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3371 IN VOID *Context1, OPTIONAL
3372 IN VOID *Context2 OPTIONAL
3373 );
3374
3375
3376 /**
3377 Used to serialize load and store operations.
3378
3379 All loads and stores that proceed calls to this function are guaranteed to be
3380 globally visible when this function returns.
3381
3382 **/
3383 VOID
3384 EFIAPI
3385 MemoryFence (
3386 VOID
3387 );
3388
3389
3390 /**
3391 Saves the current CPU context that can be restored with a call to LongJump()
3392 and returns 0.
3393
3394 Saves the current CPU context in the buffer specified by JumpBuffer and
3395 returns 0. The initial call to SetJump() must always return 0. Subsequent
3396 calls to LongJump() cause a non-zero value to be returned by SetJump().
3397
3398 If JumpBuffer is NULL, then ASSERT().
3399 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3400
3401 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3402 The same structure must never be used for more than one CPU architecture context.
3403 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3404 SetJump()/LongJump() is not currently supported for the EBC processor type.
3405
3406 @param JumpBuffer A pointer to CPU context buffer.
3407
3408 @retval 0 Indicates a return from SetJump().
3409
3410 **/
3411 UINTN
3412 EFIAPI
3413 SetJump (
3414 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3415 );
3416
3417
3418 /**
3419 Restores the CPU context that was saved with SetJump().
3420
3421 Restores the CPU context from the buffer specified by JumpBuffer. This
3422 function never returns to the caller. Instead is resumes execution based on
3423 the state of JumpBuffer.
3424
3425 If JumpBuffer is NULL, then ASSERT().
3426 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3427 If Value is 0, then ASSERT().
3428
3429 @param JumpBuffer A pointer to CPU context buffer.
3430 @param Value The value to return when the SetJump() context is
3431 restored and must be non-zero.
3432
3433 **/
3434 VOID
3435 EFIAPI
3436 LongJump (
3437 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3438 IN UINTN Value
3439 );
3440
3441
3442 /**
3443 Enables CPU interrupts.
3444
3445 **/
3446 VOID
3447 EFIAPI
3448 EnableInterrupts (
3449 VOID
3450 );
3451
3452
3453 /**
3454 Disables CPU interrupts.
3455
3456 **/
3457 VOID
3458 EFIAPI
3459 DisableInterrupts (
3460 VOID
3461 );
3462
3463
3464 /**
3465 Disables CPU interrupts and returns the interrupt state prior to the disable
3466 operation.
3467
3468 @retval TRUE CPU interrupts were enabled on entry to this call.
3469 @retval FALSE CPU interrupts were disabled on entry to this call.
3470
3471 **/
3472 BOOLEAN
3473 EFIAPI
3474 SaveAndDisableInterrupts (
3475 VOID
3476 );
3477
3478
3479 /**
3480 Enables CPU interrupts for the smallest window required to capture any
3481 pending interrupts.
3482
3483 **/
3484 VOID
3485 EFIAPI
3486 EnableDisableInterrupts (
3487 VOID
3488 );
3489
3490
3491 /**
3492 Retrieves the current CPU interrupt state.
3493
3494 Returns TRUE is interrupts are currently enabled. Otherwise
3495 returns FALSE.
3496
3497 @retval TRUE CPU interrupts are enabled.
3498 @retval FALSE CPU interrupts are disabled.
3499
3500 **/
3501 BOOLEAN
3502 EFIAPI
3503 GetInterruptState (
3504 VOID
3505 );
3506
3507
3508 /**
3509 Set the current CPU interrupt state.
3510
3511 Sets the current CPU interrupt state to the state specified by
3512 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3513 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3514 returned.
3515
3516 @param InterruptState TRUE if interrupts should enabled. FALSE if
3517 interrupts should be disabled.
3518
3519 @return InterruptState
3520
3521 **/
3522 BOOLEAN
3523 EFIAPI
3524 SetInterruptState (
3525 IN BOOLEAN InterruptState
3526 );
3527
3528
3529 /**
3530 Requests CPU to pause for a short period of time.
3531
3532 Requests CPU to pause for a short period of time. Typically used in MP
3533 systems to prevent memory starvation while waiting for a spin lock.
3534
3535 **/
3536 VOID
3537 EFIAPI
3538 CpuPause (
3539 VOID
3540 );
3541
3542
3543 /**
3544 Transfers control to a function starting with a new stack.
3545
3546 Transfers control to the function specified by EntryPoint using the
3547 new stack specified by NewStack and passing in the parameters specified
3548 by Context1 and Context2. Context1 and Context2 are optional and may
3549 be NULL. The function EntryPoint must never return. This function
3550 supports a variable number of arguments following the NewStack parameter.
3551 These additional arguments are ignored on IA-32, x64, and EBC.
3552 IPF CPUs expect one additional parameter of type VOID * that specifies
3553 the new backing store pointer.
3554
3555 If EntryPoint is NULL, then ASSERT().
3556 If NewStack is NULL, then ASSERT().
3557
3558 @param EntryPoint A pointer to function to call with the new stack.
3559 @param Context1 A pointer to the context to pass into the EntryPoint
3560 function.
3561 @param Context2 A pointer to the context to pass into the EntryPoint
3562 function.
3563 @param NewStack A pointer to the new stack to use for the EntryPoint
3564 function.
3565 @param ... This variable argument list is ignored for IA32, x64, and EBC.
3566 For IPF, this variable argument list is expected to contain
3567 a single parameter of type VOID * that specifies the new backing
3568 store pointer.
3569
3570
3571 **/
3572 VOID
3573 EFIAPI
3574 SwitchStack (
3575 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3576 IN VOID *Context1, OPTIONAL
3577 IN VOID *Context2, OPTIONAL
3578 IN VOID *NewStack,
3579 ...
3580 );
3581
3582
3583 /**
3584 Generates a breakpoint on the CPU.
3585
3586 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3587 that code can resume normal execution after the breakpoint.
3588
3589 **/
3590 VOID
3591 EFIAPI
3592 CpuBreakpoint (
3593 VOID
3594 );
3595
3596
3597 /**
3598 Executes an infinite loop.
3599
3600 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3601 past the loop and the code that follows the loop must execute properly. This
3602 implies that the infinite loop must not cause the code that follow it to be
3603 optimized away.
3604
3605 **/
3606 VOID
3607 EFIAPI
3608 CpuDeadLoop (
3609 VOID
3610 );
3611
3612 #if defined (MDE_CPU_IPF)
3613
3614 /**
3615 Flush a range of cache lines in the cache coherency domain of the calling
3616 CPU.
3617
3618 Invalidates the cache lines specified by Address and Length. If Address is
3619 not aligned on a cache line boundary, then entire cache line containing
3620 Address is invalidated. If Address + Length is not aligned on a cache line
3621 boundary, then the entire instruction cache line containing Address + Length
3622 -1 is invalidated. This function may choose to invalidate the entire
3623 instruction cache if that is more efficient than invalidating the specified
3624 range. If Length is 0, the no instruction cache lines are invalidated.
3625 Address is returned.
3626
3627 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3628
3629 @param Address The base address of the instruction lines to invalidate. If
3630 the CPU is in a physical addressing mode, then Address is a
3631 physical address. If the CPU is in a virtual addressing mode,
3632 then Address is a virtual address.
3633
3634 @param Length The number of bytes to invalidate from the instruction cache.
3635
3636 @return Address
3637
3638 **/
3639 VOID *
3640 EFIAPI
3641 IpfFlushCacheRange (
3642 IN VOID *Address,
3643 IN UINTN Length
3644 );
3645
3646
3647 /**
3648 Executes a FC instruction
3649 Executes a FC instruction on the cache line specified by Address.
3650 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3651 An implementation may flush a larger region. This function is only available on IPF.
3652
3653 @param Address The Address of cache line to be flushed.
3654
3655 @return The address of FC instruction executed.
3656
3657 **/
3658 UINT64
3659 EFIAPI
3660 AsmFc (
3661 IN UINT64 Address
3662 );
3663
3664
3665 /**
3666 Executes a FC.I instruction.
3667 Executes a FC.I instruction on the cache line specified by Address.
3668 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3669 An implementation may flush a larger region. This function is only available on IPF.
3670
3671 @param Address The Address of cache line to be flushed.
3672
3673 @return The address of FC.I instruction executed.
3674
3675 **/
3676 UINT64
3677 EFIAPI
3678 AsmFci (
3679 IN UINT64 Address
3680 );
3681
3682
3683 /**
3684 Reads the current value of a Processor Identifier Register (CPUID).
3685
3686 Reads and returns the current value of Processor Identifier Register specified by Index.
3687 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3688 registers) is determined by CPUID [3] bits {7:0}.
3689 No parameter checking is performed on Index. If the Index value is beyond the
3690 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3691 must either guarantee that Index is valid, or the caller must set up fault handlers to
3692 catch the faults. This function is only available on IPF.
3693
3694 @param Index The 8-bit Processor Identifier Register index to read.
3695
3696 @return The current value of Processor Identifier Register specified by Index.
3697
3698 **/
3699 UINT64
3700 EFIAPI
3701 AsmReadCpuid (
3702 IN UINT8 Index
3703 );
3704
3705
3706 /**
3707 Reads the current value of 64-bit Processor Status Register (PSR).
3708 This function is only available on IPF.
3709
3710 @return The current value of PSR.
3711
3712 **/
3713 UINT64
3714 EFIAPI
3715 AsmReadPsr (
3716 VOID
3717 );
3718
3719
3720 /**
3721 Writes the current value of 64-bit Processor Status Register (PSR).
3722
3723 No parameter checking is performed on Value. All bits of Value corresponding to
3724 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3725 The caller must either guarantee that Value is valid, or the caller must set up
3726 fault handlers to catch the faults. This function is only available on IPF.
3727
3728 @param Value The 64-bit value to write to PSR.
3729
3730 @return The 64-bit value written to the PSR.
3731
3732 **/
3733 UINT64
3734 EFIAPI
3735 AsmWritePsr (
3736 IN UINT64 Value
3737 );
3738
3739
3740 /**
3741 Reads the current value of 64-bit Kernel Register #0 (KR0).
3742 This function is only available on IPF.
3743
3744 @return The current value of KR0.
3745
3746 **/
3747 UINT64
3748 EFIAPI
3749 AsmReadKr0 (
3750 VOID
3751 );
3752
3753
3754 /**
3755 Reads the current value of 64-bit Kernel Register #1 (KR1).
3756 This function is only available on IPF.
3757
3758 @return The current value of KR1.
3759
3760 **/
3761 UINT64
3762 EFIAPI
3763 AsmReadKr1 (
3764 VOID
3765 );
3766
3767
3768 /**
3769 Reads the current value of 64-bit Kernel Register #2 (KR2).
3770 This function is only available on IPF.
3771
3772 @return The current value of KR2.
3773
3774 **/
3775 UINT64
3776 EFIAPI
3777 AsmReadKr2 (
3778 VOID
3779 );
3780
3781
3782 /**
3783 Reads the current value of 64-bit Kernel Register #3 (KR3).
3784 This function is only available on IPF.
3785
3786 @return The current value of KR3.
3787
3788 **/
3789 UINT64
3790 EFIAPI
3791 AsmReadKr3 (
3792 VOID
3793 );
3794
3795
3796 /**
3797 Reads the current value of 64-bit Kernel Register #4 (KR4).
3798 This function is only available on IPF.
3799
3800 @return The current value of KR4.
3801
3802 **/
3803 UINT64
3804 EFIAPI
3805 AsmReadKr4 (
3806 VOID
3807 );
3808
3809
3810 /**
3811 Reads the current value of 64-bit Kernel Register #5 (KR5).
3812 This function is only available on IPF.
3813
3814 @return The current value of KR5.
3815
3816 **/
3817 UINT64
3818 EFIAPI
3819 AsmReadKr5 (
3820 VOID
3821 );
3822
3823
3824 /**
3825 Reads the current value of 64-bit Kernel Register #6 (KR6).
3826 This function is only available on IPF.
3827
3828 @return The current value of KR6.
3829
3830 **/
3831 UINT64
3832 EFIAPI
3833 AsmReadKr6 (
3834 VOID
3835 );
3836
3837
3838 /**
3839 Reads the current value of 64-bit Kernel Register #7 (KR7).
3840 This function is only available on IPF.
3841
3842 @return The current value of KR7.
3843
3844 **/
3845 UINT64
3846 EFIAPI
3847 AsmReadKr7 (
3848 VOID
3849 );
3850
3851
3852 /**
3853 Write the current value of 64-bit Kernel Register #0 (KR0).
3854 This function is only available on IPF.
3855
3856 @param Value The 64-bit value to write to KR0.
3857
3858 @return The 64-bit value written to the KR0.
3859
3860 **/
3861 UINT64
3862 EFIAPI
3863 AsmWriteKr0 (
3864 IN UINT64 Value
3865 );
3866
3867
3868 /**
3869 Write the current value of 64-bit Kernel Register #1 (KR1).
3870 This function is only available on IPF.
3871
3872 @param Value The 64-bit value to write to KR1.
3873
3874 @return The 64-bit value written to the KR1.
3875
3876 **/
3877 UINT64
3878 EFIAPI
3879 AsmWriteKr1 (
3880 IN UINT64 Value
3881 );
3882
3883
3884 /**
3885 Write the current value of 64-bit Kernel Register #2 (KR2).
3886 This function is only available on IPF.
3887
3888 @param Value The 64-bit value to write to KR2.
3889
3890 @return The 64-bit value written to the KR2.
3891
3892 **/
3893 UINT64
3894 EFIAPI
3895 AsmWriteKr2 (
3896 IN UINT64 Value
3897 );
3898
3899
3900 /**
3901 Write the current value of 64-bit Kernel Register #3 (KR3).
3902 This function is only available on IPF.
3903
3904 @param Value The 64-bit value to write to KR3.
3905
3906 @return The 64-bit value written to the KR3.
3907
3908 **/
3909 UINT64
3910 EFIAPI
3911 AsmWriteKr3 (
3912 IN UINT64 Value
3913 );
3914
3915
3916 /**
3917 Write the current value of 64-bit Kernel Register #4 (KR4).
3918 This function is only available on IPF.
3919
3920 @param Value The 64-bit value to write to KR4.
3921
3922 @return The 64-bit value written to the KR4.
3923
3924 **/
3925 UINT64
3926 EFIAPI
3927 AsmWriteKr4 (
3928 IN UINT64 Value
3929 );
3930
3931
3932 /**
3933 Write the current value of 64-bit Kernel Register #5 (KR5).
3934 This function is only available on IPF.
3935
3936 @param Value The 64-bit value to write to KR5.
3937
3938 @return The 64-bit value written to the KR5.
3939
3940 **/
3941 UINT64
3942 EFIAPI
3943 AsmWriteKr5 (
3944 IN UINT64 Value
3945 );
3946
3947
3948 /**
3949 Write the current value of 64-bit Kernel Register #6 (KR6).
3950 This function is only available on IPF.
3951
3952 @param Value The 64-bit value to write to KR6.
3953
3954 @return The 64-bit value written to the KR6.
3955
3956 **/
3957 UINT64
3958 EFIAPI
3959 AsmWriteKr6 (
3960 IN UINT64 Value
3961 );
3962
3963
3964 /**
3965 Write the current value of 64-bit Kernel Register #7 (KR7).
3966 This function is only available on IPF.
3967
3968 @param Value The 64-bit value to write to KR7.
3969
3970 @return The 64-bit value written to the KR7.
3971
3972 **/
3973 UINT64
3974 EFIAPI
3975 AsmWriteKr7 (
3976 IN UINT64 Value
3977 );
3978
3979
3980 /**
3981 Reads the current value of Interval Timer Counter Register (ITC).
3982 This function is only available on IPF.
3983
3984 @return The current value of ITC.
3985
3986 **/
3987 UINT64
3988 EFIAPI
3989 AsmReadItc (
3990 VOID
3991 );
3992
3993
3994 /**
3995 Reads the current value of Interval Timer Vector Register (ITV).
3996 This function is only available on IPF.
3997
3998 @return The current value of ITV.
3999
4000 **/
4001 UINT64
4002 EFIAPI
4003 AsmReadItv (
4004 VOID
4005 );
4006
4007
4008 /**
4009 Reads the current value of Interval Timer Match Register (ITM).
4010 This function is only available on IPF.
4011
4012 @return The current value of ITM.
4013 **/
4014 UINT64
4015 EFIAPI
4016 AsmReadItm (
4017 VOID
4018 );
4019
4020
4021 /**
4022 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
4023 This function is only available on IPF.
4024
4025 @param Value The 64-bit value to write to ITC.
4026
4027 @return The 64-bit value written to the ITC.
4028
4029 **/
4030 UINT64
4031 EFIAPI
4032 AsmWriteItc (
4033 IN UINT64 Value
4034 );
4035
4036
4037 /**
4038 Writes the current value of 64-bit Interval Timer Match Register (ITM).
4039 This function is only available on IPF.
4040
4041 @param Value The 64-bit value to write to ITM.
4042
4043 @return The 64-bit value written to the ITM.
4044
4045 **/
4046 UINT64
4047 EFIAPI
4048 AsmWriteItm (
4049 IN UINT64 Value
4050 );
4051
4052
4053 /**
4054 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
4055 No parameter checking is performed on Value. All bits of Value corresponding to
4056 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
4057 The caller must either guarantee that Value is valid, or the caller must set up
4058 fault handlers to catch the faults.
4059 This function is only available on IPF.
4060
4061 @param Value The 64-bit value to write to ITV.
4062
4063 @return The 64-bit value written to the ITV.
4064
4065 **/
4066 UINT64
4067 EFIAPI
4068 AsmWriteItv (
4069 IN UINT64 Value
4070 );
4071
4072
4073 /**
4074 Reads the current value of Default Control Register (DCR).
4075 This function is only available on IPF.
4076
4077 @return The current value of DCR.
4078
4079 **/
4080 UINT64
4081 EFIAPI
4082 AsmReadDcr (
4083 VOID
4084 );
4085
4086
4087 /**
4088 Reads the current value of Interruption Vector Address Register (IVA).
4089 This function is only available on IPF.
4090
4091 @return The current value of IVA.
4092 **/
4093 UINT64
4094 EFIAPI
4095 AsmReadIva (
4096 VOID
4097 );
4098
4099
4100 /**
4101 Reads the current value of Page Table Address Register (PTA).
4102 This function is only available on IPF.
4103
4104 @return The current value of PTA.
4105
4106 **/
4107 UINT64
4108 EFIAPI
4109 AsmReadPta (
4110 VOID
4111 );
4112
4113
4114 /**
4115 Writes the current value of 64-bit Default Control Register (DCR).
4116 No parameter checking is performed on Value. All bits of Value corresponding to
4117 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4118 The caller must either guarantee that Value is valid, or the caller must set up
4119 fault handlers to catch the faults.
4120 This function is only available on IPF.
4121
4122 @param Value The 64-bit value to write to DCR.
4123
4124 @return The 64-bit value written to the DCR.
4125
4126 **/
4127 UINT64
4128 EFIAPI
4129 AsmWriteDcr (
4130 IN UINT64 Value
4131 );
4132
4133
4134 /**
4135 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
4136 The size of vector table is 32 K bytes and is 32 K bytes aligned
4137 the low 15 bits of Value is ignored when written.
4138 This function is only available on IPF.
4139
4140 @param Value The 64-bit value to write to IVA.
4141
4142 @return The 64-bit value written to the IVA.
4143
4144 **/
4145 UINT64
4146 EFIAPI
4147 AsmWriteIva (
4148 IN UINT64 Value
4149 );
4150
4151
4152 /**
4153 Writes the current value of 64-bit Page Table Address Register (PTA).
4154 No parameter checking is performed on Value. All bits of Value corresponding to
4155 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4156 The caller must either guarantee that Value is valid, or the caller must set up
4157 fault handlers to catch the faults.
4158 This function is only available on IPF.
4159
4160 @param Value The 64-bit value to write to PTA.
4161
4162 @return The 64-bit value written to the PTA.
4163 **/
4164 UINT64
4165 EFIAPI
4166 AsmWritePta (
4167 IN UINT64 Value
4168 );
4169
4170
4171 /**
4172 Reads the current value of Local Interrupt ID Register (LID).
4173 This function is only available on IPF.
4174
4175 @return The current value of LID.
4176
4177 **/
4178 UINT64
4179 EFIAPI
4180 AsmReadLid (
4181 VOID
4182 );
4183
4184
4185 /**
4186 Reads the current value of External Interrupt Vector Register (IVR).
4187 This function is only available on IPF.
4188
4189 @return The current value of IVR.
4190
4191 **/
4192 UINT64
4193 EFIAPI
4194 AsmReadIvr (
4195 VOID
4196 );
4197
4198
4199 /**
4200 Reads the current value of Task Priority Register (TPR).
4201 This function is only available on IPF.
4202
4203 @return The current value of TPR.
4204
4205 **/
4206 UINT64
4207 EFIAPI
4208 AsmReadTpr (
4209 VOID
4210 );
4211
4212
4213 /**
4214 Reads the current value of External Interrupt Request Register #0 (IRR0).
4215 This function is only available on IPF.
4216
4217 @return The current value of IRR0.
4218
4219 **/
4220 UINT64
4221 EFIAPI
4222 AsmReadIrr0 (
4223 VOID
4224 );
4225
4226
4227 /**
4228 Reads the current value of External Interrupt Request Register #1 (IRR1).
4229 This function is only available on IPF.
4230
4231 @return The current value of IRR1.
4232
4233 **/
4234 UINT64
4235 EFIAPI
4236 AsmReadIrr1 (
4237 VOID
4238 );
4239
4240
4241 /**
4242 Reads the current value of External Interrupt Request Register #2 (IRR2).
4243 This function is only available on IPF.
4244
4245 @return The current value of IRR2.
4246
4247 **/
4248 UINT64
4249 EFIAPI
4250 AsmReadIrr2 (
4251 VOID
4252 );
4253
4254
4255 /**
4256 Reads the current value of External Interrupt Request Register #3 (IRR3).
4257 This function is only available on IPF.
4258
4259 @return The current value of IRR3.
4260
4261 **/
4262 UINT64
4263 EFIAPI
4264 AsmReadIrr3 (
4265 VOID
4266 );
4267
4268
4269 /**
4270 Reads the current value of Performance Monitor Vector Register (PMV).
4271 This function is only available on IPF.
4272
4273 @return The current value of PMV.
4274
4275 **/
4276 UINT64
4277 EFIAPI
4278 AsmReadPmv (
4279 VOID
4280 );
4281
4282
4283 /**
4284 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4285 This function is only available on IPF.
4286
4287 @return The current value of CMCV.
4288
4289 **/
4290 UINT64
4291 EFIAPI
4292 AsmReadCmcv (
4293 VOID
4294 );
4295
4296
4297 /**
4298 Reads the current value of Local Redirection Register #0 (LRR0).
4299 This function is only available on IPF.
4300
4301 @return The current value of LRR0.
4302
4303 **/
4304 UINT64
4305 EFIAPI
4306 AsmReadLrr0 (
4307 VOID
4308 );
4309
4310
4311 /**
4312 Reads the current value of Local Redirection Register #1 (LRR1).
4313 This function is only available on IPF.
4314
4315 @return The current value of LRR1.
4316
4317 **/
4318 UINT64
4319 EFIAPI
4320 AsmReadLrr1 (
4321 VOID
4322 );
4323
4324
4325 /**
4326 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4327 No parameter checking is performed on Value. All bits of Value corresponding to
4328 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4329 The caller must either guarantee that Value is valid, or the caller must set up
4330 fault handlers to catch the faults.
4331 This function is only available on IPF.
4332
4333 @param Value The 64-bit value to write to LID.
4334
4335 @return The 64-bit value written to the LID.
4336
4337 **/
4338 UINT64
4339 EFIAPI
4340 AsmWriteLid (
4341 IN UINT64 Value
4342 );
4343
4344
4345 /**
4346 Writes the current value of 64-bit Task Priority Register (TPR).
4347 No parameter checking is performed on Value. All bits of Value corresponding to
4348 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4349 The caller must either guarantee that Value is valid, or the caller must set up
4350 fault handlers to catch the faults.
4351 This function is only available on IPF.
4352
4353 @param Value The 64-bit value to write to TPR.
4354
4355 @return The 64-bit value written to the TPR.
4356
4357 **/
4358 UINT64
4359 EFIAPI
4360 AsmWriteTpr (
4361 IN UINT64 Value
4362 );
4363
4364
4365 /**
4366 Performs a write operation on End OF External Interrupt Register (EOI).
4367 Writes a value of 0 to the EOI Register. This function is only available on IPF.
4368
4369 **/
4370 VOID
4371 EFIAPI
4372 AsmWriteEoi (
4373 VOID
4374 );
4375
4376
4377 /**
4378 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4379 No parameter checking is performed on Value. All bits of Value corresponding
4380 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4381 The caller must either guarantee that Value is valid, or the caller must set up
4382 fault handlers to catch the faults.
4383 This function is only available on IPF.
4384
4385 @param Value The 64-bit value to write to PMV.
4386
4387 @return The 64-bit value written to the PMV.
4388
4389 **/
4390 UINT64
4391 EFIAPI
4392 AsmWritePmv (
4393 IN UINT64 Value
4394 );
4395
4396
4397 /**
4398 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4399 No parameter checking is performed on Value. All bits of Value corresponding
4400 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4401 The caller must either guarantee that Value is valid, or the caller must set up
4402 fault handlers to catch the faults.
4403 This function is only available on IPF.
4404
4405 @param Value The 64-bit value to write to CMCV.
4406
4407 @return The 64-bit value written to the CMCV.
4408
4409 **/
4410 UINT64
4411 EFIAPI
4412 AsmWriteCmcv (
4413 IN UINT64 Value
4414 );
4415
4416
4417 /**
4418 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4419 No parameter checking is performed on Value. All bits of Value corresponding
4420 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4421 The caller must either guarantee that Value is valid, or the caller must set up
4422 fault handlers to catch the faults.
4423 This function is only available on IPF.
4424
4425 @param Value The 64-bit value to write to LRR0.
4426
4427 @return The 64-bit value written to the LRR0.
4428
4429 **/
4430 UINT64
4431 EFIAPI
4432 AsmWriteLrr0 (
4433 IN UINT64 Value
4434 );
4435
4436
4437 /**
4438 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4439 No parameter checking is performed on Value. All bits of Value corresponding
4440 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4441 The caller must either guarantee that Value is valid, or the caller must
4442 set up fault handlers to catch the faults.
4443 This function is only available on IPF.
4444
4445 @param Value The 64-bit value to write to LRR1.
4446
4447 @return The 64-bit value written to the LRR1.
4448
4449 **/
4450 UINT64
4451 EFIAPI
4452 AsmWriteLrr1 (
4453 IN UINT64 Value
4454 );
4455
4456
4457 /**
4458 Reads the current value of Instruction Breakpoint Register (IBR).
4459
4460 The Instruction Breakpoint Registers are used in pairs. The even numbered
4461 registers contain breakpoint addresses, and the odd numbered registers contain
4462 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4463 on all processor models. Implemented registers are contiguous starting with
4464 register 0. No parameter checking is performed on Index, and if the Index value
4465 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4466 occur. The caller must either guarantee that Index is valid, or the caller must
4467 set up fault handlers to catch the faults.
4468 This function is only available on IPF.
4469
4470 @param Index The 8-bit Instruction Breakpoint Register index to read.
4471
4472 @return The current value of Instruction Breakpoint Register specified by Index.
4473
4474 **/
4475 UINT64
4476 EFIAPI
4477 AsmReadIbr (
4478 IN UINT8 Index
4479 );
4480
4481
4482 /**
4483 Reads the current value of Data Breakpoint Register (DBR).
4484
4485 The Data Breakpoint Registers are used in pairs. The even numbered registers
4486 contain breakpoint addresses, and odd numbered registers contain breakpoint
4487 mask conditions. At least 4 data registers pairs are implemented on all processor
4488 models. Implemented registers are contiguous starting with register 0.
4489 No parameter checking is performed on Index. If the Index value is beyond
4490 the implemented DBR register range, a Reserved Register/Field fault may occur.
4491 The caller must either guarantee that Index is valid, or the caller must set up
4492 fault handlers to catch the faults.
4493 This function is only available on IPF.
4494
4495 @param Index The 8-bit Data Breakpoint Register index to read.
4496
4497 @return The current value of Data Breakpoint Register specified by Index.
4498
4499 **/
4500 UINT64
4501 EFIAPI
4502 AsmReadDbr (
4503 IN UINT8 Index
4504 );
4505
4506
4507 /**
4508 Reads the current value of Performance Monitor Configuration Register (PMC).
4509
4510 All processor implementations provide at least 4 performance counters
4511 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4512 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4513 additional implementation-dependent PMC and PMD to increase the number of
4514 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4515 register set is implementation dependent. No parameter checking is performed
4516 on Index. If the Index value is beyond the implemented PMC register range,
4517 zero value will be returned.
4518 This function is only available on IPF.
4519
4520 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4521
4522 @return The current value of Performance Monitor Configuration Register
4523 specified by Index.
4524
4525 **/
4526 UINT64
4527 EFIAPI
4528 AsmReadPmc (
4529 IN UINT8 Index
4530 );
4531
4532
4533 /**
4534 Reads the current value of Performance Monitor Data Register (PMD).
4535
4536 All processor implementations provide at least 4 performance counters
4537 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4538 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4539 provide additional implementation-dependent PMC and PMD to increase the number
4540 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4541 register set is implementation dependent. No parameter checking is performed
4542 on Index. If the Index value is beyond the implemented PMD register range,
4543 zero value will be returned.
4544 This function is only available on IPF.
4545
4546 @param Index The 8-bit Performance Monitor Data Register index to read.
4547
4548 @return The current value of Performance Monitor Data Register specified by Index.
4549
4550 **/
4551 UINT64
4552 EFIAPI
4553 AsmReadPmd (
4554 IN UINT8 Index
4555 );
4556
4557
4558 /**
4559 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4560
4561 Writes current value of Instruction Breakpoint Register specified by Index.
4562 The Instruction Breakpoint Registers are used in pairs. The even numbered
4563 registers contain breakpoint addresses, and odd numbered registers contain
4564 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4565 on all processor models. Implemented registers are contiguous starting with
4566 register 0. No parameter checking is performed on Index. If the Index value
4567 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4568 occur. The caller must either guarantee that Index is valid, or the caller must
4569 set up fault handlers to catch the faults.
4570 This function is only available on IPF.
4571
4572 @param Index The 8-bit Instruction Breakpoint Register index to write.
4573 @param Value The 64-bit value to write to IBR.
4574
4575 @return The 64-bit value written to the IBR.
4576
4577 **/
4578 UINT64
4579 EFIAPI
4580 AsmWriteIbr (
4581 IN UINT8 Index,
4582 IN UINT64 Value
4583 );
4584
4585
4586 /**
4587 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4588
4589 Writes current value of Data Breakpoint Register specified by Index.
4590 The Data Breakpoint Registers are used in pairs. The even numbered registers
4591 contain breakpoint addresses, and odd numbered registers contain breakpoint
4592 mask conditions. At least 4 data registers pairs are implemented on all processor
4593 models. Implemented registers are contiguous starting with register 0. No parameter
4594 checking is performed on Index. If the Index value is beyond the implemented
4595 DBR register range, a Reserved Register/Field fault may occur. The caller must
4596 either guarantee that Index is valid, or the caller must set up fault handlers to
4597 catch the faults.
4598 This function is only available on IPF.
4599
4600 @param Index The 8-bit Data Breakpoint Register index to write.
4601 @param Value The 64-bit value to write to DBR.
4602
4603 @return The 64-bit value written to the DBR.
4604
4605 **/
4606 UINT64
4607 EFIAPI
4608 AsmWriteDbr (
4609 IN UINT8 Index,
4610 IN UINT64 Value
4611 );
4612
4613
4614 /**
4615 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4616
4617 Writes current value of Performance Monitor Configuration Register specified by Index.
4618 All processor implementations provide at least 4 performance counters
4619 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
4620 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4621 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4622 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4623 dependent. No parameter checking is performed on Index. If the Index value is
4624 beyond the implemented PMC register range, the write is ignored.
4625 This function is only available on IPF.
4626
4627 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4628 @param Value The 64-bit value to write to PMC.
4629
4630 @return The 64-bit value written to the PMC.
4631
4632 **/
4633 UINT64
4634 EFIAPI
4635 AsmWritePmc (
4636 IN UINT8 Index,
4637 IN UINT64 Value
4638 );
4639
4640
4641 /**
4642 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4643
4644 Writes current value of Performance Monitor Data Register specified by Index.
4645 All processor implementations provide at least 4 performance counters
4646 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4647 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4648 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4649 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4650 is implementation dependent. No parameter checking is performed on Index. If the
4651 Index value is beyond the implemented PMD register range, the write is ignored.
4652 This function is only available on IPF.
4653
4654 @param Index The 8-bit Performance Monitor Data Register index to write.
4655 @param Value The 64-bit value to write to PMD.
4656
4657 @return The 64-bit value written to the PMD.
4658
4659 **/
4660 UINT64
4661 EFIAPI
4662 AsmWritePmd (
4663 IN UINT8 Index,
4664 IN UINT64 Value
4665 );
4666
4667
4668 /**
4669 Reads the current value of 64-bit Global Pointer (GP).
4670
4671 Reads and returns the current value of GP.
4672 This function is only available on IPF.
4673
4674 @return The current value of GP.
4675
4676 **/
4677 UINT64
4678 EFIAPI
4679 AsmReadGp (
4680 VOID
4681 );
4682
4683
4684 /**
4685 Write the current value of 64-bit Global Pointer (GP).
4686
4687 Writes the current value of GP. The 64-bit value written to the GP is returned.
4688 No parameter checking is performed on Value.
4689 This function is only available on IPF.
4690
4691 @param Value The 64-bit value to write to GP.
4692
4693 @return The 64-bit value written to the GP.
4694
4695 **/
4696 UINT64
4697 EFIAPI
4698 AsmWriteGp (
4699 IN UINT64 Value
4700 );
4701
4702
4703 /**
4704 Reads the current value of 64-bit Stack Pointer (SP).
4705
4706 Reads and returns the current value of SP.
4707 This function is only available on IPF.
4708
4709 @return The current value of SP.
4710
4711 **/
4712 UINT64
4713 EFIAPI
4714 AsmReadSp (
4715 VOID
4716 );
4717
4718
4719 ///
4720 /// Valid Index value for AsmReadControlRegister()
4721 ///
4722 #define IPF_CONTROL_REGISTER_DCR 0
4723 #define IPF_CONTROL_REGISTER_ITM 1
4724 #define IPF_CONTROL_REGISTER_IVA 2
4725 #define IPF_CONTROL_REGISTER_PTA 8
4726 #define IPF_CONTROL_REGISTER_IPSR 16
4727 #define IPF_CONTROL_REGISTER_ISR 17
4728 #define IPF_CONTROL_REGISTER_IIP 19
4729 #define IPF_CONTROL_REGISTER_IFA 20
4730 #define IPF_CONTROL_REGISTER_ITIR 21
4731 #define IPF_CONTROL_REGISTER_IIPA 22
4732 #define IPF_CONTROL_REGISTER_IFS 23
4733 #define IPF_CONTROL_REGISTER_IIM 24
4734 #define IPF_CONTROL_REGISTER_IHA 25
4735 #define IPF_CONTROL_REGISTER_LID 64
4736 #define IPF_CONTROL_REGISTER_IVR 65
4737 #define IPF_CONTROL_REGISTER_TPR 66
4738 #define IPF_CONTROL_REGISTER_EOI 67
4739 #define IPF_CONTROL_REGISTER_IRR0 68
4740 #define IPF_CONTROL_REGISTER_IRR1 69
4741 #define IPF_CONTROL_REGISTER_IRR2 70
4742 #define IPF_CONTROL_REGISTER_IRR3 71
4743 #define IPF_CONTROL_REGISTER_ITV 72
4744 #define IPF_CONTROL_REGISTER_PMV 73
4745 #define IPF_CONTROL_REGISTER_CMCV 74
4746 #define IPF_CONTROL_REGISTER_LRR0 80
4747 #define IPF_CONTROL_REGISTER_LRR1 81
4748
4749 /**
4750 Reads a 64-bit control register.
4751
4752 Reads and returns the control register specified by Index. The valid Index valued are defined
4753 above in "Related Definitions".
4754 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
4755
4756 @param Index The index of the control register to read.
4757
4758 @return The control register specified by Index.
4759
4760 **/
4761 UINT64
4762 EFIAPI
4763 AsmReadControlRegister (
4764 IN UINT64 Index
4765 );
4766
4767
4768 ///
4769 /// Valid Index value for AsmReadApplicationRegister()
4770 ///
4771 #define IPF_APPLICATION_REGISTER_K0 0
4772 #define IPF_APPLICATION_REGISTER_K1 1
4773 #define IPF_APPLICATION_REGISTER_K2 2
4774 #define IPF_APPLICATION_REGISTER_K3 3
4775 #define IPF_APPLICATION_REGISTER_K4 4
4776 #define IPF_APPLICATION_REGISTER_K5 5
4777 #define IPF_APPLICATION_REGISTER_K6 6
4778 #define IPF_APPLICATION_REGISTER_K7 7
4779 #define IPF_APPLICATION_REGISTER_RSC 16
4780 #define IPF_APPLICATION_REGISTER_BSP 17
4781 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4782 #define IPF_APPLICATION_REGISTER_RNAT 19
4783 #define IPF_APPLICATION_REGISTER_FCR 21
4784 #define IPF_APPLICATION_REGISTER_EFLAG 24
4785 #define IPF_APPLICATION_REGISTER_CSD 25
4786 #define IPF_APPLICATION_REGISTER_SSD 26
4787 #define IPF_APPLICATION_REGISTER_CFLG 27
4788 #define IPF_APPLICATION_REGISTER_FSR 28
4789 #define IPF_APPLICATION_REGISTER_FIR 29
4790 #define IPF_APPLICATION_REGISTER_FDR 30
4791 #define IPF_APPLICATION_REGISTER_CCV 32
4792 #define IPF_APPLICATION_REGISTER_UNAT 36
4793 #define IPF_APPLICATION_REGISTER_FPSR 40
4794 #define IPF_APPLICATION_REGISTER_ITC 44
4795 #define IPF_APPLICATION_REGISTER_PFS 64
4796 #define IPF_APPLICATION_REGISTER_LC 65
4797 #define IPF_APPLICATION_REGISTER_EC 66
4798
4799 /**
4800 Reads a 64-bit application register.
4801
4802 Reads and returns the application register specified by Index. The valid Index valued are defined
4803 above in "Related Definitions".
4804 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
4805
4806 @param Index The index of the application register to read.
4807
4808 @return The application register specified by Index.
4809
4810 **/
4811 UINT64
4812 EFIAPI
4813 AsmReadApplicationRegister (
4814 IN UINT64 Index
4815 );
4816
4817
4818 /**
4819 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4820
4821 Determines the current execution mode of the CPU.
4822 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4823 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4824 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4825 and -1 is returned.
4826 This function is only available on IPF.
4827
4828 @retval 1 The CPU is in virtual mode.
4829 @retval 0 The CPU is in physical mode.
4830 @retval -1 The CPU is in mixed mode.
4831
4832 **/
4833 INT64
4834 EFIAPI
4835 AsmCpuVirtual (
4836 VOID
4837 );
4838
4839
4840 /**
4841 Makes a PAL procedure call.
4842
4843 This is a wrapper function to make a PAL procedure call. Based on the Index
4844 value this API will make static or stacked PAL call. The following table
4845 describes the usage of PAL Procedure Index Assignment. Architected procedures
4846 may be designated as required or optional. If a PAL procedure is specified
4847 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4848 Status field of the PAL_CALL_RETURN structure.
4849 This indicates that the procedure is not present in this PAL implementation.
4850 It is the caller's responsibility to check for this return code after calling
4851 any optional PAL procedure.
4852 No parameter checking is performed on the 5 input parameters, but there are
4853 some common rules that the caller should follow when making a PAL call. Any
4854 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4855 Unaligned addresses may cause undefined results. For those parameters defined
4856 as reserved or some fields defined as reserved must be zero filled or the invalid
4857 argument return value may be returned or undefined result may occur during the
4858 execution of the procedure. If the PalEntryPoint does not point to a valid
4859 PAL entry point then the system behavior is undefined. This function is only
4860 available on IPF.
4861
4862 @param PalEntryPoint The PAL procedure calls entry point.
4863 @param Index The PAL procedure Index number.
4864 @param Arg2 The 2nd parameter for PAL procedure calls.
4865 @param Arg3 The 3rd parameter for PAL procedure calls.
4866 @param Arg4 The 4th parameter for PAL procedure calls.
4867
4868 @return structure returned from the PAL Call procedure, including the status and return value.
4869
4870 **/
4871 PAL_CALL_RETURN
4872 EFIAPI
4873 AsmPalCall (
4874 IN UINT64 PalEntryPoint,
4875 IN UINT64 Index,
4876 IN UINT64 Arg2,
4877 IN UINT64 Arg3,
4878 IN UINT64 Arg4
4879 );
4880
4881
4882 #elif defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4883 ///
4884 /// IA32 and X64 Specific Functions
4885 /// Byte packed structure for 16-bit Real Mode EFLAGS
4886 ///
4887 typedef union {
4888 struct {
4889 UINT32 CF:1; /// Carry Flag
4890 UINT32 Reserved_0:1; /// Reserved
4891 UINT32 PF:1; /// Parity Flag
4892 UINT32 Reserved_1:1; /// Reserved
4893 UINT32 AF:1; /// Auxiliary Carry Flag
4894 UINT32 Reserved_2:1; /// Reserved
4895 UINT32 ZF:1; /// Zero Flag
4896 UINT32 SF:1; /// Sign Flag
4897 UINT32 TF:1; /// Trap Flag
4898 UINT32 IF:1; /// Interrupt Enable Flag
4899 UINT32 DF:1; /// Direction Flag
4900 UINT32 OF:1; /// Overflow Flag
4901 UINT32 IOPL:2; /// I/O Privilege Level
4902 UINT32 NT:1; /// Nested Task
4903 UINT32 Reserved_3:1; /// Reserved
4904 } Bits;
4905 UINT16 Uint16;
4906 } IA32_FLAGS16;
4907
4908 ///
4909 /// Byte packed structure for EFLAGS/RFLAGS
4910 /// 32-bits on IA-32
4911 /// 64-bits on X64. The upper 32-bits on X64 are reserved
4912 ///
4913 typedef union {
4914 struct {
4915 UINT32 CF:1; /// Carry Flag
4916 UINT32 Reserved_0:1; /// Reserved
4917 UINT32 PF:1; /// Parity Flag
4918 UINT32 Reserved_1:1; /// Reserved
4919 UINT32 AF:1; /// Auxiliary Carry Flag
4920 UINT32 Reserved_2:1; /// Reserved
4921 UINT32 ZF:1; /// Zero Flag
4922 UINT32 SF:1; /// Sign Flag
4923 UINT32 TF:1; /// Trap Flag
4924 UINT32 IF:1; /// Interrupt Enable Flag
4925 UINT32 DF:1; /// Direction Flag
4926 UINT32 OF:1; /// Overflow Flag
4927 UINT32 IOPL:2; /// I/O Privilege Level
4928 UINT32 NT:1; /// Nested Task
4929 UINT32 Reserved_3:1; /// Reserved
4930 UINT32 RF:1; /// Resume Flag
4931 UINT32 VM:1; /// Virtual 8086 Mode
4932 UINT32 AC:1; /// Alignment Check
4933 UINT32 VIF:1; /// Virtual Interrupt Flag
4934 UINT32 VIP:1; /// Virtual Interrupt Pending
4935 UINT32 ID:1; /// ID Flag
4936 UINT32 Reserved_4:10; /// Reserved
4937 } Bits;
4938 UINTN UintN;
4939 } IA32_EFLAGS32;
4940
4941 ///
4942 /// Byte packed structure for Control Register 0 (CR0)
4943 /// 32-bits on IA-32
4944 /// 64-bits on X64. The upper 32-bits on X64 are reserved
4945 ///
4946 typedef union {
4947 struct {
4948 UINT32 PE:1; /// Protection Enable
4949 UINT32 MP:1; /// Monitor Coprocessor
4950 UINT32 EM:1; /// Emulation
4951 UINT32 TS:1; /// Task Switched
4952 UINT32 ET:1; /// Extension Type
4953 UINT32 NE:1; /// Numeric Error
4954 UINT32 Reserved_0:10; /// Reserved
4955 UINT32 WP:1; /// Write Protect
4956 UINT32 Reserved_1:1; /// Reserved
4957 UINT32 AM:1; /// Alignment Mask
4958 UINT32 Reserved_2:10; /// Reserved
4959 UINT32 NW:1; /// Mot Write-through
4960 UINT32 CD:1; /// Cache Disable
4961 UINT32 PG:1; /// Paging
4962 } Bits;
4963 UINTN UintN;
4964 } IA32_CR0;
4965
4966 ///
4967 /// Byte packed structure for Control Register 4 (CR4)
4968 /// 32-bits on IA-32
4969 /// 64-bits on X64. The upper 32-bits on X64 are reserved
4970 ///
4971 typedef union {
4972 struct {
4973 UINT32 VME:1; /// Virtual-8086 Mode Extensions
4974 UINT32 PVI:1; /// Protected-Mode Virtual Interrupts
4975 UINT32 TSD:1; /// Time Stamp Disable
4976 UINT32 DE:1; /// Debugging Extensions
4977 UINT32 PSE:1; /// Page Size Extensions
4978 UINT32 PAE:1; /// Physical Address Extension
4979 UINT32 MCE:1; /// Machine Check Enable
4980 UINT32 PGE:1; /// Page Global Enable
4981 UINT32 PCE:1; /// Performance Monitoring Counter
4982 /// Enable
4983 UINT32 OSFXSR:1; /// Operating System Support for
4984 /// FXSAVE and FXRSTOR instructions
4985 UINT32 OSXMMEXCPT:1; /// Operating System Support for
4986 /// Unmasked SIMD Floating Point
4987 /// Exceptions
4988 UINT32 Reserved_0:2; /// Reserved
4989 UINT32 VMXE:1; /// VMX Enable
4990 UINT32 Reserved_1:18; /// Reseved
4991 } Bits;
4992 UINTN UintN;
4993 } IA32_CR4;
4994
4995 ///
4996 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor
4997 /// @todo How to make this structure byte-packed in a compiler independent way?
4998 ///
4999 #pragma pack (1)
5000 typedef struct {
5001 UINT16 Limit;
5002 UINTN Base;
5003 } IA32_DESCRIPTOR;
5004 #pragma pack ()
5005
5006 #define IA32_IDT_GATE_TYPE_TASK 0x85
5007 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
5008 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
5009 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
5010 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
5011
5012 ///
5013 /// Byte packed structure for an Interrupt Gate Descriptor
5014 ///
5015 #if defined (MDE_CPU_IA32)
5016
5017 typedef union {
5018 struct {
5019 UINT32 OffsetLow:16; // Offset bits 15..0
5020 UINT32 Selector:16; // Selector
5021 UINT32 Reserved_0:8; // Reserved
5022 UINT32 GateType:8; // Gate Type. See #defines above
5023 UINT32 OffsetHigh:16; // Offset bits 31..16
5024 } Bits;
5025 UINT64 Uint64;
5026 } IA32_IDT_GATE_DESCRIPTOR;
5027
5028 #endif
5029
5030 #if defined (MDE_CPU_X64)
5031
5032 typedef union {
5033 struct {
5034 UINT32 OffsetLow:16; // Offset bits 15..0
5035 UINT32 Selector:16; // Selector
5036 UINT32 Reserved_0:8; // Reserved
5037 UINT32 GateType:8; // Gate Type. See #defines above
5038 UINT32 OffsetHigh:16; // Offset bits 31..16
5039 UINT32 OffsetUpper:32; // Offset bits 63..32
5040 UINT32 Reserved_1:32; // Reserved
5041 } Bits;
5042 UINT64 Uint64;
5043 UINT64 Uint64_1;
5044 } IA32_IDT_GATE_DESCRIPTOR;
5045
5046 #endif
5047
5048 ///
5049 /// Byte packed structure for an FP/SSE/SSE2 context
5050 ///
5051 typedef struct {
5052 UINT8 Buffer[512];
5053 } IA32_FX_BUFFER;
5054
5055 ///
5056 /// Structures for the 16-bit real mode thunks
5057 ///
5058 typedef struct {
5059 UINT32 Reserved1;
5060 UINT32 Reserved2;
5061 UINT32 Reserved3;
5062 UINT32 Reserved4;
5063 UINT8 BL;
5064 UINT8 BH;
5065 UINT16 Reserved5;
5066 UINT8 DL;
5067 UINT8 DH;
5068 UINT16 Reserved6;
5069 UINT8 CL;
5070 UINT8 CH;
5071 UINT16 Reserved7;
5072 UINT8 AL;
5073 UINT8 AH;
5074 UINT16 Reserved8;
5075 } IA32_BYTE_REGS;
5076
5077 typedef struct {
5078 UINT16 DI;
5079 UINT16 Reserved1;
5080 UINT16 SI;
5081 UINT16 Reserved2;
5082 UINT16 BP;
5083 UINT16 Reserved3;
5084 UINT16 SP;
5085 UINT16 Reserved4;
5086 UINT16 BX;
5087 UINT16 Reserved5;
5088 UINT16 DX;
5089 UINT16 Reserved6;
5090 UINT16 CX;
5091 UINT16 Reserved7;
5092 UINT16 AX;
5093 UINT16 Reserved8;
5094 } IA32_WORD_REGS;
5095
5096 typedef struct {
5097 UINT32 EDI;
5098 UINT32 ESI;
5099 UINT32 EBP;
5100 UINT32 ESP;
5101 UINT32 EBX;
5102 UINT32 EDX;
5103 UINT32 ECX;
5104 UINT32 EAX;
5105 UINT16 DS;
5106 UINT16 ES;
5107 UINT16 FS;
5108 UINT16 GS;
5109 IA32_EFLAGS32 EFLAGS;
5110 UINT32 Eip;
5111 UINT16 CS;
5112 UINT16 SS;
5113 } IA32_DWORD_REGS;
5114
5115 typedef union {
5116 IA32_DWORD_REGS E;
5117 IA32_WORD_REGS X;
5118 IA32_BYTE_REGS H;
5119 } IA32_REGISTER_SET;
5120
5121 ///
5122 /// Byte packed structure for an 16-bit real mode thunks
5123 ///
5124 typedef struct {
5125 IA32_REGISTER_SET *RealModeState;
5126 VOID *RealModeBuffer;
5127 UINT32 RealModeBufferSize;
5128 UINT32 ThunkAttributes;
5129 } THUNK_CONTEXT;
5130
5131 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5132 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5133 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5134
5135 /**
5136 Retrieves CPUID information.
5137
5138 Executes the CPUID instruction with EAX set to the value specified by Index.
5139 This function always returns Index.
5140 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5141 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5142 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5143 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5144 This function is only available on IA-32 and X64.
5145
5146 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5147 instruction.
5148 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5149 instruction. This is an optional parameter that may be NULL.
5150 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5151 instruction. This is an optional parameter that may be NULL.
5152 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5153 instruction. This is an optional parameter that may be NULL.
5154 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5155 instruction. This is an optional parameter that may be NULL.
5156
5157 @return Index
5158
5159 **/
5160 UINT32
5161 EFIAPI
5162 AsmCpuid (
5163 IN UINT32 Index,
5164 OUT UINT32 *Eax, OPTIONAL
5165 OUT UINT32 *Ebx, OPTIONAL
5166 OUT UINT32 *Ecx, OPTIONAL
5167 OUT UINT32 *Edx OPTIONAL
5168 );
5169
5170
5171 /**
5172 Retrieves CPUID information using an extended leaf identifier.
5173
5174 Executes the CPUID instruction with EAX set to the value specified by Index
5175 and ECX set to the value specified by SubIndex. This function always returns
5176 Index. This function is only available on IA-32 and x64.
5177
5178 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5179 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5180 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5181 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5182
5183 @param Index The 32-bit value to load into EAX prior to invoking the
5184 CPUID instruction.
5185 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5186 CPUID instruction.
5187 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5188 instruction. This is an optional parameter that may be
5189 NULL.
5190 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5191 instruction. This is an optional parameter that may be
5192 NULL.
5193 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5194 instruction. This is an optional parameter that may be
5195 NULL.
5196 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5197 instruction. This is an optional parameter that may be
5198 NULL.
5199
5200 @return Index
5201
5202 **/
5203 UINT32
5204 EFIAPI
5205 AsmCpuidEx (
5206 IN UINT32 Index,
5207 IN UINT32 SubIndex,
5208 OUT UINT32 *Eax, OPTIONAL
5209 OUT UINT32 *Ebx, OPTIONAL
5210 OUT UINT32 *Ecx, OPTIONAL
5211 OUT UINT32 *Edx OPTIONAL
5212 );
5213
5214
5215 /**
5216 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5217
5218 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5219 and executing a WBINVD instruction. This function is only available on IA-32 and x64.
5220
5221 **/
5222 VOID
5223 EFIAPI
5224 AsmDisableCache (
5225 VOID
5226 );
5227
5228
5229 /**
5230 Perform a WBINVD and clear both the CD and NW bits of CR0.
5231
5232 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5233 bits of CR0 to 0. This function is only available on IA-32 and x64.
5234
5235 **/
5236 VOID
5237 EFIAPI
5238 AsmEnableCache (
5239 VOID
5240 );
5241
5242
5243 /**
5244 Returns the lower 32-bits of a Machine Specific Register(MSR).
5245
5246 Reads and returns the lower 32-bits of the MSR specified by Index.
5247 No parameter checking is performed on Index, and some Index values may cause
5248 CPU exceptions. The caller must either guarantee that Index is valid, or the
5249 caller must set up exception handlers to catch the exceptions. This function
5250 is only available on IA-32 and X64.
5251
5252 @param Index The 32-bit MSR index to read.
5253
5254 @return The lower 32 bits of the MSR identified by Index.
5255
5256 **/
5257 UINT32
5258 EFIAPI
5259 AsmReadMsr32 (
5260 IN UINT32 Index
5261 );
5262
5263
5264 /**
5265 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5266 The upper 32-bits of the MSR are set to zero.
5267
5268 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5269 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5270 the MSR is returned. No parameter checking is performed on Index or Value,
5271 and some of these may cause CPU exceptions. The caller must either guarantee
5272 that Index and Value are valid, or the caller must establish proper exception
5273 handlers. This function is only available on IA-32 and X64.
5274
5275 @param Index The 32-bit MSR index to write.
5276 @param Value The 32-bit value to write to the MSR.
5277
5278 @return Value
5279
5280 **/
5281 UINT32
5282 EFIAPI
5283 AsmWriteMsr32 (
5284 IN UINT32 Index,
5285 IN UINT32 Value
5286 );
5287
5288
5289 /**
5290 Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
5291 writes the result back to the 64-bit MSR.
5292
5293 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
5294 between the lower 32-bits of the read result and the value specified by
5295 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5296 32-bits of the value written to the MSR is returned. No parameter checking is
5297 performed on Index or OrData, and some of these may cause CPU exceptions. The
5298 caller must either guarantee that Index and OrData are valid, or the caller
5299 must establish proper exception handlers. This function is only available on
5300 IA-32 and X64.
5301
5302 @param Index The 32-bit MSR index to write.
5303 @param OrData The value to OR with the read value from the MSR.
5304
5305 @return The lower 32-bit value written to the MSR.
5306
5307 **/
5308 UINT32
5309 EFIAPI
5310 AsmMsrOr32 (
5311 IN UINT32 Index,
5312 IN UINT32 OrData
5313 );
5314
5315
5316 /**
5317 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5318 the result back to the 64-bit MSR.
5319
5320 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5321 lower 32-bits of the read result and the value specified by AndData, and
5322 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5323 the value written to the MSR is returned. No parameter checking is performed
5324 on Index or AndData, and some of these may cause CPU exceptions. The caller
5325 must either guarantee that Index and AndData are valid, or the caller must
5326 establish proper exception handlers. This function is only available on IA-32
5327 and X64.
5328
5329 @param Index The 32-bit MSR index to write.
5330 @param AndData The value to AND with the read value from the MSR.
5331
5332 @return The lower 32-bit value written to the MSR.
5333
5334 **/
5335 UINT32
5336 EFIAPI
5337 AsmMsrAnd32 (
5338 IN UINT32 Index,
5339 IN UINT32 AndData
5340 );
5341
5342
5343 /**
5344 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
5345 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5346
5347 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5348 lower 32-bits of the read result and the value specified by AndData
5349 preserving the upper 32-bits, performs a bitwise inclusive OR between the
5350 result of the AND operation and the value specified by OrData, and writes the
5351 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5352 written to the MSR is returned. No parameter checking is performed on Index,
5353 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5354 must either guarantee that Index, AndData, and OrData are valid, or the
5355 caller must establish proper exception handlers. This function is only
5356 available on IA-32 and X64.
5357
5358 @param Index The 32-bit MSR index to write.
5359 @param AndData The value to AND with the read value from the MSR.
5360 @param OrData The value to OR with the result of the AND operation.
5361
5362 @return The lower 32-bit value written to the MSR.
5363
5364 **/
5365 UINT32
5366 EFIAPI
5367 AsmMsrAndThenOr32 (
5368 IN UINT32 Index,
5369 IN UINT32 AndData,
5370 IN UINT32 OrData
5371 );
5372
5373
5374 /**
5375 Reads a bit field of an MSR.
5376
5377 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5378 specified by the StartBit and the EndBit. The value of the bit field is
5379 returned. The caller must either guarantee that Index is valid, or the caller
5380 must set up exception handlers to catch the exceptions. This function is only
5381 available on IA-32 and X64.
5382
5383 If StartBit is greater than 31, then ASSERT().
5384 If EndBit is greater than 31, then ASSERT().
5385 If EndBit is less than StartBit, then ASSERT().
5386
5387 @param Index The 32-bit MSR index to read.
5388 @param StartBit The ordinal of the least significant bit in the bit field.
5389 Range 0..31.
5390 @param EndBit The ordinal of the most significant bit in the bit field.
5391 Range 0..31.
5392
5393 @return The bit field read from the MSR.
5394
5395 **/
5396 UINT32
5397 EFIAPI
5398 AsmMsrBitFieldRead32 (
5399 IN UINT32 Index,
5400 IN UINTN StartBit,
5401 IN UINTN EndBit
5402 );
5403
5404
5405 /**
5406 Writes a bit field to an MSR.
5407
5408 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5409 field is specified by the StartBit and the EndBit. All other bits in the
5410 destination MSR are preserved. The lower 32-bits of the MSR written is
5411 returned. Extra left bits in Value are stripped. The caller must either
5412 guarantee that Index and the data written is valid, or the caller must set up
5413 exception handlers to catch the exceptions. This function is only available
5414 on IA-32 and X64.
5415
5416 If StartBit is greater than 31, then ASSERT().
5417 If EndBit is greater than 31, then ASSERT().
5418 If EndBit is less than StartBit, then ASSERT().
5419
5420 @param Index The 32-bit MSR index to write.
5421 @param StartBit The ordinal of the least significant bit in the bit field.
5422 Range 0..31.
5423 @param EndBit The ordinal of the most significant bit in the bit field.
5424 Range 0..31.
5425 @param Value New value of the bit field.
5426
5427 @return The lower 32-bit of the value written to the MSR.
5428
5429 **/
5430 UINT32
5431 EFIAPI
5432 AsmMsrBitFieldWrite32 (
5433 IN UINT32 Index,
5434 IN UINTN StartBit,
5435 IN UINTN EndBit,
5436 IN UINT32 Value
5437 );
5438
5439
5440 /**
5441 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5442 result back to the bit field in the 64-bit MSR.
5443
5444 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
5445 between the read result and the value specified by OrData, and writes the
5446 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5447 written to the MSR are returned. Extra left bits in OrData are stripped. The
5448 caller must either guarantee that Index and the data written is valid, or
5449 the caller must set up exception handlers to catch the exceptions. This
5450 function is only available on IA-32 and X64.
5451
5452 If StartBit is greater than 31, then ASSERT().
5453 If EndBit is greater than 31, then ASSERT().
5454 If EndBit is less than StartBit, then ASSERT().
5455
5456 @param Index The 32-bit MSR index to write.
5457 @param StartBit The ordinal of the least significant bit in the bit field.
5458 Range 0..31.
5459 @param EndBit The ordinal of the most significant bit in the bit field.
5460 Range 0..31.
5461 @param OrData The value to OR with the read value from the MSR.
5462
5463 @return The lower 32-bit of the value written to the MSR.
5464
5465 **/
5466 UINT32
5467 EFIAPI
5468 AsmMsrBitFieldOr32 (
5469 IN UINT32 Index,
5470 IN UINTN StartBit,
5471 IN UINTN EndBit,
5472 IN UINT32 OrData
5473 );
5474
5475
5476 /**
5477 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5478 result back to the bit field in the 64-bit MSR.
5479
5480 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5481 read result and the value specified by AndData, and writes the result to the
5482 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5483 MSR are returned. Extra left bits in AndData are stripped. The caller must
5484 either guarantee that Index and the data written is valid, or the caller must
5485 set up exception handlers to catch the exceptions. This function is only
5486 available on IA-32 and X64.
5487
5488 If StartBit is greater than 31, then ASSERT().
5489 If EndBit is greater than 31, then ASSERT().
5490 If EndBit is less than StartBit, then ASSERT().
5491
5492 @param Index The 32-bit MSR index to write.
5493 @param StartBit The ordinal of the least significant bit in the bit field.
5494 Range 0..31.
5495 @param EndBit The ordinal of the most significant bit in the bit field.
5496 Range 0..31.
5497 @param AndData The value to AND with the read value from the MSR.
5498
5499 @return The lower 32-bit of the value written to the MSR.
5500
5501 **/
5502 UINT32
5503 EFIAPI
5504 AsmMsrBitFieldAnd32 (
5505 IN UINT32 Index,
5506 IN UINTN StartBit,
5507 IN UINTN EndBit,
5508 IN UINT32 AndData
5509 );
5510
5511
5512 /**
5513 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5514 bitwise inclusive OR, and writes the result back to the bit field in the
5515 64-bit MSR.
5516
5517 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5518 bitwise inclusive OR between the read result and the value specified by
5519 AndData, and writes the result to the 64-bit MSR specified by Index. The
5520 lower 32-bits of the value written to the MSR are returned. Extra left bits
5521 in both AndData and OrData are stripped. The caller must either guarantee
5522 that Index and the data written is valid, or the caller must set up exception
5523 handlers to catch the exceptions. This function is only available on IA-32
5524 and X64.
5525
5526 If StartBit is greater than 31, then ASSERT().
5527 If EndBit is greater than 31, then ASSERT().
5528 If EndBit is less than StartBit, then ASSERT().
5529
5530 @param Index The 32-bit MSR index to write.
5531 @param StartBit The ordinal of the least significant bit in the bit field.
5532 Range 0..31.
5533 @param EndBit The ordinal of the most significant bit in the bit field.
5534 Range 0..31.
5535 @param AndData The value to AND with the read value from the MSR.
5536 @param OrData The value to OR with the result of the AND operation.
5537
5538 @return The lower 32-bit of the value written to the MSR.
5539
5540 **/
5541 UINT32
5542 EFIAPI
5543 AsmMsrBitFieldAndThenOr32 (
5544 IN UINT32 Index,
5545 IN UINTN StartBit,
5546 IN UINTN EndBit,
5547 IN UINT32 AndData,
5548 IN UINT32 OrData
5549 );
5550
5551
5552 /**
5553 Returns a 64-bit Machine Specific Register(MSR).
5554
5555 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5556 performed on Index, and some Index values may cause CPU exceptions. The
5557 caller must either guarantee that Index is valid, or the caller must set up
5558 exception handlers to catch the exceptions. This function is only available
5559 on IA-32 and X64.
5560
5561 @param Index The 32-bit MSR index to read.
5562
5563 @return The value of the MSR identified by Index.
5564
5565 **/
5566 UINT64
5567 EFIAPI
5568 AsmReadMsr64 (
5569 IN UINT32 Index
5570 );
5571
5572
5573 /**
5574 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5575 value.
5576
5577 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5578 64-bit value written to the MSR is returned. No parameter checking is
5579 performed on Index or Value, and some of these may cause CPU exceptions. The
5580 caller must either guarantee that Index and Value are valid, or the caller
5581 must establish proper exception handlers. This function is only available on
5582 IA-32 and X64.
5583
5584 @param Index The 32-bit MSR index to write.
5585 @param Value The 64-bit value to write to the MSR.
5586
5587 @return Value
5588
5589 **/
5590 UINT64
5591 EFIAPI
5592 AsmWriteMsr64 (
5593 IN UINT32 Index,
5594 IN UINT64 Value
5595 );
5596
5597
5598 /**
5599 Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
5600 back to the 64-bit MSR.
5601
5602 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
5603 between the read result and the value specified by OrData, and writes the
5604 result to the 64-bit MSR specified by Index. The value written to the MSR is
5605 returned. No parameter checking is performed on Index or OrData, and some of
5606 these may cause CPU exceptions. The caller must either guarantee that Index
5607 and OrData are valid, or the caller must establish proper exception handlers.
5608 This function is only available on IA-32 and X64.
5609
5610 @param Index The 32-bit MSR index to write.
5611 @param OrData The value to OR with the read value from the MSR.
5612
5613 @return The value written back to the MSR.
5614
5615 **/
5616 UINT64
5617 EFIAPI
5618 AsmMsrOr64 (
5619 IN UINT32 Index,
5620 IN UINT64 OrData
5621 );
5622
5623
5624 /**
5625 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5626 64-bit MSR.
5627
5628 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5629 read result and the value specified by OrData, and writes the result to the
5630 64-bit MSR specified by Index. The value written to the MSR is returned. No
5631 parameter checking is performed on Index or OrData, and some of these may
5632 cause CPU exceptions. The caller must either guarantee that Index and OrData
5633 are valid, or the caller must establish proper exception handlers. This
5634 function is only available on IA-32 and X64.
5635
5636 @param Index The 32-bit MSR index to write.
5637 @param AndData The value to AND with the read value from the MSR.
5638
5639 @return The value written back to the MSR.
5640
5641 **/
5642 UINT64
5643 EFIAPI
5644 AsmMsrAnd64 (
5645 IN UINT32 Index,
5646 IN UINT64 AndData
5647 );
5648
5649
5650 /**
5651 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
5652 OR, and writes the result back to the 64-bit MSR.
5653
5654 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5655 result and the value specified by AndData, performs a bitwise inclusive OR
5656 between the result of the AND operation and the value specified by OrData,
5657 and writes the result to the 64-bit MSR specified by Index. The value written
5658 to the MSR is returned. No parameter checking is performed on Index, AndData,
5659 or OrData, and some of these may cause CPU exceptions. The caller must either
5660 guarantee that Index, AndData, and OrData are valid, or the caller must
5661 establish proper exception handlers. This function is only available on IA-32
5662 and X64.
5663
5664 @param Index The 32-bit MSR index to write.
5665 @param AndData The value to AND with the read value from the MSR.
5666 @param OrData The value to OR with the result of the AND operation.
5667
5668 @return The value written back to the MSR.
5669
5670 **/
5671 UINT64
5672 EFIAPI
5673 AsmMsrAndThenOr64 (
5674 IN UINT32 Index,
5675 IN UINT64 AndData,
5676 IN UINT64 OrData
5677 );
5678
5679
5680 /**
5681 Reads a bit field of an MSR.
5682
5683 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5684 StartBit and the EndBit. The value of the bit field is returned. The caller
5685 must either guarantee that Index is valid, or the caller must set up
5686 exception handlers to catch the exceptions. This function is only available
5687 on IA-32 and X64.
5688
5689 If StartBit is greater than 63, then ASSERT().
5690 If EndBit is greater than 63, then ASSERT().
5691 If EndBit is less than StartBit, then ASSERT().
5692
5693 @param Index The 32-bit MSR index to read.
5694 @param StartBit The ordinal of the least significant bit in the bit field.
5695 Range 0..63.
5696 @param EndBit The ordinal of the most significant bit in the bit field.
5697 Range 0..63.
5698
5699 @return The value read from the MSR.
5700
5701 **/
5702 UINT64
5703 EFIAPI
5704 AsmMsrBitFieldRead64 (
5705 IN UINT32 Index,
5706 IN UINTN StartBit,
5707 IN UINTN EndBit
5708 );
5709
5710
5711 /**
5712 Writes a bit field to an MSR.
5713
5714 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5715 the StartBit and the EndBit. All other bits in the destination MSR are
5716 preserved. The MSR written is returned. Extra left bits in Value are
5717 stripped. The caller must either guarantee that Index and the data written is
5718 valid, or the caller must set up exception handlers to catch the exceptions.
5719 This function is only available on IA-32 and X64.
5720
5721 If StartBit is greater than 63, then ASSERT().
5722 If EndBit is greater than 63, then ASSERT().
5723 If EndBit is less than StartBit, then ASSERT().
5724
5725 @param Index The 32-bit MSR index to write.
5726 @param StartBit The ordinal of the least significant bit in the bit field.
5727 Range 0..63.
5728 @param EndBit The ordinal of the most significant bit in the bit field.
5729 Range 0..63.
5730 @param Value New value of the bit field.
5731
5732 @return The value written back to the MSR.
5733
5734 **/
5735 UINT64
5736 EFIAPI
5737 AsmMsrBitFieldWrite64 (
5738 IN UINT32 Index,
5739 IN UINTN StartBit,
5740 IN UINTN EndBit,
5741 IN UINT64 Value
5742 );
5743
5744
5745 /**
5746 Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
5747 writes the result back to the bit field in the 64-bit MSR.
5748
5749 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
5750 between the read result and the value specified by OrData, and writes the
5751 result to the 64-bit MSR specified by Index. The value written to the MSR is
5752 returned. Extra left bits in OrData are stripped. The caller must either
5753 guarantee that Index and the data written is valid, or the caller must set up
5754 exception handlers to catch the exceptions. This function is only available
5755 on IA-32 and X64.
5756
5757 If StartBit is greater than 63, then ASSERT().
5758 If EndBit is greater than 63, then ASSERT().
5759 If EndBit is less than StartBit, then ASSERT().
5760
5761 @param Index The 32-bit MSR index to write.
5762 @param StartBit The ordinal of the least significant bit in the bit field.
5763 Range 0..63.
5764 @param EndBit The ordinal of the most significant bit in the bit field.
5765 Range 0..63.
5766 @param OrData The value to OR with the read value from the bit field.
5767
5768 @return The value written back to the MSR.
5769
5770 **/
5771 UINT64
5772 EFIAPI
5773 AsmMsrBitFieldOr64 (
5774 IN UINT32 Index,
5775 IN UINTN StartBit,
5776 IN UINTN EndBit,
5777 IN UINT64 OrData
5778 );
5779
5780
5781 /**
5782 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5783 result back to the bit field in the 64-bit MSR.
5784
5785 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5786 read result and the value specified by AndData, and writes the result to the
5787 64-bit MSR specified by Index. The value written to the MSR is returned.
5788 Extra left bits in AndData are stripped. The caller must either guarantee
5789 that Index and the data written is valid, or the caller must set up exception
5790 handlers to catch the exceptions. This function is only available on IA-32
5791 and X64.
5792
5793 If StartBit is greater than 63, then ASSERT().
5794 If EndBit is greater than 63, then ASSERT().
5795 If EndBit is less than StartBit, then ASSERT().
5796
5797 @param Index The 32-bit MSR index to write.
5798 @param StartBit The ordinal of the least significant bit in the bit field.
5799 Range 0..63.
5800 @param EndBit The ordinal of the most significant bit in the bit field.
5801 Range 0..63.
5802 @param AndData The value to AND with the read value from the bit field.
5803
5804 @return The value written back to the MSR.
5805
5806 **/
5807 UINT64
5808 EFIAPI
5809 AsmMsrBitFieldAnd64 (
5810 IN UINT32 Index,
5811 IN UINTN StartBit,
5812 IN UINTN EndBit,
5813 IN UINT64 AndData
5814 );
5815
5816
5817 /**
5818 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5819 bitwise inclusive OR, and writes the result back to the bit field in the
5820 64-bit MSR.
5821
5822 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5823 a bitwise inclusive OR between the read result and the value specified by
5824 AndData, and writes the result to the 64-bit MSR specified by Index. The
5825 value written to the MSR is returned. Extra left bits in both AndData and
5826 OrData are stripped. The caller must either guarantee that Index and the data
5827 written is valid, or the caller must set up exception handlers to catch the
5828 exceptions. This function is only available on IA-32 and X64.
5829
5830 If StartBit is greater than 63, then ASSERT().
5831 If EndBit is greater than 63, then ASSERT().
5832 If EndBit is less than StartBit, then ASSERT().
5833
5834 @param Index The 32-bit MSR index to write.
5835 @param StartBit The ordinal of the least significant bit in the bit field.
5836 Range 0..63.
5837 @param EndBit The ordinal of the most significant bit in the bit field.
5838 Range 0..63.
5839 @param AndData The value to AND with the read value from the bit field.
5840 @param OrData The value to OR with the result of the AND operation.
5841
5842 @return The value written back to the MSR.
5843
5844 **/
5845 UINT64
5846 EFIAPI
5847 AsmMsrBitFieldAndThenOr64 (
5848 IN UINT32 Index,
5849 IN UINTN StartBit,
5850 IN UINTN EndBit,
5851 IN UINT64 AndData,
5852 IN UINT64 OrData
5853 );
5854
5855
5856 /**
5857 Reads the current value of the EFLAGS register.
5858
5859 Reads and returns the current value of the EFLAGS register. This function is
5860 only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a
5861 64-bit value on X64.
5862
5863 @return EFLAGS on IA-32 or RFLAGS on X64.
5864
5865 **/
5866 UINTN
5867 EFIAPI
5868 AsmReadEflags (
5869 VOID
5870 );
5871
5872
5873 /**
5874 Reads the current value of the Control Register 0 (CR0).
5875
5876 Reads and returns the current value of CR0. This function is only available
5877 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5878 X64.
5879
5880 @return The value of the Control Register 0 (CR0).
5881
5882 **/
5883 UINTN
5884 EFIAPI
5885 AsmReadCr0 (
5886 VOID
5887 );
5888
5889
5890 /**
5891 Reads the current value of the Control Register 2 (CR2).
5892
5893 Reads and returns the current value of CR2. This function is only available
5894 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5895 X64.
5896
5897 @return The value of the Control Register 2 (CR2).
5898
5899 **/
5900 UINTN
5901 EFIAPI
5902 AsmReadCr2 (
5903 VOID
5904 );
5905
5906
5907 /**
5908 Reads the current value of the Control Register 3 (CR3).
5909
5910 Reads and returns the current value of CR3. This function is only available
5911 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5912 X64.
5913
5914 @return The value of the Control Register 3 (CR3).
5915
5916 **/
5917 UINTN
5918 EFIAPI
5919 AsmReadCr3 (
5920 VOID
5921 );
5922
5923
5924 /**
5925 Reads the current value of the Control Register 4 (CR4).
5926
5927 Reads and returns the current value of CR4. This function is only available
5928 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
5929 X64.
5930
5931 @return The value of the Control Register 4 (CR4).
5932
5933 **/
5934 UINTN
5935 EFIAPI
5936 AsmReadCr4 (
5937 VOID
5938 );
5939
5940
5941 /**
5942 Writes a value to Control Register 0 (CR0).
5943
5944 Writes and returns a new value to CR0. This function is only available on
5945 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
5946
5947 @param Cr0 The value to write to CR0.
5948
5949 @return The value written to CR0.
5950
5951 **/
5952 UINTN
5953 EFIAPI
5954 AsmWriteCr0 (
5955 UINTN Cr0
5956 );
5957
5958
5959 /**
5960 Writes a value to Control Register 2 (CR2).
5961
5962 Writes and returns a new value to CR2. This function is only available on
5963 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
5964
5965 @param Cr2 The value to write to CR2.
5966
5967 @return The value written to CR2.
5968
5969 **/
5970 UINTN
5971 EFIAPI
5972 AsmWriteCr2 (
5973 UINTN Cr2
5974 );
5975
5976
5977 /**
5978 Writes a value to Control Register 3 (CR3).
5979
5980 Writes and returns a new value to CR3. This function is only available on
5981 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
5982
5983 @param Cr3 The value to write to CR3.
5984
5985 @return The value written to CR3.
5986
5987 **/
5988 UINTN
5989 EFIAPI
5990 AsmWriteCr3 (
5991 UINTN Cr3
5992 );
5993
5994
5995 /**
5996 Writes a value to Control Register 4 (CR4).
5997
5998 Writes and returns a new value to CR4. This function is only available on
5999 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6000
6001 @param Cr4 The value to write to CR4.
6002
6003 @return The value written to CR4.
6004
6005 **/
6006 UINTN
6007 EFIAPI
6008 AsmWriteCr4 (
6009 UINTN Cr4
6010 );
6011
6012
6013 /**
6014 Reads the current value of Debug Register 0 (DR0).
6015
6016 Reads and returns the current value of DR0. This function is only available
6017 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6018 X64.
6019
6020 @return The value of Debug Register 0 (DR0).
6021
6022 **/
6023 UINTN
6024 EFIAPI
6025 AsmReadDr0 (
6026 VOID
6027 );
6028
6029
6030 /**
6031 Reads the current value of Debug Register 1 (DR1).
6032
6033 Reads and returns the current value of DR1. This function is only available
6034 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6035 X64.
6036
6037 @return The value of Debug Register 1 (DR1).
6038
6039 **/
6040 UINTN
6041 EFIAPI
6042 AsmReadDr1 (
6043 VOID
6044 );
6045
6046
6047 /**
6048 Reads the current value of Debug Register 2 (DR2).
6049
6050 Reads and returns the current value of DR2. This function is only available
6051 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6052 X64.
6053
6054 @return The value of Debug Register 2 (DR2).
6055
6056 **/
6057 UINTN
6058 EFIAPI
6059 AsmReadDr2 (
6060 VOID
6061 );
6062
6063
6064 /**
6065 Reads the current value of Debug Register 3 (DR3).
6066
6067 Reads and returns the current value of DR3. This function is only available
6068 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6069 X64.
6070
6071 @return The value of Debug Register 3 (DR3).
6072
6073 **/
6074 UINTN
6075 EFIAPI
6076 AsmReadDr3 (
6077 VOID
6078 );
6079
6080
6081 /**
6082 Reads the current value of Debug Register 4 (DR4).
6083
6084 Reads and returns the current value of DR4. This function is only available
6085 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6086 X64.
6087
6088 @return The value of Debug Register 4 (DR4).
6089
6090 **/
6091 UINTN
6092 EFIAPI
6093 AsmReadDr4 (
6094 VOID
6095 );
6096
6097
6098 /**
6099 Reads the current value of Debug Register 5 (DR5).
6100
6101 Reads and returns the current value of DR5. This function is only available
6102 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6103 X64.
6104
6105 @return The value of Debug Register 5 (DR5).
6106
6107 **/
6108 UINTN
6109 EFIAPI
6110 AsmReadDr5 (
6111 VOID
6112 );
6113
6114
6115 /**
6116 Reads the current value of Debug Register 6 (DR6).
6117
6118 Reads and returns the current value of DR6. This function is only available
6119 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6120 X64.
6121
6122 @return The value of Debug Register 6 (DR6).
6123
6124 **/
6125 UINTN
6126 EFIAPI
6127 AsmReadDr6 (
6128 VOID
6129 );
6130
6131
6132 /**
6133 Reads the current value of Debug Register 7 (DR7).
6134
6135 Reads and returns the current value of DR7. This function is only available
6136 on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
6137 X64.
6138
6139 @return The value of Debug Register 7 (DR7).
6140
6141 **/
6142 UINTN
6143 EFIAPI
6144 AsmReadDr7 (
6145 VOID
6146 );
6147
6148
6149 /**
6150 Writes a value to Debug Register 0 (DR0).
6151
6152 Writes and returns a new value to DR0. This function is only available on
6153 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6154
6155 @param Dr0 The value to write to Dr0.
6156
6157 @return The value written to Debug Register 0 (DR0).
6158
6159 **/
6160 UINTN
6161 EFIAPI
6162 AsmWriteDr0 (
6163 UINTN Dr0
6164 );
6165
6166
6167 /**
6168 Writes a value to Debug Register 1 (DR1).
6169
6170 Writes and returns a new value to DR1. This function is only available on
6171 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6172
6173 @param Dr1 The value to write to Dr1.
6174
6175 @return The value written to Debug Register 1 (DR1).
6176
6177 **/
6178 UINTN
6179 EFIAPI
6180 AsmWriteDr1 (
6181 UINTN Dr1
6182 );
6183
6184
6185 /**
6186 Writes a value to Debug Register 2 (DR2).
6187
6188 Writes and returns a new value to DR2. This function is only available on
6189 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6190
6191 @param Dr2 The value to write to Dr2.
6192
6193 @return The value written to Debug Register 2 (DR2).
6194
6195 **/
6196 UINTN
6197 EFIAPI
6198 AsmWriteDr2 (
6199 UINTN Dr2
6200 );
6201
6202
6203 /**
6204 Writes a value to Debug Register 3 (DR3).
6205
6206 Writes and returns a new value to DR3. This function is only available on
6207 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6208
6209 @param Dr3 The value to write to Dr3.
6210
6211 @return The value written to Debug Register 3 (DR3).
6212
6213 **/
6214 UINTN
6215 EFIAPI
6216 AsmWriteDr3 (
6217 UINTN Dr3
6218 );
6219
6220
6221 /**
6222 Writes a value to Debug Register 4 (DR4).
6223
6224 Writes and returns a new value to DR4. This function is only available on
6225 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6226
6227 @param Dr4 The value to write to Dr4.
6228
6229 @return The value written to Debug Register 4 (DR4).
6230
6231 **/
6232 UINTN
6233 EFIAPI
6234 AsmWriteDr4 (
6235 UINTN Dr4
6236 );
6237
6238
6239 /**
6240 Writes a value to Debug Register 5 (DR5).
6241
6242 Writes and returns a new value to DR5. This function is only available on
6243 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6244
6245 @param Dr5 The value to write to Dr5.
6246
6247 @return The value written to Debug Register 5 (DR5).
6248
6249 **/
6250 UINTN
6251 EFIAPI
6252 AsmWriteDr5 (
6253 UINTN Dr5
6254 );
6255
6256
6257 /**
6258 Writes a value to Debug Register 6 (DR6).
6259
6260 Writes and returns a new value to DR6. This function is only available on
6261 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6262
6263 @param Dr6 The value to write to Dr6.
6264
6265 @return The value written to Debug Register 6 (DR6).
6266
6267 **/
6268 UINTN
6269 EFIAPI
6270 AsmWriteDr6 (
6271 UINTN Dr6
6272 );
6273
6274
6275 /**
6276 Writes a value to Debug Register 7 (DR7).
6277
6278 Writes and returns a new value to DR7. This function is only available on
6279 IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
6280
6281 @param Dr7 The value to write to Dr7.
6282
6283 @return The value written to Debug Register 7 (DR7).
6284
6285 **/
6286 UINTN
6287 EFIAPI
6288 AsmWriteDr7 (
6289 UINTN Dr7
6290 );
6291
6292
6293 /**
6294 Reads the current value of Code Segment Register (CS).
6295
6296 Reads and returns the current value of CS. This function is only available on
6297 IA-32 and X64.
6298
6299 @return The current value of CS.
6300
6301 **/
6302 UINT16
6303 EFIAPI
6304 AsmReadCs (
6305 VOID
6306 );
6307
6308
6309 /**
6310 Reads the current value of Data Segment Register (DS).
6311
6312 Reads and returns the current value of DS. This function is only available on
6313 IA-32 and X64.
6314
6315 @return The current value of DS.
6316
6317 **/
6318 UINT16
6319 EFIAPI
6320 AsmReadDs (
6321 VOID
6322 );
6323
6324
6325 /**
6326 Reads the current value of Extra Segment Register (ES).
6327
6328 Reads and returns the current value of ES. This function is only available on
6329 IA-32 and X64.
6330
6331 @return The current value of ES.
6332
6333 **/
6334 UINT16
6335 EFIAPI
6336 AsmReadEs (
6337 VOID
6338 );
6339
6340
6341 /**
6342 Reads the current value of FS Data Segment Register (FS).
6343
6344 Reads and returns the current value of FS. This function is only available on
6345 IA-32 and X64.
6346
6347 @return The current value of FS.
6348
6349 **/
6350 UINT16
6351 EFIAPI
6352 AsmReadFs (
6353 VOID
6354 );
6355
6356
6357 /**
6358 Reads the current value of GS Data Segment Register (GS).
6359
6360 Reads and returns the current value of GS. This function is only available on
6361 IA-32 and X64.
6362
6363 @return The current value of GS.
6364
6365 **/
6366 UINT16
6367 EFIAPI
6368 AsmReadGs (
6369 VOID
6370 );
6371
6372
6373 /**
6374 Reads the current value of Stack Segment Register (SS).
6375
6376 Reads and returns the current value of SS. This function is only available on
6377 IA-32 and X64.
6378
6379 @return The current value of SS.
6380
6381 **/
6382 UINT16
6383 EFIAPI
6384 AsmReadSs (
6385 VOID
6386 );
6387
6388
6389 /**
6390 Reads the current value of Task Register (TR).
6391
6392 Reads and returns the current value of TR. This function is only available on
6393 IA-32 and X64.
6394
6395 @return The current value of TR.
6396
6397 **/
6398 UINT16
6399 EFIAPI
6400 AsmReadTr (
6401 VOID
6402 );
6403
6404
6405 /**
6406 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6407
6408 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6409 function is only available on IA-32 and X64.
6410
6411 If Gdtr is NULL, then ASSERT().
6412
6413 @param Gdtr Pointer to a GDTR descriptor.
6414
6415 **/
6416 VOID
6417 EFIAPI
6418 AsmReadGdtr (
6419 OUT IA32_DESCRIPTOR *Gdtr
6420 );
6421
6422
6423 /**
6424 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6425
6426 Writes and the current GDTR descriptor specified by Gdtr. This function is
6427 only available on IA-32 and X64.
6428
6429 If Gdtr is NULL, then ASSERT().
6430
6431 @param Gdtr Pointer to a GDTR descriptor.
6432
6433 **/
6434 VOID
6435 EFIAPI
6436 AsmWriteGdtr (
6437 IN CONST IA32_DESCRIPTOR *Gdtr
6438 );
6439
6440
6441 /**
6442 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6443
6444 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6445 function is only available on IA-32 and X64.
6446
6447 If Idtr is NULL, then ASSERT().
6448
6449 @param Idtr Pointer to a IDTR descriptor.
6450
6451 **/
6452 VOID
6453 EFIAPI
6454 AsmReadIdtr (
6455 OUT IA32_DESCRIPTOR *Idtr
6456 );
6457
6458
6459 /**
6460 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6461
6462 Writes the current IDTR descriptor and returns it in Idtr. This function is
6463 only available on IA-32 and X64.
6464
6465 If Idtr is NULL, then ASSERT().
6466
6467 @param Idtr Pointer to a IDTR descriptor.
6468
6469 **/
6470 VOID
6471 EFIAPI
6472 AsmWriteIdtr (
6473 IN CONST IA32_DESCRIPTOR *Idtr
6474 );
6475
6476
6477 /**
6478 Reads the current Local Descriptor Table Register(LDTR) selector.
6479
6480 Reads and returns the current 16-bit LDTR descriptor value. This function is
6481 only available on IA-32 and X64.
6482
6483 @return The current selector of LDT.
6484
6485 **/
6486 UINT16
6487 EFIAPI
6488 AsmReadLdtr (
6489 VOID
6490 );
6491
6492
6493 /**
6494 Writes the current Local Descriptor Table Register (LDTR) selector.
6495
6496 Writes and the current LDTR descriptor specified by Ldtr. This function is
6497 only available on IA-32 and X64.
6498
6499 @param Ldtr 16-bit LDTR selector value.
6500
6501 **/
6502 VOID
6503 EFIAPI
6504 AsmWriteLdtr (
6505 IN UINT16 Ldtr
6506 );
6507
6508
6509 /**
6510 Save the current floating point/SSE/SSE2 context to a buffer.
6511
6512 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6513 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6514 available on IA-32 and X64.
6515
6516 If Buffer is NULL, then ASSERT().
6517 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6518
6519 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6520
6521 **/
6522 VOID
6523 EFIAPI
6524 AsmFxSave (
6525 OUT IA32_FX_BUFFER *Buffer
6526 );
6527
6528
6529 /**
6530 Restores the current floating point/SSE/SSE2 context from a buffer.
6531
6532 Restores the current floating point/SSE/SSE2 state from the buffer specified
6533 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6534 only available on IA-32 and X64.
6535
6536 If Buffer is NULL, then ASSERT().
6537 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6538 If Buffer was not saved with AsmFxSave(), then ASSERT().
6539
6540 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6541
6542 **/
6543 VOID
6544 EFIAPI
6545 AsmFxRestore (
6546 IN CONST IA32_FX_BUFFER *Buffer
6547 );
6548
6549
6550 /**
6551 Reads the current value of 64-bit MMX Register #0 (MM0).
6552
6553 Reads and returns the current value of MM0. This function is only available
6554 on IA-32 and X64.
6555
6556 @return The current value of MM0.
6557
6558 **/
6559 UINT64
6560 EFIAPI
6561 AsmReadMm0 (
6562 VOID
6563 );
6564
6565
6566 /**
6567 Reads the current value of 64-bit MMX Register #1 (MM1).
6568
6569 Reads and returns the current value of MM1. This function is only available
6570 on IA-32 and X64.
6571
6572 @return The current value of MM1.
6573
6574 **/
6575 UINT64
6576 EFIAPI
6577 AsmReadMm1 (
6578 VOID
6579 );
6580
6581
6582 /**
6583 Reads the current value of 64-bit MMX Register #2 (MM2).
6584
6585 Reads and returns the current value of MM2. This function is only available
6586 on IA-32 and X64.
6587
6588 @return The current value of MM2.
6589
6590 **/
6591 UINT64
6592 EFIAPI
6593 AsmReadMm2 (
6594 VOID
6595 );
6596
6597
6598 /**
6599 Reads the current value of 64-bit MMX Register #3 (MM3).
6600
6601 Reads and returns the current value of MM3. This function is only available
6602 on IA-32 and X64.
6603
6604 @return The current value of MM3.
6605
6606 **/
6607 UINT64
6608 EFIAPI
6609 AsmReadMm3 (
6610 VOID
6611 );
6612
6613
6614 /**
6615 Reads the current value of 64-bit MMX Register #4 (MM4).
6616
6617 Reads and returns the current value of MM4. This function is only available
6618 on IA-32 and X64.
6619
6620 @return The current value of MM4.
6621
6622 **/
6623 UINT64
6624 EFIAPI
6625 AsmReadMm4 (
6626 VOID
6627 );
6628
6629
6630 /**
6631 Reads the current value of 64-bit MMX Register #5 (MM5).
6632
6633 Reads and returns the current value of MM5. This function is only available
6634 on IA-32 and X64.
6635
6636 @return The current value of MM5.
6637
6638 **/
6639 UINT64
6640 EFIAPI
6641 AsmReadMm5 (
6642 VOID
6643 );
6644
6645
6646 /**
6647 Reads the current value of 64-bit MMX Register #6 (MM6).
6648
6649 Reads and returns the current value of MM6. This function is only available
6650 on IA-32 and X64.
6651
6652 @return The current value of MM6.
6653
6654 **/
6655 UINT64
6656 EFIAPI
6657 AsmReadMm6 (
6658 VOID
6659 );
6660
6661
6662 /**
6663 Reads the current value of 64-bit MMX Register #7 (MM7).
6664
6665 Reads and returns the current value of MM7. This function is only available
6666 on IA-32 and X64.
6667
6668 @return The current value of MM7.
6669
6670 **/
6671 UINT64
6672 EFIAPI
6673 AsmReadMm7 (
6674 VOID
6675 );
6676
6677
6678 /**
6679 Writes the current value of 64-bit MMX Register #0 (MM0).
6680
6681 Writes the current value of MM0. This function is only available on IA32 and
6682 X64.
6683
6684 @param Value The 64-bit value to write to MM0.
6685
6686 **/
6687 VOID
6688 EFIAPI
6689 AsmWriteMm0 (
6690 IN UINT64 Value
6691 );
6692
6693
6694 /**
6695 Writes the current value of 64-bit MMX Register #1 (MM1).
6696
6697 Writes the current value of MM1. This function is only available on IA32 and
6698 X64.
6699
6700 @param Value The 64-bit value to write to MM1.
6701
6702 **/
6703 VOID
6704 EFIAPI
6705 AsmWriteMm1 (
6706 IN UINT64 Value
6707 );
6708
6709
6710 /**
6711 Writes the current value of 64-bit MMX Register #2 (MM2).
6712
6713 Writes the current value of MM2. This function is only available on IA32 and
6714 X64.
6715
6716 @param Value The 64-bit value to write to MM2.
6717
6718 **/
6719 VOID
6720 EFIAPI
6721 AsmWriteMm2 (
6722 IN UINT64 Value
6723 );
6724
6725
6726 /**
6727 Writes the current value of 64-bit MMX Register #3 (MM3).
6728
6729 Writes the current value of MM3. This function is only available on IA32 and
6730 X64.
6731
6732 @param Value The 64-bit value to write to MM3.
6733
6734 **/
6735 VOID
6736 EFIAPI
6737 AsmWriteMm3 (
6738 IN UINT64 Value
6739 );
6740
6741
6742 /**
6743 Writes the current value of 64-bit MMX Register #4 (MM4).
6744
6745 Writes the current value of MM4. This function is only available on IA32 and
6746 X64.
6747
6748 @param Value The 64-bit value to write to MM4.
6749
6750 **/
6751 VOID
6752 EFIAPI
6753 AsmWriteMm4 (
6754 IN UINT64 Value
6755 );
6756
6757
6758 /**
6759 Writes the current value of 64-bit MMX Register #5 (MM5).
6760
6761 Writes the current value of MM5. This function is only available on IA32 and
6762 X64.
6763
6764 @param Value The 64-bit value to write to MM5.
6765
6766 **/
6767 VOID
6768 EFIAPI
6769 AsmWriteMm5 (
6770 IN UINT64 Value
6771 );
6772
6773
6774 /**
6775 Writes the current value of 64-bit MMX Register #6 (MM6).
6776
6777 Writes the current value of MM6. This function is only available on IA32 and
6778 X64.
6779
6780 @param Value The 64-bit value to write to MM6.
6781
6782 **/
6783 VOID
6784 EFIAPI
6785 AsmWriteMm6 (
6786 IN UINT64 Value
6787 );
6788
6789
6790 /**
6791 Writes the current value of 64-bit MMX Register #7 (MM7).
6792
6793 Writes the current value of MM7. This function is only available on IA32 and
6794 X64.
6795
6796 @param Value The 64-bit value to write to MM7.
6797
6798 **/
6799 VOID
6800 EFIAPI
6801 AsmWriteMm7 (
6802 IN UINT64 Value
6803 );
6804
6805
6806 /**
6807 Reads the current value of Time Stamp Counter (TSC).
6808
6809 Reads and returns the current value of TSC. This function is only available
6810 on IA-32 and X64.
6811
6812 @return The current value of TSC
6813
6814 **/
6815 UINT64
6816 EFIAPI
6817 AsmReadTsc (
6818 VOID
6819 );
6820
6821
6822 /**
6823 Reads the current value of a Performance Counter (PMC).
6824
6825 Reads and returns the current value of performance counter specified by
6826 Index. This function is only available on IA-32 and X64.
6827
6828 @param Index The 32-bit Performance Counter index to read.
6829
6830 @return The value of the PMC specified by Index.
6831
6832 **/
6833 UINT64
6834 EFIAPI
6835 AsmReadPmc (
6836 IN UINT32 Index
6837 );
6838
6839
6840 /**
6841 Sets up a monitor buffer that is used by AsmMwait().
6842
6843 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6844 and Edx. Returns Eax. This function is only available on IA-32 and X64.
6845
6846 @param Eax The value to load into EAX or RAX before executing the MONITOR
6847 instruction.
6848 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6849 instruction.
6850 @param Edx The value to load into EDX or RDX before executing the MONITOR
6851 instruction.
6852
6853 @return Eax
6854
6855 **/
6856 UINTN
6857 EFIAPI
6858 AsmMonitor (
6859 IN UINTN Eax,
6860 IN UINTN Ecx,
6861 IN UINTN Edx
6862 );
6863
6864
6865 /**
6866 Executes an MWAIT instruction.
6867
6868 Executes an MWAIT instruction with the register state specified by Eax and
6869 Ecx. Returns Eax. This function is only available on IA-32 and X64.
6870
6871 @param Eax The value to load into EAX or RAX before executing the MONITOR
6872 instruction.
6873 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6874 instruction.
6875
6876 @return Eax
6877
6878 **/
6879 UINTN
6880 EFIAPI
6881 AsmMwait (
6882 IN UINTN Eax,
6883 IN UINTN Ecx
6884 );
6885
6886
6887 /**
6888 Executes a WBINVD instruction.
6889
6890 Executes a WBINVD instruction. This function is only available on IA-32 and
6891 X64.
6892
6893 **/
6894 VOID
6895 EFIAPI
6896 AsmWbinvd (
6897 VOID
6898 );
6899
6900
6901 /**
6902 Executes a INVD instruction.
6903
6904 Executes a INVD instruction. This function is only available on IA-32 and
6905 X64.
6906
6907 **/
6908 VOID
6909 EFIAPI
6910 AsmInvd (
6911 VOID
6912 );
6913
6914
6915 /**
6916 Flushes a cache line from all the instruction and data caches within the
6917 coherency domain of the CPU.
6918
6919 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6920 This function is only available on IA-32 and X64.
6921
6922 @param LinearAddress The address of the cache line to flush. If the CPU is
6923 in a physical addressing mode, then LinearAddress is a
6924 physical address. If the CPU is in a virtual
6925 addressing mode, then LinearAddress is a virtual
6926 address.
6927
6928 @return LinearAddress
6929 **/
6930 VOID *
6931 EFIAPI
6932 AsmFlushCacheLine (
6933 IN VOID *LinearAddress
6934 );
6935
6936
6937 /**
6938 Enables the 32-bit paging mode on the CPU.
6939
6940 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6941 must be properly initialized prior to calling this service. This function
6942 assumes the current execution mode is 32-bit protected mode. This function is
6943 only available on IA-32. After the 32-bit paging mode is enabled, control is
6944 transferred to the function specified by EntryPoint using the new stack
6945 specified by NewStack and passing in the parameters specified by Context1 and
6946 Context2. Context1 and Context2 are optional and may be NULL. The function
6947 EntryPoint must never return.
6948
6949 If the current execution mode is not 32-bit protected mode, then ASSERT().
6950 If EntryPoint is NULL, then ASSERT().
6951 If NewStack is NULL, then ASSERT().
6952
6953 There are a number of constraints that must be followed before calling this
6954 function:
6955 1) Interrupts must be disabled.
6956 2) The caller must be in 32-bit protected mode with flat descriptors. This
6957 means all descriptors must have a base of 0 and a limit of 4GB.
6958 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
6959 descriptors.
6960 4) CR3 must point to valid page tables that will be used once the transition
6961 is complete, and those page tables must guarantee that the pages for this
6962 function and the stack are identity mapped.
6963
6964 @param EntryPoint A pointer to function to call with the new stack after
6965 paging is enabled.
6966 @param Context1 A pointer to the context to pass into the EntryPoint
6967 function as the first parameter after paging is enabled.
6968 @param Context2 A pointer to the context to pass into the EntryPoint
6969 function as the second parameter after paging is enabled.
6970 @param NewStack A pointer to the new stack to use for the EntryPoint
6971 function after paging is enabled.
6972
6973 **/
6974 VOID
6975 EFIAPI
6976 AsmEnablePaging32 (
6977 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6978 IN VOID *Context1, OPTIONAL
6979 IN VOID *Context2, OPTIONAL
6980 IN VOID *NewStack
6981 );
6982
6983
6984 /**
6985 Disables the 32-bit paging mode on the CPU.
6986
6987 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
6988 mode. This function assumes the current execution mode is 32-paged protected
6989 mode. This function is only available on IA-32. After the 32-bit paging mode
6990 is disabled, control is transferred to the function specified by EntryPoint
6991 using the new stack specified by NewStack and passing in the parameters
6992 specified by Context1 and Context2. Context1 and Context2 are optional and
6993 may be NULL. The function EntryPoint must never return.
6994
6995 If the current execution mode is not 32-bit paged mode, then ASSERT().
6996 If EntryPoint is NULL, then ASSERT().
6997 If NewStack is NULL, then ASSERT().
6998
6999 There are a number of constraints that must be followed before calling this
7000 function:
7001 1) Interrupts must be disabled.
7002 2) The caller must be in 32-bit paged mode.
7003 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
7004 4) CR3 must point to valid page tables that guarantee that the pages for
7005 this function and the stack are identity mapped.
7006
7007 @param EntryPoint A pointer to function to call with the new stack after
7008 paging is disabled.
7009 @param Context1 A pointer to the context to pass into the EntryPoint
7010 function as the first parameter after paging is disabled.
7011 @param Context2 A pointer to the context to pass into the EntryPoint
7012 function as the second parameter after paging is
7013 disabled.
7014 @param NewStack A pointer to the new stack to use for the EntryPoint
7015 function after paging is disabled.
7016
7017 **/
7018 VOID
7019 EFIAPI
7020 AsmDisablePaging32 (
7021 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
7022 IN VOID *Context1, OPTIONAL
7023 IN VOID *Context2, OPTIONAL
7024 IN VOID *NewStack
7025 );
7026
7027
7028 /**
7029 Enables the 64-bit paging mode on the CPU.
7030
7031 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
7032 must be properly initialized prior to calling this service. This function
7033 assumes the current execution mode is 32-bit protected mode with flat
7034 descriptors. This function is only available on IA-32. After the 64-bit
7035 paging mode is enabled, control is transferred to the function specified by
7036 EntryPoint using the new stack specified by NewStack and passing in the
7037 parameters specified by Context1 and Context2. Context1 and Context2 are
7038 optional and may be 0. The function EntryPoint must never return.
7039
7040 If the current execution mode is not 32-bit protected mode with flat
7041 descriptors, then ASSERT().
7042 If EntryPoint is 0, then ASSERT().
7043 If NewStack is 0, then ASSERT().
7044
7045 @param Cs The 16-bit selector to load in the CS before EntryPoint
7046 is called. The descriptor in the GDT that this selector
7047 references must be setup for long mode.
7048 @param EntryPoint The 64-bit virtual address of the function to call with
7049 the new stack after paging is enabled.
7050 @param Context1 The 64-bit virtual address of the context to pass into
7051 the EntryPoint function as the first parameter after
7052 paging is enabled.
7053 @param Context2 The 64-bit virtual address of the context to pass into
7054 the EntryPoint function as the second parameter after
7055 paging is enabled.
7056 @param NewStack The 64-bit virtual address of the new stack to use for
7057 the EntryPoint function after paging is enabled.
7058
7059 **/
7060 VOID
7061 EFIAPI
7062 AsmEnablePaging64 (
7063 IN UINT16 Cs,
7064 IN UINT64 EntryPoint,
7065 IN UINT64 Context1, OPTIONAL
7066 IN UINT64 Context2, OPTIONAL
7067 IN UINT64 NewStack
7068 );
7069
7070
7071 /**
7072 Disables the 64-bit paging mode on the CPU.
7073
7074 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
7075 mode. This function assumes the current execution mode is 64-paging mode.
7076 This function is only available on X64. After the 64-bit paging mode is
7077 disabled, control is transferred to the function specified by EntryPoint
7078 using the new stack specified by NewStack and passing in the parameters
7079 specified by Context1 and Context2. Context1 and Context2 are optional and
7080 may be 0. The function EntryPoint must never return.
7081
7082 If the current execution mode is not 64-bit paged mode, then ASSERT().
7083 If EntryPoint is 0, then ASSERT().
7084 If NewStack is 0, then ASSERT().
7085
7086 @param Cs The 16-bit selector to load in the CS before EntryPoint
7087 is called. The descriptor in the GDT that this selector
7088 references must be setup for 32-bit protected mode.
7089 @param EntryPoint The 64-bit virtual address of the function to call with
7090 the new stack after paging is disabled.
7091 @param Context1 The 64-bit virtual address of the context to pass into
7092 the EntryPoint function as the first parameter after
7093 paging is disabled.
7094 @param Context2 The 64-bit virtual address of the context to pass into
7095 the EntryPoint function as the second parameter after
7096 paging is disabled.
7097 @param NewStack The 64-bit virtual address of the new stack to use for
7098 the EntryPoint function after paging is disabled.
7099
7100 **/
7101 VOID
7102 EFIAPI
7103 AsmDisablePaging64 (
7104 IN UINT16 Cs,
7105 IN UINT32 EntryPoint,
7106 IN UINT32 Context1, OPTIONAL
7107 IN UINT32 Context2, OPTIONAL
7108 IN UINT32 NewStack
7109 );
7110
7111
7112 //
7113 // 16-bit thunking services
7114 //
7115
7116 /**
7117 Retrieves the properties for 16-bit thunk functions.
7118
7119 Computes the size of the buffer and stack below 1MB required to use the
7120 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7121 buffer size is returned in RealModeBufferSize, and the stack size is returned
7122 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7123 then the actual minimum stack size is ExtraStackSize plus the maximum number
7124 of bytes that need to be passed to the 16-bit real mode code.
7125
7126 If RealModeBufferSize is NULL, then ASSERT().
7127 If ExtraStackSize is NULL, then ASSERT().
7128
7129 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7130 required to use the 16-bit thunk functions.
7131 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7132 that the 16-bit thunk functions require for
7133 temporary storage in the transition to and from
7134 16-bit real mode.
7135
7136 **/
7137 VOID
7138 EFIAPI
7139 AsmGetThunk16Properties (
7140 OUT UINT32 *RealModeBufferSize,
7141 OUT UINT32 *ExtraStackSize
7142 );
7143
7144
7145 /**
7146 Prepares all structures a code required to use AsmThunk16().
7147
7148 Prepares all structures and code required to use AsmThunk16().
7149
7150 If ThunkContext is NULL, then ASSERT().
7151
7152 @param ThunkContext A pointer to the context structure that describes the
7153 16-bit real mode code to call.
7154
7155 **/
7156 VOID
7157 EFIAPI
7158 AsmPrepareThunk16 (
7159 OUT THUNK_CONTEXT *ThunkContext
7160 );
7161
7162
7163 /**
7164 Transfers control to a 16-bit real mode entry point and returns the results.
7165
7166 Transfers control to a 16-bit real mode entry point and returns the results.
7167 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7168 This function must be called with interrupts disabled.
7169
7170 The register state from the RealModeState field of ThunkContext is restored just prior
7171 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7172 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7173 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7174 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7175 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7176 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7177 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7178 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7179 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7180 after the RETF instruction is executed.
7181
7182 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7183 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7184 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7185
7186 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7187 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7188 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7189
7190 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7191 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7192
7193 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7194 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7195 disable the A20 mask.
7196
7197 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7198 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7199 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7200
7201 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7202 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7203
7204 If ThunkContext is NULL, then ASSERT().
7205 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7206 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7207 ThunkAttributes, then ASSERT().
7208
7209 @param ThunkContext A pointer to the context structure that describes the
7210 16-bit real mode code to call.
7211
7212 **/
7213 VOID
7214 EFIAPI
7215 AsmThunk16 (
7216 IN OUT THUNK_CONTEXT *ThunkContext
7217 );
7218
7219
7220 /**
7221 Prepares all structures and code for a 16-bit real mode thunk, transfers
7222 control to a 16-bit real mode entry point, and returns the results.
7223
7224 Prepares all structures and code for a 16-bit real mode thunk, transfers
7225 control to a 16-bit real mode entry point, and returns the results. If the
7226 caller only need to perform a single 16-bit real mode thunk, then this
7227 service should be used. If the caller intends to make more than one 16-bit
7228 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7229 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7230
7231 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7232
7233 @param ThunkContext A pointer to the context structure that describes the
7234 16-bit real mode code to call.
7235
7236 **/
7237 VOID
7238 EFIAPI
7239 AsmPrepareAndThunk16 (
7240 IN OUT THUNK_CONTEXT *ThunkContext
7241 );
7242
7243 #endif
7244 #endif
7245
7246