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1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture-specific functions.
4
5 Copyright (c) 2006 - 2008, Intel Corporation<BR>
6 Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
7 All rights reserved. This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef __BASE_LIB__
18 #define __BASE_LIB__
19
20 //
21 // Definitions for architecture-specific types
22 //
23 #if defined (MDE_CPU_IA32)
24 ///
25 /// IA-32 architecture context buffer used by SetJump() and LongJump()
26 ///
27 typedef struct {
28 UINT32 Ebx;
29 UINT32 Esi;
30 UINT32 Edi;
31 UINT32 Ebp;
32 UINT32 Esp;
33 UINT32 Eip;
34 } BASE_LIBRARY_JUMP_BUFFER;
35
36 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
37
38 #endif // defined (MDE_CPU_IA32)
39
40 #if defined (MDE_CPU_IPF)
41
42 ///
43 /// Itanium architecture context buffer used by SetJump() and LongJump()
44 ///
45 typedef struct {
46 UINT64 F2[2];
47 UINT64 F3[2];
48 UINT64 F4[2];
49 UINT64 F5[2];
50 UINT64 F16[2];
51 UINT64 F17[2];
52 UINT64 F18[2];
53 UINT64 F19[2];
54 UINT64 F20[2];
55 UINT64 F21[2];
56 UINT64 F22[2];
57 UINT64 F23[2];
58 UINT64 F24[2];
59 UINT64 F25[2];
60 UINT64 F26[2];
61 UINT64 F27[2];
62 UINT64 F28[2];
63 UINT64 F29[2];
64 UINT64 F30[2];
65 UINT64 F31[2];
66 UINT64 R4;
67 UINT64 R5;
68 UINT64 R6;
69 UINT64 R7;
70 UINT64 SP;
71 UINT64 BR0;
72 UINT64 BR1;
73 UINT64 BR2;
74 UINT64 BR3;
75 UINT64 BR4;
76 UINT64 BR5;
77 UINT64 InitialUNAT;
78 UINT64 AfterSpillUNAT;
79 UINT64 PFS;
80 UINT64 BSP;
81 UINT64 Predicates;
82 UINT64 LoopCount;
83 UINT64 FPSR;
84 } BASE_LIBRARY_JUMP_BUFFER;
85
86 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
87
88 #endif // defined (MDE_CPU_IPF)
89
90 #if defined (MDE_CPU_X64)
91 ///
92 /// x64 architecture context buffer used by SetJump() and LongJump()
93 ///
94 typedef struct {
95 UINT64 Rbx;
96 UINT64 Rsp;
97 UINT64 Rbp;
98 UINT64 Rdi;
99 UINT64 Rsi;
100 UINT64 R12;
101 UINT64 R13;
102 UINT64 R14;
103 UINT64 R15;
104 UINT64 Rip;
105 UINT64 MxCsr;
106 UINT8 XmmBuffer[160]; ///< XMM6-XMM15
107 } BASE_LIBRARY_JUMP_BUFFER;
108
109 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
110
111 #endif // defined (MDE_CPU_X64)
112
113 #if defined (MDE_CPU_EBC)
114 ///
115 /// EBC context buffer used by SetJump() and LongJump()
116 ///
117 typedef struct {
118 UINT64 R0;
119 UINT64 R1;
120 UINT64 R2;
121 UINT64 R3;
122 UINT64 IP;
123 } BASE_LIBRARY_JUMP_BUFFER;
124
125 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
126
127 #endif // defined (MDE_CPU_EBC)
128
129 #if defined (MDE_CPU_ARM)
130
131 typedef struct {
132 UINT32 R3; ///< Copy of R13
133 UINT32 R4;
134 UINT32 R5;
135 UINT32 R6;
136 UINT32 R7;
137 UINT32 R8;
138 UINT32 R9;
139 UINT32 R10;
140 UINT32 R11;
141 UINT32 R12;
142 UINT32 R14;
143 } BASE_LIBRARY_JUMP_BUFFER;
144
145 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
146
147 #endif // defined (MDE_CPU_ARM)
148
149 //
150 // String Services
151 //
152
153 /**
154 Copies one Null-terminated Unicode string to another Null-terminated Unicode
155 string and returns the new Unicode string.
156
157 This function copies the contents of the Unicode string Source to the Unicode
158 string Destination, and returns Destination. If Source and Destination
159 overlap, then the results are undefined.
160
161 If Destination is NULL, then ASSERT().
162 If Destination is not aligned on a 16-bit boundary, then ASSERT().
163 If Source is NULL, then ASSERT().
164 If Source is not aligned on a 16-bit boundary, then ASSERT().
165 If Source and Destination overlap, then ASSERT().
166 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
167 PcdMaximumUnicodeStringLength Unicode characters not including the
168 Null-terminator, then ASSERT().
169
170 @param Destination Pointer to a Null-terminated Unicode string.
171 @param Source Pointer to a Null-terminated Unicode string.
172
173 @return Destination.
174
175 **/
176 CHAR16 *
177 EFIAPI
178 StrCpy (
179 OUT CHAR16 *Destination,
180 IN CONST CHAR16 *Source
181 );
182
183
184 /**
185 Copies up to a specified length from one Null-terminated Unicode string to
186 another Null-terminated Unicode string and returns the new Unicode string.
187
188 This function copies the contents of the Unicode string Source to the Unicode
189 string Destination, and returns Destination. At most, Length Unicode
190 characters are copied from Source to Destination. If Length is 0, then
191 Destination is returned unmodified. If Length is greater that the number of
192 Unicode characters in Source, then Destination is padded with Null Unicode
193 characters. If Source and Destination overlap, then the results are
194 undefined.
195
196 If Length > 0 and Destination is NULL, then ASSERT().
197 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
198 If Length > 0 and Source is NULL, then ASSERT().
199 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
200 If Source and Destination overlap, then ASSERT().
201 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
202 PcdMaximumUnicodeStringLength, then ASSERT().
203 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
204 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
205 then ASSERT().
206
207 @param Destination Pointer to a Null-terminated Unicode string.
208 @param Source Pointer to a Null-terminated Unicode string.
209 @param Length Maximum number of Unicode characters to copy.
210
211 @return Destination.
212
213 **/
214 CHAR16 *
215 EFIAPI
216 StrnCpy (
217 OUT CHAR16 *Destination,
218 IN CONST CHAR16 *Source,
219 IN UINTN Length
220 );
221
222
223 /**
224 Returns the length of a Null-terminated Unicode string.
225
226 This function returns the number of Unicode characters in the Null-terminated
227 Unicode string specified by String.
228
229 If String is NULL, then ASSERT().
230 If String is not aligned on a 16-bit boundary, then ASSERT().
231 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
232 PcdMaximumUnicodeStringLength Unicode characters not including the
233 Null-terminator, then ASSERT().
234
235 @param String Pointer to a Null-terminated Unicode string.
236
237 @return The length of String.
238
239 **/
240 UINTN
241 EFIAPI
242 StrLen (
243 IN CONST CHAR16 *String
244 );
245
246
247 /**
248 Returns the size of a Null-terminated Unicode string in bytes, including the
249 Null terminator.
250
251 This function returns the size, in bytes, of the Null-terminated Unicode string
252 specified by String.
253
254 If String is NULL, then ASSERT().
255 If String is not aligned on a 16-bit boundary, then ASSERT().
256 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
257 PcdMaximumUnicodeStringLength Unicode characters not including the
258 Null-terminator, then ASSERT().
259
260 @param String Pointer to a Null-terminated Unicode string.
261
262 @return The size of String.
263
264 **/
265 UINTN
266 EFIAPI
267 StrSize (
268 IN CONST CHAR16 *String
269 );
270
271
272 /**
273 Compares two Null-terminated Unicode strings, and returns the difference
274 between the first mismatched Unicode characters.
275
276 This function compares the Null-terminated Unicode string FirstString to the
277 Null-terminated Unicode string SecondString. If FirstString is identical to
278 SecondString, then 0 is returned. Otherwise, the value returned is the first
279 mismatched Unicode character in SecondString subtracted from the first
280 mismatched Unicode character in FirstString.
281
282 If FirstString is NULL, then ASSERT().
283 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
284 If SecondString is NULL, then ASSERT().
285 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
286 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
287 than PcdMaximumUnicodeStringLength Unicode characters not including the
288 Null-terminator, then ASSERT().
289 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
290 than PcdMaximumUnicodeStringLength Unicode characters not including the
291 Null-terminator, then ASSERT().
292
293 @param FirstString Pointer to a Null-terminated Unicode string.
294 @param SecondString Pointer to a Null-terminated Unicode string.
295
296 @retval 0 FirstString is identical to SecondString.
297 @return others FirstString is not identical to SecondString.
298
299 **/
300 INTN
301 EFIAPI
302 StrCmp (
303 IN CONST CHAR16 *FirstString,
304 IN CONST CHAR16 *SecondString
305 );
306
307
308 /**
309 Compares up to a specified length the contents of two Null-terminated Unicode strings,
310 and returns the difference between the first mismatched Unicode characters.
311
312 This function compares the Null-terminated Unicode string FirstString to the
313 Null-terminated Unicode string SecondString. At most, Length Unicode
314 characters will be compared. If Length is 0, then 0 is returned. If
315 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
316 value returned is the first mismatched Unicode character in SecondString
317 subtracted from the first mismatched Unicode character in FirstString.
318
319 If Length > 0 and FirstString is NULL, then ASSERT().
320 If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().
321 If Length > 0 and SecondString is NULL, then ASSERT().
322 If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().
323 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
324 PcdMaximumUnicodeStringLength, then ASSERT().
325 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than
326 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
327 then ASSERT().
328 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than
329 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
330 then ASSERT().
331
332 @param FirstString Pointer to a Null-terminated Unicode string.
333 @param SecondString Pointer to a Null-terminated Unicode string.
334 @param Length Maximum number of Unicode characters to compare.
335
336 @retval 0 FirstString is identical to SecondString.
337 @return others FirstString is not identical to SecondString.
338
339 **/
340 INTN
341 EFIAPI
342 StrnCmp (
343 IN CONST CHAR16 *FirstString,
344 IN CONST CHAR16 *SecondString,
345 IN UINTN Length
346 );
347
348
349 /**
350 Concatenates one Null-terminated Unicode string to another Null-terminated
351 Unicode string, and returns the concatenated Unicode string.
352
353 This function concatenates two Null-terminated Unicode strings. The contents
354 of Null-terminated Unicode string Source are concatenated to the end of
355 Null-terminated Unicode string Destination. The Null-terminated concatenated
356 Unicode String is returned. If Source and Destination overlap, then the
357 results are undefined.
358
359 If Destination is NULL, then ASSERT().
360 If Destination is not aligned on a 16-bit boundary, then ASSERT().
361 If Source is NULL, then ASSERT().
362 If Source is not aligned on a 16-bit boundary, then ASSERT().
363 If Source and Destination overlap, then ASSERT().
364 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
365 than PcdMaximumUnicodeStringLength Unicode characters not including the
366 Null-terminator, then ASSERT().
367 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
368 PcdMaximumUnicodeStringLength Unicode characters not including the
369 Null-terminator, then ASSERT().
370 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
371 and Source results in a Unicode string with more than
372 PcdMaximumUnicodeStringLength Unicode characters not including the
373 Null-terminator, then ASSERT().
374
375 @param Destination Pointer to a Null-terminated Unicode string.
376 @param Source Pointer to a Null-terminated Unicode string.
377
378 @return Destination.
379
380 **/
381 CHAR16 *
382 EFIAPI
383 StrCat (
384 IN OUT CHAR16 *Destination,
385 IN CONST CHAR16 *Source
386 );
387
388
389 /**
390 Concatenates up to a specified length one Null-terminated Unicode to the end
391 of another Null-terminated Unicode string, and returns the concatenated
392 Unicode string.
393
394 This function concatenates two Null-terminated Unicode strings. The contents
395 of Null-terminated Unicode string Source are concatenated to the end of
396 Null-terminated Unicode string Destination, and Destination is returned. At
397 most, Length Unicode characters are concatenated from Source to the end of
398 Destination, and Destination is always Null-terminated. If Length is 0, then
399 Destination is returned unmodified. If Source and Destination overlap, then
400 the results are undefined.
401
402 If Destination is NULL, then ASSERT().
403 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
404 If Length > 0 and Source is NULL, then ASSERT().
405 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
406 If Source and Destination overlap, then ASSERT().
407 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
408 PcdMaximumUnicodeStringLength, then ASSERT().
409 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
410 than PcdMaximumUnicodeStringLength Unicode characters, not including the
411 Null-terminator, then ASSERT().
412 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
413 PcdMaximumUnicodeStringLength Unicode characters, not including the
414 Null-terminator, then ASSERT().
415 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
416 and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
417 Unicode characters, not including the Null-terminator, then ASSERT().
418
419 @param Destination Pointer to a Null-terminated Unicode string.
420 @param Source Pointer to a Null-terminated Unicode string.
421 @param Length Maximum number of Unicode characters to concatenate from
422 Source.
423
424 @return Destination.
425
426 **/
427 CHAR16 *
428 EFIAPI
429 StrnCat (
430 IN OUT CHAR16 *Destination,
431 IN CONST CHAR16 *Source,
432 IN UINTN Length
433 );
434
435 /**
436 Returns the first occurrence of a Null-terminated Unicode sub-string
437 in a Null-terminated Unicode string.
438
439 This function scans the contents of the Null-terminated Unicode string
440 specified by String and returns the first occurrence of SearchString.
441 If SearchString is not found in String, then NULL is returned. If
442 the length of SearchString is zero, then String is
443 returned.
444
445 If String is NULL, then ASSERT().
446 If String is not aligned on a 16-bit boundary, then ASSERT().
447 If SearchString is NULL, then ASSERT().
448 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
449
450 If PcdMaximumUnicodeStringLength is not zero, and SearchString
451 or String contains more than PcdMaximumUnicodeStringLength Unicode
452 characters not including the Null-terminator, then ASSERT().
453
454 @param String Pointer to a Null-terminated Unicode string.
455 @param SearchString Pointer to a Null-terminated Unicode string to search for.
456
457 @retval NULL If the SearchString does not appear in String.
458 @return others If there is a match.
459
460 **/
461 CHAR16 *
462 EFIAPI
463 StrStr (
464 IN CONST CHAR16 *String,
465 IN CONST CHAR16 *SearchString
466 );
467
468 /**
469 Convert a Null-terminated Unicode decimal string to a value of
470 type UINTN.
471
472 This function returns a value of type UINTN by interpreting the contents
473 of the Unicode string specified by String as a decimal number. The format
474 of the input Unicode string String is:
475
476 [spaces] [decimal digits].
477
478 The valid decimal digit character is in the range [0-9]. The
479 function will ignore the pad space, which includes spaces or
480 tab characters, before [decimal digits]. The running zero in the
481 beginning of [decimal digits] will be ignored. Then, the function
482 stops at the first character that is a not a valid decimal character
483 or a Null-terminator, whichever one comes first.
484
485 If String is NULL, then ASSERT().
486 If String is not aligned in a 16-bit boundary, then ASSERT().
487 If String has only pad spaces, then 0 is returned.
488 If String has no pad spaces or valid decimal digits,
489 then 0 is returned.
490 If the number represented by String overflows according
491 to the range defined by UINTN, then ASSERT().
492
493 If PcdMaximumUnicodeStringLength is not zero, and String contains
494 more than PcdMaximumUnicodeStringLength Unicode characters not including
495 the Null-terminator, then ASSERT().
496
497 @param String Pointer to a Null-terminated Unicode string.
498
499 @retval Value translated from String.
500
501 **/
502 UINTN
503 EFIAPI
504 StrDecimalToUintn (
505 IN CONST CHAR16 *String
506 );
507
508 /**
509 Convert a Null-terminated Unicode decimal string to a value of
510 type UINT64.
511
512 This function returns a value of type UINT64 by interpreting the contents
513 of the Unicode string specified by String as a decimal number. The format
514 of the input Unicode string String is:
515
516 [spaces] [decimal digits].
517
518 The valid decimal digit character is in the range [0-9]. The
519 function will ignore the pad space, which includes spaces or
520 tab characters, before [decimal digits]. The running zero in the
521 beginning of [decimal digits] will be ignored. Then, the function
522 stops at the first character that is a not a valid decimal character
523 or a Null-terminator, whichever one comes first.
524
525 If String is NULL, then ASSERT().
526 If String is not aligned in a 16-bit boundary, then ASSERT().
527 If String has only pad spaces, then 0 is returned.
528 If String has no pad spaces or valid decimal digits,
529 then 0 is returned.
530 If the number represented by String overflows according
531 to the range defined by UINT64, then ASSERT().
532
533 If PcdMaximumUnicodeStringLength is not zero, and String contains
534 more than PcdMaximumUnicodeStringLength Unicode characters not including
535 the Null-terminator, then ASSERT().
536
537 @param String Pointer to a Null-terminated Unicode string.
538
539 @retval Value translated from String.
540
541 **/
542 UINT64
543 EFIAPI
544 StrDecimalToUint64 (
545 IN CONST CHAR16 *String
546 );
547
548
549 /**
550 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
551
552 This function returns a value of type UINTN by interpreting the contents
553 of the Unicode string specified by String as a hexadecimal number.
554 The format of the input Unicode string String is:
555
556 [spaces][zeros][x][hexadecimal digits].
557
558 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
559 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
560 If "x" appears in the input string, it must be prefixed with at least one 0.
561 The function will ignore the pad space, which includes spaces or tab characters,
562 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
563 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
564 first valid hexadecimal digit. Then, the function stops at the first character that is
565 a not a valid hexadecimal character or NULL, whichever one comes first.
566
567 If String is NULL, then ASSERT().
568 If String is not aligned in a 16-bit boundary, then ASSERT().
569 If String has only pad spaces, then zero is returned.
570 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
571 then zero is returned.
572 If the number represented by String overflows according to the range defined by
573 UINTN, then ASSERT().
574
575 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
576 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
577 then ASSERT().
578
579 @param String Pointer to a Null-terminated Unicode string.
580
581 @retval Value translated from String.
582
583 **/
584 UINTN
585 EFIAPI
586 StrHexToUintn (
587 IN CONST CHAR16 *String
588 );
589
590
591 /**
592 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
593
594 This function returns a value of type UINT64 by interpreting the contents
595 of the Unicode string specified by String as a hexadecimal number.
596 The format of the input Unicode string String is
597
598 [spaces][zeros][x][hexadecimal digits].
599
600 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
601 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
602 If "x" appears in the input string, it must be prefixed with at least one 0.
603 The function will ignore the pad space, which includes spaces or tab characters,
604 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
605 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
606 first valid hexadecimal digit. Then, the function stops at the first character that is
607 a not a valid hexadecimal character or NULL, whichever one comes first.
608
609 If String is NULL, then ASSERT().
610 If String is not aligned in a 16-bit boundary, then ASSERT().
611 If String has only pad spaces, then zero is returned.
612 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
613 then zero is returned.
614 If the number represented by String overflows according to the range defined by
615 UINT64, then ASSERT().
616
617 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
618 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
619 then ASSERT().
620
621 @param String Pointer to a Null-terminated Unicode string.
622
623 @retval Value translated from String.
624
625 **/
626 UINT64
627 EFIAPI
628 StrHexToUint64 (
629 IN CONST CHAR16 *String
630 );
631
632 /**
633 Convert a Null-terminated Unicode string to a Null-terminated
634 ASCII string and returns the ASCII string.
635
636 This function converts the content of the Unicode string Source
637 to the ASCII string Destination by copying the lower 8 bits of
638 each Unicode character. It returns Destination.
639
640 If any Unicode characters in Source contain non-zero value in
641 the upper 8 bits, then ASSERT().
642
643 If Destination is NULL, then ASSERT().
644 If Source is NULL, then ASSERT().
645 If Source is not aligned on a 16-bit boundary, then ASSERT().
646 If Source and Destination overlap, then ASSERT().
647
648 If PcdMaximumUnicodeStringLength is not zero, and Source contains
649 more than PcdMaximumUnicodeStringLength Unicode characters not including
650 the Null-terminator, then ASSERT().
651
652 If PcdMaximumAsciiStringLength is not zero, and Source contains more
653 than PcdMaximumAsciiStringLength Unicode characters not including the
654 Null-terminator, then ASSERT().
655
656 @param Source Pointer to a Null-terminated Unicode string.
657 @param Destination Pointer to a Null-terminated ASCII string.
658
659 @return Destination.
660
661 **/
662 CHAR8 *
663 EFIAPI
664 UnicodeStrToAsciiStr (
665 IN CONST CHAR16 *Source,
666 OUT CHAR8 *Destination
667 );
668
669
670 /**
671 Copies one Null-terminated ASCII string to another Null-terminated ASCII
672 string and returns the new ASCII string.
673
674 This function copies the contents of the ASCII string Source to the ASCII
675 string Destination, and returns Destination. If Source and Destination
676 overlap, then the results are undefined.
677
678 If Destination is NULL, then ASSERT().
679 If Source is NULL, then ASSERT().
680 If Source and Destination overlap, then ASSERT().
681 If PcdMaximumAsciiStringLength is not zero and Source contains more than
682 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
683 then ASSERT().
684
685 @param Destination Pointer to a Null-terminated ASCII string.
686 @param Source Pointer to a Null-terminated ASCII string.
687
688 @return Destination
689
690 **/
691 CHAR8 *
692 EFIAPI
693 AsciiStrCpy (
694 OUT CHAR8 *Destination,
695 IN CONST CHAR8 *Source
696 );
697
698
699 /**
700 Copies up to a specified length one Null-terminated ASCII string to another
701 Null-terminated ASCII string and returns the new ASCII string.
702
703 This function copies the contents of the ASCII string Source to the ASCII
704 string Destination, and returns Destination. At most, Length ASCII characters
705 are copied from Source to Destination. If Length is 0, then Destination is
706 returned unmodified. If Length is greater that the number of ASCII characters
707 in Source, then Destination is padded with Null ASCII characters. If Source
708 and Destination overlap, then the results are undefined.
709
710 If Destination is NULL, then ASSERT().
711 If Source is NULL, then ASSERT().
712 If Source and Destination overlap, then ASSERT().
713 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
714 PcdMaximumAsciiStringLength, then ASSERT().
715 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
716 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
717 then ASSERT().
718
719 @param Destination Pointer to a Null-terminated ASCII string.
720 @param Source Pointer to a Null-terminated ASCII string.
721 @param Length Maximum number of ASCII characters to copy.
722
723 @return Destination
724
725 **/
726 CHAR8 *
727 EFIAPI
728 AsciiStrnCpy (
729 OUT CHAR8 *Destination,
730 IN CONST CHAR8 *Source,
731 IN UINTN Length
732 );
733
734
735 /**
736 Returns the length of a Null-terminated ASCII string.
737
738 This function returns the number of ASCII characters in the Null-terminated
739 ASCII string specified by String.
740
741 If Length > 0 and Destination is NULL, then ASSERT().
742 If Length > 0 and Source is NULL, then ASSERT().
743 If PcdMaximumAsciiStringLength is not zero and String contains more than
744 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
745 then ASSERT().
746
747 @param String Pointer to a Null-terminated ASCII string.
748
749 @return The length of String.
750
751 **/
752 UINTN
753 EFIAPI
754 AsciiStrLen (
755 IN CONST CHAR8 *String
756 );
757
758
759 /**
760 Returns the size of a Null-terminated ASCII string in bytes, including the
761 Null terminator.
762
763 This function returns the size, in bytes, of the Null-terminated ASCII string
764 specified by String.
765
766 If String is NULL, then ASSERT().
767 If PcdMaximumAsciiStringLength is not zero and String contains more than
768 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
769 then ASSERT().
770
771 @param String Pointer to a Null-terminated ASCII string.
772
773 @return The size of String.
774
775 **/
776 UINTN
777 EFIAPI
778 AsciiStrSize (
779 IN CONST CHAR8 *String
780 );
781
782
783 /**
784 Compares two Null-terminated ASCII strings, and returns the difference
785 between the first mismatched ASCII characters.
786
787 This function compares the Null-terminated ASCII string FirstString to the
788 Null-terminated ASCII string SecondString. If FirstString is identical to
789 SecondString, then 0 is returned. Otherwise, the value returned is the first
790 mismatched ASCII character in SecondString subtracted from the first
791 mismatched ASCII character in FirstString.
792
793 If FirstString is NULL, then ASSERT().
794 If SecondString is NULL, then ASSERT().
795 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
796 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
797 then ASSERT().
798 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
799 than PcdMaximumAsciiStringLength ASCII characters not including the
800 Null-terminator, then ASSERT().
801
802 @param FirstString Pointer to a Null-terminated ASCII string.
803 @param SecondString Pointer to a Null-terminated ASCII string.
804
805 @retval ==0 FirstString is identical to SecondString.
806 @retval !=0 FirstString is not identical to SecondString.
807
808 **/
809 INTN
810 EFIAPI
811 AsciiStrCmp (
812 IN CONST CHAR8 *FirstString,
813 IN CONST CHAR8 *SecondString
814 );
815
816
817 /**
818 Performs a case insensitive comparison of two Null-terminated ASCII strings,
819 and returns the difference between the first mismatched ASCII characters.
820
821 This function performs a case insensitive comparison of the Null-terminated
822 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
823 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
824 value returned is the first mismatched lower case ASCII character in
825 SecondString subtracted from the first mismatched lower case ASCII character
826 in FirstString.
827
828 If FirstString is NULL, then ASSERT().
829 If SecondString is NULL, then ASSERT().
830 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
831 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
832 then ASSERT().
833 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
834 than PcdMaximumAsciiStringLength ASCII characters not including the
835 Null-terminator, then ASSERT().
836
837 @param FirstString Pointer to a Null-terminated ASCII string.
838 @param SecondString Pointer to a Null-terminated ASCII string.
839
840 @retval ==0 FirstString is identical to SecondString using case insensitive
841 comparisons.
842 @retval !=0 FirstString is not identical to SecondString using case
843 insensitive comparisons.
844
845 **/
846 INTN
847 EFIAPI
848 AsciiStriCmp (
849 IN CONST CHAR8 *FirstString,
850 IN CONST CHAR8 *SecondString
851 );
852
853
854 /**
855 Compares two Null-terminated ASCII strings with maximum lengths, and returns
856 the difference between the first mismatched ASCII characters.
857
858 This function compares the Null-terminated ASCII string FirstString to the
859 Null-terminated ASCII string SecondString. At most, Length ASCII characters
860 will be compared. If Length is 0, then 0 is returned. If FirstString is
861 identical to SecondString, then 0 is returned. Otherwise, the value returned
862 is the first mismatched ASCII character in SecondString subtracted from the
863 first mismatched ASCII character in FirstString.
864
865 If Length > 0 and FirstString is NULL, then ASSERT().
866 If Length > 0 and SecondString is NULL, then ASSERT().
867 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
868 PcdMaximumAsciiStringLength, then ASSERT().
869 If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than
870 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
871 then ASSERT().
872 If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than
873 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
874 then ASSERT().
875
876 @param FirstString Pointer to a Null-terminated ASCII string.
877 @param SecondString Pointer to a Null-terminated ASCII string.
878 @param Length Maximum number of ASCII characters for compare.
879
880 @retval ==0 FirstString is identical to SecondString.
881 @retval !=0 FirstString is not identical to SecondString.
882
883 **/
884 INTN
885 EFIAPI
886 AsciiStrnCmp (
887 IN CONST CHAR8 *FirstString,
888 IN CONST CHAR8 *SecondString,
889 IN UINTN Length
890 );
891
892
893 /**
894 Concatenates one Null-terminated ASCII string to another Null-terminated
895 ASCII string, and returns the concatenated ASCII string.
896
897 This function concatenates two Null-terminated ASCII strings. The contents of
898 Null-terminated ASCII string Source are concatenated to the end of Null-
899 terminated ASCII string Destination. The Null-terminated concatenated ASCII
900 String is returned.
901
902 If Destination is NULL, then ASSERT().
903 If Source is NULL, then ASSERT().
904 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
905 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
906 then ASSERT().
907 If PcdMaximumAsciiStringLength is not zero and Source contains more than
908 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
909 then ASSERT().
910 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
911 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
912 ASCII characters, then ASSERT().
913
914 @param Destination Pointer to a Null-terminated ASCII string.
915 @param Source Pointer to a Null-terminated ASCII string.
916
917 @return Destination
918
919 **/
920 CHAR8 *
921 EFIAPI
922 AsciiStrCat (
923 IN OUT CHAR8 *Destination,
924 IN CONST CHAR8 *Source
925 );
926
927
928 /**
929 Concatenates up to a specified length one Null-terminated ASCII string to
930 the end of another Null-terminated ASCII string, and returns the
931 concatenated ASCII string.
932
933 This function concatenates two Null-terminated ASCII strings. The contents
934 of Null-terminated ASCII string Source are concatenated to the end of Null-
935 terminated ASCII string Destination, and Destination is returned. At most,
936 Length ASCII characters are concatenated from Source to the end of
937 Destination, and Destination is always Null-terminated. If Length is 0, then
938 Destination is returned unmodified. If Source and Destination overlap, then
939 the results are undefined.
940
941 If Length > 0 and Destination is NULL, then ASSERT().
942 If Length > 0 and Source is NULL, then ASSERT().
943 If Source and Destination overlap, then ASSERT().
944 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
945 PcdMaximumAsciiStringLength, then ASSERT().
946 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
947 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
948 then ASSERT().
949 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
950 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
951 then ASSERT().
952 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
953 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
954 ASCII characters, not including the Null-terminator, then ASSERT().
955
956 @param Destination Pointer to a Null-terminated ASCII string.
957 @param Source Pointer to a Null-terminated ASCII string.
958 @param Length Maximum number of ASCII characters to concatenate from
959 Source.
960
961 @return Destination
962
963 **/
964 CHAR8 *
965 EFIAPI
966 AsciiStrnCat (
967 IN OUT CHAR8 *Destination,
968 IN CONST CHAR8 *Source,
969 IN UINTN Length
970 );
971
972
973 /**
974 Returns the first occurrence of a Null-terminated ASCII sub-string
975 in a Null-terminated ASCII string.
976
977 This function scans the contents of the ASCII string specified by String
978 and returns the first occurrence of SearchString. If SearchString is not
979 found in String, then NULL is returned. If the length of SearchString is zero,
980 then String is returned.
981
982 If String is NULL, then ASSERT().
983 If SearchString is NULL, then ASSERT().
984
985 If PcdMaximumAsciiStringLength is not zero, and SearchString or
986 String contains more than PcdMaximumAsciiStringLength Unicode characters
987 not including the Null-terminator, then ASSERT().
988
989 @param String Pointer to a Null-terminated ASCII string.
990 @param SearchString Pointer to a Null-terminated ASCII string to search for.
991
992 @retval NULL If the SearchString does not appear in String.
993 @retval others If there is a match return the first occurrence of SearchingString.
994 If the length of SearchString is zero,return String.
995
996 **/
997 CHAR8 *
998 EFIAPI
999 AsciiStrStr (
1000 IN CONST CHAR8 *String,
1001 IN CONST CHAR8 *SearchString
1002 );
1003
1004
1005 /**
1006 Convert a Null-terminated ASCII decimal string to a value of type
1007 UINTN.
1008
1009 This function returns a value of type UINTN by interpreting the contents
1010 of the ASCII string String as a decimal number. The format of the input
1011 ASCII string String is:
1012
1013 [spaces] [decimal digits].
1014
1015 The valid decimal digit character is in the range [0-9]. The function will
1016 ignore the pad space, which includes spaces or tab characters, before the digits.
1017 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1018 function stops at the first character that is a not a valid decimal character or
1019 Null-terminator, whichever on comes first.
1020
1021 If String has only pad spaces, then 0 is returned.
1022 If String has no pad spaces or valid decimal digits, then 0 is returned.
1023 If the number represented by String overflows according to the range defined by
1024 UINTN, then ASSERT().
1025 If String is NULL, then ASSERT().
1026 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1027 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1028 then ASSERT().
1029
1030 @param String Pointer to a Null-terminated ASCII string.
1031
1032 @retval Value translated from String.
1033
1034 **/
1035 UINTN
1036 EFIAPI
1037 AsciiStrDecimalToUintn (
1038 IN CONST CHAR8 *String
1039 );
1040
1041
1042 /**
1043 Convert a Null-terminated ASCII decimal string to a value of type
1044 UINT64.
1045
1046 This function returns a value of type UINT64 by interpreting the contents
1047 of the ASCII string String as a decimal number. The format of the input
1048 ASCII string String is:
1049
1050 [spaces] [decimal digits].
1051
1052 The valid decimal digit character is in the range [0-9]. The function will
1053 ignore the pad space, which includes spaces or tab characters, before the digits.
1054 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1055 function stops at the first character that is a not a valid decimal character or
1056 Null-terminator, whichever on comes first.
1057
1058 If String has only pad spaces, then 0 is returned.
1059 If String has no pad spaces or valid decimal digits, then 0 is returned.
1060 If the number represented by String overflows according to the range defined by
1061 UINT64, then ASSERT().
1062 If String is NULL, then ASSERT().
1063 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1064 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1065 then ASSERT().
1066
1067 @param String Pointer to a Null-terminated ASCII string.
1068
1069 @retval Value translated from String.
1070
1071 **/
1072 UINT64
1073 EFIAPI
1074 AsciiStrDecimalToUint64 (
1075 IN CONST CHAR8 *String
1076 );
1077
1078
1079 /**
1080 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1081
1082 This function returns a value of type UINTN by interpreting the contents of
1083 the ASCII string String as a hexadecimal number. The format of the input ASCII
1084 string String is:
1085
1086 [spaces][zeros][x][hexadecimal digits].
1087
1088 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1089 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1090 appears in the input string, it must be prefixed with at least one 0. The function
1091 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1092 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1093 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1094 digit. Then, the function stops at the first character that is a not a valid
1095 hexadecimal character or Null-terminator, whichever on comes first.
1096
1097 If String has only pad spaces, then 0 is returned.
1098 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1099 0 is returned.
1100
1101 If the number represented by String overflows according to the range defined by UINTN,
1102 then ASSERT().
1103 If String is NULL, then ASSERT().
1104 If PcdMaximumAsciiStringLength is not zero,
1105 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1106 the Null-terminator, then ASSERT().
1107
1108 @param String Pointer to a Null-terminated ASCII string.
1109
1110 @retval Value translated from String.
1111
1112 **/
1113 UINTN
1114 EFIAPI
1115 AsciiStrHexToUintn (
1116 IN CONST CHAR8 *String
1117 );
1118
1119
1120 /**
1121 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1122
1123 This function returns a value of type UINT64 by interpreting the contents of
1124 the ASCII string String as a hexadecimal number. The format of the input ASCII
1125 string String is:
1126
1127 [spaces][zeros][x][hexadecimal digits].
1128
1129 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1130 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1131 appears in the input string, it must be prefixed with at least one 0. The function
1132 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1133 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1134 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1135 digit. Then, the function stops at the first character that is a not a valid
1136 hexadecimal character or Null-terminator, whichever on comes first.
1137
1138 If String has only pad spaces, then 0 is returned.
1139 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1140 0 is returned.
1141
1142 If the number represented by String overflows according to the range defined by UINT64,
1143 then ASSERT().
1144 If String is NULL, then ASSERT().
1145 If PcdMaximumAsciiStringLength is not zero,
1146 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1147 the Null-terminator, then ASSERT().
1148
1149 @param String Pointer to a Null-terminated ASCII string.
1150
1151 @retval Value translated from String.
1152
1153 **/
1154 UINT64
1155 EFIAPI
1156 AsciiStrHexToUint64 (
1157 IN CONST CHAR8 *String
1158 );
1159
1160
1161 /**
1162 Convert one Null-terminated ASCII string to a Null-terminated
1163 Unicode string and returns the Unicode string.
1164
1165 This function converts the contents of the ASCII string Source to the Unicode
1166 string Destination, and returns Destination. The function terminates the
1167 Unicode string Destination by appending a Null-terminator character at the end.
1168 The caller is responsible to make sure Destination points to a buffer with size
1169 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1170
1171 If Destination is NULL, then ASSERT().
1172 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1173 If Source is NULL, then ASSERT().
1174 If Source and Destination overlap, then ASSERT().
1175 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1176 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1177 then ASSERT().
1178 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1179 PcdMaximumUnicodeStringLength ASCII characters not including the
1180 Null-terminator, then ASSERT().
1181
1182 @param Source Pointer to a Null-terminated ASCII string.
1183 @param Destination Pointer to a Null-terminated Unicode string.
1184
1185 @return Destination.
1186
1187 **/
1188 CHAR16 *
1189 EFIAPI
1190 AsciiStrToUnicodeStr (
1191 IN CONST CHAR8 *Source,
1192 OUT CHAR16 *Destination
1193 );
1194
1195
1196 /**
1197 Converts an 8-bit value to an 8-bit BCD value.
1198
1199 Converts the 8-bit value specified by Value to BCD. The BCD value is
1200 returned.
1201
1202 If Value >= 100, then ASSERT().
1203
1204 @param Value The 8-bit value to convert to BCD. Range 0..99.
1205
1206 @return The BCD value.
1207
1208 **/
1209 UINT8
1210 EFIAPI
1211 DecimalToBcd8 (
1212 IN UINT8 Value
1213 );
1214
1215
1216 /**
1217 Converts an 8-bit BCD value to an 8-bit value.
1218
1219 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1220 value is returned.
1221
1222 If Value >= 0xA0, then ASSERT().
1223 If (Value & 0x0F) >= 0x0A, then ASSERT().
1224
1225 @param Value The 8-bit BCD value to convert to an 8-bit value.
1226
1227 @return The 8-bit value is returned.
1228
1229 **/
1230 UINT8
1231 EFIAPI
1232 BcdToDecimal8 (
1233 IN UINT8 Value
1234 );
1235
1236
1237 //
1238 // Linked List Functions and Macros
1239 //
1240
1241 /**
1242 Initializes the head node of a doubly linked list that is declared as a
1243 global variable in a module.
1244
1245 Initializes the forward and backward links of a new linked list. After
1246 initializing a linked list with this macro, the other linked list functions
1247 may be used to add and remove nodes from the linked list. This macro results
1248 in smaller executables by initializing the linked list in the data section,
1249 instead if calling the InitializeListHead() function to perform the
1250 equivalent operation.
1251
1252 @param ListHead The head note of a list to initialize.
1253
1254 **/
1255 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1256
1257
1258 /**
1259 Initializes the head node of a doubly linked list, and returns the pointer to
1260 the head node of the doubly linked list.
1261
1262 Initializes the forward and backward links of a new linked list. After
1263 initializing a linked list with this function, the other linked list
1264 functions may be used to add and remove nodes from the linked list. It is up
1265 to the caller of this function to allocate the memory for ListHead.
1266
1267 If ListHead is NULL, then ASSERT().
1268
1269 @param ListHead A pointer to the head node of a new doubly linked list.
1270
1271 @return ListHead
1272
1273 **/
1274 LIST_ENTRY *
1275 EFIAPI
1276 InitializeListHead (
1277 IN OUT LIST_ENTRY *ListHead
1278 );
1279
1280
1281 /**
1282 Adds a node to the beginning of a doubly linked list, and returns the pointer
1283 to the head node of the doubly linked list.
1284
1285 Adds the node Entry at the beginning of the doubly linked list denoted by
1286 ListHead, and returns ListHead.
1287
1288 If ListHead is NULL, then ASSERT().
1289 If Entry is NULL, then ASSERT().
1290 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1291 InitializeListHead(), then ASSERT().
1292 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1293 of nodes in ListHead, including the ListHead node, is greater than or
1294 equal to PcdMaximumLinkedListLength, then ASSERT().
1295
1296 @param ListHead A pointer to the head node of a doubly linked list.
1297 @param Entry A pointer to a node that is to be inserted at the beginning
1298 of a doubly linked list.
1299
1300 @return ListHead
1301
1302 **/
1303 LIST_ENTRY *
1304 EFIAPI
1305 InsertHeadList (
1306 IN OUT LIST_ENTRY *ListHead,
1307 IN OUT LIST_ENTRY *Entry
1308 );
1309
1310
1311 /**
1312 Adds a node to the end of a doubly linked list, and returns the pointer to
1313 the head node of the doubly linked list.
1314
1315 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1316 and returns ListHead.
1317
1318 If ListHead is NULL, then ASSERT().
1319 If Entry is NULL, then ASSERT().
1320 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1321 InitializeListHead(), then ASSERT().
1322 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1323 of nodes in ListHead, including the ListHead node, is greater than or
1324 equal to PcdMaximumLinkedListLength, then ASSERT().
1325
1326 @param ListHead A pointer to the head node of a doubly linked list.
1327 @param Entry A pointer to a node that is to be added at the end of the
1328 doubly linked list.
1329
1330 @return ListHead
1331
1332 **/
1333 LIST_ENTRY *
1334 EFIAPI
1335 InsertTailList (
1336 IN OUT LIST_ENTRY *ListHead,
1337 IN OUT LIST_ENTRY *Entry
1338 );
1339
1340
1341 /**
1342 Retrieves the first node of a doubly linked list.
1343
1344 Returns the first node of a doubly linked list. List must have been
1345 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1346 If List is empty, then List is returned.
1347
1348 If List is NULL, then ASSERT().
1349 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1350 InitializeListHead(), then ASSERT().
1351 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1352 in List, including the List node, is greater than or equal to
1353 PcdMaximumLinkedListLength, then ASSERT().
1354
1355 @param List A pointer to the head node of a doubly linked list.
1356
1357 @return The first node of a doubly linked list.
1358 @retval NULL The list is empty.
1359
1360 **/
1361 LIST_ENTRY *
1362 EFIAPI
1363 GetFirstNode (
1364 IN CONST LIST_ENTRY *List
1365 );
1366
1367
1368 /**
1369 Retrieves the next node of a doubly linked list.
1370
1371 Returns the node of a doubly linked list that follows Node.
1372 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1373 or InitializeListHead(). If List is empty, then List is returned.
1374
1375 If List is NULL, then ASSERT().
1376 If Node is NULL, then ASSERT().
1377 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1378 InitializeListHead(), then ASSERT().
1379 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1380 PcdMaximumLinkedListLenth nodes, then ASSERT().
1381 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1382
1383 @param List A pointer to the head node of a doubly linked list.
1384 @param Node A pointer to a node in the doubly linked list.
1385
1386 @return Pointer to the next node if one exists. Otherwise List is returned.
1387
1388 **/
1389 LIST_ENTRY *
1390 EFIAPI
1391 GetNextNode (
1392 IN CONST LIST_ENTRY *List,
1393 IN CONST LIST_ENTRY *Node
1394 );
1395
1396
1397 /**
1398 Retrieves the previous node of a doubly linked list.
1399
1400 Returns the node of a doubly linked list that precedes Node.
1401 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1402 or InitializeListHead(). If List is empty, then List is returned.
1403
1404 If List is NULL, then ASSERT().
1405 If Node is NULL, then ASSERT().
1406 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1407 InitializeListHead(), then ASSERT().
1408 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1409 PcdMaximumLinkedListLenth nodes, then ASSERT().
1410 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1411
1412 @param List A pointer to the head node of a doubly linked list.
1413 @param Node A pointer to a node in the doubly linked list.
1414
1415 @return Pointer to the previous node if one exists. Otherwise List is returned.
1416
1417 **/
1418 LIST_ENTRY *
1419 EFIAPI
1420 GetPreviousNode (
1421 IN CONST LIST_ENTRY *List,
1422 IN CONST LIST_ENTRY *Node
1423 );
1424
1425
1426 /**
1427 Checks to see if a doubly linked list is empty or not.
1428
1429 Checks to see if the doubly linked list is empty. If the linked list contains
1430 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1431
1432 If ListHead is NULL, then ASSERT().
1433 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1434 InitializeListHead(), then ASSERT().
1435 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1436 in List, including the List node, is greater than or equal to
1437 PcdMaximumLinkedListLength, then ASSERT().
1438
1439 @param ListHead A pointer to the head node of a doubly linked list.
1440
1441 @retval TRUE The linked list is empty.
1442 @retval FALSE The linked list is not empty.
1443
1444 **/
1445 BOOLEAN
1446 EFIAPI
1447 IsListEmpty (
1448 IN CONST LIST_ENTRY *ListHead
1449 );
1450
1451
1452 /**
1453 Determines if a node in a doubly linked list is the head node of a the same
1454 doubly linked list. This function is typically used to terminate a loop that
1455 traverses all the nodes in a doubly linked list starting with the head node.
1456
1457 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1458 nodes in the doubly linked list specified by List. List must have been
1459 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1460
1461 If List is NULL, then ASSERT().
1462 If Node is NULL, then ASSERT().
1463 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1464 then ASSERT().
1465 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1466 in List, including the List node, is greater than or equal to
1467 PcdMaximumLinkedListLength, then ASSERT().
1468 If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal
1469 to List, then ASSERT().
1470
1471 @param List A pointer to the head node of a doubly linked list.
1472 @param Node A pointer to a node in the doubly linked list.
1473
1474 @retval TRUE Node is one of the nodes in the doubly linked list.
1475 @retval FALSE Node is not one of the nodes in the doubly linked list.
1476
1477 **/
1478 BOOLEAN
1479 EFIAPI
1480 IsNull (
1481 IN CONST LIST_ENTRY *List,
1482 IN CONST LIST_ENTRY *Node
1483 );
1484
1485
1486 /**
1487 Determines if a node the last node in a doubly linked list.
1488
1489 Returns TRUE if Node is the last node in the doubly linked list specified by
1490 List. Otherwise, FALSE is returned. List must have been initialized with
1491 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1492
1493 If List is NULL, then ASSERT().
1494 If Node is NULL, then ASSERT().
1495 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1496 InitializeListHead(), then ASSERT().
1497 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1498 in List, including the List node, is greater than or equal to
1499 PcdMaximumLinkedListLength, then ASSERT().
1500 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1501
1502 @param List A pointer to the head node of a doubly linked list.
1503 @param Node A pointer to a node in the doubly linked list.
1504
1505 @retval TRUE Node is the last node in the linked list.
1506 @retval FALSE Node is not the last node in the linked list.
1507
1508 **/
1509 BOOLEAN
1510 EFIAPI
1511 IsNodeAtEnd (
1512 IN CONST LIST_ENTRY *List,
1513 IN CONST LIST_ENTRY *Node
1514 );
1515
1516
1517 /**
1518 Swaps the location of two nodes in a doubly linked list, and returns the
1519 first node after the swap.
1520
1521 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1522 Otherwise, the location of the FirstEntry node is swapped with the location
1523 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1524 same double linked list as FirstEntry and that double linked list must have
1525 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1526 SecondEntry is returned after the nodes are swapped.
1527
1528 If FirstEntry is NULL, then ASSERT().
1529 If SecondEntry is NULL, then ASSERT().
1530 If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the
1531 same linked list, then ASSERT().
1532 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1533 linked list containing the FirstEntry and SecondEntry nodes, including
1534 the FirstEntry and SecondEntry nodes, is greater than or equal to
1535 PcdMaximumLinkedListLength, then ASSERT().
1536
1537 @param FirstEntry A pointer to a node in a linked list.
1538 @param SecondEntry A pointer to another node in the same linked list.
1539
1540 @return SecondEntry.
1541
1542 **/
1543 LIST_ENTRY *
1544 EFIAPI
1545 SwapListEntries (
1546 IN OUT LIST_ENTRY *FirstEntry,
1547 IN OUT LIST_ENTRY *SecondEntry
1548 );
1549
1550
1551 /**
1552 Removes a node from a doubly linked list, and returns the node that follows
1553 the removed node.
1554
1555 Removes the node Entry from a doubly linked list. It is up to the caller of
1556 this function to release the memory used by this node if that is required. On
1557 exit, the node following Entry in the doubly linked list is returned. If
1558 Entry is the only node in the linked list, then the head node of the linked
1559 list is returned.
1560
1561 If Entry is NULL, then ASSERT().
1562 If Entry is the head node of an empty list, then ASSERT().
1563 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1564 linked list containing Entry, including the Entry node, is greater than
1565 or equal to PcdMaximumLinkedListLength, then ASSERT().
1566
1567 @param Entry A pointer to a node in a linked list.
1568
1569 @return Entry.
1570
1571 **/
1572 LIST_ENTRY *
1573 EFIAPI
1574 RemoveEntryList (
1575 IN CONST LIST_ENTRY *Entry
1576 );
1577
1578 //
1579 // Math Services
1580 //
1581
1582 /**
1583 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1584 with zeros. The shifted value is returned.
1585
1586 This function shifts the 64-bit value Operand to the left by Count bits. The
1587 low Count bits are set to zero. The shifted value is returned.
1588
1589 If Count is greater than 63, then ASSERT().
1590
1591 @param Operand The 64-bit operand to shift left.
1592 @param Count The number of bits to shift left.
1593
1594 @return Operand << Count.
1595
1596 **/
1597 UINT64
1598 EFIAPI
1599 LShiftU64 (
1600 IN UINT64 Operand,
1601 IN UINTN Count
1602 );
1603
1604
1605 /**
1606 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1607 filled with zeros. The shifted value is returned.
1608
1609 This function shifts the 64-bit value Operand to the right by Count bits. The
1610 high Count bits are set to zero. The shifted value is returned.
1611
1612 If Count is greater than 63, then ASSERT().
1613
1614 @param Operand The 64-bit operand to shift right.
1615 @param Count The number of bits to shift right.
1616
1617 @return Operand >> Count
1618
1619 **/
1620 UINT64
1621 EFIAPI
1622 RShiftU64 (
1623 IN UINT64 Operand,
1624 IN UINTN Count
1625 );
1626
1627
1628 /**
1629 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1630 with original integer's bit 63. The shifted value is returned.
1631
1632 This function shifts the 64-bit value Operand to the right by Count bits. The
1633 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1634
1635 If Count is greater than 63, then ASSERT().
1636
1637 @param Operand The 64-bit operand to shift right.
1638 @param Count The number of bits to shift right.
1639
1640 @return Operand >> Count
1641
1642 **/
1643 UINT64
1644 EFIAPI
1645 ARShiftU64 (
1646 IN UINT64 Operand,
1647 IN UINTN Count
1648 );
1649
1650
1651 /**
1652 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1653 with the high bits that were rotated.
1654
1655 This function rotates the 32-bit value Operand to the left by Count bits. The
1656 low Count bits are fill with the high Count bits of Operand. The rotated
1657 value is returned.
1658
1659 If Count is greater than 31, then ASSERT().
1660
1661 @param Operand The 32-bit operand to rotate left.
1662 @param Count The number of bits to rotate left.
1663
1664 @return Operand << Count
1665
1666 **/
1667 UINT32
1668 EFIAPI
1669 LRotU32 (
1670 IN UINT32 Operand,
1671 IN UINTN Count
1672 );
1673
1674
1675 /**
1676 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1677 with the low bits that were rotated.
1678
1679 This function rotates the 32-bit value Operand to the right by Count bits.
1680 The high Count bits are fill with the low Count bits of Operand. The rotated
1681 value is returned.
1682
1683 If Count is greater than 31, then ASSERT().
1684
1685 @param Operand The 32-bit operand to rotate right.
1686 @param Count The number of bits to rotate right.
1687
1688 @return Operand >> Count
1689
1690 **/
1691 UINT32
1692 EFIAPI
1693 RRotU32 (
1694 IN UINT32 Operand,
1695 IN UINTN Count
1696 );
1697
1698
1699 /**
1700 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1701 with the high bits that were rotated.
1702
1703 This function rotates the 64-bit value Operand to the left by Count bits. The
1704 low Count bits are fill with the high Count bits of Operand. The rotated
1705 value is returned.
1706
1707 If Count is greater than 63, then ASSERT().
1708
1709 @param Operand The 64-bit operand to rotate left.
1710 @param Count The number of bits to rotate left.
1711
1712 @return Operand << Count
1713
1714 **/
1715 UINT64
1716 EFIAPI
1717 LRotU64 (
1718 IN UINT64 Operand,
1719 IN UINTN Count
1720 );
1721
1722
1723 /**
1724 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1725 with the high low bits that were rotated.
1726
1727 This function rotates the 64-bit value Operand to the right by Count bits.
1728 The high Count bits are fill with the low Count bits of Operand. The rotated
1729 value is returned.
1730
1731 If Count is greater than 63, then ASSERT().
1732
1733 @param Operand The 64-bit operand to rotate right.
1734 @param Count The number of bits to rotate right.
1735
1736 @return Operand >> Count
1737
1738 **/
1739 UINT64
1740 EFIAPI
1741 RRotU64 (
1742 IN UINT64 Operand,
1743 IN UINTN Count
1744 );
1745
1746
1747 /**
1748 Returns the bit position of the lowest bit set in a 32-bit value.
1749
1750 This function computes the bit position of the lowest bit set in the 32-bit
1751 value specified by Operand. If Operand is zero, then -1 is returned.
1752 Otherwise, a value between 0 and 31 is returned.
1753
1754 @param Operand The 32-bit operand to evaluate.
1755
1756 @retval 0..31 The lowest bit set in Operand was found.
1757 @retval -1 Operand is zero.
1758
1759 **/
1760 INTN
1761 EFIAPI
1762 LowBitSet32 (
1763 IN UINT32 Operand
1764 );
1765
1766
1767 /**
1768 Returns the bit position of the lowest bit set in a 64-bit value.
1769
1770 This function computes the bit position of the lowest bit set in the 64-bit
1771 value specified by Operand. If Operand is zero, then -1 is returned.
1772 Otherwise, a value between 0 and 63 is returned.
1773
1774 @param Operand The 64-bit operand to evaluate.
1775
1776 @retval 0..63 The lowest bit set in Operand was found.
1777 @retval -1 Operand is zero.
1778
1779
1780 **/
1781 INTN
1782 EFIAPI
1783 LowBitSet64 (
1784 IN UINT64 Operand
1785 );
1786
1787
1788 /**
1789 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1790 to log2(x).
1791
1792 This function computes the bit position of the highest bit set in the 32-bit
1793 value specified by Operand. If Operand is zero, then -1 is returned.
1794 Otherwise, a value between 0 and 31 is returned.
1795
1796 @param Operand The 32-bit operand to evaluate.
1797
1798 @retval 0..31 Position of the highest bit set in Operand if found.
1799 @retval -1 Operand is zero.
1800
1801 **/
1802 INTN
1803 EFIAPI
1804 HighBitSet32 (
1805 IN UINT32 Operand
1806 );
1807
1808
1809 /**
1810 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1811 to log2(x).
1812
1813 This function computes the bit position of the highest bit set in the 64-bit
1814 value specified by Operand. If Operand is zero, then -1 is returned.
1815 Otherwise, a value between 0 and 63 is returned.
1816
1817 @param Operand The 64-bit operand to evaluate.
1818
1819 @retval 0..63 Position of the highest bit set in Operand if found.
1820 @retval -1 Operand is zero.
1821
1822 **/
1823 INTN
1824 EFIAPI
1825 HighBitSet64 (
1826 IN UINT64 Operand
1827 );
1828
1829
1830 /**
1831 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1832 1 << log2(x).
1833
1834 This function computes the value of the highest bit set in the 32-bit value
1835 specified by Operand. If Operand is zero, then zero is returned.
1836
1837 @param Operand The 32-bit operand to evaluate.
1838
1839 @return 1 << HighBitSet32(Operand)
1840 @retval 0 Operand is zero.
1841
1842 **/
1843 UINT32
1844 EFIAPI
1845 GetPowerOfTwo32 (
1846 IN UINT32 Operand
1847 );
1848
1849
1850 /**
1851 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1852 1 << log2(x).
1853
1854 This function computes the value of the highest bit set in the 64-bit value
1855 specified by Operand. If Operand is zero, then zero is returned.
1856
1857 @param Operand The 64-bit operand to evaluate.
1858
1859 @return 1 << HighBitSet64(Operand)
1860 @retval 0 Operand is zero.
1861
1862 **/
1863 UINT64
1864 EFIAPI
1865 GetPowerOfTwo64 (
1866 IN UINT64 Operand
1867 );
1868
1869
1870 /**
1871 Switches the endianess of a 16-bit integer.
1872
1873 This function swaps the bytes in a 16-bit unsigned value to switch the value
1874 from little endian to big endian or vice versa. The byte swapped value is
1875 returned.
1876
1877 @param Value A 16-bit unsigned value.
1878
1879 @return The byte swapped Value.
1880
1881 **/
1882 UINT16
1883 EFIAPI
1884 SwapBytes16 (
1885 IN UINT16 Value
1886 );
1887
1888
1889 /**
1890 Switches the endianess of a 32-bit integer.
1891
1892 This function swaps the bytes in a 32-bit unsigned value to switch the value
1893 from little endian to big endian or vice versa. The byte swapped value is
1894 returned.
1895
1896 @param Value A 32-bit unsigned value.
1897
1898 @return The byte swapped Value.
1899
1900 **/
1901 UINT32
1902 EFIAPI
1903 SwapBytes32 (
1904 IN UINT32 Value
1905 );
1906
1907
1908 /**
1909 Switches the endianess of a 64-bit integer.
1910
1911 This function swaps the bytes in a 64-bit unsigned value to switch the value
1912 from little endian to big endian or vice versa. The byte swapped value is
1913 returned.
1914
1915 @param Value A 64-bit unsigned value.
1916
1917 @return The byte swapped Value.
1918
1919 **/
1920 UINT64
1921 EFIAPI
1922 SwapBytes64 (
1923 IN UINT64 Value
1924 );
1925
1926
1927 /**
1928 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1929 generates a 64-bit unsigned result.
1930
1931 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1932 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1933 bit unsigned result is returned.
1934
1935 @param Multiplicand A 64-bit unsigned value.
1936 @param Multiplier A 32-bit unsigned value.
1937
1938 @return Multiplicand * Multiplier
1939
1940 **/
1941 UINT64
1942 EFIAPI
1943 MultU64x32 (
1944 IN UINT64 Multiplicand,
1945 IN UINT32 Multiplier
1946 );
1947
1948
1949 /**
1950 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1951 generates a 64-bit unsigned result.
1952
1953 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1954 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1955 bit unsigned result is returned.
1956
1957 @param Multiplicand A 64-bit unsigned value.
1958 @param Multiplier A 64-bit unsigned value.
1959
1960 @return Multiplicand * Multiplier
1961
1962 **/
1963 UINT64
1964 EFIAPI
1965 MultU64x64 (
1966 IN UINT64 Multiplicand,
1967 IN UINT64 Multiplier
1968 );
1969
1970
1971 /**
1972 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1973 64-bit signed result.
1974
1975 This function multiples the 64-bit signed value Multiplicand by the 64-bit
1976 signed value Multiplier and generates a 64-bit signed result. This 64-bit
1977 signed result is returned.
1978
1979 @param Multiplicand A 64-bit signed value.
1980 @param Multiplier A 64-bit signed value.
1981
1982 @return Multiplicand * Multiplier
1983
1984 **/
1985 INT64
1986 EFIAPI
1987 MultS64x64 (
1988 IN INT64 Multiplicand,
1989 IN INT64 Multiplier
1990 );
1991
1992
1993 /**
1994 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1995 a 64-bit unsigned result.
1996
1997 This function divides the 64-bit unsigned value Dividend by the 32-bit
1998 unsigned value Divisor and generates a 64-bit unsigned quotient. This
1999 function returns the 64-bit unsigned quotient.
2000
2001 If Divisor is 0, then ASSERT().
2002
2003 @param Dividend A 64-bit unsigned value.
2004 @param Divisor A 32-bit unsigned value.
2005
2006 @return Dividend / Divisor
2007
2008 **/
2009 UINT64
2010 EFIAPI
2011 DivU64x32 (
2012 IN UINT64 Dividend,
2013 IN UINT32 Divisor
2014 );
2015
2016
2017 /**
2018 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
2019 a 32-bit unsigned remainder.
2020
2021 This function divides the 64-bit unsigned value Dividend by the 32-bit
2022 unsigned value Divisor and generates a 32-bit remainder. This function
2023 returns the 32-bit unsigned remainder.
2024
2025 If Divisor is 0, then ASSERT().
2026
2027 @param Dividend A 64-bit unsigned value.
2028 @param Divisor A 32-bit unsigned value.
2029
2030 @return Dividend % Divisor
2031
2032 **/
2033 UINT32
2034 EFIAPI
2035 ModU64x32 (
2036 IN UINT64 Dividend,
2037 IN UINT32 Divisor
2038 );
2039
2040
2041 /**
2042 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
2043 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
2044
2045 This function divides the 64-bit unsigned value Dividend by the 32-bit
2046 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2047 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
2048 This function returns the 64-bit unsigned quotient.
2049
2050 If Divisor is 0, then ASSERT().
2051
2052 @param Dividend A 64-bit unsigned value.
2053 @param Divisor A 32-bit unsigned value.
2054 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
2055 optional and may be NULL.
2056
2057 @return Dividend / Divisor
2058
2059 **/
2060 UINT64
2061 EFIAPI
2062 DivU64x32Remainder (
2063 IN UINT64 Dividend,
2064 IN UINT32 Divisor,
2065 OUT UINT32 *Remainder OPTIONAL
2066 );
2067
2068
2069 /**
2070 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2071 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2072
2073 This function divides the 64-bit unsigned value Dividend by the 64-bit
2074 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2075 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2076 This function returns the 64-bit unsigned quotient.
2077
2078 If Divisor is 0, then ASSERT().
2079
2080 @param Dividend A 64-bit unsigned value.
2081 @param Divisor A 64-bit unsigned value.
2082 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2083 optional and may be NULL.
2084
2085 @return Dividend / Divisor
2086
2087 **/
2088 UINT64
2089 EFIAPI
2090 DivU64x64Remainder (
2091 IN UINT64 Dividend,
2092 IN UINT64 Divisor,
2093 OUT UINT64 *Remainder OPTIONAL
2094 );
2095
2096
2097 /**
2098 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2099 64-bit signed result and a optional 64-bit signed remainder.
2100
2101 This function divides the 64-bit signed value Dividend by the 64-bit signed
2102 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2103 NULL, then the 64-bit signed remainder is returned in Remainder. This
2104 function returns the 64-bit signed quotient.
2105
2106 It is the caller's responsibility to not call this function with a Divisor of 0.
2107 If Divisor is 0, then the quotient and remainder should be assumed to be
2108 the largest negative integer.
2109
2110 If Divisor is 0, then ASSERT().
2111
2112 @param Dividend A 64-bit signed value.
2113 @param Divisor A 64-bit signed value.
2114 @param Remainder A pointer to a 64-bit signed value. This parameter is
2115 optional and may be NULL.
2116
2117 @return Dividend / Divisor
2118
2119 **/
2120 INT64
2121 EFIAPI
2122 DivS64x64Remainder (
2123 IN INT64 Dividend,
2124 IN INT64 Divisor,
2125 OUT INT64 *Remainder OPTIONAL
2126 );
2127
2128
2129 /**
2130 Reads a 16-bit value from memory that may be unaligned.
2131
2132 This function returns the 16-bit value pointed to by Buffer. The function
2133 guarantees that the read operation does not produce an alignment fault.
2134
2135 If the Buffer is NULL, then ASSERT().
2136
2137 @param Buffer Pointer to a 16-bit value that may be unaligned.
2138
2139 @return The 16-bit value read from Buffer.
2140
2141 **/
2142 UINT16
2143 EFIAPI
2144 ReadUnaligned16 (
2145 IN CONST UINT16 *Buffer
2146 );
2147
2148
2149 /**
2150 Writes a 16-bit value to memory that may be unaligned.
2151
2152 This function writes the 16-bit value specified by Value to Buffer. Value is
2153 returned. The function guarantees that the write operation does not produce
2154 an alignment fault.
2155
2156 If the Buffer is NULL, then ASSERT().
2157
2158 @param Buffer Pointer to a 16-bit value that may be unaligned.
2159 @param Value 16-bit value to write to Buffer.
2160
2161 @return The 16-bit value to write to Buffer.
2162
2163 **/
2164 UINT16
2165 EFIAPI
2166 WriteUnaligned16 (
2167 OUT UINT16 *Buffer,
2168 IN UINT16 Value
2169 );
2170
2171
2172 /**
2173 Reads a 24-bit value from memory that may be unaligned.
2174
2175 This function returns the 24-bit value pointed to by Buffer. The function
2176 guarantees that the read operation does not produce an alignment fault.
2177
2178 If the Buffer is NULL, then ASSERT().
2179
2180 @param Buffer Pointer to a 24-bit value that may be unaligned.
2181
2182 @return The 24-bit value read from Buffer.
2183
2184 **/
2185 UINT32
2186 EFIAPI
2187 ReadUnaligned24 (
2188 IN CONST UINT32 *Buffer
2189 );
2190
2191
2192 /**
2193 Writes a 24-bit value to memory that may be unaligned.
2194
2195 This function writes the 24-bit value specified by Value to Buffer. Value is
2196 returned. The function guarantees that the write operation does not produce
2197 an alignment fault.
2198
2199 If the Buffer is NULL, then ASSERT().
2200
2201 @param Buffer Pointer to a 24-bit value that may be unaligned.
2202 @param Value 24-bit value to write to Buffer.
2203
2204 @return The 24-bit value to write to Buffer.
2205
2206 **/
2207 UINT32
2208 EFIAPI
2209 WriteUnaligned24 (
2210 OUT UINT32 *Buffer,
2211 IN UINT32 Value
2212 );
2213
2214
2215 /**
2216 Reads a 32-bit value from memory that may be unaligned.
2217
2218 This function returns the 32-bit value pointed to by Buffer. The function
2219 guarantees that the read operation does not produce an alignment fault.
2220
2221 If the Buffer is NULL, then ASSERT().
2222
2223 @param Buffer Pointer to a 32-bit value that may be unaligned.
2224
2225 @return The 32-bit value read from Buffer.
2226
2227 **/
2228 UINT32
2229 EFIAPI
2230 ReadUnaligned32 (
2231 IN CONST UINT32 *Buffer
2232 );
2233
2234
2235 /**
2236 Writes a 32-bit value to memory that may be unaligned.
2237
2238 This function writes the 32-bit value specified by Value to Buffer. Value is
2239 returned. The function guarantees that the write operation does not produce
2240 an alignment fault.
2241
2242 If the Buffer is NULL, then ASSERT().
2243
2244 @param Buffer Pointer to a 32-bit value that may be unaligned.
2245 @param Value 32-bit value to write to Buffer.
2246
2247 @return The 32-bit value to write to Buffer.
2248
2249 **/
2250 UINT32
2251 EFIAPI
2252 WriteUnaligned32 (
2253 OUT UINT32 *Buffer,
2254 IN UINT32 Value
2255 );
2256
2257
2258 /**
2259 Reads a 64-bit value from memory that may be unaligned.
2260
2261 This function returns the 64-bit value pointed to by Buffer. The function
2262 guarantees that the read operation does not produce an alignment fault.
2263
2264 If the Buffer is NULL, then ASSERT().
2265
2266 @param Buffer Pointer to a 64-bit value that may be unaligned.
2267
2268 @return The 64-bit value read from Buffer.
2269
2270 **/
2271 UINT64
2272 EFIAPI
2273 ReadUnaligned64 (
2274 IN CONST UINT64 *Buffer
2275 );
2276
2277
2278 /**
2279 Writes a 64-bit value to memory that may be unaligned.
2280
2281 This function writes the 64-bit value specified by Value to Buffer. Value is
2282 returned. The function guarantees that the write operation does not produce
2283 an alignment fault.
2284
2285 If the Buffer is NULL, then ASSERT().
2286
2287 @param Buffer Pointer to a 64-bit value that may be unaligned.
2288 @param Value 64-bit value to write to Buffer.
2289
2290 @return The 64-bit value to write to Buffer.
2291
2292 **/
2293 UINT64
2294 EFIAPI
2295 WriteUnaligned64 (
2296 OUT UINT64 *Buffer,
2297 IN UINT64 Value
2298 );
2299
2300
2301 //
2302 // Bit Field Functions
2303 //
2304
2305 /**
2306 Returns a bit field from an 8-bit value.
2307
2308 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2309
2310 If 8-bit operations are not supported, then ASSERT().
2311 If StartBit is greater than 7, then ASSERT().
2312 If EndBit is greater than 7, then ASSERT().
2313 If EndBit is less than StartBit, then ASSERT().
2314
2315 @param Operand Operand on which to perform the bitfield operation.
2316 @param StartBit The ordinal of the least significant bit in the bit field.
2317 Range 0..7.
2318 @param EndBit The ordinal of the most significant bit in the bit field.
2319 Range 0..7.
2320
2321 @return The bit field read.
2322
2323 **/
2324 UINT8
2325 EFIAPI
2326 BitFieldRead8 (
2327 IN UINT8 Operand,
2328 IN UINTN StartBit,
2329 IN UINTN EndBit
2330 );
2331
2332
2333 /**
2334 Writes a bit field to an 8-bit value, and returns the result.
2335
2336 Writes Value to the bit field specified by the StartBit and the EndBit in
2337 Operand. All other bits in Operand are preserved. The new 8-bit value is
2338 returned.
2339
2340 If 8-bit operations are not supported, then ASSERT().
2341 If StartBit is greater than 7, then ASSERT().
2342 If EndBit is greater than 7, then ASSERT().
2343 If EndBit is less than StartBit, then ASSERT().
2344
2345 @param Operand Operand on which to perform the bitfield operation.
2346 @param StartBit The ordinal of the least significant bit in the bit field.
2347 Range 0..7.
2348 @param EndBit The ordinal of the most significant bit in the bit field.
2349 Range 0..7.
2350 @param Value New value of the bit field.
2351
2352 @return The new 8-bit value.
2353
2354 **/
2355 UINT8
2356 EFIAPI
2357 BitFieldWrite8 (
2358 IN UINT8 Operand,
2359 IN UINTN StartBit,
2360 IN UINTN EndBit,
2361 IN UINT8 Value
2362 );
2363
2364
2365 /**
2366 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2367 result.
2368
2369 Performs a bitwise OR between the bit field specified by StartBit
2370 and EndBit in Operand and the value specified by OrData. All other bits in
2371 Operand are preserved. The new 8-bit value is returned.
2372
2373 If 8-bit operations are not supported, then ASSERT().
2374 If StartBit is greater than 7, then ASSERT().
2375 If EndBit is greater than 7, then ASSERT().
2376 If EndBit is less than StartBit, then ASSERT().
2377
2378 @param Operand Operand on which to perform the bitfield operation.
2379 @param StartBit The ordinal of the least significant bit in the bit field.
2380 Range 0..7.
2381 @param EndBit The ordinal of the most significant bit in the bit field.
2382 Range 0..7.
2383 @param OrData The value to OR with the read value from the value
2384
2385 @return The new 8-bit value.
2386
2387 **/
2388 UINT8
2389 EFIAPI
2390 BitFieldOr8 (
2391 IN UINT8 Operand,
2392 IN UINTN StartBit,
2393 IN UINTN EndBit,
2394 IN UINT8 OrData
2395 );
2396
2397
2398 /**
2399 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2400 the result.
2401
2402 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2403 in Operand and the value specified by AndData. All other bits in Operand are
2404 preserved. The new 8-bit value is returned.
2405
2406 If 8-bit operations are not supported, then ASSERT().
2407 If StartBit is greater than 7, then ASSERT().
2408 If EndBit is greater than 7, then ASSERT().
2409 If EndBit is less than StartBit, then ASSERT().
2410
2411 @param Operand Operand on which to perform the bitfield operation.
2412 @param StartBit The ordinal of the least significant bit in the bit field.
2413 Range 0..7.
2414 @param EndBit The ordinal of the most significant bit in the bit field.
2415 Range 0..7.
2416 @param AndData The value to AND with the read value from the value.
2417
2418 @return The new 8-bit value.
2419
2420 **/
2421 UINT8
2422 EFIAPI
2423 BitFieldAnd8 (
2424 IN UINT8 Operand,
2425 IN UINTN StartBit,
2426 IN UINTN EndBit,
2427 IN UINT8 AndData
2428 );
2429
2430
2431 /**
2432 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2433 bitwise OR, and returns the result.
2434
2435 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2436 in Operand and the value specified by AndData, followed by a bitwise
2437 OR with value specified by OrData. All other bits in Operand are
2438 preserved. The new 8-bit value is returned.
2439
2440 If 8-bit operations are not supported, then ASSERT().
2441 If StartBit is greater than 7, then ASSERT().
2442 If EndBit is greater than 7, then ASSERT().
2443 If EndBit is less than StartBit, then ASSERT().
2444
2445 @param Operand Operand on which to perform the bitfield operation.
2446 @param StartBit The ordinal of the least significant bit in the bit field.
2447 Range 0..7.
2448 @param EndBit The ordinal of the most significant bit in the bit field.
2449 Range 0..7.
2450 @param AndData The value to AND with the read value from the value.
2451 @param OrData The value to OR with the result of the AND operation.
2452
2453 @return The new 8-bit value.
2454
2455 **/
2456 UINT8
2457 EFIAPI
2458 BitFieldAndThenOr8 (
2459 IN UINT8 Operand,
2460 IN UINTN StartBit,
2461 IN UINTN EndBit,
2462 IN UINT8 AndData,
2463 IN UINT8 OrData
2464 );
2465
2466
2467 /**
2468 Returns a bit field from a 16-bit value.
2469
2470 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2471
2472 If 16-bit operations are not supported, then ASSERT().
2473 If StartBit is greater than 15, then ASSERT().
2474 If EndBit is greater than 15, then ASSERT().
2475 If EndBit is less than StartBit, then ASSERT().
2476
2477 @param Operand Operand on which to perform the bitfield operation.
2478 @param StartBit The ordinal of the least significant bit in the bit field.
2479 Range 0..15.
2480 @param EndBit The ordinal of the most significant bit in the bit field.
2481 Range 0..15.
2482
2483 @return The bit field read.
2484
2485 **/
2486 UINT16
2487 EFIAPI
2488 BitFieldRead16 (
2489 IN UINT16 Operand,
2490 IN UINTN StartBit,
2491 IN UINTN EndBit
2492 );
2493
2494
2495 /**
2496 Writes a bit field to a 16-bit value, and returns the result.
2497
2498 Writes Value to the bit field specified by the StartBit and the EndBit in
2499 Operand. All other bits in Operand are preserved. The new 16-bit value is
2500 returned.
2501
2502 If 16-bit operations are not supported, then ASSERT().
2503 If StartBit is greater than 15, then ASSERT().
2504 If EndBit is greater than 15, then ASSERT().
2505 If EndBit is less than StartBit, then ASSERT().
2506
2507 @param Operand Operand on which to perform the bitfield operation.
2508 @param StartBit The ordinal of the least significant bit in the bit field.
2509 Range 0..15.
2510 @param EndBit The ordinal of the most significant bit in the bit field.
2511 Range 0..15.
2512 @param Value New value of the bit field.
2513
2514 @return The new 16-bit value.
2515
2516 **/
2517 UINT16
2518 EFIAPI
2519 BitFieldWrite16 (
2520 IN UINT16 Operand,
2521 IN UINTN StartBit,
2522 IN UINTN EndBit,
2523 IN UINT16 Value
2524 );
2525
2526
2527 /**
2528 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2529 result.
2530
2531 Performs a bitwise OR between the bit field specified by StartBit
2532 and EndBit in Operand and the value specified by OrData. All other bits in
2533 Operand are preserved. The new 16-bit value is returned.
2534
2535 If 16-bit operations are not supported, then ASSERT().
2536 If StartBit is greater than 15, then ASSERT().
2537 If EndBit is greater than 15, then ASSERT().
2538 If EndBit is less than StartBit, then ASSERT().
2539
2540 @param Operand Operand on which to perform the bitfield operation.
2541 @param StartBit The ordinal of the least significant bit in the bit field.
2542 Range 0..15.
2543 @param EndBit The ordinal of the most significant bit in the bit field.
2544 Range 0..15.
2545 @param OrData The value to OR with the read value from the value
2546
2547 @return The new 16-bit value.
2548
2549 **/
2550 UINT16
2551 EFIAPI
2552 BitFieldOr16 (
2553 IN UINT16 Operand,
2554 IN UINTN StartBit,
2555 IN UINTN EndBit,
2556 IN UINT16 OrData
2557 );
2558
2559
2560 /**
2561 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2562 the result.
2563
2564 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2565 in Operand and the value specified by AndData. All other bits in Operand are
2566 preserved. The new 16-bit value is returned.
2567
2568 If 16-bit operations are not supported, then ASSERT().
2569 If StartBit is greater than 15, then ASSERT().
2570 If EndBit is greater than 15, then ASSERT().
2571 If EndBit is less than StartBit, then ASSERT().
2572
2573 @param Operand Operand on which to perform the bitfield operation.
2574 @param StartBit The ordinal of the least significant bit in the bit field.
2575 Range 0..15.
2576 @param EndBit The ordinal of the most significant bit in the bit field.
2577 Range 0..15.
2578 @param AndData The value to AND with the read value from the value
2579
2580 @return The new 16-bit value.
2581
2582 **/
2583 UINT16
2584 EFIAPI
2585 BitFieldAnd16 (
2586 IN UINT16 Operand,
2587 IN UINTN StartBit,
2588 IN UINTN EndBit,
2589 IN UINT16 AndData
2590 );
2591
2592
2593 /**
2594 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2595 bitwise OR, and returns the result.
2596
2597 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2598 in Operand and the value specified by AndData, followed by a bitwise
2599 OR with value specified by OrData. All other bits in Operand are
2600 preserved. The new 16-bit value is returned.
2601
2602 If 16-bit operations are not supported, then ASSERT().
2603 If StartBit is greater than 15, then ASSERT().
2604 If EndBit is greater than 15, then ASSERT().
2605 If EndBit is less than StartBit, then ASSERT().
2606
2607 @param Operand Operand on which to perform the bitfield operation.
2608 @param StartBit The ordinal of the least significant bit in the bit field.
2609 Range 0..15.
2610 @param EndBit The ordinal of the most significant bit in the bit field.
2611 Range 0..15.
2612 @param AndData The value to AND with the read value from the value.
2613 @param OrData The value to OR with the result of the AND operation.
2614
2615 @return The new 16-bit value.
2616
2617 **/
2618 UINT16
2619 EFIAPI
2620 BitFieldAndThenOr16 (
2621 IN UINT16 Operand,
2622 IN UINTN StartBit,
2623 IN UINTN EndBit,
2624 IN UINT16 AndData,
2625 IN UINT16 OrData
2626 );
2627
2628
2629 /**
2630 Returns a bit field from a 32-bit value.
2631
2632 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2633
2634 If 32-bit operations are not supported, then ASSERT().
2635 If StartBit is greater than 31, then ASSERT().
2636 If EndBit is greater than 31, then ASSERT().
2637 If EndBit is less than StartBit, then ASSERT().
2638
2639 @param Operand Operand on which to perform the bitfield operation.
2640 @param StartBit The ordinal of the least significant bit in the bit field.
2641 Range 0..31.
2642 @param EndBit The ordinal of the most significant bit in the bit field.
2643 Range 0..31.
2644
2645 @return The bit field read.
2646
2647 **/
2648 UINT32
2649 EFIAPI
2650 BitFieldRead32 (
2651 IN UINT32 Operand,
2652 IN UINTN StartBit,
2653 IN UINTN EndBit
2654 );
2655
2656
2657 /**
2658 Writes a bit field to a 32-bit value, and returns the result.
2659
2660 Writes Value to the bit field specified by the StartBit and the EndBit in
2661 Operand. All other bits in Operand are preserved. The new 32-bit value is
2662 returned.
2663
2664 If 32-bit operations are not supported, then ASSERT().
2665 If StartBit is greater than 31, then ASSERT().
2666 If EndBit is greater than 31, then ASSERT().
2667 If EndBit is less than StartBit, then ASSERT().
2668
2669 @param Operand Operand on which to perform the bitfield operation.
2670 @param StartBit The ordinal of the least significant bit in the bit field.
2671 Range 0..31.
2672 @param EndBit The ordinal of the most significant bit in the bit field.
2673 Range 0..31.
2674 @param Value New value of the bit field.
2675
2676 @return The new 32-bit value.
2677
2678 **/
2679 UINT32
2680 EFIAPI
2681 BitFieldWrite32 (
2682 IN UINT32 Operand,
2683 IN UINTN StartBit,
2684 IN UINTN EndBit,
2685 IN UINT32 Value
2686 );
2687
2688
2689 /**
2690 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2691 result.
2692
2693 Performs a bitwise OR between the bit field specified by StartBit
2694 and EndBit in Operand and the value specified by OrData. All other bits in
2695 Operand are preserved. The new 32-bit value is returned.
2696
2697 If 32-bit operations are not supported, then ASSERT().
2698 If StartBit is greater than 31, then ASSERT().
2699 If EndBit is greater than 31, then ASSERT().
2700 If EndBit is less than StartBit, then ASSERT().
2701
2702 @param Operand Operand on which to perform the bitfield operation.
2703 @param StartBit The ordinal of the least significant bit in the bit field.
2704 Range 0..31.
2705 @param EndBit The ordinal of the most significant bit in the bit field.
2706 Range 0..31.
2707 @param OrData The value to OR with the read value from the value
2708
2709 @return The new 32-bit value.
2710
2711 **/
2712 UINT32
2713 EFIAPI
2714 BitFieldOr32 (
2715 IN UINT32 Operand,
2716 IN UINTN StartBit,
2717 IN UINTN EndBit,
2718 IN UINT32 OrData
2719 );
2720
2721
2722 /**
2723 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2724 the result.
2725
2726 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2727 in Operand and the value specified by AndData. All other bits in Operand are
2728 preserved. The new 32-bit value is returned.
2729
2730 If 32-bit operations are not supported, then ASSERT().
2731 If StartBit is greater than 31, then ASSERT().
2732 If EndBit is greater than 31, then ASSERT().
2733 If EndBit is less than StartBit, then ASSERT().
2734
2735 @param Operand Operand on which to perform the bitfield operation.
2736 @param StartBit The ordinal of the least significant bit in the bit field.
2737 Range 0..31.
2738 @param EndBit The ordinal of the most significant bit in the bit field.
2739 Range 0..31.
2740 @param AndData The value to AND with the read value from the value
2741
2742 @return The new 32-bit value.
2743
2744 **/
2745 UINT32
2746 EFIAPI
2747 BitFieldAnd32 (
2748 IN UINT32 Operand,
2749 IN UINTN StartBit,
2750 IN UINTN EndBit,
2751 IN UINT32 AndData
2752 );
2753
2754
2755 /**
2756 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2757 bitwise OR, and returns the result.
2758
2759 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2760 in Operand and the value specified by AndData, followed by a bitwise
2761 OR with value specified by OrData. All other bits in Operand are
2762 preserved. The new 32-bit value is returned.
2763
2764 If 32-bit operations are not supported, then ASSERT().
2765 If StartBit is greater than 31, then ASSERT().
2766 If EndBit is greater than 31, then ASSERT().
2767 If EndBit is less than StartBit, then ASSERT().
2768
2769 @param Operand Operand on which to perform the bitfield operation.
2770 @param StartBit The ordinal of the least significant bit in the bit field.
2771 Range 0..31.
2772 @param EndBit The ordinal of the most significant bit in the bit field.
2773 Range 0..31.
2774 @param AndData The value to AND with the read value from the value.
2775 @param OrData The value to OR with the result of the AND operation.
2776
2777 @return The new 32-bit value.
2778
2779 **/
2780 UINT32
2781 EFIAPI
2782 BitFieldAndThenOr32 (
2783 IN UINT32 Operand,
2784 IN UINTN StartBit,
2785 IN UINTN EndBit,
2786 IN UINT32 AndData,
2787 IN UINT32 OrData
2788 );
2789
2790
2791 /**
2792 Returns a bit field from a 64-bit value.
2793
2794 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2795
2796 If 64-bit operations are not supported, then ASSERT().
2797 If StartBit is greater than 63, then ASSERT().
2798 If EndBit is greater than 63, then ASSERT().
2799 If EndBit is less than StartBit, then ASSERT().
2800
2801 @param Operand Operand on which to perform the bitfield operation.
2802 @param StartBit The ordinal of the least significant bit in the bit field.
2803 Range 0..63.
2804 @param EndBit The ordinal of the most significant bit in the bit field.
2805 Range 0..63.
2806
2807 @return The bit field read.
2808
2809 **/
2810 UINT64
2811 EFIAPI
2812 BitFieldRead64 (
2813 IN UINT64 Operand,
2814 IN UINTN StartBit,
2815 IN UINTN EndBit
2816 );
2817
2818
2819 /**
2820 Writes a bit field to a 64-bit value, and returns the result.
2821
2822 Writes Value to the bit field specified by the StartBit and the EndBit in
2823 Operand. All other bits in Operand are preserved. The new 64-bit value is
2824 returned.
2825
2826 If 64-bit operations are not supported, then ASSERT().
2827 If StartBit is greater than 63, then ASSERT().
2828 If EndBit is greater than 63, then ASSERT().
2829 If EndBit is less than StartBit, then ASSERT().
2830
2831 @param Operand Operand on which to perform the bitfield operation.
2832 @param StartBit The ordinal of the least significant bit in the bit field.
2833 Range 0..63.
2834 @param EndBit The ordinal of the most significant bit in the bit field.
2835 Range 0..63.
2836 @param Value New value of the bit field.
2837
2838 @return The new 64-bit value.
2839
2840 **/
2841 UINT64
2842 EFIAPI
2843 BitFieldWrite64 (
2844 IN UINT64 Operand,
2845 IN UINTN StartBit,
2846 IN UINTN EndBit,
2847 IN UINT64 Value
2848 );
2849
2850
2851 /**
2852 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2853 result.
2854
2855 Performs a bitwise OR between the bit field specified by StartBit
2856 and EndBit in Operand and the value specified by OrData. All other bits in
2857 Operand are preserved. The new 64-bit value is returned.
2858
2859 If 64-bit operations are not supported, then ASSERT().
2860 If StartBit is greater than 63, then ASSERT().
2861 If EndBit is greater than 63, then ASSERT().
2862 If EndBit is less than StartBit, then ASSERT().
2863
2864 @param Operand Operand on which to perform the bitfield operation.
2865 @param StartBit The ordinal of the least significant bit in the bit field.
2866 Range 0..63.
2867 @param EndBit The ordinal of the most significant bit in the bit field.
2868 Range 0..63.
2869 @param OrData The value to OR with the read value from the value
2870
2871 @return The new 64-bit value.
2872
2873 **/
2874 UINT64
2875 EFIAPI
2876 BitFieldOr64 (
2877 IN UINT64 Operand,
2878 IN UINTN StartBit,
2879 IN UINTN EndBit,
2880 IN UINT64 OrData
2881 );
2882
2883
2884 /**
2885 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2886 the result.
2887
2888 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2889 in Operand and the value specified by AndData. All other bits in Operand are
2890 preserved. The new 64-bit value is returned.
2891
2892 If 64-bit operations are not supported, then ASSERT().
2893 If StartBit is greater than 63, then ASSERT().
2894 If EndBit is greater than 63, then ASSERT().
2895 If EndBit is less than StartBit, then ASSERT().
2896
2897 @param Operand Operand on which to perform the bitfield operation.
2898 @param StartBit The ordinal of the least significant bit in the bit field.
2899 Range 0..63.
2900 @param EndBit The ordinal of the most significant bit in the bit field.
2901 Range 0..63.
2902 @param AndData The value to AND with the read value from the value
2903
2904 @return The new 64-bit value.
2905
2906 **/
2907 UINT64
2908 EFIAPI
2909 BitFieldAnd64 (
2910 IN UINT64 Operand,
2911 IN UINTN StartBit,
2912 IN UINTN EndBit,
2913 IN UINT64 AndData
2914 );
2915
2916
2917 /**
2918 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2919 bitwise OR, and returns the result.
2920
2921 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2922 in Operand and the value specified by AndData, followed by a bitwise
2923 OR with value specified by OrData. All other bits in Operand are
2924 preserved. The new 64-bit value is returned.
2925
2926 If 64-bit operations are not supported, then ASSERT().
2927 If StartBit is greater than 63, then ASSERT().
2928 If EndBit is greater than 63, then ASSERT().
2929 If EndBit is less than StartBit, then ASSERT().
2930
2931 @param Operand Operand on which to perform the bitfield operation.
2932 @param StartBit The ordinal of the least significant bit in the bit field.
2933 Range 0..63.
2934 @param EndBit The ordinal of the most significant bit in the bit field.
2935 Range 0..63.
2936 @param AndData The value to AND with the read value from the value.
2937 @param OrData The value to OR with the result of the AND operation.
2938
2939 @return The new 64-bit value.
2940
2941 **/
2942 UINT64
2943 EFIAPI
2944 BitFieldAndThenOr64 (
2945 IN UINT64 Operand,
2946 IN UINTN StartBit,
2947 IN UINTN EndBit,
2948 IN UINT64 AndData,
2949 IN UINT64 OrData
2950 );
2951
2952 //
2953 // Base Library Checksum Functions
2954 //
2955
2956 /**
2957 Returns the sum of all elements in a buffer in unit of UINT8.
2958 During calculation, the carry bits are dropped.
2959
2960 This function calculates the sum of all elements in a buffer
2961 in unit of UINT8. The carry bits in result of addition are dropped.
2962 The result is returned as UINT8. If Length is Zero, then Zero is
2963 returned.
2964
2965 If Buffer is NULL, then ASSERT().
2966 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2967
2968 @param Buffer Pointer to the buffer to carry out the sum operation.
2969 @param Length The size, in bytes, of Buffer.
2970
2971 @return Sum The sum of Buffer with carry bits dropped during additions.
2972
2973 **/
2974 UINT8
2975 EFIAPI
2976 CalculateSum8 (
2977 IN CONST UINT8 *Buffer,
2978 IN UINTN Length
2979 );
2980
2981
2982 /**
2983 Returns the two's complement checksum of all elements in a buffer
2984 of 8-bit values.
2985
2986 This function first calculates the sum of the 8-bit values in the
2987 buffer specified by Buffer and Length. The carry bits in the result
2988 of addition are dropped. Then, the two's complement of the sum is
2989 returned. If Length is 0, then 0 is returned.
2990
2991 If Buffer is NULL, then ASSERT().
2992 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2993
2994 @param Buffer Pointer to the buffer to carry out the checksum operation.
2995 @param Length The size, in bytes, of Buffer.
2996
2997 @return Checksum The 2's complement checksum of Buffer.
2998
2999 **/
3000 UINT8
3001 EFIAPI
3002 CalculateCheckSum8 (
3003 IN CONST UINT8 *Buffer,
3004 IN UINTN Length
3005 );
3006
3007
3008 /**
3009 Returns the sum of all elements in a buffer of 16-bit values. During
3010 calculation, the carry bits are dropped.
3011
3012 This function calculates the sum of the 16-bit values in the buffer
3013 specified by Buffer and Length. The carry bits in result of addition are dropped.
3014 The 16-bit result is returned. If Length is 0, then 0 is returned.
3015
3016 If Buffer is NULL, then ASSERT().
3017 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3018 If Length is not aligned on a 16-bit boundary, then ASSERT().
3019 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3020
3021 @param Buffer Pointer to the buffer to carry out the sum operation.
3022 @param Length The size, in bytes, of Buffer.
3023
3024 @return Sum The sum of Buffer with carry bits dropped during additions.
3025
3026 **/
3027 UINT16
3028 EFIAPI
3029 CalculateSum16 (
3030 IN CONST UINT16 *Buffer,
3031 IN UINTN Length
3032 );
3033
3034
3035 /**
3036 Returns the two's complement checksum of all elements in a buffer of
3037 16-bit values.
3038
3039 This function first calculates the sum of the 16-bit values in the buffer
3040 specified by Buffer and Length. The carry bits in the result of addition
3041 are dropped. Then, the two's complement of the sum is returned. If Length
3042 is 0, then 0 is returned.
3043
3044 If Buffer is NULL, then ASSERT().
3045 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3046 If Length is not aligned on a 16-bit boundary, then ASSERT().
3047 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3048
3049 @param Buffer Pointer to the buffer to carry out the checksum operation.
3050 @param Length The size, in bytes, of Buffer.
3051
3052 @return Checksum The 2's complement checksum of Buffer.
3053
3054 **/
3055 UINT16
3056 EFIAPI
3057 CalculateCheckSum16 (
3058 IN CONST UINT16 *Buffer,
3059 IN UINTN Length
3060 );
3061
3062
3063 /**
3064 Returns the sum of all elements in a buffer of 32-bit values. During
3065 calculation, the carry bits are dropped.
3066
3067 This function calculates the sum of the 32-bit values in the buffer
3068 specified by Buffer and Length. The carry bits in result of addition are dropped.
3069 The 32-bit result is returned. If Length is 0, then 0 is returned.
3070
3071 If Buffer is NULL, then ASSERT().
3072 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3073 If Length is not aligned on a 32-bit boundary, then ASSERT().
3074 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3075
3076 @param Buffer Pointer to the buffer to carry out the sum operation.
3077 @param Length The size, in bytes, of Buffer.
3078
3079 @return Sum The sum of Buffer with carry bits dropped during additions.
3080
3081 **/
3082 UINT32
3083 EFIAPI
3084 CalculateSum32 (
3085 IN CONST UINT32 *Buffer,
3086 IN UINTN Length
3087 );
3088
3089
3090 /**
3091 Returns the two's complement checksum of all elements in a buffer of
3092 32-bit values.
3093
3094 This function first calculates the sum of the 32-bit values in the buffer
3095 specified by Buffer and Length. The carry bits in the result of addition
3096 are dropped. Then, the two's complement of the sum is returned. If Length
3097 is 0, then 0 is returned.
3098
3099 If Buffer is NULL, then ASSERT().
3100 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3101 If Length is not aligned on a 32-bit boundary, then ASSERT().
3102 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3103
3104 @param Buffer Pointer to the buffer to carry out the checksum operation.
3105 @param Length The size, in bytes, of Buffer.
3106
3107 @return Checksum The 2's complement checksum of Buffer.
3108
3109 **/
3110 UINT32
3111 EFIAPI
3112 CalculateCheckSum32 (
3113 IN CONST UINT32 *Buffer,
3114 IN UINTN Length
3115 );
3116
3117
3118 /**
3119 Returns the sum of all elements in a buffer of 64-bit values. During
3120 calculation, the carry bits are dropped.
3121
3122 This function calculates the sum of the 64-bit values in the buffer
3123 specified by Buffer and Length. The carry bits in result of addition are dropped.
3124 The 64-bit result is returned. If Length is 0, then 0 is returned.
3125
3126 If Buffer is NULL, then ASSERT().
3127 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3128 If Length is not aligned on a 64-bit boundary, then ASSERT().
3129 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3130
3131 @param Buffer Pointer to the buffer to carry out the sum operation.
3132 @param Length The size, in bytes, of Buffer.
3133
3134 @return Sum The sum of Buffer with carry bits dropped during additions.
3135
3136 **/
3137 UINT64
3138 EFIAPI
3139 CalculateSum64 (
3140 IN CONST UINT64 *Buffer,
3141 IN UINTN Length
3142 );
3143
3144
3145 /**
3146 Returns the two's complement checksum of all elements in a buffer of
3147 64-bit values.
3148
3149 This function first calculates the sum of the 64-bit values in the buffer
3150 specified by Buffer and Length. The carry bits in the result of addition
3151 are dropped. Then, the two's complement of the sum is returned. If Length
3152 is 0, then 0 is returned.
3153
3154 If Buffer is NULL, then ASSERT().
3155 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3156 If Length is not aligned on a 64-bit boundary, then ASSERT().
3157 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3158
3159 @param Buffer Pointer to the buffer to carry out the checksum operation.
3160 @param Length The size, in bytes, of Buffer.
3161
3162 @return Checksum The 2's complement checksum of Buffer.
3163
3164 **/
3165 UINT64
3166 EFIAPI
3167 CalculateCheckSum64 (
3168 IN CONST UINT64 *Buffer,
3169 IN UINTN Length
3170 );
3171
3172
3173 //
3174 // Base Library CPU Functions
3175 //
3176
3177 /**
3178 Function entry point used when a stack switch is requested with SwitchStack()
3179
3180 @param Context1 Context1 parameter passed into SwitchStack().
3181 @param Context2 Context2 parameter passed into SwitchStack().
3182
3183 **/
3184 typedef
3185 VOID
3186 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3187 IN VOID *Context1, OPTIONAL
3188 IN VOID *Context2 OPTIONAL
3189 );
3190
3191
3192 /**
3193 Used to serialize load and store operations.
3194
3195 All loads and stores that proceed calls to this function are guaranteed to be
3196 globally visible when this function returns.
3197
3198 **/
3199 VOID
3200 EFIAPI
3201 MemoryFence (
3202 VOID
3203 );
3204
3205
3206 /**
3207 Saves the current CPU context that can be restored with a call to LongJump()
3208 and returns 0.
3209
3210 Saves the current CPU context in the buffer specified by JumpBuffer and
3211 returns 0. The initial call to SetJump() must always return 0. Subsequent
3212 calls to LongJump() cause a non-zero value to be returned by SetJump().
3213
3214 If JumpBuffer is NULL, then ASSERT().
3215 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3216
3217 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3218 The same structure must never be used for more than one CPU architecture context.
3219 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3220 SetJump()/LongJump() is not currently supported for the EBC processor type.
3221
3222 @param JumpBuffer A pointer to CPU context buffer.
3223
3224 @retval 0 Indicates a return from SetJump().
3225
3226 **/
3227 UINTN
3228 EFIAPI
3229 SetJump (
3230 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3231 );
3232
3233
3234 /**
3235 Restores the CPU context that was saved with SetJump().
3236
3237 Restores the CPU context from the buffer specified by JumpBuffer. This
3238 function never returns to the caller. Instead is resumes execution based on
3239 the state of JumpBuffer.
3240
3241 If JumpBuffer is NULL, then ASSERT().
3242 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3243 If Value is 0, then ASSERT().
3244
3245 @param JumpBuffer A pointer to CPU context buffer.
3246 @param Value The value to return when the SetJump() context is
3247 restored and must be non-zero.
3248
3249 **/
3250 VOID
3251 EFIAPI
3252 LongJump (
3253 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3254 IN UINTN Value
3255 );
3256
3257
3258 /**
3259 Enables CPU interrupts.
3260
3261 **/
3262 VOID
3263 EFIAPI
3264 EnableInterrupts (
3265 VOID
3266 );
3267
3268
3269 /**
3270 Disables CPU interrupts.
3271
3272 **/
3273 VOID
3274 EFIAPI
3275 DisableInterrupts (
3276 VOID
3277 );
3278
3279
3280 /**
3281 Disables CPU interrupts and returns the interrupt state prior to the disable
3282 operation.
3283
3284 @retval TRUE CPU interrupts were enabled on entry to this call.
3285 @retval FALSE CPU interrupts were disabled on entry to this call.
3286
3287 **/
3288 BOOLEAN
3289 EFIAPI
3290 SaveAndDisableInterrupts (
3291 VOID
3292 );
3293
3294
3295 /**
3296 Enables CPU interrupts for the smallest window required to capture any
3297 pending interrupts.
3298
3299 **/
3300 VOID
3301 EFIAPI
3302 EnableDisableInterrupts (
3303 VOID
3304 );
3305
3306
3307 /**
3308 Retrieves the current CPU interrupt state.
3309
3310 Returns TRUE is interrupts are currently enabled. Otherwise
3311 returns FALSE.
3312
3313 @retval TRUE CPU interrupts are enabled.
3314 @retval FALSE CPU interrupts are disabled.
3315
3316 **/
3317 BOOLEAN
3318 EFIAPI
3319 GetInterruptState (
3320 VOID
3321 );
3322
3323
3324 /**
3325 Set the current CPU interrupt state.
3326
3327 Sets the current CPU interrupt state to the state specified by
3328 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3329 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3330 returned.
3331
3332 @param InterruptState TRUE if interrupts should enabled. FALSE if
3333 interrupts should be disabled.
3334
3335 @return InterruptState
3336
3337 **/
3338 BOOLEAN
3339 EFIAPI
3340 SetInterruptState (
3341 IN BOOLEAN InterruptState
3342 );
3343
3344
3345 /**
3346 Requests CPU to pause for a short period of time.
3347
3348 Requests CPU to pause for a short period of time. Typically used in MP
3349 systems to prevent memory starvation while waiting for a spin lock.
3350
3351 **/
3352 VOID
3353 EFIAPI
3354 CpuPause (
3355 VOID
3356 );
3357
3358
3359 /**
3360 Transfers control to a function starting with a new stack.
3361
3362 Transfers control to the function specified by EntryPoint using the
3363 new stack specified by NewStack and passing in the parameters specified
3364 by Context1 and Context2. Context1 and Context2 are optional and may
3365 be NULL. The function EntryPoint must never return. This function
3366 supports a variable number of arguments following the NewStack parameter.
3367 These additional arguments are ignored on IA-32, x64, and EBC architectures.
3368 Itanium processors expect one additional parameter of type VOID * that specifies
3369 the new backing store pointer.
3370
3371 If EntryPoint is NULL, then ASSERT().
3372 If NewStack is NULL, then ASSERT().
3373
3374 @param EntryPoint A pointer to function to call with the new stack.
3375 @param Context1 A pointer to the context to pass into the EntryPoint
3376 function.
3377 @param Context2 A pointer to the context to pass into the EntryPoint
3378 function.
3379 @param NewStack A pointer to the new stack to use for the EntryPoint
3380 function.
3381 @param ... This variable argument list is ignored for IA-32, x64, and EBC architectures.
3382 For Itanium processors, this variable argument list is expected to contain
3383 a single parameter of type VOID * that specifies the new backing
3384 store pointer.
3385
3386
3387 **/
3388 VOID
3389 EFIAPI
3390 SwitchStack (
3391 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3392 IN VOID *Context1, OPTIONAL
3393 IN VOID *Context2, OPTIONAL
3394 IN VOID *NewStack,
3395 ...
3396 );
3397
3398
3399 /**
3400 Generates a breakpoint on the CPU.
3401
3402 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3403 that code can resume normal execution after the breakpoint.
3404
3405 **/
3406 VOID
3407 EFIAPI
3408 CpuBreakpoint (
3409 VOID
3410 );
3411
3412
3413 /**
3414 Executes an infinite loop.
3415
3416 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3417 past the loop and the code that follows the loop must execute properly. This
3418 implies that the infinite loop must not cause the code that follow it to be
3419 optimized away.
3420
3421 **/
3422 VOID
3423 EFIAPI
3424 CpuDeadLoop (
3425 VOID
3426 );
3427
3428 #if defined (MDE_CPU_IPF)
3429
3430 /**
3431 Flush a range of cache lines in the cache coherency domain of the calling
3432 CPU.
3433
3434 Flushes the cache lines specified by Address and Length. If Address is not aligned
3435 on a cache line boundary, then entire cache line containing Address is flushed.
3436 If Address + Length is not aligned on a cache line boundary, then the entire cache
3437 line containing Address + Length - 1 is flushed. This function may choose to flush
3438 the entire cache if that is more efficient than flushing the specified range. If
3439 Length is 0, the no cache lines are flushed. Address is returned.
3440 This function is only available on Itanium processors.
3441
3442 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3443
3444 @param Address The base address of the instruction lines to invalidate. If
3445 the CPU is in a physical addressing mode, then Address is a
3446 physical address. If the CPU is in a virtual addressing mode,
3447 then Address is a virtual address.
3448
3449 @param Length The number of bytes to invalidate from the instruction cache.
3450
3451 @return Address.
3452
3453 **/
3454 VOID *
3455 EFIAPI
3456 AsmFlushCacheRange (
3457 IN VOID *Address,
3458 IN UINTN Length
3459 );
3460
3461
3462 /**
3463 Executes a FC instruction
3464 Executes a FC instruction on the cache line specified by Address.
3465 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3466 An implementation may flush a larger region. This function is only available on Itanium processors.
3467
3468 @param Address The Address of cache line to be flushed.
3469
3470 @return The address of FC instruction executed.
3471
3472 **/
3473 UINT64
3474 EFIAPI
3475 AsmFc (
3476 IN UINT64 Address
3477 );
3478
3479
3480 /**
3481 Executes a FC.I instruction.
3482 Executes a FC.I instruction on the cache line specified by Address.
3483 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3484 An implementation may flush a larger region. This function is only available on Itanium processors.
3485
3486 @param Address The Address of cache line to be flushed.
3487
3488 @return The address of FC.I instruction executed.
3489
3490 **/
3491 UINT64
3492 EFIAPI
3493 AsmFci (
3494 IN UINT64 Address
3495 );
3496
3497
3498 /**
3499 Reads the current value of a Processor Identifier Register (CPUID).
3500
3501 Reads and returns the current value of Processor Identifier Register specified by Index.
3502 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3503 registers) is determined by CPUID [3] bits {7:0}.
3504 No parameter checking is performed on Index. If the Index value is beyond the
3505 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3506 must either guarantee that Index is valid, or the caller must set up fault handlers to
3507 catch the faults. This function is only available on Itanium processors.
3508
3509 @param Index The 8-bit Processor Identifier Register index to read.
3510
3511 @return The current value of Processor Identifier Register specified by Index.
3512
3513 **/
3514 UINT64
3515 EFIAPI
3516 AsmReadCpuid (
3517 IN UINT8 Index
3518 );
3519
3520
3521 /**
3522 Reads the current value of 64-bit Processor Status Register (PSR).
3523 This function is only available on Itanium processors.
3524
3525 @return The current value of PSR.
3526
3527 **/
3528 UINT64
3529 EFIAPI
3530 AsmReadPsr (
3531 VOID
3532 );
3533
3534
3535 /**
3536 Writes the current value of 64-bit Processor Status Register (PSR).
3537
3538 No parameter checking is performed on Value. All bits of Value corresponding to
3539 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3540 The caller must either guarantee that Value is valid, or the caller must set up
3541 fault handlers to catch the faults. This function is only available on Itanium processors.
3542
3543 @param Value The 64-bit value to write to PSR.
3544
3545 @return The 64-bit value written to the PSR.
3546
3547 **/
3548 UINT64
3549 EFIAPI
3550 AsmWritePsr (
3551 IN UINT64 Value
3552 );
3553
3554
3555 /**
3556 Reads the current value of 64-bit Kernel Register #0 (KR0).
3557
3558 Reads and returns the current value of KR0.
3559 This function is only available on Itanium processors.
3560
3561 @return The current value of KR0.
3562
3563 **/
3564 UINT64
3565 EFIAPI
3566 AsmReadKr0 (
3567 VOID
3568 );
3569
3570
3571 /**
3572 Reads the current value of 64-bit Kernel Register #1 (KR1).
3573
3574 Reads and returns the current value of KR1.
3575 This function is only available on Itanium processors.
3576
3577 @return The current value of KR1.
3578
3579 **/
3580 UINT64
3581 EFIAPI
3582 AsmReadKr1 (
3583 VOID
3584 );
3585
3586
3587 /**
3588 Reads the current value of 64-bit Kernel Register #2 (KR2).
3589
3590 Reads and returns the current value of KR2.
3591 This function is only available on Itanium processors.
3592
3593 @return The current value of KR2.
3594
3595 **/
3596 UINT64
3597 EFIAPI
3598 AsmReadKr2 (
3599 VOID
3600 );
3601
3602
3603 /**
3604 Reads the current value of 64-bit Kernel Register #3 (KR3).
3605
3606 Reads and returns the current value of KR3.
3607 This function is only available on Itanium processors.
3608
3609 @return The current value of KR3.
3610
3611 **/
3612 UINT64
3613 EFIAPI
3614 AsmReadKr3 (
3615 VOID
3616 );
3617
3618
3619 /**
3620 Reads the current value of 64-bit Kernel Register #4 (KR4).
3621
3622 Reads and returns the current value of KR4.
3623 This function is only available on Itanium processors.
3624
3625 @return The current value of KR4.
3626
3627 **/
3628 UINT64
3629 EFIAPI
3630 AsmReadKr4 (
3631 VOID
3632 );
3633
3634
3635 /**
3636 Reads the current value of 64-bit Kernel Register #5 (KR5).
3637
3638 Reads and returns the current value of KR5.
3639 This function is only available on Itanium processors.
3640
3641 @return The current value of KR5.
3642
3643 **/
3644 UINT64
3645 EFIAPI
3646 AsmReadKr5 (
3647 VOID
3648 );
3649
3650
3651 /**
3652 Reads the current value of 64-bit Kernel Register #6 (KR6).
3653
3654 Reads and returns the current value of KR6.
3655 This function is only available on Itanium processors.
3656
3657 @return The current value of KR6.
3658
3659 **/
3660 UINT64
3661 EFIAPI
3662 AsmReadKr6 (
3663 VOID
3664 );
3665
3666
3667 /**
3668 Reads the current value of 64-bit Kernel Register #7 (KR7).
3669
3670 Reads and returns the current value of KR7.
3671 This function is only available on Itanium processors.
3672
3673 @return The current value of KR7.
3674
3675 **/
3676 UINT64
3677 EFIAPI
3678 AsmReadKr7 (
3679 VOID
3680 );
3681
3682
3683 /**
3684 Write the current value of 64-bit Kernel Register #0 (KR0).
3685
3686 Writes the current value of KR0. The 64-bit value written to
3687 the KR0 is returned. This function is only available on Itanium processors.
3688
3689 @param Value The 64-bit value to write to KR0.
3690
3691 @return The 64-bit value written to the KR0.
3692
3693 **/
3694 UINT64
3695 EFIAPI
3696 AsmWriteKr0 (
3697 IN UINT64 Value
3698 );
3699
3700
3701 /**
3702 Write the current value of 64-bit Kernel Register #1 (KR1).
3703
3704 Writes the current value of KR1. The 64-bit value written to
3705 the KR1 is returned. This function is only available on Itanium processors.
3706
3707 @param Value The 64-bit value to write to KR1.
3708
3709 @return The 64-bit value written to the KR1.
3710
3711 **/
3712 UINT64
3713 EFIAPI
3714 AsmWriteKr1 (
3715 IN UINT64 Value
3716 );
3717
3718
3719 /**
3720 Write the current value of 64-bit Kernel Register #2 (KR2).
3721
3722 Writes the current value of KR2. The 64-bit value written to
3723 the KR2 is returned. This function is only available on Itanium processors.
3724
3725 @param Value The 64-bit value to write to KR2.
3726
3727 @return The 64-bit value written to the KR2.
3728
3729 **/
3730 UINT64
3731 EFIAPI
3732 AsmWriteKr2 (
3733 IN UINT64 Value
3734 );
3735
3736
3737 /**
3738 Write the current value of 64-bit Kernel Register #3 (KR3).
3739
3740 Writes the current value of KR3. The 64-bit value written to
3741 the KR3 is returned. This function is only available on Itanium processors.
3742
3743 @param Value The 64-bit value to write to KR3.
3744
3745 @return The 64-bit value written to the KR3.
3746
3747 **/
3748 UINT64
3749 EFIAPI
3750 AsmWriteKr3 (
3751 IN UINT64 Value
3752 );
3753
3754
3755 /**
3756 Write the current value of 64-bit Kernel Register #4 (KR4).
3757
3758 Writes the current value of KR4. The 64-bit value written to
3759 the KR4 is returned. This function is only available on Itanium processors.
3760
3761 @param Value The 64-bit value to write to KR4.
3762
3763 @return The 64-bit value written to the KR4.
3764
3765 **/
3766 UINT64
3767 EFIAPI
3768 AsmWriteKr4 (
3769 IN UINT64 Value
3770 );
3771
3772
3773 /**
3774 Write the current value of 64-bit Kernel Register #5 (KR5).
3775
3776 Writes the current value of KR5. The 64-bit value written to
3777 the KR5 is returned. This function is only available on Itanium processors.
3778
3779 @param Value The 64-bit value to write to KR5.
3780
3781 @return The 64-bit value written to the KR5.
3782
3783 **/
3784 UINT64
3785 EFIAPI
3786 AsmWriteKr5 (
3787 IN UINT64 Value
3788 );
3789
3790
3791 /**
3792 Write the current value of 64-bit Kernel Register #6 (KR6).
3793
3794 Writes the current value of KR6. The 64-bit value written to
3795 the KR6 is returned. This function is only available on Itanium processors.
3796
3797 @param Value The 64-bit value to write to KR6.
3798
3799 @return The 64-bit value written to the KR6.
3800
3801 **/
3802 UINT64
3803 EFIAPI
3804 AsmWriteKr6 (
3805 IN UINT64 Value
3806 );
3807
3808
3809 /**
3810 Write the current value of 64-bit Kernel Register #7 (KR7).
3811
3812 Writes the current value of KR7. The 64-bit value written to
3813 the KR7 is returned. This function is only available on Itanium processors.
3814
3815 @param Value The 64-bit value to write to KR7.
3816
3817 @return The 64-bit value written to the KR7.
3818
3819 **/
3820 UINT64
3821 EFIAPI
3822 AsmWriteKr7 (
3823 IN UINT64 Value
3824 );
3825
3826
3827 /**
3828 Reads the current value of Interval Timer Counter Register (ITC).
3829
3830 Reads and returns the current value of ITC.
3831 This function is only available on Itanium processors.
3832
3833 @return The current value of ITC.
3834
3835 **/
3836 UINT64
3837 EFIAPI
3838 AsmReadItc (
3839 VOID
3840 );
3841
3842
3843 /**
3844 Reads the current value of Interval Timer Vector Register (ITV).
3845
3846 Reads and returns the current value of ITV.
3847 This function is only available on Itanium processors.
3848
3849 @return The current value of ITV.
3850
3851 **/
3852 UINT64
3853 EFIAPI
3854 AsmReadItv (
3855 VOID
3856 );
3857
3858
3859 /**
3860 Reads the current value of Interval Timer Match Register (ITM).
3861
3862 Reads and returns the current value of ITM.
3863 This function is only available on Itanium processors.
3864
3865 @return The current value of ITM.
3866 **/
3867 UINT64
3868 EFIAPI
3869 AsmReadItm (
3870 VOID
3871 );
3872
3873
3874 /**
3875 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
3876
3877 Writes the current value of ITC. The 64-bit value written to the ITC is returned.
3878 This function is only available on Itanium processors.
3879
3880 @param Value The 64-bit value to write to ITC.
3881
3882 @return The 64-bit value written to the ITC.
3883
3884 **/
3885 UINT64
3886 EFIAPI
3887 AsmWriteItc (
3888 IN UINT64 Value
3889 );
3890
3891
3892 /**
3893 Writes the current value of 64-bit Interval Timer Match Register (ITM).
3894
3895 Writes the current value of ITM. The 64-bit value written to the ITM is returned.
3896 This function is only available on Itanium processors.
3897
3898 @param Value The 64-bit value to write to ITM.
3899
3900 @return The 64-bit value written to the ITM.
3901
3902 **/
3903 UINT64
3904 EFIAPI
3905 AsmWriteItm (
3906 IN UINT64 Value
3907 );
3908
3909
3910 /**
3911 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
3912
3913 Writes the current value of ITV. The 64-bit value written to the ITV is returned.
3914 No parameter checking is performed on Value. All bits of Value corresponding to
3915 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
3916 The caller must either guarantee that Value is valid, or the caller must set up
3917 fault handlers to catch the faults.
3918 This function is only available on Itanium processors.
3919
3920 @param Value The 64-bit value to write to ITV.
3921
3922 @return The 64-bit value written to the ITV.
3923
3924 **/
3925 UINT64
3926 EFIAPI
3927 AsmWriteItv (
3928 IN UINT64 Value
3929 );
3930
3931
3932 /**
3933 Reads the current value of Default Control Register (DCR).
3934
3935 Reads and returns the current value of DCR. This function is only available on Itanium processors.
3936
3937 @return The current value of DCR.
3938
3939 **/
3940 UINT64
3941 EFIAPI
3942 AsmReadDcr (
3943 VOID
3944 );
3945
3946
3947 /**
3948 Reads the current value of Interruption Vector Address Register (IVA).
3949
3950 Reads and returns the current value of IVA. This function is only available on Itanium processors.
3951
3952 @return The current value of IVA.
3953 **/
3954 UINT64
3955 EFIAPI
3956 AsmReadIva (
3957 VOID
3958 );
3959
3960
3961 /**
3962 Reads the current value of Page Table Address Register (PTA).
3963
3964 Reads and returns the current value of PTA. This function is only available on Itanium processors.
3965
3966 @return The current value of PTA.
3967
3968 **/
3969 UINT64
3970 EFIAPI
3971 AsmReadPta (
3972 VOID
3973 );
3974
3975
3976 /**
3977 Writes the current value of 64-bit Default Control Register (DCR).
3978
3979 Writes the current value of DCR. The 64-bit value written to the DCR is returned.
3980 No parameter checking is performed on Value. All bits of Value corresponding to
3981 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
3982 The caller must either guarantee that Value is valid, or the caller must set up
3983 fault handlers to catch the faults.
3984 This function is only available on Itanium processors.
3985
3986 @param Value The 64-bit value to write to DCR.
3987
3988 @return The 64-bit value written to the DCR.
3989
3990 **/
3991 UINT64
3992 EFIAPI
3993 AsmWriteDcr (
3994 IN UINT64 Value
3995 );
3996
3997
3998 /**
3999 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
4000
4001 Writes the current value of IVA. The 64-bit value written to the IVA is returned.
4002 The size of vector table is 32 K bytes and is 32 K bytes aligned
4003 the low 15 bits of Value is ignored when written.
4004 This function is only available on Itanium processors.
4005
4006 @param Value The 64-bit value to write to IVA.
4007
4008 @return The 64-bit value written to the IVA.
4009
4010 **/
4011 UINT64
4012 EFIAPI
4013 AsmWriteIva (
4014 IN UINT64 Value
4015 );
4016
4017
4018 /**
4019 Writes the current value of 64-bit Page Table Address Register (PTA).
4020
4021 Writes the current value of PTA. The 64-bit value written to the PTA is returned.
4022 No parameter checking is performed on Value. All bits of Value corresponding to
4023 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4024 The caller must either guarantee that Value is valid, or the caller must set up
4025 fault handlers to catch the faults.
4026 This function is only available on Itanium processors.
4027
4028 @param Value The 64-bit value to write to PTA.
4029
4030 @return The 64-bit value written to the PTA.
4031 **/
4032 UINT64
4033 EFIAPI
4034 AsmWritePta (
4035 IN UINT64 Value
4036 );
4037
4038
4039 /**
4040 Reads the current value of Local Interrupt ID Register (LID).
4041
4042 Reads and returns the current value of LID. This function is only available on Itanium processors.
4043
4044 @return The current value of LID.
4045
4046 **/
4047 UINT64
4048 EFIAPI
4049 AsmReadLid (
4050 VOID
4051 );
4052
4053
4054 /**
4055 Reads the current value of External Interrupt Vector Register (IVR).
4056
4057 Reads and returns the current value of IVR. This function is only available on Itanium processors.
4058
4059 @return The current value of IVR.
4060
4061 **/
4062 UINT64
4063 EFIAPI
4064 AsmReadIvr (
4065 VOID
4066 );
4067
4068
4069 /**
4070 Reads the current value of Task Priority Register (TPR).
4071
4072 Reads and returns the current value of TPR. This function is only available on Itanium processors.
4073
4074 @return The current value of TPR.
4075
4076 **/
4077 UINT64
4078 EFIAPI
4079 AsmReadTpr (
4080 VOID
4081 );
4082
4083
4084 /**
4085 Reads the current value of External Interrupt Request Register #0 (IRR0).
4086
4087 Reads and returns the current value of IRR0. This function is only available on Itanium processors.
4088
4089 @return The current value of IRR0.
4090
4091 **/
4092 UINT64
4093 EFIAPI
4094 AsmReadIrr0 (
4095 VOID
4096 );
4097
4098
4099 /**
4100 Reads the current value of External Interrupt Request Register #1 (IRR1).
4101
4102 Reads and returns the current value of IRR1. This function is only available on Itanium processors.
4103
4104 @return The current value of IRR1.
4105
4106 **/
4107 UINT64
4108 EFIAPI
4109 AsmReadIrr1 (
4110 VOID
4111 );
4112
4113
4114 /**
4115 Reads the current value of External Interrupt Request Register #2 (IRR2).
4116
4117 Reads and returns the current value of IRR2. This function is only available on Itanium processors.
4118
4119 @return The current value of IRR2.
4120
4121 **/
4122 UINT64
4123 EFIAPI
4124 AsmReadIrr2 (
4125 VOID
4126 );
4127
4128
4129 /**
4130 Reads the current value of External Interrupt Request Register #3 (IRR3).
4131
4132 Reads and returns the current value of IRR3. This function is only available on Itanium processors.
4133
4134 @return The current value of IRR3.
4135
4136 **/
4137 UINT64
4138 EFIAPI
4139 AsmReadIrr3 (
4140 VOID
4141 );
4142
4143
4144 /**
4145 Reads the current value of Performance Monitor Vector Register (PMV).
4146
4147 Reads and returns the current value of PMV. This function is only available on Itanium processors.
4148
4149 @return The current value of PMV.
4150
4151 **/
4152 UINT64
4153 EFIAPI
4154 AsmReadPmv (
4155 VOID
4156 );
4157
4158
4159 /**
4160 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4161
4162 Reads and returns the current value of CMCV. This function is only available on Itanium processors.
4163
4164 @return The current value of CMCV.
4165
4166 **/
4167 UINT64
4168 EFIAPI
4169 AsmReadCmcv (
4170 VOID
4171 );
4172
4173
4174 /**
4175 Reads the current value of Local Redirection Register #0 (LRR0).
4176
4177 Reads and returns the current value of LRR0. This function is only available on Itanium processors.
4178
4179 @return The current value of LRR0.
4180
4181 **/
4182 UINT64
4183 EFIAPI
4184 AsmReadLrr0 (
4185 VOID
4186 );
4187
4188
4189 /**
4190 Reads the current value of Local Redirection Register #1 (LRR1).
4191
4192 Reads and returns the current value of LRR1. This function is only available on Itanium processors.
4193
4194 @return The current value of LRR1.
4195
4196 **/
4197 UINT64
4198 EFIAPI
4199 AsmReadLrr1 (
4200 VOID
4201 );
4202
4203
4204 /**
4205 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4206
4207 Writes the current value of LID. The 64-bit value written to the LID is returned.
4208 No parameter checking is performed on Value. All bits of Value corresponding to
4209 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4210 The caller must either guarantee that Value is valid, or the caller must set up
4211 fault handlers to catch the faults.
4212 This function is only available on Itanium processors.
4213
4214 @param Value The 64-bit value to write to LID.
4215
4216 @return The 64-bit value written to the LID.
4217
4218 **/
4219 UINT64
4220 EFIAPI
4221 AsmWriteLid (
4222 IN UINT64 Value
4223 );
4224
4225
4226 /**
4227 Writes the current value of 64-bit Task Priority Register (TPR).
4228
4229 Writes the current value of TPR. The 64-bit value written to the TPR is returned.
4230 No parameter checking is performed on Value. All bits of Value corresponding to
4231 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4232 The caller must either guarantee that Value is valid, or the caller must set up
4233 fault handlers to catch the faults.
4234 This function is only available on Itanium processors.
4235
4236 @param Value The 64-bit value to write to TPR.
4237
4238 @return The 64-bit value written to the TPR.
4239
4240 **/
4241 UINT64
4242 EFIAPI
4243 AsmWriteTpr (
4244 IN UINT64 Value
4245 );
4246
4247
4248 /**
4249 Performs a write operation on End OF External Interrupt Register (EOI).
4250
4251 Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.
4252
4253 **/
4254 VOID
4255 EFIAPI
4256 AsmWriteEoi (
4257 VOID
4258 );
4259
4260
4261 /**
4262 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4263
4264 Writes the current value of PMV. The 64-bit value written to the PMV is returned.
4265 No parameter checking is performed on Value. All bits of Value corresponding
4266 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4267 The caller must either guarantee that Value is valid, or the caller must set up
4268 fault handlers to catch the faults.
4269 This function is only available on Itanium processors.
4270
4271 @param Value The 64-bit value to write to PMV.
4272
4273 @return The 64-bit value written to the PMV.
4274
4275 **/
4276 UINT64
4277 EFIAPI
4278 AsmWritePmv (
4279 IN UINT64 Value
4280 );
4281
4282
4283 /**
4284 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4285
4286 Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.
4287 No parameter checking is performed on Value. All bits of Value corresponding
4288 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4289 The caller must either guarantee that Value is valid, or the caller must set up
4290 fault handlers to catch the faults.
4291 This function is only available on Itanium processors.
4292
4293 @param Value The 64-bit value to write to CMCV.
4294
4295 @return The 64-bit value written to the CMCV.
4296
4297 **/
4298 UINT64
4299 EFIAPI
4300 AsmWriteCmcv (
4301 IN UINT64 Value
4302 );
4303
4304
4305 /**
4306 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4307
4308 Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.
4309 No parameter checking is performed on Value. All bits of Value corresponding
4310 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4311 The caller must either guarantee that Value is valid, or the caller must set up
4312 fault handlers to catch the faults.
4313 This function is only available on Itanium processors.
4314
4315 @param Value The 64-bit value to write to LRR0.
4316
4317 @return The 64-bit value written to the LRR0.
4318
4319 **/
4320 UINT64
4321 EFIAPI
4322 AsmWriteLrr0 (
4323 IN UINT64 Value
4324 );
4325
4326
4327 /**
4328 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4329
4330 Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.
4331 No parameter checking is performed on Value. All bits of Value corresponding
4332 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4333 The caller must either guarantee that Value is valid, or the caller must
4334 set up fault handlers to catch the faults.
4335 This function is only available on Itanium processors.
4336
4337 @param Value The 64-bit value to write to LRR1.
4338
4339 @return The 64-bit value written to the LRR1.
4340
4341 **/
4342 UINT64
4343 EFIAPI
4344 AsmWriteLrr1 (
4345 IN UINT64 Value
4346 );
4347
4348
4349 /**
4350 Reads the current value of Instruction Breakpoint Register (IBR).
4351
4352 The Instruction Breakpoint Registers are used in pairs. The even numbered
4353 registers contain breakpoint addresses, and the odd numbered registers contain
4354 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4355 on all processor models. Implemented registers are contiguous starting with
4356 register 0. No parameter checking is performed on Index, and if the Index value
4357 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4358 occur. The caller must either guarantee that Index is valid, or the caller must
4359 set up fault handlers to catch the faults.
4360 This function is only available on Itanium processors.
4361
4362 @param Index The 8-bit Instruction Breakpoint Register index to read.
4363
4364 @return The current value of Instruction Breakpoint Register specified by Index.
4365
4366 **/
4367 UINT64
4368 EFIAPI
4369 AsmReadIbr (
4370 IN UINT8 Index
4371 );
4372
4373
4374 /**
4375 Reads the current value of Data Breakpoint Register (DBR).
4376
4377 The Data Breakpoint Registers are used in pairs. The even numbered registers
4378 contain breakpoint addresses, and odd numbered registers contain breakpoint
4379 mask conditions. At least 4 data registers pairs are implemented on all processor
4380 models. Implemented registers are contiguous starting with register 0.
4381 No parameter checking is performed on Index. If the Index value is beyond
4382 the implemented DBR register range, a Reserved Register/Field fault may occur.
4383 The caller must either guarantee that Index is valid, or the caller must set up
4384 fault handlers to catch the faults.
4385 This function is only available on Itanium processors.
4386
4387 @param Index The 8-bit Data Breakpoint Register index to read.
4388
4389 @return The current value of Data Breakpoint Register specified by Index.
4390
4391 **/
4392 UINT64
4393 EFIAPI
4394 AsmReadDbr (
4395 IN UINT8 Index
4396 );
4397
4398
4399 /**
4400 Reads the current value of Performance Monitor Configuration Register (PMC).
4401
4402 All processor implementations provide at least 4 performance counters
4403 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4404 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4405 additional implementation-dependent PMC and PMD to increase the number of
4406 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4407 register set is implementation dependent. No parameter checking is performed
4408 on Index. If the Index value is beyond the implemented PMC register range,
4409 zero value will be returned.
4410 This function is only available on Itanium processors.
4411
4412 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4413
4414 @return The current value of Performance Monitor Configuration Register
4415 specified by Index.
4416
4417 **/
4418 UINT64
4419 EFIAPI
4420 AsmReadPmc (
4421 IN UINT8 Index
4422 );
4423
4424
4425 /**
4426 Reads the current value of Performance Monitor Data Register (PMD).
4427
4428 All processor implementations provide at least 4 performance counters
4429 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4430 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4431 provide additional implementation-dependent PMC and PMD to increase the number
4432 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4433 register set is implementation dependent. No parameter checking is performed
4434 on Index. If the Index value is beyond the implemented PMD register range,
4435 zero value will be returned.
4436 This function is only available on Itanium processors.
4437
4438 @param Index The 8-bit Performance Monitor Data Register index to read.
4439
4440 @return The current value of Performance Monitor Data Register specified by Index.
4441
4442 **/
4443 UINT64
4444 EFIAPI
4445 AsmReadPmd (
4446 IN UINT8 Index
4447 );
4448
4449
4450 /**
4451 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4452
4453 Writes current value of Instruction Breakpoint Register specified by Index.
4454 The Instruction Breakpoint Registers are used in pairs. The even numbered
4455 registers contain breakpoint addresses, and odd numbered registers contain
4456 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4457 on all processor models. Implemented registers are contiguous starting with
4458 register 0. No parameter checking is performed on Index. If the Index value
4459 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4460 occur. The caller must either guarantee that Index is valid, or the caller must
4461 set up fault handlers to catch the faults.
4462 This function is only available on Itanium processors.
4463
4464 @param Index The 8-bit Instruction Breakpoint Register index to write.
4465 @param Value The 64-bit value to write to IBR.
4466
4467 @return The 64-bit value written to the IBR.
4468
4469 **/
4470 UINT64
4471 EFIAPI
4472 AsmWriteIbr (
4473 IN UINT8 Index,
4474 IN UINT64 Value
4475 );
4476
4477
4478 /**
4479 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4480
4481 Writes current value of Data Breakpoint Register specified by Index.
4482 The Data Breakpoint Registers are used in pairs. The even numbered registers
4483 contain breakpoint addresses, and odd numbered registers contain breakpoint
4484 mask conditions. At least 4 data registers pairs are implemented on all processor
4485 models. Implemented registers are contiguous starting with register 0. No parameter
4486 checking is performed on Index. If the Index value is beyond the implemented
4487 DBR register range, a Reserved Register/Field fault may occur. The caller must
4488 either guarantee that Index is valid, or the caller must set up fault handlers to
4489 catch the faults.
4490 This function is only available on Itanium processors.
4491
4492 @param Index The 8-bit Data Breakpoint Register index to write.
4493 @param Value The 64-bit value to write to DBR.
4494
4495 @return The 64-bit value written to the DBR.
4496
4497 **/
4498 UINT64
4499 EFIAPI
4500 AsmWriteDbr (
4501 IN UINT8 Index,
4502 IN UINT64 Value
4503 );
4504
4505
4506 /**
4507 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4508
4509 Writes current value of Performance Monitor Configuration Register specified by Index.
4510 All processor implementations provide at least 4 performance counters
4511 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
4512 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4513 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4514 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4515 dependent. No parameter checking is performed on Index. If the Index value is
4516 beyond the implemented PMC register range, the write is ignored.
4517 This function is only available on Itanium processors.
4518
4519 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4520 @param Value The 64-bit value to write to PMC.
4521
4522 @return The 64-bit value written to the PMC.
4523
4524 **/
4525 UINT64
4526 EFIAPI
4527 AsmWritePmc (
4528 IN UINT8 Index,
4529 IN UINT64 Value
4530 );
4531
4532
4533 /**
4534 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4535
4536 Writes current value of Performance Monitor Data Register specified by Index.
4537 All processor implementations provide at least 4 performance counters
4538 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4539 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4540 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4541 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4542 is implementation dependent. No parameter checking is performed on Index. If the
4543 Index value is beyond the implemented PMD register range, the write is ignored.
4544 This function is only available on Itanium processors.
4545
4546 @param Index The 8-bit Performance Monitor Data Register index to write.
4547 @param Value The 64-bit value to write to PMD.
4548
4549 @return The 64-bit value written to the PMD.
4550
4551 **/
4552 UINT64
4553 EFIAPI
4554 AsmWritePmd (
4555 IN UINT8 Index,
4556 IN UINT64 Value
4557 );
4558
4559
4560 /**
4561 Reads the current value of 64-bit Global Pointer (GP).
4562
4563 Reads and returns the current value of GP.
4564 This function is only available on Itanium processors.
4565
4566 @return The current value of GP.
4567
4568 **/
4569 UINT64
4570 EFIAPI
4571 AsmReadGp (
4572 VOID
4573 );
4574
4575
4576 /**
4577 Write the current value of 64-bit Global Pointer (GP).
4578
4579 Writes the current value of GP. The 64-bit value written to the GP is returned.
4580 No parameter checking is performed on Value.
4581 This function is only available on Itanium processors.
4582
4583 @param Value The 64-bit value to write to GP.
4584
4585 @return The 64-bit value written to the GP.
4586
4587 **/
4588 UINT64
4589 EFIAPI
4590 AsmWriteGp (
4591 IN UINT64 Value
4592 );
4593
4594
4595 /**
4596 Reads the current value of 64-bit Stack Pointer (SP).
4597
4598 Reads and returns the current value of SP.
4599 This function is only available on Itanium processors.
4600
4601 @return The current value of SP.
4602
4603 **/
4604 UINT64
4605 EFIAPI
4606 AsmReadSp (
4607 VOID
4608 );
4609
4610
4611 ///
4612 /// Valid Index value for AsmReadControlRegister()
4613 ///
4614 #define IPF_CONTROL_REGISTER_DCR 0
4615 #define IPF_CONTROL_REGISTER_ITM 1
4616 #define IPF_CONTROL_REGISTER_IVA 2
4617 #define IPF_CONTROL_REGISTER_PTA 8
4618 #define IPF_CONTROL_REGISTER_IPSR 16
4619 #define IPF_CONTROL_REGISTER_ISR 17
4620 #define IPF_CONTROL_REGISTER_IIP 19
4621 #define IPF_CONTROL_REGISTER_IFA 20
4622 #define IPF_CONTROL_REGISTER_ITIR 21
4623 #define IPF_CONTROL_REGISTER_IIPA 22
4624 #define IPF_CONTROL_REGISTER_IFS 23
4625 #define IPF_CONTROL_REGISTER_IIM 24
4626 #define IPF_CONTROL_REGISTER_IHA 25
4627 #define IPF_CONTROL_REGISTER_LID 64
4628 #define IPF_CONTROL_REGISTER_IVR 65
4629 #define IPF_CONTROL_REGISTER_TPR 66
4630 #define IPF_CONTROL_REGISTER_EOI 67
4631 #define IPF_CONTROL_REGISTER_IRR0 68
4632 #define IPF_CONTROL_REGISTER_IRR1 69
4633 #define IPF_CONTROL_REGISTER_IRR2 70
4634 #define IPF_CONTROL_REGISTER_IRR3 71
4635 #define IPF_CONTROL_REGISTER_ITV 72
4636 #define IPF_CONTROL_REGISTER_PMV 73
4637 #define IPF_CONTROL_REGISTER_CMCV 74
4638 #define IPF_CONTROL_REGISTER_LRR0 80
4639 #define IPF_CONTROL_REGISTER_LRR1 81
4640
4641 /**
4642 Reads a 64-bit control register.
4643
4644 Reads and returns the control register specified by Index. The valid Index valued are defined
4645 above in "Related Definitions".
4646 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.
4647
4648 @param Index The index of the control register to read.
4649
4650 @return The control register specified by Index.
4651
4652 **/
4653 UINT64
4654 EFIAPI
4655 AsmReadControlRegister (
4656 IN UINT64 Index
4657 );
4658
4659
4660 ///
4661 /// Valid Index value for AsmReadApplicationRegister()
4662 ///
4663 #define IPF_APPLICATION_REGISTER_K0 0
4664 #define IPF_APPLICATION_REGISTER_K1 1
4665 #define IPF_APPLICATION_REGISTER_K2 2
4666 #define IPF_APPLICATION_REGISTER_K3 3
4667 #define IPF_APPLICATION_REGISTER_K4 4
4668 #define IPF_APPLICATION_REGISTER_K5 5
4669 #define IPF_APPLICATION_REGISTER_K6 6
4670 #define IPF_APPLICATION_REGISTER_K7 7
4671 #define IPF_APPLICATION_REGISTER_RSC 16
4672 #define IPF_APPLICATION_REGISTER_BSP 17
4673 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4674 #define IPF_APPLICATION_REGISTER_RNAT 19
4675 #define IPF_APPLICATION_REGISTER_FCR 21
4676 #define IPF_APPLICATION_REGISTER_EFLAG 24
4677 #define IPF_APPLICATION_REGISTER_CSD 25
4678 #define IPF_APPLICATION_REGISTER_SSD 26
4679 #define IPF_APPLICATION_REGISTER_CFLG 27
4680 #define IPF_APPLICATION_REGISTER_FSR 28
4681 #define IPF_APPLICATION_REGISTER_FIR 29
4682 #define IPF_APPLICATION_REGISTER_FDR 30
4683 #define IPF_APPLICATION_REGISTER_CCV 32
4684 #define IPF_APPLICATION_REGISTER_UNAT 36
4685 #define IPF_APPLICATION_REGISTER_FPSR 40
4686 #define IPF_APPLICATION_REGISTER_ITC 44
4687 #define IPF_APPLICATION_REGISTER_PFS 64
4688 #define IPF_APPLICATION_REGISTER_LC 65
4689 #define IPF_APPLICATION_REGISTER_EC 66
4690
4691 /**
4692 Reads a 64-bit application register.
4693
4694 Reads and returns the application register specified by Index. The valid Index valued are defined
4695 above in "Related Definitions".
4696 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.
4697
4698 @param Index The index of the application register to read.
4699
4700 @return The application register specified by Index.
4701
4702 **/
4703 UINT64
4704 EFIAPI
4705 AsmReadApplicationRegister (
4706 IN UINT64 Index
4707 );
4708
4709
4710 /**
4711 Reads the current value of a Machine Specific Register (MSR).
4712
4713 Reads and returns the current value of the Machine Specific Register specified by Index. No
4714 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4715 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4716 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4717 only available on Itanium processors.
4718
4719 @param Index The 8-bit Machine Specific Register index to read.
4720
4721 @return The current value of the Machine Specific Register specified by Index.
4722
4723 **/
4724 UINT64
4725 EFIAPI
4726 AsmReadMsr (
4727 IN UINT8 Index
4728 );
4729
4730
4731 /**
4732 Writes the current value of a Machine Specific Register (MSR).
4733
4734 Writes Value to the Machine Specific Register specified by Index. Value is returned. No
4735 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4736 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4737 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4738 only available on Itanium processors.
4739
4740 @param Index The 8-bit Machine Specific Register index to write.
4741 @param Value The 64-bit value to write to the Machine Specific Register.
4742
4743 @return The 64-bit value to write to the Machine Specific Register.
4744
4745 **/
4746 UINT64
4747 EFIAPI
4748 AsmWriteMsr (
4749 IN UINT8 Index,
4750 IN UINT64 Value
4751 );
4752
4753
4754 /**
4755 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4756
4757 Determines the current execution mode of the CPU.
4758 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4759 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4760 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4761 and -1 is returned.
4762 This function is only available on Itanium processors.
4763
4764 @retval 1 The CPU is in virtual mode.
4765 @retval 0 The CPU is in physical mode.
4766 @retval -1 The CPU is in mixed mode.
4767
4768 **/
4769 INT64
4770 EFIAPI
4771 AsmCpuVirtual (
4772 VOID
4773 );
4774
4775
4776 /**
4777 Makes a PAL procedure call.
4778
4779 This is a wrapper function to make a PAL procedure call. Based on the Index
4780 value this API will make static or stacked PAL call. The following table
4781 describes the usage of PAL Procedure Index Assignment. Architected procedures
4782 may be designated as required or optional. If a PAL procedure is specified
4783 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4784 Status field of the PAL_CALL_RETURN structure.
4785 This indicates that the procedure is not present in this PAL implementation.
4786 It is the caller's responsibility to check for this return code after calling
4787 any optional PAL procedure.
4788 No parameter checking is performed on the 5 input parameters, but there are
4789 some common rules that the caller should follow when making a PAL call. Any
4790 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4791 Unaligned addresses may cause undefined results. For those parameters defined
4792 as reserved or some fields defined as reserved must be zero filled or the invalid
4793 argument return value may be returned or undefined result may occur during the
4794 execution of the procedure. If the PalEntryPoint does not point to a valid
4795 PAL entry point then the system behavior is undefined. This function is only
4796 available on Itanium processors.
4797
4798 @param PalEntryPoint The PAL procedure calls entry point.
4799 @param Index The PAL procedure Index number.
4800 @param Arg2 The 2nd parameter for PAL procedure calls.
4801 @param Arg3 The 3rd parameter for PAL procedure calls.
4802 @param Arg4 The 4th parameter for PAL procedure calls.
4803
4804 @return structure returned from the PAL Call procedure, including the status and return value.
4805
4806 **/
4807 PAL_CALL_RETURN
4808 EFIAPI
4809 AsmPalCall (
4810 IN UINT64 PalEntryPoint,
4811 IN UINT64 Index,
4812 IN UINT64 Arg2,
4813 IN UINT64 Arg3,
4814 IN UINT64 Arg4
4815 );
4816 #endif
4817
4818 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4819 ///
4820 /// IA32 and x64 Specific Functions
4821 /// Byte packed structure for 16-bit Real Mode EFLAGS
4822 ///
4823 typedef union {
4824 struct {
4825 UINT32 CF:1; ///< Carry Flag
4826 UINT32 Reserved_0:1; ///< Reserved
4827 UINT32 PF:1; ///< Parity Flag
4828 UINT32 Reserved_1:1; ///< Reserved
4829 UINT32 AF:1; ///< Auxiliary Carry Flag
4830 UINT32 Reserved_2:1; ///< Reserved
4831 UINT32 ZF:1; ///< Zero Flag
4832 UINT32 SF:1; ///< Sign Flag
4833 UINT32 TF:1; ///< Trap Flag
4834 UINT32 IF:1; ///< Interrupt Enable Flag
4835 UINT32 DF:1; ///< Direction Flag
4836 UINT32 OF:1; ///< Overflow Flag
4837 UINT32 IOPL:2; ///< I/O Privilege Level
4838 UINT32 NT:1; ///< Nested Task
4839 UINT32 Reserved_3:1; ///< Reserved
4840 } Bits;
4841 UINT16 Uint16;
4842 } IA32_FLAGS16;
4843
4844 ///
4845 /// Byte packed structure for EFLAGS/RFLAGS
4846 /// 32-bits on IA-32
4847 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4848 ///
4849 typedef union {
4850 struct {
4851 UINT32 CF:1; ///< Carry Flag
4852 UINT32 Reserved_0:1; ///< Reserved
4853 UINT32 PF:1; ///< Parity Flag
4854 UINT32 Reserved_1:1; ///< Reserved
4855 UINT32 AF:1; ///< Auxiliary Carry Flag
4856 UINT32 Reserved_2:1; ///< Reserved
4857 UINT32 ZF:1; ///< Zero Flag
4858 UINT32 SF:1; ///< Sign Flag
4859 UINT32 TF:1; ///< Trap Flag
4860 UINT32 IF:1; ///< Interrupt Enable Flag
4861 UINT32 DF:1; ///< Direction Flag
4862 UINT32 OF:1; ///< Overflow Flag
4863 UINT32 IOPL:2; ///< I/O Privilege Level
4864 UINT32 NT:1; ///< Nested Task
4865 UINT32 Reserved_3:1; ///< Reserved
4866 UINT32 RF:1; ///< Resume Flag
4867 UINT32 VM:1; ///< Virtual 8086 Mode
4868 UINT32 AC:1; ///< Alignment Check
4869 UINT32 VIF:1; ///< Virtual Interrupt Flag
4870 UINT32 VIP:1; ///< Virtual Interrupt Pending
4871 UINT32 ID:1; ///< ID Flag
4872 UINT32 Reserved_4:10; ///< Reserved
4873 } Bits;
4874 UINTN UintN;
4875 } IA32_EFLAGS32;
4876
4877 ///
4878 /// Byte packed structure for Control Register 0 (CR0)
4879 /// 32-bits on IA-32
4880 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4881 ///
4882 typedef union {
4883 struct {
4884 UINT32 PE:1; ///< Protection Enable
4885 UINT32 MP:1; ///< Monitor Coprocessor
4886 UINT32 EM:1; ///< Emulation
4887 UINT32 TS:1; ///< Task Switched
4888 UINT32 ET:1; ///< Extension Type
4889 UINT32 NE:1; ///< Numeric Error
4890 UINT32 Reserved_0:10; ///< Reserved
4891 UINT32 WP:1; ///< Write Protect
4892 UINT32 Reserved_1:1; ///< Reserved
4893 UINT32 AM:1; ///< Alignment Mask
4894 UINT32 Reserved_2:10; ///< Reserved
4895 UINT32 NW:1; ///< Mot Write-through
4896 UINT32 CD:1; ///< Cache Disable
4897 UINT32 PG:1; ///< Paging
4898 } Bits;
4899 UINTN UintN;
4900 } IA32_CR0;
4901
4902 ///
4903 /// Byte packed structure for Control Register 4 (CR4)
4904 /// 32-bits on IA-32
4905 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4906 ///
4907 typedef union {
4908 struct {
4909 UINT32 VME:1; ///< Virtual-8086 Mode Extensions
4910 UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts
4911 UINT32 TSD:1; ///< Time Stamp Disable
4912 UINT32 DE:1; ///< Debugging Extensions
4913 UINT32 PSE:1; ///< Page Size Extensions
4914 UINT32 PAE:1; ///< Physical Address Extension
4915 UINT32 MCE:1; ///< Machine Check Enable
4916 UINT32 PGE:1; ///< Page Global Enable
4917 UINT32 PCE:1; ///< Performance Monitoring Counter
4918 ///< Enable
4919 UINT32 OSFXSR:1; ///< Operating System Support for
4920 ///< FXSAVE and FXRSTOR instructions
4921 UINT32 OSXMMEXCPT:1; ///< Operating System Support for
4922 ///< Unmasked SIMD Floating Point
4923 ///< Exceptions
4924 UINT32 Reserved_0:2; ///< Reserved
4925 UINT32 VMXE:1; ///< VMX Enable
4926 UINT32 Reserved_1:18; ///< Reserved
4927 } Bits;
4928 UINTN UintN;
4929 } IA32_CR4;
4930
4931 ///
4932 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor
4933 ///
4934 #pragma pack (1)
4935 typedef struct {
4936 UINT16 Limit;
4937 UINTN Base;
4938 } IA32_DESCRIPTOR;
4939 #pragma pack ()
4940
4941 #define IA32_IDT_GATE_TYPE_TASK 0x85
4942 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
4943 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
4944 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
4945 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
4946
4947
4948 #if defined (MDE_CPU_IA32)
4949 ///
4950 /// Byte packed structure for an IA-32 Interrupt Gate Descriptor
4951 ///
4952 typedef union {
4953 struct {
4954 UINT32 OffsetLow:16; ///< Offset bits 15..0
4955 UINT32 Selector:16; ///< Selector
4956 UINT32 Reserved_0:8; ///< Reserved
4957 UINT32 GateType:8; ///< Gate Type. See #defines above
4958 UINT32 OffsetHigh:16; ///< Offset bits 31..16
4959 } Bits;
4960 UINT64 Uint64;
4961 } IA32_IDT_GATE_DESCRIPTOR;
4962
4963 #endif
4964
4965 #if defined (MDE_CPU_X64)
4966 ///
4967 /// Byte packed structure for an x64 Interrupt Gate Descriptor
4968 ///
4969 typedef union {
4970 struct {
4971 UINT32 OffsetLow:16; ///< Offset bits 15..0
4972 UINT32 Selector:16; ///< Selector
4973 UINT32 Reserved_0:8; ///< Reserved
4974 UINT32 GateType:8; ///< Gate Type. See #defines above
4975 UINT32 OffsetHigh:16; ///< Offset bits 31..16
4976 UINT32 OffsetUpper:32; ///< Offset bits 63..32
4977 UINT32 Reserved_1:32; ///< Reserved
4978 } Bits;
4979 struct {
4980 UINT64 Uint64;
4981 UINT64 Uint64_1;
4982 } Uint128;
4983 } IA32_IDT_GATE_DESCRIPTOR;
4984
4985 #endif
4986
4987 ///
4988 /// Byte packed structure for an FP/SSE/SSE2 context
4989 ///
4990 typedef struct {
4991 UINT8 Buffer[512];
4992 } IA32_FX_BUFFER;
4993
4994 ///
4995 /// Structures for the 16-bit real mode thunks
4996 ///
4997 typedef struct {
4998 UINT32 Reserved1;
4999 UINT32 Reserved2;
5000 UINT32 Reserved3;
5001 UINT32 Reserved4;
5002 UINT8 BL;
5003 UINT8 BH;
5004 UINT16 Reserved5;
5005 UINT8 DL;
5006 UINT8 DH;
5007 UINT16 Reserved6;
5008 UINT8 CL;
5009 UINT8 CH;
5010 UINT16 Reserved7;
5011 UINT8 AL;
5012 UINT8 AH;
5013 UINT16 Reserved8;
5014 } IA32_BYTE_REGS;
5015
5016 typedef struct {
5017 UINT16 DI;
5018 UINT16 Reserved1;
5019 UINT16 SI;
5020 UINT16 Reserved2;
5021 UINT16 BP;
5022 UINT16 Reserved3;
5023 UINT16 SP;
5024 UINT16 Reserved4;
5025 UINT16 BX;
5026 UINT16 Reserved5;
5027 UINT16 DX;
5028 UINT16 Reserved6;
5029 UINT16 CX;
5030 UINT16 Reserved7;
5031 UINT16 AX;
5032 UINT16 Reserved8;
5033 } IA32_WORD_REGS;
5034
5035 typedef struct {
5036 UINT32 EDI;
5037 UINT32 ESI;
5038 UINT32 EBP;
5039 UINT32 ESP;
5040 UINT32 EBX;
5041 UINT32 EDX;
5042 UINT32 ECX;
5043 UINT32 EAX;
5044 UINT16 DS;
5045 UINT16 ES;
5046 UINT16 FS;
5047 UINT16 GS;
5048 IA32_EFLAGS32 EFLAGS;
5049 UINT32 Eip;
5050 UINT16 CS;
5051 UINT16 SS;
5052 } IA32_DWORD_REGS;
5053
5054 typedef union {
5055 IA32_DWORD_REGS E;
5056 IA32_WORD_REGS X;
5057 IA32_BYTE_REGS H;
5058 } IA32_REGISTER_SET;
5059
5060 ///
5061 /// Byte packed structure for an 16-bit real mode thunks
5062 ///
5063 typedef struct {
5064 IA32_REGISTER_SET *RealModeState;
5065 VOID *RealModeBuffer;
5066 UINT32 RealModeBufferSize;
5067 UINT32 ThunkAttributes;
5068 } THUNK_CONTEXT;
5069
5070 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5071 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5072 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5073
5074 /**
5075 Retrieves CPUID information.
5076
5077 Executes the CPUID instruction with EAX set to the value specified by Index.
5078 This function always returns Index.
5079 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5080 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5081 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5082 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5083 This function is only available on IA-32 and x64.
5084
5085 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5086 instruction.
5087 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5088 instruction. This is an optional parameter that may be NULL.
5089 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5090 instruction. This is an optional parameter that may be NULL.
5091 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5092 instruction. This is an optional parameter that may be NULL.
5093 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5094 instruction. This is an optional parameter that may be NULL.
5095
5096 @return Index.
5097
5098 **/
5099 UINT32
5100 EFIAPI
5101 AsmCpuid (
5102 IN UINT32 Index,
5103 OUT UINT32 *Eax, OPTIONAL
5104 OUT UINT32 *Ebx, OPTIONAL
5105 OUT UINT32 *Ecx, OPTIONAL
5106 OUT UINT32 *Edx OPTIONAL
5107 );
5108
5109
5110 /**
5111 Retrieves CPUID information using an extended leaf identifier.
5112
5113 Executes the CPUID instruction with EAX set to the value specified by Index
5114 and ECX set to the value specified by SubIndex. This function always returns
5115 Index. This function is only available on IA-32 and x64.
5116
5117 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5118 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5119 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5120 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5121
5122 @param Index The 32-bit value to load into EAX prior to invoking the
5123 CPUID instruction.
5124 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5125 CPUID instruction.
5126 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5127 instruction. This is an optional parameter that may be
5128 NULL.
5129 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5130 instruction. This is an optional parameter that may be
5131 NULL.
5132 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5133 instruction. This is an optional parameter that may be
5134 NULL.
5135 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5136 instruction. This is an optional parameter that may be
5137 NULL.
5138
5139 @return Index.
5140
5141 **/
5142 UINT32
5143 EFIAPI
5144 AsmCpuidEx (
5145 IN UINT32 Index,
5146 IN UINT32 SubIndex,
5147 OUT UINT32 *Eax, OPTIONAL
5148 OUT UINT32 *Ebx, OPTIONAL
5149 OUT UINT32 *Ecx, OPTIONAL
5150 OUT UINT32 *Edx OPTIONAL
5151 );
5152
5153
5154 /**
5155 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5156
5157 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5158 and executing a WBINVD instruction. This function is only available on IA-32 and x64.
5159
5160 **/
5161 VOID
5162 EFIAPI
5163 AsmDisableCache (
5164 VOID
5165 );
5166
5167
5168 /**
5169 Perform a WBINVD and clear both the CD and NW bits of CR0.
5170
5171 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5172 bits of CR0 to 0. This function is only available on IA-32 and x64.
5173
5174 **/
5175 VOID
5176 EFIAPI
5177 AsmEnableCache (
5178 VOID
5179 );
5180
5181
5182 /**
5183 Returns the lower 32-bits of a Machine Specific Register(MSR).
5184
5185 Reads and returns the lower 32-bits of the MSR specified by Index.
5186 No parameter checking is performed on Index, and some Index values may cause
5187 CPU exceptions. The caller must either guarantee that Index is valid, or the
5188 caller must set up exception handlers to catch the exceptions. This function
5189 is only available on IA-32 and x64.
5190
5191 @param Index The 32-bit MSR index to read.
5192
5193 @return The lower 32 bits of the MSR identified by Index.
5194
5195 **/
5196 UINT32
5197 EFIAPI
5198 AsmReadMsr32 (
5199 IN UINT32 Index
5200 );
5201
5202
5203 /**
5204 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5205 The upper 32-bits of the MSR are set to zero.
5206
5207 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5208 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5209 the MSR is returned. No parameter checking is performed on Index or Value,
5210 and some of these may cause CPU exceptions. The caller must either guarantee
5211 that Index and Value are valid, or the caller must establish proper exception
5212 handlers. This function is only available on IA-32 and x64.
5213
5214 @param Index The 32-bit MSR index to write.
5215 @param Value The 32-bit value to write to the MSR.
5216
5217 @return Value
5218
5219 **/
5220 UINT32
5221 EFIAPI
5222 AsmWriteMsr32 (
5223 IN UINT32 Index,
5224 IN UINT32 Value
5225 );
5226
5227
5228 /**
5229 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
5230 writes the result back to the 64-bit MSR.
5231
5232 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5233 between the lower 32-bits of the read result and the value specified by
5234 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5235 32-bits of the value written to the MSR is returned. No parameter checking is
5236 performed on Index or OrData, and some of these may cause CPU exceptions. The
5237 caller must either guarantee that Index and OrData are valid, or the caller
5238 must establish proper exception handlers. This function is only available on
5239 IA-32 and x64.
5240
5241 @param Index The 32-bit MSR index to write.
5242 @param OrData The value to OR with the read value from the MSR.
5243
5244 @return The lower 32-bit value written to the MSR.
5245
5246 **/
5247 UINT32
5248 EFIAPI
5249 AsmMsrOr32 (
5250 IN UINT32 Index,
5251 IN UINT32 OrData
5252 );
5253
5254
5255 /**
5256 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5257 the result back to the 64-bit MSR.
5258
5259 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5260 lower 32-bits of the read result and the value specified by AndData, and
5261 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5262 the value written to the MSR is returned. No parameter checking is performed
5263 on Index or AndData, and some of these may cause CPU exceptions. The caller
5264 must either guarantee that Index and AndData are valid, or the caller must
5265 establish proper exception handlers. This function is only available on IA-32
5266 and x64.
5267
5268 @param Index The 32-bit MSR index to write.
5269 @param AndData The value to AND with the read value from the MSR.
5270
5271 @return The lower 32-bit value written to the MSR.
5272
5273 **/
5274 UINT32
5275 EFIAPI
5276 AsmMsrAnd32 (
5277 IN UINT32 Index,
5278 IN UINT32 AndData
5279 );
5280
5281
5282 /**
5283 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
5284 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5285
5286 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5287 lower 32-bits of the read result and the value specified by AndData
5288 preserving the upper 32-bits, performs a bitwise OR between the
5289 result of the AND operation and the value specified by OrData, and writes the
5290 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5291 written to the MSR is returned. No parameter checking is performed on Index,
5292 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5293 must either guarantee that Index, AndData, and OrData are valid, or the
5294 caller must establish proper exception handlers. This function is only
5295 available on IA-32 and x64.
5296
5297 @param Index The 32-bit MSR index to write.
5298 @param AndData The value to AND with the read value from the MSR.
5299 @param OrData The value to OR with the result of the AND operation.
5300
5301 @return The lower 32-bit value written to the MSR.
5302
5303 **/
5304 UINT32
5305 EFIAPI
5306 AsmMsrAndThenOr32 (
5307 IN UINT32 Index,
5308 IN UINT32 AndData,
5309 IN UINT32 OrData
5310 );
5311
5312
5313 /**
5314 Reads a bit field of an MSR.
5315
5316 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5317 specified by the StartBit and the EndBit. The value of the bit field is
5318 returned. The caller must either guarantee that Index is valid, or the caller
5319 must set up exception handlers to catch the exceptions. This function is only
5320 available on IA-32 and x64.
5321
5322 If StartBit is greater than 31, then ASSERT().
5323 If EndBit is greater than 31, then ASSERT().
5324 If EndBit is less than StartBit, then ASSERT().
5325
5326 @param Index The 32-bit MSR index to read.
5327 @param StartBit The ordinal of the least significant bit in the bit field.
5328 Range 0..31.
5329 @param EndBit The ordinal of the most significant bit in the bit field.
5330 Range 0..31.
5331
5332 @return The bit field read from the MSR.
5333
5334 **/
5335 UINT32
5336 EFIAPI
5337 AsmMsrBitFieldRead32 (
5338 IN UINT32 Index,
5339 IN UINTN StartBit,
5340 IN UINTN EndBit
5341 );
5342
5343
5344 /**
5345 Writes a bit field to an MSR.
5346
5347 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5348 field is specified by the StartBit and the EndBit. All other bits in the
5349 destination MSR are preserved. The lower 32-bits of the MSR written is
5350 returned. The caller must either guarantee that Index and the data written
5351 is valid, or the caller must set up exception handlers to catch the exceptions.
5352 This function is only available on IA-32 and x64.
5353
5354 If StartBit is greater than 31, then ASSERT().
5355 If EndBit is greater than 31, then ASSERT().
5356 If EndBit is less than StartBit, then ASSERT().
5357
5358 @param Index The 32-bit MSR index to write.
5359 @param StartBit The ordinal of the least significant bit in the bit field.
5360 Range 0..31.
5361 @param EndBit The ordinal of the most significant bit in the bit field.
5362 Range 0..31.
5363 @param Value New value of the bit field.
5364
5365 @return The lower 32-bit of the value written to the MSR.
5366
5367 **/
5368 UINT32
5369 EFIAPI
5370 AsmMsrBitFieldWrite32 (
5371 IN UINT32 Index,
5372 IN UINTN StartBit,
5373 IN UINTN EndBit,
5374 IN UINT32 Value
5375 );
5376
5377
5378 /**
5379 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5380 result back to the bit field in the 64-bit MSR.
5381
5382 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5383 between the read result and the value specified by OrData, and writes the
5384 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5385 written to the MSR are returned. Extra left bits in OrData are stripped. The
5386 caller must either guarantee that Index and the data written is valid, or
5387 the caller must set up exception handlers to catch the exceptions. This
5388 function is only available on IA-32 and x64.
5389
5390 If StartBit is greater than 31, then ASSERT().
5391 If EndBit is greater than 31, then ASSERT().
5392 If EndBit is less than StartBit, then ASSERT().
5393
5394 @param Index The 32-bit MSR index to write.
5395 @param StartBit The ordinal of the least significant bit in the bit field.
5396 Range 0..31.
5397 @param EndBit The ordinal of the most significant bit in the bit field.
5398 Range 0..31.
5399 @param OrData The value to OR with the read value from the MSR.
5400
5401 @return The lower 32-bit of the value written to the MSR.
5402
5403 **/
5404 UINT32
5405 EFIAPI
5406 AsmMsrBitFieldOr32 (
5407 IN UINT32 Index,
5408 IN UINTN StartBit,
5409 IN UINTN EndBit,
5410 IN UINT32 OrData
5411 );
5412
5413
5414 /**
5415 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5416 result back to the bit field in the 64-bit MSR.
5417
5418 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5419 read result and the value specified by AndData, and writes the result to the
5420 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5421 MSR are returned. Extra left bits in AndData are stripped. The caller must
5422 either guarantee that Index and the data written is valid, or the caller must
5423 set up exception handlers to catch the exceptions. This function is only
5424 available on IA-32 and x64.
5425
5426 If StartBit is greater than 31, then ASSERT().
5427 If EndBit is greater than 31, then ASSERT().
5428 If EndBit is less than StartBit, then ASSERT().
5429
5430 @param Index The 32-bit MSR index to write.
5431 @param StartBit The ordinal of the least significant bit in the bit field.
5432 Range 0..31.
5433 @param EndBit The ordinal of the most significant bit in the bit field.
5434 Range 0..31.
5435 @param AndData The value to AND with the read value from the MSR.
5436
5437 @return The lower 32-bit of the value written to the MSR.
5438
5439 **/
5440 UINT32
5441 EFIAPI
5442 AsmMsrBitFieldAnd32 (
5443 IN UINT32 Index,
5444 IN UINTN StartBit,
5445 IN UINTN EndBit,
5446 IN UINT32 AndData
5447 );
5448
5449
5450 /**
5451 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5452 bitwise OR, and writes the result back to the bit field in the
5453 64-bit MSR.
5454
5455 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5456 bitwise OR between the read result and the value specified by
5457 AndData, and writes the result to the 64-bit MSR specified by Index. The
5458 lower 32-bits of the value written to the MSR are returned. Extra left bits
5459 in both AndData and OrData are stripped. The caller must either guarantee
5460 that Index and the data written is valid, or the caller must set up exception
5461 handlers to catch the exceptions. This function is only available on IA-32
5462 and x64.
5463
5464 If StartBit is greater than 31, then ASSERT().
5465 If EndBit is greater than 31, then ASSERT().
5466 If EndBit is less than StartBit, then ASSERT().
5467
5468 @param Index The 32-bit MSR index to write.
5469 @param StartBit The ordinal of the least significant bit in the bit field.
5470 Range 0..31.
5471 @param EndBit The ordinal of the most significant bit in the bit field.
5472 Range 0..31.
5473 @param AndData The value to AND with the read value from the MSR.
5474 @param OrData The value to OR with the result of the AND operation.
5475
5476 @return The lower 32-bit of the value written to the MSR.
5477
5478 **/
5479 UINT32
5480 EFIAPI
5481 AsmMsrBitFieldAndThenOr32 (
5482 IN UINT32 Index,
5483 IN UINTN StartBit,
5484 IN UINTN EndBit,
5485 IN UINT32 AndData,
5486 IN UINT32 OrData
5487 );
5488
5489
5490 /**
5491 Returns a 64-bit Machine Specific Register(MSR).
5492
5493 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5494 performed on Index, and some Index values may cause CPU exceptions. The
5495 caller must either guarantee that Index is valid, or the caller must set up
5496 exception handlers to catch the exceptions. This function is only available
5497 on IA-32 and x64.
5498
5499 @param Index The 32-bit MSR index to read.
5500
5501 @return The value of the MSR identified by Index.
5502
5503 **/
5504 UINT64
5505 EFIAPI
5506 AsmReadMsr64 (
5507 IN UINT32 Index
5508 );
5509
5510
5511 /**
5512 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5513 value.
5514
5515 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5516 64-bit value written to the MSR is returned. No parameter checking is
5517 performed on Index or Value, and some of these may cause CPU exceptions. The
5518 caller must either guarantee that Index and Value are valid, or the caller
5519 must establish proper exception handlers. This function is only available on
5520 IA-32 and x64.
5521
5522 @param Index The 32-bit MSR index to write.
5523 @param Value The 64-bit value to write to the MSR.
5524
5525 @return Value
5526
5527 **/
5528 UINT64
5529 EFIAPI
5530 AsmWriteMsr64 (
5531 IN UINT32 Index,
5532 IN UINT64 Value
5533 );
5534
5535
5536 /**
5537 Reads a 64-bit MSR, performs a bitwise OR, and writes the result
5538 back to the 64-bit MSR.
5539
5540 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5541 between the read result and the value specified by OrData, and writes the
5542 result to the 64-bit MSR specified by Index. The value written to the MSR is
5543 returned. No parameter checking is performed on Index or OrData, and some of
5544 these may cause CPU exceptions. The caller must either guarantee that Index
5545 and OrData are valid, or the caller must establish proper exception handlers.
5546 This function is only available on IA-32 and x64.
5547
5548 @param Index The 32-bit MSR index to write.
5549 @param OrData The value to OR with the read value from the MSR.
5550
5551 @return The value written back to the MSR.
5552
5553 **/
5554 UINT64
5555 EFIAPI
5556 AsmMsrOr64 (
5557 IN UINT32 Index,
5558 IN UINT64 OrData
5559 );
5560
5561
5562 /**
5563 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5564 64-bit MSR.
5565
5566 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5567 read result and the value specified by OrData, and writes the result to the
5568 64-bit MSR specified by Index. The value written to the MSR is returned. No
5569 parameter checking is performed on Index or OrData, and some of these may
5570 cause CPU exceptions. The caller must either guarantee that Index and OrData
5571 are valid, or the caller must establish proper exception handlers. This
5572 function is only available on IA-32 and x64.
5573
5574 @param Index The 32-bit MSR index to write.
5575 @param AndData The value to AND with the read value from the MSR.
5576
5577 @return The value written back to the MSR.
5578
5579 **/
5580 UINT64
5581 EFIAPI
5582 AsmMsrAnd64 (
5583 IN UINT32 Index,
5584 IN UINT64 AndData
5585 );
5586
5587
5588 /**
5589 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
5590 OR, and writes the result back to the 64-bit MSR.
5591
5592 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5593 result and the value specified by AndData, performs a bitwise OR
5594 between the result of the AND operation and the value specified by OrData,
5595 and writes the result to the 64-bit MSR specified by Index. The value written
5596 to the MSR is returned. No parameter checking is performed on Index, AndData,
5597 or OrData, and some of these may cause CPU exceptions. The caller must either
5598 guarantee that Index, AndData, and OrData are valid, or the caller must
5599 establish proper exception handlers. This function is only available on IA-32
5600 and x64.
5601
5602 @param Index The 32-bit MSR index to write.
5603 @param AndData The value to AND with the read value from the MSR.
5604 @param OrData The value to OR with the result of the AND operation.
5605
5606 @return The value written back to the MSR.
5607
5608 **/
5609 UINT64
5610 EFIAPI
5611 AsmMsrAndThenOr64 (
5612 IN UINT32 Index,
5613 IN UINT64 AndData,
5614 IN UINT64 OrData
5615 );
5616
5617
5618 /**
5619 Reads a bit field of an MSR.
5620
5621 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5622 StartBit and the EndBit. The value of the bit field is returned. The caller
5623 must either guarantee that Index is valid, or the caller must set up
5624 exception handlers to catch the exceptions. This function is only available
5625 on IA-32 and x64.
5626
5627 If StartBit is greater than 63, then ASSERT().
5628 If EndBit is greater than 63, then ASSERT().
5629 If EndBit is less than StartBit, then ASSERT().
5630
5631 @param Index The 32-bit MSR index to read.
5632 @param StartBit The ordinal of the least significant bit in the bit field.
5633 Range 0..63.
5634 @param EndBit The ordinal of the most significant bit in the bit field.
5635 Range 0..63.
5636
5637 @return The value read from the MSR.
5638
5639 **/
5640 UINT64
5641 EFIAPI
5642 AsmMsrBitFieldRead64 (
5643 IN UINT32 Index,
5644 IN UINTN StartBit,
5645 IN UINTN EndBit
5646 );
5647
5648
5649 /**
5650 Writes a bit field to an MSR.
5651
5652 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5653 the StartBit and the EndBit. All other bits in the destination MSR are
5654 preserved. The MSR written is returned. The caller must either guarantee
5655 that Index and the data written is valid, or the caller must set up exception
5656 handlers to catch the exceptions. This function is only available on IA-32 and x64.
5657
5658 If StartBit is greater than 63, then ASSERT().
5659 If EndBit is greater than 63, then ASSERT().
5660 If EndBit is less than StartBit, then ASSERT().
5661
5662 @param Index The 32-bit MSR index to write.
5663 @param StartBit The ordinal of the least significant bit in the bit field.
5664 Range 0..63.
5665 @param EndBit The ordinal of the most significant bit in the bit field.
5666 Range 0..63.
5667 @param Value New value of the bit field.
5668
5669 @return The value written back to the MSR.
5670
5671 **/
5672 UINT64
5673 EFIAPI
5674 AsmMsrBitFieldWrite64 (
5675 IN UINT32 Index,
5676 IN UINTN StartBit,
5677 IN UINTN EndBit,
5678 IN UINT64 Value
5679 );
5680
5681
5682 /**
5683 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
5684 writes the result back to the bit field in the 64-bit MSR.
5685
5686 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5687 between the read result and the value specified by OrData, and writes the
5688 result to the 64-bit MSR specified by Index. The value written to the MSR is
5689 returned. Extra left bits in OrData are stripped. The caller must either
5690 guarantee that Index and the data written is valid, or the caller must set up
5691 exception handlers to catch the exceptions. This function is only available
5692 on IA-32 and x64.
5693
5694 If StartBit is greater than 63, then ASSERT().
5695 If EndBit is greater than 63, then ASSERT().
5696 If EndBit is less than StartBit, then ASSERT().
5697
5698 @param Index The 32-bit MSR index to write.
5699 @param StartBit The ordinal of the least significant bit in the bit field.
5700 Range 0..63.
5701 @param EndBit The ordinal of the most significant bit in the bit field.
5702 Range 0..63.
5703 @param OrData The value to OR with the read value from the bit field.
5704
5705 @return The value written back to the MSR.
5706
5707 **/
5708 UINT64
5709 EFIAPI
5710 AsmMsrBitFieldOr64 (
5711 IN UINT32 Index,
5712 IN UINTN StartBit,
5713 IN UINTN EndBit,
5714 IN UINT64 OrData
5715 );
5716
5717
5718 /**
5719 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5720 result back to the bit field in the 64-bit MSR.
5721
5722 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5723 read result and the value specified by AndData, and writes the result to the
5724 64-bit MSR specified by Index. The value written to the MSR is returned.
5725 Extra left bits in AndData are stripped. The caller must either guarantee
5726 that Index and the data written is valid, or the caller must set up exception
5727 handlers to catch the exceptions. This function is only available on IA-32
5728 and x64.
5729
5730 If StartBit is greater than 63, then ASSERT().
5731 If EndBit is greater than 63, then ASSERT().
5732 If EndBit is less than StartBit, then ASSERT().
5733
5734 @param Index The 32-bit MSR index to write.
5735 @param StartBit The ordinal of the least significant bit in the bit field.
5736 Range 0..63.
5737 @param EndBit The ordinal of the most significant bit in the bit field.
5738 Range 0..63.
5739 @param AndData The value to AND with the read value from the bit field.
5740
5741 @return The value written back to the MSR.
5742
5743 **/
5744 UINT64
5745 EFIAPI
5746 AsmMsrBitFieldAnd64 (
5747 IN UINT32 Index,
5748 IN UINTN StartBit,
5749 IN UINTN EndBit,
5750 IN UINT64 AndData
5751 );
5752
5753
5754 /**
5755 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5756 bitwise OR, and writes the result back to the bit field in the
5757 64-bit MSR.
5758
5759 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5760 a bitwise OR between the read result and the value specified by
5761 AndData, and writes the result to the 64-bit MSR specified by Index. The
5762 value written to the MSR is returned. Extra left bits in both AndData and
5763 OrData are stripped. The caller must either guarantee that Index and the data
5764 written is valid, or the caller must set up exception handlers to catch the
5765 exceptions. This function is only available on IA-32 and x64.
5766
5767 If StartBit is greater than 63, then ASSERT().
5768 If EndBit is greater than 63, then ASSERT().
5769 If EndBit is less than StartBit, then ASSERT().
5770
5771 @param Index The 32-bit MSR index to write.
5772 @param StartBit The ordinal of the least significant bit in the bit field.
5773 Range 0..63.
5774 @param EndBit The ordinal of the most significant bit in the bit field.
5775 Range 0..63.
5776 @param AndData The value to AND with the read value from the bit field.
5777 @param OrData The value to OR with the result of the AND operation.
5778
5779 @return The value written back to the MSR.
5780
5781 **/
5782 UINT64
5783 EFIAPI
5784 AsmMsrBitFieldAndThenOr64 (
5785 IN UINT32 Index,
5786 IN UINTN StartBit,
5787 IN UINTN EndBit,
5788 IN UINT64 AndData,
5789 IN UINT64 OrData
5790 );
5791
5792
5793 /**
5794 Reads the current value of the EFLAGS register.
5795
5796 Reads and returns the current value of the EFLAGS register. This function is
5797 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
5798 64-bit value on x64.
5799
5800 @return EFLAGS on IA-32 or RFLAGS on x64.
5801
5802 **/
5803 UINTN
5804 EFIAPI
5805 AsmReadEflags (
5806 VOID
5807 );
5808
5809
5810 /**
5811 Reads the current value of the Control Register 0 (CR0).
5812
5813 Reads and returns the current value of CR0. This function is only available
5814 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5815 x64.
5816
5817 @return The value of the Control Register 0 (CR0).
5818
5819 **/
5820 UINTN
5821 EFIAPI
5822 AsmReadCr0 (
5823 VOID
5824 );
5825
5826
5827 /**
5828 Reads the current value of the Control Register 2 (CR2).
5829
5830 Reads and returns the current value of CR2. This function is only available
5831 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5832 x64.
5833
5834 @return The value of the Control Register 2 (CR2).
5835
5836 **/
5837 UINTN
5838 EFIAPI
5839 AsmReadCr2 (
5840 VOID
5841 );
5842
5843
5844 /**
5845 Reads the current value of the Control Register 3 (CR3).
5846
5847 Reads and returns the current value of CR3. This function is only available
5848 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5849 x64.
5850
5851 @return The value of the Control Register 3 (CR3).
5852
5853 **/
5854 UINTN
5855 EFIAPI
5856 AsmReadCr3 (
5857 VOID
5858 );
5859
5860
5861 /**
5862 Reads the current value of the Control Register 4 (CR4).
5863
5864 Reads and returns the current value of CR4. This function is only available
5865 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5866 x64.
5867
5868 @return The value of the Control Register 4 (CR4).
5869
5870 **/
5871 UINTN
5872 EFIAPI
5873 AsmReadCr4 (
5874 VOID
5875 );
5876
5877
5878 /**
5879 Writes a value to Control Register 0 (CR0).
5880
5881 Writes and returns a new value to CR0. This function is only available on
5882 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5883
5884 @param Cr0 The value to write to CR0.
5885
5886 @return The value written to CR0.
5887
5888 **/
5889 UINTN
5890 EFIAPI
5891 AsmWriteCr0 (
5892 UINTN Cr0
5893 );
5894
5895
5896 /**
5897 Writes a value to Control Register 2 (CR2).
5898
5899 Writes and returns a new value to CR2. This function is only available on
5900 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5901
5902 @param Cr2 The value to write to CR2.
5903
5904 @return The value written to CR2.
5905
5906 **/
5907 UINTN
5908 EFIAPI
5909 AsmWriteCr2 (
5910 UINTN Cr2
5911 );
5912
5913
5914 /**
5915 Writes a value to Control Register 3 (CR3).
5916
5917 Writes and returns a new value to CR3. This function is only available on
5918 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5919
5920 @param Cr3 The value to write to CR3.
5921
5922 @return The value written to CR3.
5923
5924 **/
5925 UINTN
5926 EFIAPI
5927 AsmWriteCr3 (
5928 UINTN Cr3
5929 );
5930
5931
5932 /**
5933 Writes a value to Control Register 4 (CR4).
5934
5935 Writes and returns a new value to CR4. This function is only available on
5936 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5937
5938 @param Cr4 The value to write to CR4.
5939
5940 @return The value written to CR4.
5941
5942 **/
5943 UINTN
5944 EFIAPI
5945 AsmWriteCr4 (
5946 UINTN Cr4
5947 );
5948
5949
5950 /**
5951 Reads the current value of Debug Register 0 (DR0).
5952
5953 Reads and returns the current value of DR0. This function is only available
5954 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5955 x64.
5956
5957 @return The value of Debug Register 0 (DR0).
5958
5959 **/
5960 UINTN
5961 EFIAPI
5962 AsmReadDr0 (
5963 VOID
5964 );
5965
5966
5967 /**
5968 Reads the current value of Debug Register 1 (DR1).
5969
5970 Reads and returns the current value of DR1. This function is only available
5971 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5972 x64.
5973
5974 @return The value of Debug Register 1 (DR1).
5975
5976 **/
5977 UINTN
5978 EFIAPI
5979 AsmReadDr1 (
5980 VOID
5981 );
5982
5983
5984 /**
5985 Reads the current value of Debug Register 2 (DR2).
5986
5987 Reads and returns the current value of DR2. This function is only available
5988 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5989 x64.
5990
5991 @return The value of Debug Register 2 (DR2).
5992
5993 **/
5994 UINTN
5995 EFIAPI
5996 AsmReadDr2 (
5997 VOID
5998 );
5999
6000
6001 /**
6002 Reads the current value of Debug Register 3 (DR3).
6003
6004 Reads and returns the current value of DR3. This function is only available
6005 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6006 x64.
6007
6008 @return The value of Debug Register 3 (DR3).
6009
6010 **/
6011 UINTN
6012 EFIAPI
6013 AsmReadDr3 (
6014 VOID
6015 );
6016
6017
6018 /**
6019 Reads the current value of Debug Register 4 (DR4).
6020
6021 Reads and returns the current value of DR4. This function is only available
6022 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6023 x64.
6024
6025 @return The value of Debug Register 4 (DR4).
6026
6027 **/
6028 UINTN
6029 EFIAPI
6030 AsmReadDr4 (
6031 VOID
6032 );
6033
6034
6035 /**
6036 Reads the current value of Debug Register 5 (DR5).
6037
6038 Reads and returns the current value of DR5. This function is only available
6039 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6040 x64.
6041
6042 @return The value of Debug Register 5 (DR5).
6043
6044 **/
6045 UINTN
6046 EFIAPI
6047 AsmReadDr5 (
6048 VOID
6049 );
6050
6051
6052 /**
6053 Reads the current value of Debug Register 6 (DR6).
6054
6055 Reads and returns the current value of DR6. This function is only available
6056 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6057 x64.
6058
6059 @return The value of Debug Register 6 (DR6).
6060
6061 **/
6062 UINTN
6063 EFIAPI
6064 AsmReadDr6 (
6065 VOID
6066 );
6067
6068
6069 /**
6070 Reads the current value of Debug Register 7 (DR7).
6071
6072 Reads and returns the current value of DR7. This function is only available
6073 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6074 x64.
6075
6076 @return The value of Debug Register 7 (DR7).
6077
6078 **/
6079 UINTN
6080 EFIAPI
6081 AsmReadDr7 (
6082 VOID
6083 );
6084
6085
6086 /**
6087 Writes a value to Debug Register 0 (DR0).
6088
6089 Writes and returns a new value to DR0. This function is only available on
6090 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6091
6092 @param Dr0 The value to write to Dr0.
6093
6094 @return The value written to Debug Register 0 (DR0).
6095
6096 **/
6097 UINTN
6098 EFIAPI
6099 AsmWriteDr0 (
6100 UINTN Dr0
6101 );
6102
6103
6104 /**
6105 Writes a value to Debug Register 1 (DR1).
6106
6107 Writes and returns a new value to DR1. This function is only available on
6108 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6109
6110 @param Dr1 The value to write to Dr1.
6111
6112 @return The value written to Debug Register 1 (DR1).
6113
6114 **/
6115 UINTN
6116 EFIAPI
6117 AsmWriteDr1 (
6118 UINTN Dr1
6119 );
6120
6121
6122 /**
6123 Writes a value to Debug Register 2 (DR2).
6124
6125 Writes and returns a new value to DR2. This function is only available on
6126 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6127
6128 @param Dr2 The value to write to Dr2.
6129
6130 @return The value written to Debug Register 2 (DR2).
6131
6132 **/
6133 UINTN
6134 EFIAPI
6135 AsmWriteDr2 (
6136 UINTN Dr2
6137 );
6138
6139
6140 /**
6141 Writes a value to Debug Register 3 (DR3).
6142
6143 Writes and returns a new value to DR3. This function is only available on
6144 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6145
6146 @param Dr3 The value to write to Dr3.
6147
6148 @return The value written to Debug Register 3 (DR3).
6149
6150 **/
6151 UINTN
6152 EFIAPI
6153 AsmWriteDr3 (
6154 UINTN Dr3
6155 );
6156
6157
6158 /**
6159 Writes a value to Debug Register 4 (DR4).
6160
6161 Writes and returns a new value to DR4. This function is only available on
6162 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6163
6164 @param Dr4 The value to write to Dr4.
6165
6166 @return The value written to Debug Register 4 (DR4).
6167
6168 **/
6169 UINTN
6170 EFIAPI
6171 AsmWriteDr4 (
6172 UINTN Dr4
6173 );
6174
6175
6176 /**
6177 Writes a value to Debug Register 5 (DR5).
6178
6179 Writes and returns a new value to DR5. This function is only available on
6180 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6181
6182 @param Dr5 The value to write to Dr5.
6183
6184 @return The value written to Debug Register 5 (DR5).
6185
6186 **/
6187 UINTN
6188 EFIAPI
6189 AsmWriteDr5 (
6190 UINTN Dr5
6191 );
6192
6193
6194 /**
6195 Writes a value to Debug Register 6 (DR6).
6196
6197 Writes and returns a new value to DR6. This function is only available on
6198 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6199
6200 @param Dr6 The value to write to Dr6.
6201
6202 @return The value written to Debug Register 6 (DR6).
6203
6204 **/
6205 UINTN
6206 EFIAPI
6207 AsmWriteDr6 (
6208 UINTN Dr6
6209 );
6210
6211
6212 /**
6213 Writes a value to Debug Register 7 (DR7).
6214
6215 Writes and returns a new value to DR7. This function is only available on
6216 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6217
6218 @param Dr7 The value to write to Dr7.
6219
6220 @return The value written to Debug Register 7 (DR7).
6221
6222 **/
6223 UINTN
6224 EFIAPI
6225 AsmWriteDr7 (
6226 UINTN Dr7
6227 );
6228
6229
6230 /**
6231 Reads the current value of Code Segment Register (CS).
6232
6233 Reads and returns the current value of CS. This function is only available on
6234 IA-32 and x64.
6235
6236 @return The current value of CS.
6237
6238 **/
6239 UINT16
6240 EFIAPI
6241 AsmReadCs (
6242 VOID
6243 );
6244
6245
6246 /**
6247 Reads the current value of Data Segment Register (DS).
6248
6249 Reads and returns the current value of DS. This function is only available on
6250 IA-32 and x64.
6251
6252 @return The current value of DS.
6253
6254 **/
6255 UINT16
6256 EFIAPI
6257 AsmReadDs (
6258 VOID
6259 );
6260
6261
6262 /**
6263 Reads the current value of Extra Segment Register (ES).
6264
6265 Reads and returns the current value of ES. This function is only available on
6266 IA-32 and x64.
6267
6268 @return The current value of ES.
6269
6270 **/
6271 UINT16
6272 EFIAPI
6273 AsmReadEs (
6274 VOID
6275 );
6276
6277
6278 /**
6279 Reads the current value of FS Data Segment Register (FS).
6280
6281 Reads and returns the current value of FS. This function is only available on
6282 IA-32 and x64.
6283
6284 @return The current value of FS.
6285
6286 **/
6287 UINT16
6288 EFIAPI
6289 AsmReadFs (
6290 VOID
6291 );
6292
6293
6294 /**
6295 Reads the current value of GS Data Segment Register (GS).
6296
6297 Reads and returns the current value of GS. This function is only available on
6298 IA-32 and x64.
6299
6300 @return The current value of GS.
6301
6302 **/
6303 UINT16
6304 EFIAPI
6305 AsmReadGs (
6306 VOID
6307 );
6308
6309
6310 /**
6311 Reads the current value of Stack Segment Register (SS).
6312
6313 Reads and returns the current value of SS. This function is only available on
6314 IA-32 and x64.
6315
6316 @return The current value of SS.
6317
6318 **/
6319 UINT16
6320 EFIAPI
6321 AsmReadSs (
6322 VOID
6323 );
6324
6325
6326 /**
6327 Reads the current value of Task Register (TR).
6328
6329 Reads and returns the current value of TR. This function is only available on
6330 IA-32 and x64.
6331
6332 @return The current value of TR.
6333
6334 **/
6335 UINT16
6336 EFIAPI
6337 AsmReadTr (
6338 VOID
6339 );
6340
6341
6342 /**
6343 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6344
6345 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6346 function is only available on IA-32 and x64.
6347
6348 If Gdtr is NULL, then ASSERT().
6349
6350 @param Gdtr Pointer to a GDTR descriptor.
6351
6352 **/
6353 VOID
6354 EFIAPI
6355 AsmReadGdtr (
6356 OUT IA32_DESCRIPTOR *Gdtr
6357 );
6358
6359
6360 /**
6361 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6362
6363 Writes and the current GDTR descriptor specified by Gdtr. This function is
6364 only available on IA-32 and x64.
6365
6366 If Gdtr is NULL, then ASSERT().
6367
6368 @param Gdtr Pointer to a GDTR descriptor.
6369
6370 **/
6371 VOID
6372 EFIAPI
6373 AsmWriteGdtr (
6374 IN CONST IA32_DESCRIPTOR *Gdtr
6375 );
6376
6377
6378 /**
6379 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6380
6381 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6382 function is only available on IA-32 and x64.
6383
6384 If Idtr is NULL, then ASSERT().
6385
6386 @param Idtr Pointer to a IDTR descriptor.
6387
6388 **/
6389 VOID
6390 EFIAPI
6391 AsmReadIdtr (
6392 OUT IA32_DESCRIPTOR *Idtr
6393 );
6394
6395
6396 /**
6397 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6398
6399 Writes the current IDTR descriptor and returns it in Idtr. This function is
6400 only available on IA-32 and x64.
6401
6402 If Idtr is NULL, then ASSERT().
6403
6404 @param Idtr Pointer to a IDTR descriptor.
6405
6406 **/
6407 VOID
6408 EFIAPI
6409 AsmWriteIdtr (
6410 IN CONST IA32_DESCRIPTOR *Idtr
6411 );
6412
6413
6414 /**
6415 Reads the current Local Descriptor Table Register(LDTR) selector.
6416
6417 Reads and returns the current 16-bit LDTR descriptor value. This function is
6418 only available on IA-32 and x64.
6419
6420 @return The current selector of LDT.
6421
6422 **/
6423 UINT16
6424 EFIAPI
6425 AsmReadLdtr (
6426 VOID
6427 );
6428
6429
6430 /**
6431 Writes the current Local Descriptor Table Register (LDTR) selector.
6432
6433 Writes and the current LDTR descriptor specified by Ldtr. This function is
6434 only available on IA-32 and x64.
6435
6436 @param Ldtr 16-bit LDTR selector value.
6437
6438 **/
6439 VOID
6440 EFIAPI
6441 AsmWriteLdtr (
6442 IN UINT16 Ldtr
6443 );
6444
6445
6446 /**
6447 Save the current floating point/SSE/SSE2 context to a buffer.
6448
6449 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6450 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6451 available on IA-32 and x64.
6452
6453 If Buffer is NULL, then ASSERT().
6454 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6455
6456 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6457
6458 **/
6459 VOID
6460 EFIAPI
6461 AsmFxSave (
6462 OUT IA32_FX_BUFFER *Buffer
6463 );
6464
6465
6466 /**
6467 Restores the current floating point/SSE/SSE2 context from a buffer.
6468
6469 Restores the current floating point/SSE/SSE2 state from the buffer specified
6470 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6471 only available on IA-32 and x64.
6472
6473 If Buffer is NULL, then ASSERT().
6474 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6475 If Buffer was not saved with AsmFxSave(), then ASSERT().
6476
6477 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6478
6479 **/
6480 VOID
6481 EFIAPI
6482 AsmFxRestore (
6483 IN CONST IA32_FX_BUFFER *Buffer
6484 );
6485
6486
6487 /**
6488 Reads the current value of 64-bit MMX Register #0 (MM0).
6489
6490 Reads and returns the current value of MM0. This function is only available
6491 on IA-32 and x64.
6492
6493 @return The current value of MM0.
6494
6495 **/
6496 UINT64
6497 EFIAPI
6498 AsmReadMm0 (
6499 VOID
6500 );
6501
6502
6503 /**
6504 Reads the current value of 64-bit MMX Register #1 (MM1).
6505
6506 Reads and returns the current value of MM1. This function is only available
6507 on IA-32 and x64.
6508
6509 @return The current value of MM1.
6510
6511 **/
6512 UINT64
6513 EFIAPI
6514 AsmReadMm1 (
6515 VOID
6516 );
6517
6518
6519 /**
6520 Reads the current value of 64-bit MMX Register #2 (MM2).
6521
6522 Reads and returns the current value of MM2. This function is only available
6523 on IA-32 and x64.
6524
6525 @return The current value of MM2.
6526
6527 **/
6528 UINT64
6529 EFIAPI
6530 AsmReadMm2 (
6531 VOID
6532 );
6533
6534
6535 /**
6536 Reads the current value of 64-bit MMX Register #3 (MM3).
6537
6538 Reads and returns the current value of MM3. This function is only available
6539 on IA-32 and x64.
6540
6541 @return The current value of MM3.
6542
6543 **/
6544 UINT64
6545 EFIAPI
6546 AsmReadMm3 (
6547 VOID
6548 );
6549
6550
6551 /**
6552 Reads the current value of 64-bit MMX Register #4 (MM4).
6553
6554 Reads and returns the current value of MM4. This function is only available
6555 on IA-32 and x64.
6556
6557 @return The current value of MM4.
6558
6559 **/
6560 UINT64
6561 EFIAPI
6562 AsmReadMm4 (
6563 VOID
6564 );
6565
6566
6567 /**
6568 Reads the current value of 64-bit MMX Register #5 (MM5).
6569
6570 Reads and returns the current value of MM5. This function is only available
6571 on IA-32 and x64.
6572
6573 @return The current value of MM5.
6574
6575 **/
6576 UINT64
6577 EFIAPI
6578 AsmReadMm5 (
6579 VOID
6580 );
6581
6582
6583 /**
6584 Reads the current value of 64-bit MMX Register #6 (MM6).
6585
6586 Reads and returns the current value of MM6. This function is only available
6587 on IA-32 and x64.
6588
6589 @return The current value of MM6.
6590
6591 **/
6592 UINT64
6593 EFIAPI
6594 AsmReadMm6 (
6595 VOID
6596 );
6597
6598
6599 /**
6600 Reads the current value of 64-bit MMX Register #7 (MM7).
6601
6602 Reads and returns the current value of MM7. This function is only available
6603 on IA-32 and x64.
6604
6605 @return The current value of MM7.
6606
6607 **/
6608 UINT64
6609 EFIAPI
6610 AsmReadMm7 (
6611 VOID
6612 );
6613
6614
6615 /**
6616 Writes the current value of 64-bit MMX Register #0 (MM0).
6617
6618 Writes the current value of MM0. This function is only available on IA32 and
6619 x64.
6620
6621 @param Value The 64-bit value to write to MM0.
6622
6623 **/
6624 VOID
6625 EFIAPI
6626 AsmWriteMm0 (
6627 IN UINT64 Value
6628 );
6629
6630
6631 /**
6632 Writes the current value of 64-bit MMX Register #1 (MM1).
6633
6634 Writes the current value of MM1. This function is only available on IA32 and
6635 x64.
6636
6637 @param Value The 64-bit value to write to MM1.
6638
6639 **/
6640 VOID
6641 EFIAPI
6642 AsmWriteMm1 (
6643 IN UINT64 Value
6644 );
6645
6646
6647 /**
6648 Writes the current value of 64-bit MMX Register #2 (MM2).
6649
6650 Writes the current value of MM2. This function is only available on IA32 and
6651 x64.
6652
6653 @param Value The 64-bit value to write to MM2.
6654
6655 **/
6656 VOID
6657 EFIAPI
6658 AsmWriteMm2 (
6659 IN UINT64 Value
6660 );
6661
6662
6663 /**
6664 Writes the current value of 64-bit MMX Register #3 (MM3).
6665
6666 Writes the current value of MM3. This function is only available on IA32 and
6667 x64.
6668
6669 @param Value The 64-bit value to write to MM3.
6670
6671 **/
6672 VOID
6673 EFIAPI
6674 AsmWriteMm3 (
6675 IN UINT64 Value
6676 );
6677
6678
6679 /**
6680 Writes the current value of 64-bit MMX Register #4 (MM4).
6681
6682 Writes the current value of MM4. This function is only available on IA32 and
6683 x64.
6684
6685 @param Value The 64-bit value to write to MM4.
6686
6687 **/
6688 VOID
6689 EFIAPI
6690 AsmWriteMm4 (
6691 IN UINT64 Value
6692 );
6693
6694
6695 /**
6696 Writes the current value of 64-bit MMX Register #5 (MM5).
6697
6698 Writes the current value of MM5. This function is only available on IA32 and
6699 x64.
6700
6701 @param Value The 64-bit value to write to MM5.
6702
6703 **/
6704 VOID
6705 EFIAPI
6706 AsmWriteMm5 (
6707 IN UINT64 Value
6708 );
6709
6710
6711 /**
6712 Writes the current value of 64-bit MMX Register #6 (MM6).
6713
6714 Writes the current value of MM6. This function is only available on IA32 and
6715 x64.
6716
6717 @param Value The 64-bit value to write to MM6.
6718
6719 **/
6720 VOID
6721 EFIAPI
6722 AsmWriteMm6 (
6723 IN UINT64 Value
6724 );
6725
6726
6727 /**
6728 Writes the current value of 64-bit MMX Register #7 (MM7).
6729
6730 Writes the current value of MM7. This function is only available on IA32 and
6731 x64.
6732
6733 @param Value The 64-bit value to write to MM7.
6734
6735 **/
6736 VOID
6737 EFIAPI
6738 AsmWriteMm7 (
6739 IN UINT64 Value
6740 );
6741
6742
6743 /**
6744 Reads the current value of Time Stamp Counter (TSC).
6745
6746 Reads and returns the current value of TSC. This function is only available
6747 on IA-32 and x64.
6748
6749 @return The current value of TSC
6750
6751 **/
6752 UINT64
6753 EFIAPI
6754 AsmReadTsc (
6755 VOID
6756 );
6757
6758
6759 /**
6760 Reads the current value of a Performance Counter (PMC).
6761
6762 Reads and returns the current value of performance counter specified by
6763 Index. This function is only available on IA-32 and x64.
6764
6765 @param Index The 32-bit Performance Counter index to read.
6766
6767 @return The value of the PMC specified by Index.
6768
6769 **/
6770 UINT64
6771 EFIAPI
6772 AsmReadPmc (
6773 IN UINT32 Index
6774 );
6775
6776
6777 /**
6778 Sets up a monitor buffer that is used by AsmMwait().
6779
6780 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6781 and Edx. Returns Eax. This function is only available on IA-32 and x64.
6782
6783 @param Eax The value to load into EAX or RAX before executing the MONITOR
6784 instruction.
6785 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6786 instruction.
6787 @param Edx The value to load into EDX or RDX before executing the MONITOR
6788 instruction.
6789
6790 @return Eax
6791
6792 **/
6793 UINTN
6794 EFIAPI
6795 AsmMonitor (
6796 IN UINTN Eax,
6797 IN UINTN Ecx,
6798 IN UINTN Edx
6799 );
6800
6801
6802 /**
6803 Executes an MWAIT instruction.
6804
6805 Executes an MWAIT instruction with the register state specified by Eax and
6806 Ecx. Returns Eax. This function is only available on IA-32 and x64.
6807
6808 @param Eax The value to load into EAX or RAX before executing the MONITOR
6809 instruction.
6810 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6811 instruction.
6812
6813 @return Eax
6814
6815 **/
6816 UINTN
6817 EFIAPI
6818 AsmMwait (
6819 IN UINTN Eax,
6820 IN UINTN Ecx
6821 );
6822
6823
6824 /**
6825 Executes a WBINVD instruction.
6826
6827 Executes a WBINVD instruction. This function is only available on IA-32 and
6828 x64.
6829
6830 **/
6831 VOID
6832 EFIAPI
6833 AsmWbinvd (
6834 VOID
6835 );
6836
6837
6838 /**
6839 Executes a INVD instruction.
6840
6841 Executes a INVD instruction. This function is only available on IA-32 and
6842 x64.
6843
6844 **/
6845 VOID
6846 EFIAPI
6847 AsmInvd (
6848 VOID
6849 );
6850
6851
6852 /**
6853 Flushes a cache line from all the instruction and data caches within the
6854 coherency domain of the CPU.
6855
6856 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6857 This function is only available on IA-32 and x64.
6858
6859 @param LinearAddress The address of the cache line to flush. If the CPU is
6860 in a physical addressing mode, then LinearAddress is a
6861 physical address. If the CPU is in a virtual
6862 addressing mode, then LinearAddress is a virtual
6863 address.
6864
6865 @return LinearAddress
6866 **/
6867 VOID *
6868 EFIAPI
6869 AsmFlushCacheLine (
6870 IN VOID *LinearAddress
6871 );
6872
6873
6874 /**
6875 Enables the 32-bit paging mode on the CPU.
6876
6877 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6878 must be properly initialized prior to calling this service. This function
6879 assumes the current execution mode is 32-bit protected mode. This function is
6880 only available on IA-32. After the 32-bit paging mode is enabled, control is
6881 transferred to the function specified by EntryPoint using the new stack
6882 specified by NewStack and passing in the parameters specified by Context1 and
6883 Context2. Context1 and Context2 are optional and may be NULL. The function
6884 EntryPoint must never return.
6885
6886 If the current execution mode is not 32-bit protected mode, then ASSERT().
6887 If EntryPoint is NULL, then ASSERT().
6888 If NewStack is NULL, then ASSERT().
6889
6890 There are a number of constraints that must be followed before calling this
6891 function:
6892 1) Interrupts must be disabled.
6893 2) The caller must be in 32-bit protected mode with flat descriptors. This
6894 means all descriptors must have a base of 0 and a limit of 4GB.
6895 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
6896 descriptors.
6897 4) CR3 must point to valid page tables that will be used once the transition
6898 is complete, and those page tables must guarantee that the pages for this
6899 function and the stack are identity mapped.
6900
6901 @param EntryPoint A pointer to function to call with the new stack after
6902 paging is enabled.
6903 @param Context1 A pointer to the context to pass into the EntryPoint
6904 function as the first parameter after paging is enabled.
6905 @param Context2 A pointer to the context to pass into the EntryPoint
6906 function as the second parameter after paging is enabled.
6907 @param NewStack A pointer to the new stack to use for the EntryPoint
6908 function after paging is enabled.
6909
6910 **/
6911 VOID
6912 EFIAPI
6913 AsmEnablePaging32 (
6914 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6915 IN VOID *Context1, OPTIONAL
6916 IN VOID *Context2, OPTIONAL
6917 IN VOID *NewStack
6918 );
6919
6920
6921 /**
6922 Disables the 32-bit paging mode on the CPU.
6923
6924 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
6925 mode. This function assumes the current execution mode is 32-paged protected
6926 mode. This function is only available on IA-32. After the 32-bit paging mode
6927 is disabled, control is transferred to the function specified by EntryPoint
6928 using the new stack specified by NewStack and passing in the parameters
6929 specified by Context1 and Context2. Context1 and Context2 are optional and
6930 may be NULL. The function EntryPoint must never return.
6931
6932 If the current execution mode is not 32-bit paged mode, then ASSERT().
6933 If EntryPoint is NULL, then ASSERT().
6934 If NewStack is NULL, then ASSERT().
6935
6936 There are a number of constraints that must be followed before calling this
6937 function:
6938 1) Interrupts must be disabled.
6939 2) The caller must be in 32-bit paged mode.
6940 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
6941 4) CR3 must point to valid page tables that guarantee that the pages for
6942 this function and the stack are identity mapped.
6943
6944 @param EntryPoint A pointer to function to call with the new stack after
6945 paging is disabled.
6946 @param Context1 A pointer to the context to pass into the EntryPoint
6947 function as the first parameter after paging is disabled.
6948 @param Context2 A pointer to the context to pass into the EntryPoint
6949 function as the second parameter after paging is
6950 disabled.
6951 @param NewStack A pointer to the new stack to use for the EntryPoint
6952 function after paging is disabled.
6953
6954 **/
6955 VOID
6956 EFIAPI
6957 AsmDisablePaging32 (
6958 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6959 IN VOID *Context1, OPTIONAL
6960 IN VOID *Context2, OPTIONAL
6961 IN VOID *NewStack
6962 );
6963
6964
6965 /**
6966 Enables the 64-bit paging mode on the CPU.
6967
6968 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6969 must be properly initialized prior to calling this service. This function
6970 assumes the current execution mode is 32-bit protected mode with flat
6971 descriptors. This function is only available on IA-32. After the 64-bit
6972 paging mode is enabled, control is transferred to the function specified by
6973 EntryPoint using the new stack specified by NewStack and passing in the
6974 parameters specified by Context1 and Context2. Context1 and Context2 are
6975 optional and may be 0. The function EntryPoint must never return.
6976
6977 If the current execution mode is not 32-bit protected mode with flat
6978 descriptors, then ASSERT().
6979 If EntryPoint is 0, then ASSERT().
6980 If NewStack is 0, then ASSERT().
6981
6982 @param Cs The 16-bit selector to load in the CS before EntryPoint
6983 is called. The descriptor in the GDT that this selector
6984 references must be setup for long mode.
6985 @param EntryPoint The 64-bit virtual address of the function to call with
6986 the new stack after paging is enabled.
6987 @param Context1 The 64-bit virtual address of the context to pass into
6988 the EntryPoint function as the first parameter after
6989 paging is enabled.
6990 @param Context2 The 64-bit virtual address of the context to pass into
6991 the EntryPoint function as the second parameter after
6992 paging is enabled.
6993 @param NewStack The 64-bit virtual address of the new stack to use for
6994 the EntryPoint function after paging is enabled.
6995
6996 **/
6997 VOID
6998 EFIAPI
6999 AsmEnablePaging64 (
7000 IN UINT16 Cs,
7001 IN UINT64 EntryPoint,
7002 IN UINT64 Context1, OPTIONAL
7003 IN UINT64 Context2, OPTIONAL
7004 IN UINT64 NewStack
7005 );
7006
7007
7008 /**
7009 Disables the 64-bit paging mode on the CPU.
7010
7011 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
7012 mode. This function assumes the current execution mode is 64-paging mode.
7013 This function is only available on x64. After the 64-bit paging mode is
7014 disabled, control is transferred to the function specified by EntryPoint
7015 using the new stack specified by NewStack and passing in the parameters
7016 specified by Context1 and Context2. Context1 and Context2 are optional and
7017 may be 0. The function EntryPoint must never return.
7018
7019 If the current execution mode is not 64-bit paged mode, then ASSERT().
7020 If EntryPoint is 0, then ASSERT().
7021 If NewStack is 0, then ASSERT().
7022
7023 @param Cs The 16-bit selector to load in the CS before EntryPoint
7024 is called. The descriptor in the GDT that this selector
7025 references must be setup for 32-bit protected mode.
7026 @param EntryPoint The 64-bit virtual address of the function to call with
7027 the new stack after paging is disabled.
7028 @param Context1 The 64-bit virtual address of the context to pass into
7029 the EntryPoint function as the first parameter after
7030 paging is disabled.
7031 @param Context2 The 64-bit virtual address of the context to pass into
7032 the EntryPoint function as the second parameter after
7033 paging is disabled.
7034 @param NewStack The 64-bit virtual address of the new stack to use for
7035 the EntryPoint function after paging is disabled.
7036
7037 **/
7038 VOID
7039 EFIAPI
7040 AsmDisablePaging64 (
7041 IN UINT16 Cs,
7042 IN UINT32 EntryPoint,
7043 IN UINT32 Context1, OPTIONAL
7044 IN UINT32 Context2, OPTIONAL
7045 IN UINT32 NewStack
7046 );
7047
7048
7049 //
7050 // 16-bit thunking services
7051 //
7052
7053 /**
7054 Retrieves the properties for 16-bit thunk functions.
7055
7056 Computes the size of the buffer and stack below 1MB required to use the
7057 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7058 buffer size is returned in RealModeBufferSize, and the stack size is returned
7059 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7060 then the actual minimum stack size is ExtraStackSize plus the maximum number
7061 of bytes that need to be passed to the 16-bit real mode code.
7062
7063 If RealModeBufferSize is NULL, then ASSERT().
7064 If ExtraStackSize is NULL, then ASSERT().
7065
7066 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7067 required to use the 16-bit thunk functions.
7068 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7069 that the 16-bit thunk functions require for
7070 temporary storage in the transition to and from
7071 16-bit real mode.
7072
7073 **/
7074 VOID
7075 EFIAPI
7076 AsmGetThunk16Properties (
7077 OUT UINT32 *RealModeBufferSize,
7078 OUT UINT32 *ExtraStackSize
7079 );
7080
7081
7082 /**
7083 Prepares all structures a code required to use AsmThunk16().
7084
7085 Prepares all structures and code required to use AsmThunk16().
7086
7087 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7088 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7089
7090 If ThunkContext is NULL, then ASSERT().
7091
7092 @param ThunkContext A pointer to the context structure that describes the
7093 16-bit real mode code to call.
7094
7095 **/
7096 VOID
7097 EFIAPI
7098 AsmPrepareThunk16 (
7099 OUT THUNK_CONTEXT *ThunkContext
7100 );
7101
7102
7103 /**
7104 Transfers control to a 16-bit real mode entry point and returns the results.
7105
7106 Transfers control to a 16-bit real mode entry point and returns the results.
7107 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7108 This function must be called with interrupts disabled.
7109
7110 The register state from the RealModeState field of ThunkContext is restored just prior
7111 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7112 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7113 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7114 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7115 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7116 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7117 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7118 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7119 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7120 after the RETF instruction is executed.
7121
7122 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7123 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7124 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7125
7126 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7127 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7128 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7129
7130 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7131 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7132
7133 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7134 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7135 disable the A20 mask.
7136
7137 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7138 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7139 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7140
7141 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7142 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7143
7144 If ThunkContext is NULL, then ASSERT().
7145 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7146 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7147 ThunkAttributes, then ASSERT().
7148
7149 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7150 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7151
7152 @param ThunkContext A pointer to the context structure that describes the
7153 16-bit real mode code to call.
7154
7155 **/
7156 VOID
7157 EFIAPI
7158 AsmThunk16 (
7159 IN OUT THUNK_CONTEXT *ThunkContext
7160 );
7161
7162
7163 /**
7164 Prepares all structures and code for a 16-bit real mode thunk, transfers
7165 control to a 16-bit real mode entry point, and returns the results.
7166
7167 Prepares all structures and code for a 16-bit real mode thunk, transfers
7168 control to a 16-bit real mode entry point, and returns the results. If the
7169 caller only need to perform a single 16-bit real mode thunk, then this
7170 service should be used. If the caller intends to make more than one 16-bit
7171 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7172 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7173
7174 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7175 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7176
7177 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7178
7179 @param ThunkContext A pointer to the context structure that describes the
7180 16-bit real mode code to call.
7181
7182 **/
7183 VOID
7184 EFIAPI
7185 AsmPrepareAndThunk16 (
7186 IN OUT THUNK_CONTEXT *ThunkContext
7187 );
7188
7189 #endif
7190 #endif
7191
7192