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1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture specific functions.
4
5 Copyright (c) 2006 - 2008, Intel Corporation<BR>
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef __BASE_LIB__
17 #define __BASE_LIB__
18
19 ///
20 /// Definitions for SPIN_LOCK
21 ///
22 typedef volatile UINTN SPIN_LOCK;
23
24 //
25 // Definitions for architecture specific types
26 //
27 #if defined (MDE_CPU_IA32)
28 ///
29 /// IA32 context buffer used by SetJump() and LongJump()
30 ///
31 typedef struct {
32 UINT32 Ebx;
33 UINT32 Esi;
34 UINT32 Edi;
35 UINT32 Ebp;
36 UINT32 Esp;
37 UINT32 Eip;
38 } BASE_LIBRARY_JUMP_BUFFER;
39
40 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
41
42 #endif // defined (MDE_CPU_IA32)
43
44 #if defined (MDE_CPU_IPF)
45
46 ///
47 /// IPF context buffer used by SetJump() and LongJump()
48 ///
49 typedef struct {
50 UINT64 F2[2];
51 UINT64 F3[2];
52 UINT64 F4[2];
53 UINT64 F5[2];
54 UINT64 F16[2];
55 UINT64 F17[2];
56 UINT64 F18[2];
57 UINT64 F19[2];
58 UINT64 F20[2];
59 UINT64 F21[2];
60 UINT64 F22[2];
61 UINT64 F23[2];
62 UINT64 F24[2];
63 UINT64 F25[2];
64 UINT64 F26[2];
65 UINT64 F27[2];
66 UINT64 F28[2];
67 UINT64 F29[2];
68 UINT64 F30[2];
69 UINT64 F31[2];
70 UINT64 R4;
71 UINT64 R5;
72 UINT64 R6;
73 UINT64 R7;
74 UINT64 SP;
75 UINT64 BR0;
76 UINT64 BR1;
77 UINT64 BR2;
78 UINT64 BR3;
79 UINT64 BR4;
80 UINT64 BR5;
81 UINT64 InitialUNAT;
82 UINT64 AfterSpillUNAT;
83 UINT64 PFS;
84 UINT64 BSP;
85 UINT64 Predicates;
86 UINT64 LoopCount;
87 UINT64 FPSR;
88 } BASE_LIBRARY_JUMP_BUFFER;
89
90 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
91
92 #endif // defined (MDE_CPU_IPF)
93
94 #if defined (MDE_CPU_X64)
95 ///
96 /// x64 context buffer used by SetJump() and LongJump()
97 ///
98 typedef struct {
99 UINT64 Rbx;
100 UINT64 Rsp;
101 UINT64 Rbp;
102 UINT64 Rdi;
103 UINT64 Rsi;
104 UINT64 R12;
105 UINT64 R13;
106 UINT64 R14;
107 UINT64 R15;
108 UINT64 Rip;
109 } BASE_LIBRARY_JUMP_BUFFER;
110
111 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
112
113 #endif // defined (MDE_CPU_X64)
114
115 #if defined (MDE_CPU_EBC)
116 ///
117 /// EBC context buffer used by SetJump() and LongJump()
118 ///
119 typedef struct {
120 UINT64 R0;
121 UINT64 R1;
122 UINT64 R2;
123 UINT64 R3;
124 UINT64 IP;
125 } BASE_LIBRARY_JUMP_BUFFER;
126
127 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
128
129 #endif // defined (MDE_CPU_EBC)
130
131 //
132 // String Services
133 //
134
135 /**
136 Copies one Null-terminated Unicode string to another Null-terminated Unicode
137 string and returns the new Unicode string.
138
139 This function copies the contents of the Unicode string Source to the Unicode
140 string Destination, and returns Destination. If Source and Destination
141 overlap, then the results are undefined.
142
143 If Destination is NULL, then ASSERT().
144 If Destination is not aligned on a 16-bit boundary, then ASSERT().
145 If Source is NULL, then ASSERT().
146 If Source is not aligned on a 16-bit boundary, then ASSERT().
147 If Source and Destination overlap, then ASSERT().
148 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
149 PcdMaximumUnicodeStringLength Unicode characters not including the
150 Null-terminator, then ASSERT().
151
152 @param Destination Pointer to a Null-terminated Unicode string.
153 @param Source Pointer to a Null-terminated Unicode string.
154
155 @return Destination.
156
157 **/
158 CHAR16 *
159 EFIAPI
160 StrCpy (
161 OUT CHAR16 *Destination,
162 IN CONST CHAR16 *Source
163 );
164
165
166 /**
167 Copies up to a specified length from one Null-terminated Unicode string to
168 another Null-terminated Unicode string and returns the new Unicode string.
169
170 This function copies the contents of the Unicode string Source to the Unicode
171 string Destination, and returns Destination. At most, Length Unicode
172 characters are copied from Source to Destination. If Length is 0, then
173 Destination is returned unmodified. If Length is greater that the number of
174 Unicode characters in Source, then Destination is padded with Null Unicode
175 characters. If Source and Destination overlap, then the results are
176 undefined.
177
178 If Length > 0 and Destination is NULL, then ASSERT().
179 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
180 If Length > 0 and Source is NULL, then ASSERT().
181 If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().
182 If Source and Destination overlap, then ASSERT().
183 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
184 PcdMaximumUnicodeStringLength Unicode characters not including the
185 Null-terminator, then ASSERT().
186
187 @param Destination Pointer to a Null-terminated Unicode string.
188 @param Source Pointer to a Null-terminated Unicode string.
189 @param Length Maximum number of Unicode characters to copy.
190
191 @return Destination.
192
193 **/
194 CHAR16 *
195 EFIAPI
196 StrnCpy (
197 OUT CHAR16 *Destination,
198 IN CONST CHAR16 *Source,
199 IN UINTN Length
200 );
201
202
203 /**
204 Returns the length of a Null-terminated Unicode string.
205
206 This function returns the number of Unicode characters in the Null-terminated
207 Unicode string specified by String.
208
209 If String is NULL, then ASSERT().
210 If String is not aligned on a 16-bit boundary, then ASSERT().
211 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
212 PcdMaximumUnicodeStringLength Unicode characters not including the
213 Null-terminator, then ASSERT().
214
215 @param String Pointer to a Null-terminated Unicode string.
216
217 @return The length of String.
218
219 **/
220 UINTN
221 EFIAPI
222 StrLen (
223 IN CONST CHAR16 *String
224 );
225
226
227 /**
228 Returns the size of a Null-terminated Unicode string in bytes, including the
229 Null terminator.
230
231 This function returns the size, in bytes, of the Null-terminated Unicode string
232 specified by String.
233
234 If String is NULL, then ASSERT().
235 If String is not aligned on a 16-bit boundary, then ASSERT().
236 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
237 PcdMaximumUnicodeStringLength Unicode characters not including the
238 Null-terminator, then ASSERT().
239
240 @param String Pointer to a Null-terminated Unicode string.
241
242 @return The size of String.
243
244 **/
245 UINTN
246 EFIAPI
247 StrSize (
248 IN CONST CHAR16 *String
249 );
250
251
252 /**
253 Compares two Null-terminated Unicode strings, and returns the difference
254 between the first mismatched Unicode characters.
255
256 This function compares the Null-terminated Unicode string FirstString to the
257 Null-terminated Unicode string SecondString. If FirstString is identical to
258 SecondString, then 0 is returned. Otherwise, the value returned is the first
259 mismatched Unicode character in SecondString subtracted from the first
260 mismatched Unicode character in FirstString.
261
262 If FirstString is NULL, then ASSERT().
263 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
264 If SecondString is NULL, then ASSERT().
265 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
266 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
267 than PcdMaximumUnicodeStringLength Unicode characters not including the
268 Null-terminator, then ASSERT().
269 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
270 than PcdMaximumUnicodeStringLength Unicode characters not including the
271 Null-terminator, then ASSERT().
272
273 @param FirstString Pointer to a Null-terminated Unicode string.
274 @param SecondString Pointer to a Null-terminated Unicode string.
275
276 @retval 0 FirstString is identical to SecondString.
277 @return others FirstString is not identical to SecondString.
278
279 **/
280 INTN
281 EFIAPI
282 StrCmp (
283 IN CONST CHAR16 *FirstString,
284 IN CONST CHAR16 *SecondString
285 );
286
287
288 /**
289 Compares up to a specified length the contents of two Null-terminated Unicode strings,
290 and returns the difference between the first mismatched Unicode characters.
291
292 This function compares the Null-terminated Unicode string FirstString to the
293 Null-terminated Unicode string SecondString. At most, Length Unicode
294 characters will be compared. If Length is 0, then 0 is returned. If
295 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
296 value returned is the first mismatched Unicode character in SecondString
297 subtracted from the first mismatched Unicode character in FirstString.
298
299 If Length > 0 and FirstString is NULL, then ASSERT().
300 If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().
301 If Length > 0 and SecondString is NULL, then ASSERT().
302 If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().
303 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
304 than PcdMaximumUnicodeStringLength Unicode characters not including the
305 Null-terminator, then ASSERT().
306 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
307 than PcdMaximumUnicodeStringLength Unicode characters not including the
308 Null-terminator, then ASSERT().
309
310 @param FirstString Pointer to a Null-terminated Unicode string.
311 @param SecondString Pointer to a Null-terminated Unicode string.
312 @param Length Maximum number of Unicode characters to compare.
313
314 @retval 0 FirstString is identical to SecondString.
315 @return others FirstString is not identical to SecondString.
316
317 **/
318 INTN
319 EFIAPI
320 StrnCmp (
321 IN CONST CHAR16 *FirstString,
322 IN CONST CHAR16 *SecondString,
323 IN UINTN Length
324 );
325
326
327 /**
328 Concatenates one Null-terminated Unicode string to another Null-terminated
329 Unicode string, and returns the concatenated Unicode string.
330
331 This function concatenates two Null-terminated Unicode strings. The contents
332 of Null-terminated Unicode string Source are concatenated to the end of
333 Null-terminated Unicode string Destination. The Null-terminated concatenated
334 Unicode String is returned. If Source and Destination overlap, then the
335 results are undefined.
336
337 If Destination is NULL, then ASSERT().
338 If Destination is not aligned on a 16-bit bounadary, then ASSERT().
339 If Source is NULL, then ASSERT().
340 If Source is not aligned on a 16-bit bounadary, then ASSERT().
341 If Source and Destination overlap, then ASSERT().
342 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
343 than PcdMaximumUnicodeStringLength Unicode characters not including the
344 Null-terminator, then ASSERT().
345 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
346 PcdMaximumUnicodeStringLength Unicode characters not including the
347 Null-terminator, then ASSERT().
348 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
349 and Source results in a Unicode string with more than
350 PcdMaximumUnicodeStringLength Unicode characters not including the
351 Null-terminator, then ASSERT().
352
353 @param Destination Pointer to a Null-terminated Unicode string.
354 @param Source Pointer to a Null-terminated Unicode string.
355
356 @return Destination.
357
358 **/
359 CHAR16 *
360 EFIAPI
361 StrCat (
362 IN OUT CHAR16 *Destination,
363 IN CONST CHAR16 *Source
364 );
365
366
367 /**
368 Concatenates up to a specified length one Null-terminated Unicode to the end
369 of another Null-terminated Unicode string, and returns the concatenated
370 Unicode string.
371
372 This function concatenates two Null-terminated Unicode strings. The contents
373 of Null-terminated Unicode string Source are concatenated to the end of
374 Null-terminated Unicode string Destination, and Destination is returned. At
375 most, Length Unicode characters are concatenated from Source to the end of
376 Destination, and Destination is always Null-terminated. If Length is 0, then
377 Destination is returned unmodified. If Source and Destination overlap, then
378 the results are undefined.
379
380 If Destination is NULL, then ASSERT().
381 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
382 If Length > 0 and Source is NULL, then ASSERT().
383 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
384 If Source and Destination overlap, then ASSERT().
385 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
386 than PcdMaximumUnicodeStringLength Unicode characters not including the
387 Null-terminator, then ASSERT().
388 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
389 PcdMaximumUnicodeStringLength Unicode characters not including the
390 Null-terminator, then ASSERT().
391 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
392 and Source results in a Unicode string with more than
393 PcdMaximumUnicodeStringLength Unicode characters not including the
394 Null-terminator, then ASSERT().
395
396 @param Destination Pointer to a Null-terminated Unicode string.
397 @param Source Pointer to a Null-terminated Unicode string.
398 @param Length Maximum number of Unicode characters to concatenate from
399 Source.
400
401 @return Destination.
402
403 **/
404 CHAR16 *
405 EFIAPI
406 StrnCat (
407 IN OUT CHAR16 *Destination,
408 IN CONST CHAR16 *Source,
409 IN UINTN Length
410 );
411
412 /**
413 Returns the first occurrence of a Null-terminated Unicode sub-string
414 in a Null-terminated Unicode string.
415
416 This function scans the contents of the Null-terminated Unicode string
417 specified by String and returns the first occurrence of SearchString.
418 If SearchString is not found in String, then NULL is returned. If
419 the length of SearchString is zero, then String is
420 returned.
421
422 If String is NULL, then ASSERT().
423 If String is not aligned on a 16-bit boundary, then ASSERT().
424 If SearchString is NULL, then ASSERT().
425 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
426
427 If PcdMaximumUnicodeStringLength is not zero, and SearchString
428 or String contains more than PcdMaximumUnicodeStringLength Unicode
429 characters not including the Null-terminator, then ASSERT().
430
431 @param String Pointer to a Null-terminated Unicode string.
432 @param SearchString Pointer to a Null-terminated Unicode string to search for.
433
434 @retval NULL If the SearchString does not appear in String.
435 @return others If there is a match.
436
437 **/
438 CHAR16 *
439 EFIAPI
440 StrStr (
441 IN CONST CHAR16 *String,
442 IN CONST CHAR16 *SearchString
443 );
444
445 /**
446 Convert a Null-terminated Unicode decimal string to a value of
447 type UINTN.
448
449 This function returns a value of type UINTN by interpreting the contents
450 of the Unicode string specified by String as a decimal number. The format
451 of the input Unicode string String is:
452
453 [spaces] [decimal digits].
454
455 The valid decimal digit character is in the range [0-9]. The
456 function will ignore the pad space, which includes spaces or
457 tab characters, before [decimal digits]. The running zero in the
458 beginning of [decimal digits] will be ignored. Then, the function
459 stops at the first character that is a not a valid decimal character
460 or a Null-terminator, whichever one comes first.
461
462 If String is NULL, then ASSERT().
463 If String is not aligned in a 16-bit boundary, then ASSERT().
464 If String has only pad spaces, then 0 is returned.
465 If String has no pad spaces or valid decimal digits,
466 then 0 is returned.
467 If the number represented by String overflows according
468 to the range defined by UINTN, then ASSERT().
469
470 If PcdMaximumUnicodeStringLength is not zero, and String contains
471 more than PcdMaximumUnicodeStringLength Unicode characters not including
472 the Null-terminator, then ASSERT().
473
474 @param String Pointer to a Null-terminated Unicode string.
475
476 @retval Value translated from String.
477
478 **/
479 UINTN
480 EFIAPI
481 StrDecimalToUintn (
482 IN CONST CHAR16 *String
483 );
484
485 /**
486 Convert a Null-terminated Unicode decimal string to a value of
487 type UINT64.
488
489 This function returns a value of type UINT64 by interpreting the contents
490 of the Unicode string specified by String as a decimal number. The format
491 of the input Unicode string String is:
492
493 [spaces] [decimal digits].
494
495 The valid decimal digit character is in the range [0-9]. The
496 function will ignore the pad space, which includes spaces or
497 tab characters, before [decimal digits]. The running zero in the
498 beginning of [decimal digits] will be ignored. Then, the function
499 stops at the first character that is a not a valid decimal character
500 or a Null-terminator, whichever one comes first.
501
502 If String is NULL, then ASSERT().
503 If String is not aligned in a 16-bit boundary, then ASSERT().
504 If String has only pad spaces, then 0 is returned.
505 If String has no pad spaces or valid decimal digits,
506 then 0 is returned.
507 If the number represented by String overflows according
508 to the range defined by UINT64, then ASSERT().
509
510 If PcdMaximumUnicodeStringLength is not zero, and String contains
511 more than PcdMaximumUnicodeStringLength Unicode characters not including
512 the Null-terminator, then ASSERT().
513
514 @param String Pointer to a Null-terminated Unicode string.
515
516 @retval Value translated from String.
517
518 **/
519 UINT64
520 EFIAPI
521 StrDecimalToUint64 (
522 IN CONST CHAR16 *String
523 );
524
525
526 /**
527 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
528
529 This function returns a value of type UINTN by interpreting the contents
530 of the Unicode string specified by String as a hexadecimal number.
531 The format of the input Unicode string String is:
532
533 [spaces][zeros][x][hexadecimal digits].
534
535 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
536 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
537 If "x" appears in the input string, it must be prefixed with at least one 0.
538 The function will ignore the pad space, which includes spaces or tab characters,
539 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
540 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
541 first valid hexadecimal digit. Then, the function stops at the first character that is
542 a not a valid hexadecimal character or NULL, whichever one comes first.
543
544 If String is NULL, then ASSERT().
545 If String is not aligned in a 16-bit boundary, then ASSERT().
546 If String has only pad spaces, then zero is returned.
547 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
548 then zero is returned.
549 If the number represented by String overflows according to the range defined by
550 UINTN, then ASSERT().
551
552 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
553 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
554 then ASSERT().
555
556 @param String Pointer to a Null-terminated Unicode string.
557
558 @retval Value translated from String.
559
560 **/
561 UINTN
562 EFIAPI
563 StrHexToUintn (
564 IN CONST CHAR16 *String
565 );
566
567
568 /**
569 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
570
571 This function returns a value of type UINT64 by interpreting the contents
572 of the Unicode string specified by String as a hexadecimal number.
573 The format of the input Unicode string String is
574
575 [spaces][zeros][x][hexadecimal digits].
576
577 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
578 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
579 If "x" appears in the input string, it must be prefixed with at least one 0.
580 The function will ignore the pad space, which includes spaces or tab characters,
581 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
582 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
583 first valid hexadecimal digit. Then, the function stops at the first character that is
584 a not a valid hexadecimal character or NULL, whichever one comes first.
585
586 If String is NULL, then ASSERT().
587 If String is not aligned in a 16-bit boundary, then ASSERT().
588 If String has only pad spaces, then zero is returned.
589 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
590 then zero is returned.
591 If the number represented by String overflows according to the range defined by
592 UINT64, then ASSERT().
593
594 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
595 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
596 then ASSERT().
597
598 @param String Pointer to a Null-terminated Unicode string.
599
600 @retval Value translated from String.
601
602 **/
603 UINT64
604 EFIAPI
605 StrHexToUint64 (
606 IN CONST CHAR16 *String
607 );
608
609 /**
610 Convert a Null-terminated Unicode string to a Null-terminated
611 ASCII string and returns the ASCII string.
612
613 This function converts the content of the Unicode string Source
614 to the ASCII string Destination by copying the lower 8 bits of
615 each Unicode character. It returns Destination.
616
617 If any Unicode characters in Source contain non-zero value in
618 the upper 8 bits, then ASSERT().
619
620 If Destination is NULL, then ASSERT().
621 If Source is NULL, then ASSERT().
622 If Source is not aligned on a 16-bit boundary, then ASSERT().
623 If Source and Destination overlap, then ASSERT().
624
625 If PcdMaximumUnicodeStringLength is not zero, and Source contains
626 more than PcdMaximumUnicodeStringLength Unicode characters not including
627 the Null-terminator, then ASSERT().
628
629 If PcdMaximumAsciiStringLength is not zero, and Source contains more
630 than PcdMaximumAsciiStringLength Unicode characters not including the
631 Null-terminator, then ASSERT().
632
633 @param Source Pointer to a Null-terminated Unicode string.
634 @param Destination Pointer to a Null-terminated ASCII string.
635
636 @return Destination.
637
638 **/
639 CHAR8 *
640 EFIAPI
641 UnicodeStrToAsciiStr (
642 IN CONST CHAR16 *Source,
643 OUT CHAR8 *Destination
644 );
645
646
647 /**
648 Copies one Null-terminated ASCII string to another Null-terminated ASCII
649 string and returns the new ASCII string.
650
651 This function copies the contents of the ASCII string Source to the ASCII
652 string Destination, and returns Destination. If Source and Destination
653 overlap, then the results are undefined.
654
655 If Destination is NULL, then ASSERT().
656 If Source is NULL, then ASSERT().
657 If Source and Destination overlap, then ASSERT().
658 If PcdMaximumAsciiStringLength is not zero and Source contains more than
659 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
660 then ASSERT().
661
662 @param Destination Pointer to a Null-terminated ASCII string.
663 @param Source Pointer to a Null-terminated ASCII string.
664
665 @return Destination
666
667 **/
668 CHAR8 *
669 EFIAPI
670 AsciiStrCpy (
671 OUT CHAR8 *Destination,
672 IN CONST CHAR8 *Source
673 );
674
675
676 /**
677 Copies up to a specified length one Null-terminated ASCII string to another
678 Null-terminated ASCII string and returns the new ASCII string.
679
680 This function copies the contents of the ASCII string Source to the ASCII
681 string Destination, and returns Destination. At most, Length ASCII characters
682 are copied from Source to Destination. If Length is 0, then Destination is
683 returned unmodified. If Length is greater that the number of ASCII characters
684 in Source, then Destination is padded with Null ASCII characters. If Source
685 and Destination overlap, then the results are undefined.
686
687 If Destination is NULL, then ASSERT().
688 If Source is NULL, then ASSERT().
689 If Source and Destination overlap, then ASSERT().
690 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
691 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
692 then ASSERT().
693
694 @param Destination Pointer to a Null-terminated ASCII string.
695 @param Source Pointer to a Null-terminated ASCII string.
696 @param Length Maximum number of ASCII characters to copy.
697
698 @return Destination
699
700 **/
701 CHAR8 *
702 EFIAPI
703 AsciiStrnCpy (
704 OUT CHAR8 *Destination,
705 IN CONST CHAR8 *Source,
706 IN UINTN Length
707 );
708
709
710 /**
711 Returns the length of a Null-terminated ASCII string.
712
713 This function returns the number of ASCII characters in the Null-terminated
714 ASCII string specified by String.
715
716 If Length > 0 and Destination is NULL, then ASSERT().
717 If Length > 0 and Source is NULL, then ASSERT().
718 If PcdMaximumAsciiStringLength is not zero and String contains more than
719 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
720 then ASSERT().
721
722 @param String Pointer to a Null-terminated ASCII string.
723
724 @return The length of String.
725
726 **/
727 UINTN
728 EFIAPI
729 AsciiStrLen (
730 IN CONST CHAR8 *String
731 );
732
733
734 /**
735 Returns the size of a Null-terminated ASCII string in bytes, including the
736 Null terminator.
737
738 This function returns the size, in bytes, of the Null-terminated ASCII string
739 specified by String.
740
741 If String is NULL, then ASSERT().
742 If PcdMaximumAsciiStringLength is not zero and String contains more than
743 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
744 then ASSERT().
745
746 @param String Pointer to a Null-terminated ASCII string.
747
748 @return The size of String.
749
750 **/
751 UINTN
752 EFIAPI
753 AsciiStrSize (
754 IN CONST CHAR8 *String
755 );
756
757
758 /**
759 Compares two Null-terminated ASCII strings, and returns the difference
760 between the first mismatched ASCII characters.
761
762 This function compares the Null-terminated ASCII string FirstString to the
763 Null-terminated ASCII string SecondString. If FirstString is identical to
764 SecondString, then 0 is returned. Otherwise, the value returned is the first
765 mismatched ASCII character in SecondString subtracted from the first
766 mismatched ASCII character in FirstString.
767
768 If FirstString is NULL, then ASSERT().
769 If SecondString is NULL, then ASSERT().
770 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
771 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
772 then ASSERT().
773 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
774 than PcdMaximumAsciiStringLength ASCII characters not including the
775 Null-terminator, then ASSERT().
776
777 @param FirstString Pointer to a Null-terminated ASCII string.
778 @param SecondString Pointer to a Null-terminated ASCII string.
779
780 @retval ==0 FirstString is identical to SecondString.
781 @retval !=0 FirstString is not identical to SecondString.
782
783 **/
784 INTN
785 EFIAPI
786 AsciiStrCmp (
787 IN CONST CHAR8 *FirstString,
788 IN CONST CHAR8 *SecondString
789 );
790
791
792 /**
793 Performs a case insensitive comparison of two Null-terminated ASCII strings,
794 and returns the difference between the first mismatched ASCII characters.
795
796 This function performs a case insensitive comparison of the Null-terminated
797 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
798 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
799 value returned is the first mismatched lower case ASCII character in
800 SecondString subtracted from the first mismatched lower case ASCII character
801 in FirstString.
802
803 If FirstString is NULL, then ASSERT().
804 If SecondString is NULL, then ASSERT().
805 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
806 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
807 then ASSERT().
808 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
809 than PcdMaximumAsciiStringLength ASCII characters not including the
810 Null-terminator, then ASSERT().
811
812 @param FirstString Pointer to a Null-terminated ASCII string.
813 @param SecondString Pointer to a Null-terminated ASCII string.
814
815 @retval ==0 FirstString is identical to SecondString using case insensitive
816 comparisons.
817 @retval !=0 FirstString is not identical to SecondString using case
818 insensitive comparisons.
819
820 **/
821 INTN
822 EFIAPI
823 AsciiStriCmp (
824 IN CONST CHAR8 *FirstString,
825 IN CONST CHAR8 *SecondString
826 );
827
828
829 /**
830 Compares two Null-terminated ASCII strings with maximum lengths, and returns
831 the difference between the first mismatched ASCII characters.
832
833 This function compares the Null-terminated ASCII string FirstString to the
834 Null-terminated ASCII string SecondString. At most, Length ASCII characters
835 will be compared. If Length is 0, then 0 is returned. If FirstString is
836 identical to SecondString, then 0 is returned. Otherwise, the value returned
837 is the first mismatched ASCII character in SecondString subtracted from the
838 first mismatched ASCII character in FirstString.
839
840 If Length > 0 and FirstString is NULL, then ASSERT().
841 If Length > 0 and SecondString is NULL, then ASSERT().
842 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
843 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
844 then ASSERT().
845 If PcdMaximumAsciiStringLength is not zero and SecondString contains more than
846 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
847 then ASSERT().
848
849 @param FirstString Pointer to a Null-terminated ASCII string.
850 @param SecondString Pointer to a Null-terminated ASCII string.
851 @param Length Maximum number of ASCII characters for compare.
852
853 @retval ==0 FirstString is identical to SecondString.
854 @retval !=0 FirstString is not identical to SecondString.
855
856 **/
857 INTN
858 EFIAPI
859 AsciiStrnCmp (
860 IN CONST CHAR8 *FirstString,
861 IN CONST CHAR8 *SecondString,
862 IN UINTN Length
863 );
864
865
866 /**
867 Concatenates one Null-terminated ASCII string to another Null-terminated
868 ASCII string, and returns the concatenated ASCII string.
869
870 This function concatenates two Null-terminated ASCII strings. The contents of
871 Null-terminated ASCII string Source are concatenated to the end of Null-
872 terminated ASCII string Destination. The Null-terminated concatenated ASCII
873 String is returned.
874
875 If Destination is NULL, then ASSERT().
876 If Source is NULL, then ASSERT().
877 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
878 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
879 then ASSERT().
880 If PcdMaximumAsciiStringLength is not zero and Source contains more than
881 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
882 then ASSERT().
883 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
884 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
885 ASCII characters, then ASSERT().
886
887 @param Destination Pointer to a Null-terminated ASCII string.
888 @param Source Pointer to a Null-terminated ASCII string.
889
890 @return Destination
891
892 **/
893 CHAR8 *
894 EFIAPI
895 AsciiStrCat (
896 IN OUT CHAR8 *Destination,
897 IN CONST CHAR8 *Source
898 );
899
900
901 /**
902 Concatenates up to a specified length one Null-terminated ASCII string to
903 the end of another Null-terminated ASCII string, and returns the
904 concatenated ASCII string.
905
906 This function concatenates two Null-terminated ASCII strings. The contents
907 of Null-terminated ASCII string Source are concatenated to the end of Null-
908 terminated ASCII string Destination, and Destination is returned. At most,
909 Length ASCII characters are concatenated from Source to the end of
910 Destination, and Destination is always Null-terminated. If Length is 0, then
911 Destination is returned unmodified. If Source and Destination overlap, then
912 the results are undefined.
913
914 If Length > 0 and Destination is NULL, then ASSERT().
915 If Length > 0 and Source is NULL, then ASSERT().
916 If Source and Destination overlap, then ASSERT().
917 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
918 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
919 then ASSERT().
920 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
921 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
922 then ASSERT().
923 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
924 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
925 ASCII characters not including the Null-terminator, then ASSERT().
926
927 @param Destination Pointer to a Null-terminated ASCII string.
928 @param Source Pointer to a Null-terminated ASCII string.
929 @param Length Maximum number of ASCII characters to concatenate from
930 Source.
931
932 @return Destination
933
934 **/
935 CHAR8 *
936 EFIAPI
937 AsciiStrnCat (
938 IN OUT CHAR8 *Destination,
939 IN CONST CHAR8 *Source,
940 IN UINTN Length
941 );
942
943
944 /**
945 Returns the first occurrence of a Null-terminated ASCII sub-string
946 in a Null-terminated ASCII string.
947
948 This function scans the contents of the ASCII string specified by String
949 and returns the first occurrence of SearchString. If SearchString is not
950 found in String, then NULL is returned. If the length of SearchString is zero,
951 then String is returned.
952
953 If String is NULL, then ASSERT().
954 If SearchString is NULL, then ASSERT().
955
956 If PcdMaximumAsciiStringLength is not zero, and SearchString or
957 String contains more than PcdMaximumAsciiStringLength Unicode characters
958 not including the Null-terminator, then ASSERT().
959
960 @param String Pointer to a Null-terminated ASCII string.
961 @param SearchString Pointer to a Null-terminated ASCII string to search for.
962
963 @retval NULL If the SearchString does not appear in String.
964 @retval others If there is a match return the first occurrence of SearchingString.
965 If the length of SearchString is zero,return String.
966
967 **/
968 CHAR8 *
969 EFIAPI
970 AsciiStrStr (
971 IN CONST CHAR8 *String,
972 IN CONST CHAR8 *SearchString
973 );
974
975
976 /**
977 Convert a Null-terminated ASCII decimal string to a value of type
978 UINTN.
979
980 This function returns a value of type UINTN by interpreting the contents
981 of the ASCII string String as a decimal number. The format of the input
982 ASCII string String is:
983
984 [spaces] [decimal digits].
985
986 The valid decimal digit character is in the range [0-9]. The function will
987 ignore the pad space, which includes spaces or tab characters, before the digits.
988 The running zero in the beginning of [decimal digits] will be ignored. Then, the
989 function stops at the first character that is a not a valid decimal character or
990 Null-terminator, whichever on comes first.
991
992 If String has only pad spaces, then 0 is returned.
993 If String has no pad spaces or valid decimal digits, then 0 is returned.
994 If the number represented by String overflows according to the range defined by
995 UINTN, then ASSERT().
996 If String is NULL, then ASSERT().
997 If PcdMaximumAsciiStringLength is not zero, and String contains more than
998 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
999 then ASSERT().
1000
1001 @param String Pointer to a Null-terminated ASCII string.
1002
1003 @retval Value translated from String.
1004
1005 **/
1006 UINTN
1007 EFIAPI
1008 AsciiStrDecimalToUintn (
1009 IN CONST CHAR8 *String
1010 );
1011
1012
1013 /**
1014 Convert a Null-terminated ASCII decimal string to a value of type
1015 UINT64.
1016
1017 This function returns a value of type UINT64 by interpreting the contents
1018 of the ASCII string String as a decimal number. The format of the input
1019 ASCII string String is:
1020
1021 [spaces] [decimal digits].
1022
1023 The valid decimal digit character is in the range [0-9]. The function will
1024 ignore the pad space, which includes spaces or tab characters, before the digits.
1025 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1026 function stops at the first character that is a not a valid decimal character or
1027 Null-terminator, whichever on comes first.
1028
1029 If String has only pad spaces, then 0 is returned.
1030 If String has no pad spaces or valid decimal digits, then 0 is returned.
1031 If the number represented by String overflows according to the range defined by
1032 UINT64, then ASSERT().
1033 If String is NULL, then ASSERT().
1034 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1035 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1036 then ASSERT().
1037
1038 @param String Pointer to a Null-terminated ASCII string.
1039
1040 @retval Value translated from String.
1041
1042 **/
1043 UINT64
1044 EFIAPI
1045 AsciiStrDecimalToUint64 (
1046 IN CONST CHAR8 *String
1047 );
1048
1049
1050 /**
1051 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1052
1053 This function returns a value of type UINTN by interpreting the contents of
1054 the ASCII string String as a hexadecimal number. The format of the input ASCII
1055 string String is:
1056
1057 [spaces][zeros][x][hexadecimal digits].
1058
1059 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1060 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1061 appears in the input string, it must be prefixed with at least one 0. The function
1062 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1063 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1064 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1065 digit. Then, the function stops at the first character that is a not a valid
1066 hexadecimal character or Null-terminator, whichever on comes first.
1067
1068 If String has only pad spaces, then 0 is returned.
1069 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1070 0 is returned.
1071
1072 If the number represented by String overflows according to the range defined by UINTN,
1073 then ASSERT().
1074 If String is NULL, then ASSERT().
1075 If PcdMaximumAsciiStringLength is not zero,
1076 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1077 the Null-terminator, then ASSERT().
1078
1079 @param String Pointer to a Null-terminated ASCII string.
1080
1081 @retval Value translated from String.
1082
1083 **/
1084 UINTN
1085 EFIAPI
1086 AsciiStrHexToUintn (
1087 IN CONST CHAR8 *String
1088 );
1089
1090
1091 /**
1092 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1093
1094 This function returns a value of type UINT64 by interpreting the contents of
1095 the ASCII string String as a hexadecimal number. The format of the input ASCII
1096 string String is:
1097
1098 [spaces][zeros][x][hexadecimal digits].
1099
1100 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1101 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1102 appears in the input string, it must be prefixed with at least one 0. The function
1103 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1104 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1105 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1106 digit. Then, the function stops at the first character that is a not a valid
1107 hexadecimal character or Null-terminator, whichever on comes first.
1108
1109 If String has only pad spaces, then 0 is returned.
1110 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1111 0 is returned.
1112
1113 If the number represented by String overflows according to the range defined by UINT64,
1114 then ASSERT().
1115 If String is NULL, then ASSERT().
1116 If PcdMaximumAsciiStringLength is not zero,
1117 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1118 the Null-terminator, then ASSERT().
1119
1120 @param String Pointer to a Null-terminated ASCII string.
1121
1122 @retval Value translated from String.
1123
1124 **/
1125 UINT64
1126 EFIAPI
1127 AsciiStrHexToUint64 (
1128 IN CONST CHAR8 *String
1129 );
1130
1131
1132 /**
1133 Convert one Null-terminated ASCII string to a Null-terminated
1134 Unicode string and returns the Unicode string.
1135
1136 This function converts the contents of the ASCII string Source to the Unicode
1137 string Destination, and returns Destination. The function terminates the
1138 Unicode string Destination by appending a Null-terminator character at the end.
1139 The caller is responsible to make sure Destination points to a buffer with size
1140 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1141
1142 If Destination is NULL, then ASSERT().
1143 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1144 If Source is NULL, then ASSERT().
1145 If Source and Destination overlap, then ASSERT().
1146 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1147 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1148 then ASSERT().
1149 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1150 PcdMaximumUnicodeStringLength ASCII characters not including the
1151 Null-terminator, then ASSERT().
1152
1153 @param Source Pointer to a Null-terminated ASCII string.
1154 @param Destination Pointer to a Null-terminated Unicode string.
1155
1156 @return Destination.
1157
1158 **/
1159 CHAR16 *
1160 EFIAPI
1161 AsciiStrToUnicodeStr (
1162 IN CONST CHAR8 *Source,
1163 OUT CHAR16 *Destination
1164 );
1165
1166
1167 /**
1168 Converts an 8-bit value to an 8-bit BCD value.
1169
1170 Converts the 8-bit value specified by Value to BCD. The BCD value is
1171 returned.
1172
1173 If Value >= 100, then ASSERT().
1174
1175 @param Value The 8-bit value to convert to BCD. Range 0..99.
1176
1177 @return The BCD value.
1178
1179 **/
1180 UINT8
1181 EFIAPI
1182 DecimalToBcd8 (
1183 IN UINT8 Value
1184 );
1185
1186
1187 /**
1188 Converts an 8-bit BCD value to an 8-bit value.
1189
1190 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1191 value is returned.
1192
1193 If Value >= 0xA0, then ASSERT().
1194 If (Value & 0x0F) >= 0x0A, then ASSERT().
1195
1196 @param Value The 8-bit BCD value to convert to an 8-bit value.
1197
1198 @return The 8-bit value is returned.
1199
1200 **/
1201 UINT8
1202 EFIAPI
1203 BcdToDecimal8 (
1204 IN UINT8 Value
1205 );
1206
1207
1208 //
1209 // Linked List Functions and Macros
1210 //
1211
1212 /**
1213 Initializes the head node of a doubly linked list that is declared as a
1214 global variable in a module.
1215
1216 Initializes the forward and backward links of a new linked list. After
1217 initializing a linked list with this macro, the other linked list functions
1218 may be used to add and remove nodes from the linked list. This macro results
1219 in smaller executables by initializing the linked list in the data section,
1220 instead if calling the InitializeListHead() function to perform the
1221 equivalent operation.
1222
1223 @param ListHead The head note of a list to initiailize.
1224
1225 **/
1226 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1227
1228
1229 /**
1230 Initializes the head node of a doubly linked list, and returns the pointer to
1231 the head node of the doubly linked list.
1232
1233 Initializes the forward and backward links of a new linked list. After
1234 initializing a linked list with this function, the other linked list
1235 functions may be used to add and remove nodes from the linked list. It is up
1236 to the caller of this function to allocate the memory for ListHead.
1237
1238 If ListHead is NULL, then ASSERT().
1239
1240 @param ListHead A pointer to the head node of a new doubly linked list.
1241
1242 @return ListHead
1243
1244 **/
1245 LIST_ENTRY *
1246 EFIAPI
1247 InitializeListHead (
1248 IN OUT LIST_ENTRY *ListHead
1249 );
1250
1251
1252 /**
1253 Adds a node to the beginning of a doubly linked list, and returns the pointer
1254 to the head node of the doubly linked list.
1255
1256 Adds the node Entry at the beginning of the doubly linked list denoted by
1257 ListHead, and returns ListHead.
1258
1259 If ListHead is NULL, then ASSERT().
1260 If Entry is NULL, then ASSERT().
1261 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1262 InitializeListHead(), then ASSERT().
1263 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1264 of nodes in ListHead, including the ListHead node, is greater than or
1265 equal to PcdMaximumLinkedListLength, then ASSERT().
1266
1267 @param ListHead A pointer to the head node of a doubly linked list.
1268 @param Entry A pointer to a node that is to be inserted at the beginning
1269 of a doubly linked list.
1270
1271 @return ListHead
1272
1273 **/
1274 LIST_ENTRY *
1275 EFIAPI
1276 InsertHeadList (
1277 IN OUT LIST_ENTRY *ListHead,
1278 IN OUT LIST_ENTRY *Entry
1279 );
1280
1281
1282 /**
1283 Adds a node to the end of a doubly linked list, and returns the pointer to
1284 the head node of the doubly linked list.
1285
1286 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1287 and returns ListHead.
1288
1289 If ListHead is NULL, then ASSERT().
1290 If Entry is NULL, then ASSERT().
1291 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1292 InitializeListHead(), then ASSERT().
1293 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1294 of nodes in ListHead, including the ListHead node, is greater than or
1295 equal to PcdMaximumLinkedListLength, then ASSERT().
1296
1297 @param ListHead A pointer to the head node of a doubly linked list.
1298 @param Entry A pointer to a node that is to be added at the end of the
1299 doubly linked list.
1300
1301 @return ListHead
1302
1303 **/
1304 LIST_ENTRY *
1305 EFIAPI
1306 InsertTailList (
1307 IN OUT LIST_ENTRY *ListHead,
1308 IN OUT LIST_ENTRY *Entry
1309 );
1310
1311
1312 /**
1313 Retrieves the first node of a doubly linked list.
1314
1315 Returns the first node of a doubly linked list. List must have been
1316 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1317 If List is empty, then List is returned.
1318
1319 If List is NULL, then ASSERT().
1320 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1321 InitializeListHead(), then ASSERT().
1322 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1323 in List, including the List node, is greater than or equal to
1324 PcdMaximumLinkedListLength, then ASSERT().
1325
1326 @param List A pointer to the head node of a doubly linked list.
1327
1328 @return The first node of a doubly linked list.
1329 @retval NULL The list is empty.
1330
1331 **/
1332 LIST_ENTRY *
1333 EFIAPI
1334 GetFirstNode (
1335 IN CONST LIST_ENTRY *List
1336 );
1337
1338
1339 /**
1340 Retrieves the next node of a doubly linked list.
1341
1342 Returns the node of a doubly linked list that follows Node.
1343 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1344 or InitializeListHead(). If List is empty, then List is returned.
1345
1346 If List is NULL, then ASSERT().
1347 If Node is NULL, then ASSERT().
1348 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1349 InitializeListHead(), then ASSERT().
1350 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1351 PcdMaximumLinkedListLenth nodes, then ASSERT().
1352 If Node is not a node in List, then ASSERT().
1353
1354 @param List A pointer to the head node of a doubly linked list.
1355 @param Node A pointer to a node in the doubly linked list.
1356
1357 @return Pointer to the next node if one exists. Otherwise a null value which
1358 is actually List is returned.
1359
1360 **/
1361 LIST_ENTRY *
1362 EFIAPI
1363 GetNextNode (
1364 IN CONST LIST_ENTRY *List,
1365 IN CONST LIST_ENTRY *Node
1366 );
1367
1368
1369 /**
1370 Checks to see if a doubly linked list is empty or not.
1371
1372 Checks to see if the doubly linked list is empty. If the linked list contains
1373 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1374
1375 If ListHead is NULL, then ASSERT().
1376 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1377 InitializeListHead(), then ASSERT().
1378 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1379 in List, including the List node, is greater than or equal to
1380 PcdMaximumLinkedListLength, then ASSERT().
1381
1382 @param ListHead A pointer to the head node of a doubly linked list.
1383
1384 @retval TRUE The linked list is empty.
1385 @retval FALSE The linked list is not empty.
1386
1387 **/
1388 BOOLEAN
1389 EFIAPI
1390 IsListEmpty (
1391 IN CONST LIST_ENTRY *ListHead
1392 );
1393
1394
1395 /**
1396 Determines if a node in a doubly linked list is the head node of a the same
1397 doubly linked list. This function is typically used to terminate a loop that
1398 traverses all the nodes in a doubly linked list starting with the head node.
1399
1400 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1401 nodes in the doubly linked list specified by List. List must have been
1402 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1403
1404 If List is NULL, then ASSERT().
1405 If Node is NULL, then ASSERT().
1406 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1407 then ASSERT().
1408 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1409 in List, including the List node, is greater than or equal to
1410 PcdMaximumLinkedListLength, then ASSERT().
1411 If Node is not a node in List and Node is not equal to List, then ASSERT().
1412
1413 @param List A pointer to the head node of a doubly linked list.
1414 @param Node A pointer to a node in the doubly linked list.
1415
1416 @retval TRUE Node is one of the nodes in the doubly linked list.
1417 @retval FALSE Node is not one of the nodes in the doubly linked list.
1418
1419 **/
1420 BOOLEAN
1421 EFIAPI
1422 IsNull (
1423 IN CONST LIST_ENTRY *List,
1424 IN CONST LIST_ENTRY *Node
1425 );
1426
1427
1428 /**
1429 Determines if a node the last node in a doubly linked list.
1430
1431 Returns TRUE if Node is the last node in the doubly linked list specified by
1432 List. Otherwise, FALSE is returned. List must have been initialized with
1433 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1434
1435 If List is NULL, then ASSERT().
1436 If Node is NULL, then ASSERT().
1437 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1438 InitializeListHead(), then ASSERT().
1439 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1440 in List, including the List node, is greater than or equal to
1441 PcdMaximumLinkedListLength, then ASSERT().
1442 If Node is not a node in List, then ASSERT().
1443
1444 @param List A pointer to the head node of a doubly linked list.
1445 @param Node A pointer to a node in the doubly linked list.
1446
1447 @retval TRUE Node is the last node in the linked list.
1448 @retval FALSE Node is not the last node in the linked list.
1449
1450 **/
1451 BOOLEAN
1452 EFIAPI
1453 IsNodeAtEnd (
1454 IN CONST LIST_ENTRY *List,
1455 IN CONST LIST_ENTRY *Node
1456 );
1457
1458
1459 /**
1460 Swaps the location of two nodes in a doubly linked list, and returns the
1461 first node after the swap.
1462
1463 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1464 Otherwise, the location of the FirstEntry node is swapped with the location
1465 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1466 same double linked list as FirstEntry and that double linked list must have
1467 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1468 SecondEntry is returned after the nodes are swapped.
1469
1470 If FirstEntry is NULL, then ASSERT().
1471 If SecondEntry is NULL, then ASSERT().
1472 If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
1473 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1474 linked list containing the FirstEntry and SecondEntry nodes, including
1475 the FirstEntry and SecondEntry nodes, is greater than or equal to
1476 PcdMaximumLinkedListLength, then ASSERT().
1477
1478 @param FirstEntry A pointer to a node in a linked list.
1479 @param SecondEntry A pointer to another node in the same linked list.
1480
1481 @return SecondEntry.
1482
1483 **/
1484 LIST_ENTRY *
1485 EFIAPI
1486 SwapListEntries (
1487 IN OUT LIST_ENTRY *FirstEntry,
1488 IN OUT LIST_ENTRY *SecondEntry
1489 );
1490
1491
1492 /**
1493 Removes a node from a doubly linked list, and returns the node that follows
1494 the removed node.
1495
1496 Removes the node Entry from a doubly linked list. It is up to the caller of
1497 this function to release the memory used by this node if that is required. On
1498 exit, the node following Entry in the doubly linked list is returned. If
1499 Entry is the only node in the linked list, then the head node of the linked
1500 list is returned.
1501
1502 If Entry is NULL, then ASSERT().
1503 If Entry is the head node of an empty list, then ASSERT().
1504 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1505 linked list containing Entry, including the Entry node, is greater than
1506 or equal to PcdMaximumLinkedListLength, then ASSERT().
1507
1508 @param Entry A pointer to a node in a linked list.
1509
1510 @return Entry.
1511
1512 **/
1513 LIST_ENTRY *
1514 EFIAPI
1515 RemoveEntryList (
1516 IN CONST LIST_ENTRY *Entry
1517 );
1518
1519 //
1520 // Math Services
1521 //
1522
1523 /**
1524 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1525 with zeros. The shifted value is returned.
1526
1527 This function shifts the 64-bit value Operand to the left by Count bits. The
1528 low Count bits are set to zero. The shifted value is returned.
1529
1530 If Count is greater than 63, then ASSERT().
1531
1532 @param Operand The 64-bit operand to shift left.
1533 @param Count The number of bits to shift left.
1534
1535 @return Operand << Count.
1536
1537 **/
1538 UINT64
1539 EFIAPI
1540 LShiftU64 (
1541 IN UINT64 Operand,
1542 IN UINTN Count
1543 );
1544
1545
1546 /**
1547 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1548 filled with zeros. The shifted value is returned.
1549
1550 This function shifts the 64-bit value Operand to the right by Count bits. The
1551 high Count bits are set to zero. The shifted value is returned.
1552
1553 If Count is greater than 63, then ASSERT().
1554
1555 @param Operand The 64-bit operand to shift right.
1556 @param Count The number of bits to shift right.
1557
1558 @return Operand >> Count
1559
1560 **/
1561 UINT64
1562 EFIAPI
1563 RShiftU64 (
1564 IN UINT64 Operand,
1565 IN UINTN Count
1566 );
1567
1568
1569 /**
1570 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1571 with original integer's bit 63. The shifted value is returned.
1572
1573 This function shifts the 64-bit value Operand to the right by Count bits. The
1574 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1575
1576 If Count is greater than 63, then ASSERT().
1577
1578 @param Operand The 64-bit operand to shift right.
1579 @param Count The number of bits to shift right.
1580
1581 @return Operand >> Count
1582
1583 **/
1584 UINT64
1585 EFIAPI
1586 ARShiftU64 (
1587 IN UINT64 Operand,
1588 IN UINTN Count
1589 );
1590
1591
1592 /**
1593 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1594 with the high bits that were rotated.
1595
1596 This function rotates the 32-bit value Operand to the left by Count bits. The
1597 low Count bits are fill with the high Count bits of Operand. The rotated
1598 value is returned.
1599
1600 If Count is greater than 31, then ASSERT().
1601
1602 @param Operand The 32-bit operand to rotate left.
1603 @param Count The number of bits to rotate left.
1604
1605 @return Operand << Count
1606
1607 **/
1608 UINT32
1609 EFIAPI
1610 LRotU32 (
1611 IN UINT32 Operand,
1612 IN UINTN Count
1613 );
1614
1615
1616 /**
1617 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1618 with the low bits that were rotated.
1619
1620 This function rotates the 32-bit value Operand to the right by Count bits.
1621 The high Count bits are fill with the low Count bits of Operand. The rotated
1622 value is returned.
1623
1624 If Count is greater than 31, then ASSERT().
1625
1626 @param Operand The 32-bit operand to rotate right.
1627 @param Count The number of bits to rotate right.
1628
1629 @return Operand >> Count
1630
1631 **/
1632 UINT32
1633 EFIAPI
1634 RRotU32 (
1635 IN UINT32 Operand,
1636 IN UINTN Count
1637 );
1638
1639
1640 /**
1641 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1642 with the high bits that were rotated.
1643
1644 This function rotates the 64-bit value Operand to the left by Count bits. The
1645 low Count bits are fill with the high Count bits of Operand. The rotated
1646 value is returned.
1647
1648 If Count is greater than 63, then ASSERT().
1649
1650 @param Operand The 64-bit operand to rotate left.
1651 @param Count The number of bits to rotate left.
1652
1653 @return Operand << Count
1654
1655 **/
1656 UINT64
1657 EFIAPI
1658 LRotU64 (
1659 IN UINT64 Operand,
1660 IN UINTN Count
1661 );
1662
1663
1664 /**
1665 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1666 with the high low bits that were rotated.
1667
1668 This function rotates the 64-bit value Operand to the right by Count bits.
1669 The high Count bits are fill with the low Count bits of Operand. The rotated
1670 value is returned.
1671
1672 If Count is greater than 63, then ASSERT().
1673
1674 @param Operand The 64-bit operand to rotate right.
1675 @param Count The number of bits to rotate right.
1676
1677 @return Operand >> Count
1678
1679 **/
1680 UINT64
1681 EFIAPI
1682 RRotU64 (
1683 IN UINT64 Operand,
1684 IN UINTN Count
1685 );
1686
1687
1688 /**
1689 Returns the bit position of the lowest bit set in a 32-bit value.
1690
1691 This function computes the bit position of the lowest bit set in the 32-bit
1692 value specified by Operand. If Operand is zero, then -1 is returned.
1693 Otherwise, a value between 0 and 31 is returned.
1694
1695 @param Operand The 32-bit operand to evaluate.
1696
1697 @retval 0..31 The lowest bit set in Operand was found.
1698 @retval -1 Operand is zero.
1699
1700 **/
1701 INTN
1702 EFIAPI
1703 LowBitSet32 (
1704 IN UINT32 Operand
1705 );
1706
1707
1708 /**
1709 Returns the bit position of the lowest bit set in a 64-bit value.
1710
1711 This function computes the bit position of the lowest bit set in the 64-bit
1712 value specified by Operand. If Operand is zero, then -1 is returned.
1713 Otherwise, a value between 0 and 63 is returned.
1714
1715 @param Operand The 64-bit operand to evaluate.
1716
1717 @retval 0..63 The lowest bit set in Operand was found.
1718 @retval -1 Operand is zero.
1719
1720
1721 **/
1722 INTN
1723 EFIAPI
1724 LowBitSet64 (
1725 IN UINT64 Operand
1726 );
1727
1728
1729 /**
1730 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1731 to log2(x).
1732
1733 This function computes the bit position of the highest bit set in the 32-bit
1734 value specified by Operand. If Operand is zero, then -1 is returned.
1735 Otherwise, a value between 0 and 31 is returned.
1736
1737 @param Operand The 32-bit operand to evaluate.
1738
1739 @retval 0..31 Position of the highest bit set in Operand if found.
1740 @retval -1 Operand is zero.
1741
1742 **/
1743 INTN
1744 EFIAPI
1745 HighBitSet32 (
1746 IN UINT32 Operand
1747 );
1748
1749
1750 /**
1751 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1752 to log2(x).
1753
1754 This function computes the bit position of the highest bit set in the 64-bit
1755 value specified by Operand. If Operand is zero, then -1 is returned.
1756 Otherwise, a value between 0 and 63 is returned.
1757
1758 @param Operand The 64-bit operand to evaluate.
1759
1760 @retval 0..63 Position of the highest bit set in Operand if found.
1761 @retval -1 Operand is zero.
1762
1763 **/
1764 INTN
1765 EFIAPI
1766 HighBitSet64 (
1767 IN UINT64 Operand
1768 );
1769
1770
1771 /**
1772 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1773 1 << log2(x).
1774
1775 This function computes the value of the highest bit set in the 32-bit value
1776 specified by Operand. If Operand is zero, then zero is returned.
1777
1778 @param Operand The 32-bit operand to evaluate.
1779
1780 @return 1 << HighBitSet32(Operand)
1781 @retval 0 Operand is zero.
1782
1783 **/
1784 UINT32
1785 EFIAPI
1786 GetPowerOfTwo32 (
1787 IN UINT32 Operand
1788 );
1789
1790
1791 /**
1792 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1793 1 << log2(x).
1794
1795 This function computes the value of the highest bit set in the 64-bit value
1796 specified by Operand. If Operand is zero, then zero is returned.
1797
1798 @param Operand The 64-bit operand to evaluate.
1799
1800 @return 1 << HighBitSet64(Operand)
1801 @retval 0 Operand is zero.
1802
1803 **/
1804 UINT64
1805 EFIAPI
1806 GetPowerOfTwo64 (
1807 IN UINT64 Operand
1808 );
1809
1810
1811 /**
1812 Switches the endianess of a 16-bit integer.
1813
1814 This function swaps the bytes in a 16-bit unsigned value to switch the value
1815 from little endian to big endian or vice versa. The byte swapped value is
1816 returned.
1817
1818 @param Value A 16-bit unsigned value.
1819
1820 @return The byte swapped Value.
1821
1822 **/
1823 UINT16
1824 EFIAPI
1825 SwapBytes16 (
1826 IN UINT16 Value
1827 );
1828
1829
1830 /**
1831 Switches the endianess of a 32-bit integer.
1832
1833 This function swaps the bytes in a 32-bit unsigned value to switch the value
1834 from little endian to big endian or vice versa. The byte swapped value is
1835 returned.
1836
1837 @param Value A 32-bit unsigned value.
1838
1839 @return The byte swapped Value.
1840
1841 **/
1842 UINT32
1843 EFIAPI
1844 SwapBytes32 (
1845 IN UINT32 Value
1846 );
1847
1848
1849 /**
1850 Switches the endianess of a 64-bit integer.
1851
1852 This function swaps the bytes in a 64-bit unsigned value to switch the value
1853 from little endian to big endian or vice versa. The byte swapped value is
1854 returned.
1855
1856 @param Value A 64-bit unsigned value.
1857
1858 @return The byte swapped Value.
1859
1860 **/
1861 UINT64
1862 EFIAPI
1863 SwapBytes64 (
1864 IN UINT64 Value
1865 );
1866
1867
1868 /**
1869 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1870 generates a 64-bit unsigned result.
1871
1872 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1873 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1874 bit unsigned result is returned.
1875
1876 @param Multiplicand A 64-bit unsigned value.
1877 @param Multiplier A 32-bit unsigned value.
1878
1879 @return Multiplicand * Multiplier
1880
1881 **/
1882 UINT64
1883 EFIAPI
1884 MultU64x32 (
1885 IN UINT64 Multiplicand,
1886 IN UINT32 Multiplier
1887 );
1888
1889
1890 /**
1891 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1892 generates a 64-bit unsigned result.
1893
1894 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1895 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1896 bit unsigned result is returned.
1897
1898 @param Multiplicand A 64-bit unsigned value.
1899 @param Multiplier A 64-bit unsigned value.
1900
1901 @return Multiplicand * Multiplier
1902
1903 **/
1904 UINT64
1905 EFIAPI
1906 MultU64x64 (
1907 IN UINT64 Multiplicand,
1908 IN UINT64 Multiplier
1909 );
1910
1911
1912 /**
1913 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1914 64-bit signed result.
1915
1916 This function multiples the 64-bit signed value Multiplicand by the 64-bit
1917 signed value Multiplier and generates a 64-bit signed result. This 64-bit
1918 signed result is returned.
1919
1920 @param Multiplicand A 64-bit signed value.
1921 @param Multiplier A 64-bit signed value.
1922
1923 @return Multiplicand * Multiplier
1924
1925 **/
1926 INT64
1927 EFIAPI
1928 MultS64x64 (
1929 IN INT64 Multiplicand,
1930 IN INT64 Multiplier
1931 );
1932
1933
1934 /**
1935 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1936 a 64-bit unsigned result.
1937
1938 This function divides the 64-bit unsigned value Dividend by the 32-bit
1939 unsigned value Divisor and generates a 64-bit unsigned quotient. This
1940 function returns the 64-bit unsigned quotient.
1941
1942 If Divisor is 0, then ASSERT().
1943
1944 @param Dividend A 64-bit unsigned value.
1945 @param Divisor A 32-bit unsigned value.
1946
1947 @return Dividend / Divisor
1948
1949 **/
1950 UINT64
1951 EFIAPI
1952 DivU64x32 (
1953 IN UINT64 Dividend,
1954 IN UINT32 Divisor
1955 );
1956
1957
1958 /**
1959 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1960 a 32-bit unsigned remainder.
1961
1962 This function divides the 64-bit unsigned value Dividend by the 32-bit
1963 unsigned value Divisor and generates a 32-bit remainder. This function
1964 returns the 32-bit unsigned remainder.
1965
1966 If Divisor is 0, then ASSERT().
1967
1968 @param Dividend A 64-bit unsigned value.
1969 @param Divisor A 32-bit unsigned value.
1970
1971 @return Dividend % Divisor
1972
1973 **/
1974 UINT32
1975 EFIAPI
1976 ModU64x32 (
1977 IN UINT64 Dividend,
1978 IN UINT32 Divisor
1979 );
1980
1981
1982 /**
1983 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1984 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
1985
1986 This function divides the 64-bit unsigned value Dividend by the 32-bit
1987 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
1988 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
1989 This function returns the 64-bit unsigned quotient.
1990
1991 If Divisor is 0, then ASSERT().
1992
1993 @param Dividend A 64-bit unsigned value.
1994 @param Divisor A 32-bit unsigned value.
1995 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
1996 optional and may be NULL.
1997
1998 @return Dividend / Divisor
1999
2000 **/
2001 UINT64
2002 EFIAPI
2003 DivU64x32Remainder (
2004 IN UINT64 Dividend,
2005 IN UINT32 Divisor,
2006 OUT UINT32 *Remainder OPTIONAL
2007 );
2008
2009
2010 /**
2011 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2012 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2013
2014 This function divides the 64-bit unsigned value Dividend by the 64-bit
2015 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2016 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2017 This function returns the 64-bit unsigned quotient.
2018
2019 If Divisor is 0, then ASSERT().
2020
2021 @param Dividend A 64-bit unsigned value.
2022 @param Divisor A 64-bit unsigned value.
2023 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2024 optional and may be NULL.
2025
2026 @return Dividend / Divisor
2027
2028 **/
2029 UINT64
2030 EFIAPI
2031 DivU64x64Remainder (
2032 IN UINT64 Dividend,
2033 IN UINT64 Divisor,
2034 OUT UINT64 *Remainder OPTIONAL
2035 );
2036
2037
2038 /**
2039 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2040 64-bit signed result and a optional 64-bit signed remainder.
2041
2042 This function divides the 64-bit signed value Dividend by the 64-bit signed
2043 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2044 NULL, then the 64-bit signed remainder is returned in Remainder. This
2045 function returns the 64-bit signed quotient.
2046
2047 It is the caller's responsibility to not call this function with a Divisor of 0.
2048 If Divisor is 0, then the quotient and remainder should be assumed to be
2049 the largest negative integer.
2050
2051 If Divisor is 0, then ASSERT().
2052
2053 @param Dividend A 64-bit signed value.
2054 @param Divisor A 64-bit signed value.
2055 @param Remainder A pointer to a 64-bit signed value. This parameter is
2056 optional and may be NULL.
2057
2058 @return Dividend / Divisor
2059
2060 **/
2061 INT64
2062 EFIAPI
2063 DivS64x64Remainder (
2064 IN INT64 Dividend,
2065 IN INT64 Divisor,
2066 OUT INT64 *Remainder OPTIONAL
2067 );
2068
2069
2070 /**
2071 Reads a 16-bit value from memory that may be unaligned.
2072
2073 This function returns the 16-bit value pointed to by Buffer. The function
2074 guarantees that the read operation does not produce an alignment fault.
2075
2076 If the Buffer is NULL, then ASSERT().
2077
2078 @param Buffer Pointer to a 16-bit value that may be unaligned.
2079
2080 @return The 16-bit value read from Buffer.
2081
2082 **/
2083 UINT16
2084 EFIAPI
2085 ReadUnaligned16 (
2086 IN CONST UINT16 *Buffer
2087 );
2088
2089
2090 /**
2091 Writes a 16-bit value to memory that may be unaligned.
2092
2093 This function writes the 16-bit value specified by Value to Buffer. Value is
2094 returned. The function guarantees that the write operation does not produce
2095 an alignment fault.
2096
2097 If the Buffer is NULL, then ASSERT().
2098
2099 @param Buffer Pointer to a 16-bit value that may be unaligned.
2100 @param Value 16-bit value to write to Buffer.
2101
2102 @return The 16-bit value to write to Buffer.
2103
2104 **/
2105 UINT16
2106 EFIAPI
2107 WriteUnaligned16 (
2108 OUT UINT16 *Buffer,
2109 IN UINT16 Value
2110 );
2111
2112
2113 /**
2114 Reads a 24-bit value from memory that may be unaligned.
2115
2116 This function returns the 24-bit value pointed to by Buffer. The function
2117 guarantees that the read operation does not produce an alignment fault.
2118
2119 If the Buffer is NULL, then ASSERT().
2120
2121 @param Buffer Pointer to a 24-bit value that may be unaligned.
2122
2123 @return The 24-bit value read from Buffer.
2124
2125 **/
2126 UINT32
2127 EFIAPI
2128 ReadUnaligned24 (
2129 IN CONST UINT32 *Buffer
2130 );
2131
2132
2133 /**
2134 Writes a 24-bit value to memory that may be unaligned.
2135
2136 This function writes the 24-bit value specified by Value to Buffer. Value is
2137 returned. The function guarantees that the write operation does not produce
2138 an alignment fault.
2139
2140 If the Buffer is NULL, then ASSERT().
2141
2142 @param Buffer Pointer to a 24-bit value that may be unaligned.
2143 @param Value 24-bit value to write to Buffer.
2144
2145 @return The 24-bit value to write to Buffer.
2146
2147 **/
2148 UINT32
2149 EFIAPI
2150 WriteUnaligned24 (
2151 OUT UINT32 *Buffer,
2152 IN UINT32 Value
2153 );
2154
2155
2156 /**
2157 Reads a 32-bit value from memory that may be unaligned.
2158
2159 This function returns the 32-bit value pointed to by Buffer. The function
2160 guarantees that the read operation does not produce an alignment fault.
2161
2162 If the Buffer is NULL, then ASSERT().
2163
2164 @param Buffer Pointer to a 32-bit value that may be unaligned.
2165
2166 @return The 32-bit value read from Buffer.
2167
2168 **/
2169 UINT32
2170 EFIAPI
2171 ReadUnaligned32 (
2172 IN CONST UINT32 *Buffer
2173 );
2174
2175
2176 /**
2177 Writes a 32-bit value to memory that may be unaligned.
2178
2179 This function writes the 32-bit value specified by Value to Buffer. Value is
2180 returned. The function guarantees that the write operation does not produce
2181 an alignment fault.
2182
2183 If the Buffer is NULL, then ASSERT().
2184
2185 @param Buffer Pointer to a 32-bit value that may be unaligned.
2186 @param Value 32-bit value to write to Buffer.
2187
2188 @return The 32-bit value to write to Buffer.
2189
2190 **/
2191 UINT32
2192 EFIAPI
2193 WriteUnaligned32 (
2194 OUT UINT32 *Buffer,
2195 IN UINT32 Value
2196 );
2197
2198
2199 /**
2200 Reads a 64-bit value from memory that may be unaligned.
2201
2202 This function returns the 64-bit value pointed to by Buffer. The function
2203 guarantees that the read operation does not produce an alignment fault.
2204
2205 If the Buffer is NULL, then ASSERT().
2206
2207 @param Buffer Pointer to a 64-bit value that may be unaligned.
2208
2209 @return The 64-bit value read from Buffer.
2210
2211 **/
2212 UINT64
2213 EFIAPI
2214 ReadUnaligned64 (
2215 IN CONST UINT64 *Buffer
2216 );
2217
2218
2219 /**
2220 Writes a 64-bit value to memory that may be unaligned.
2221
2222 This function writes the 64-bit value specified by Value to Buffer. Value is
2223 returned. The function guarantees that the write operation does not produce
2224 an alignment fault.
2225
2226 If the Buffer is NULL, then ASSERT().
2227
2228 @param Buffer Pointer to a 64-bit value that may be unaligned.
2229 @param Value 64-bit value to write to Buffer.
2230
2231 @return The 64-bit value to write to Buffer.
2232
2233 **/
2234 UINT64
2235 EFIAPI
2236 WriteUnaligned64 (
2237 OUT UINT64 *Buffer,
2238 IN UINT64 Value
2239 );
2240
2241
2242 //
2243 // Bit Field Functions
2244 //
2245
2246 /**
2247 Returns a bit field from an 8-bit value.
2248
2249 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2250
2251 If 8-bit operations are not supported, then ASSERT().
2252 If StartBit is greater than 7, then ASSERT().
2253 If EndBit is greater than 7, then ASSERT().
2254 If EndBit is less than StartBit, then ASSERT().
2255
2256 @param Operand Operand on which to perform the bitfield operation.
2257 @param StartBit The ordinal of the least significant bit in the bit field.
2258 Range 0..7.
2259 @param EndBit The ordinal of the most significant bit in the bit field.
2260 Range 0..7.
2261
2262 @return The bit field read.
2263
2264 **/
2265 UINT8
2266 EFIAPI
2267 BitFieldRead8 (
2268 IN UINT8 Operand,
2269 IN UINTN StartBit,
2270 IN UINTN EndBit
2271 );
2272
2273
2274 /**
2275 Writes a bit field to an 8-bit value, and returns the result.
2276
2277 Writes Value to the bit field specified by the StartBit and the EndBit in
2278 Operand. All other bits in Operand are preserved. The new 8-bit value is
2279 returned.
2280
2281 If 8-bit operations are not supported, then ASSERT().
2282 If StartBit is greater than 7, then ASSERT().
2283 If EndBit is greater than 7, then ASSERT().
2284 If EndBit is less than StartBit, then ASSERT().
2285
2286 @param Operand Operand on which to perform the bitfield operation.
2287 @param StartBit The ordinal of the least significant bit in the bit field.
2288 Range 0..7.
2289 @param EndBit The ordinal of the most significant bit in the bit field.
2290 Range 0..7.
2291 @param Value New value of the bit field.
2292
2293 @return The new 8-bit value.
2294
2295 **/
2296 UINT8
2297 EFIAPI
2298 BitFieldWrite8 (
2299 IN UINT8 Operand,
2300 IN UINTN StartBit,
2301 IN UINTN EndBit,
2302 IN UINT8 Value
2303 );
2304
2305
2306 /**
2307 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2308 result.
2309
2310 Performs a bitwise OR between the bit field specified by StartBit
2311 and EndBit in Operand and the value specified by OrData. All other bits in
2312 Operand are preserved. The new 8-bit value is returned.
2313
2314 If 8-bit operations are not supported, then ASSERT().
2315 If StartBit is greater than 7, then ASSERT().
2316 If EndBit is greater than 7, then ASSERT().
2317 If EndBit is less than StartBit, then ASSERT().
2318
2319 @param Operand Operand on which to perform the bitfield operation.
2320 @param StartBit The ordinal of the least significant bit in the bit field.
2321 Range 0..7.
2322 @param EndBit The ordinal of the most significant bit in the bit field.
2323 Range 0..7.
2324 @param OrData The value to OR with the read value from the value
2325
2326 @return The new 8-bit value.
2327
2328 **/
2329 UINT8
2330 EFIAPI
2331 BitFieldOr8 (
2332 IN UINT8 Operand,
2333 IN UINTN StartBit,
2334 IN UINTN EndBit,
2335 IN UINT8 OrData
2336 );
2337
2338
2339 /**
2340 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2341 the result.
2342
2343 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2344 in Operand and the value specified by AndData. All other bits in Operand are
2345 preserved. The new 8-bit value is returned.
2346
2347 If 8-bit operations are not supported, then ASSERT().
2348 If StartBit is greater than 7, then ASSERT().
2349 If EndBit is greater than 7, then ASSERT().
2350 If EndBit is less than StartBit, then ASSERT().
2351
2352 @param Operand Operand on which to perform the bitfield operation.
2353 @param StartBit The ordinal of the least significant bit in the bit field.
2354 Range 0..7.
2355 @param EndBit The ordinal of the most significant bit in the bit field.
2356 Range 0..7.
2357 @param AndData The value to AND with the read value from the value.
2358
2359 @return The new 8-bit value.
2360
2361 **/
2362 UINT8
2363 EFIAPI
2364 BitFieldAnd8 (
2365 IN UINT8 Operand,
2366 IN UINTN StartBit,
2367 IN UINTN EndBit,
2368 IN UINT8 AndData
2369 );
2370
2371
2372 /**
2373 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2374 bitwise OR, and returns the result.
2375
2376 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2377 in Operand and the value specified by AndData, followed by a bitwise
2378 OR with value specified by OrData. All other bits in Operand are
2379 preserved. The new 8-bit value is returned.
2380
2381 If 8-bit operations are not supported, then ASSERT().
2382 If StartBit is greater than 7, then ASSERT().
2383 If EndBit is greater than 7, then ASSERT().
2384 If EndBit is less than StartBit, then ASSERT().
2385
2386 @param Operand Operand on which to perform the bitfield operation.
2387 @param StartBit The ordinal of the least significant bit in the bit field.
2388 Range 0..7.
2389 @param EndBit The ordinal of the most significant bit in the bit field.
2390 Range 0..7.
2391 @param AndData The value to AND with the read value from the value.
2392 @param OrData The value to OR with the result of the AND operation.
2393
2394 @return The new 8-bit value.
2395
2396 **/
2397 UINT8
2398 EFIAPI
2399 BitFieldAndThenOr8 (
2400 IN UINT8 Operand,
2401 IN UINTN StartBit,
2402 IN UINTN EndBit,
2403 IN UINT8 AndData,
2404 IN UINT8 OrData
2405 );
2406
2407
2408 /**
2409 Returns a bit field from a 16-bit value.
2410
2411 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2412
2413 If 16-bit operations are not supported, then ASSERT().
2414 If StartBit is greater than 15, then ASSERT().
2415 If EndBit is greater than 15, then ASSERT().
2416 If EndBit is less than StartBit, then ASSERT().
2417
2418 @param Operand Operand on which to perform the bitfield operation.
2419 @param StartBit The ordinal of the least significant bit in the bit field.
2420 Range 0..15.
2421 @param EndBit The ordinal of the most significant bit in the bit field.
2422 Range 0..15.
2423
2424 @return The bit field read.
2425
2426 **/
2427 UINT16
2428 EFIAPI
2429 BitFieldRead16 (
2430 IN UINT16 Operand,
2431 IN UINTN StartBit,
2432 IN UINTN EndBit
2433 );
2434
2435
2436 /**
2437 Writes a bit field to a 16-bit value, and returns the result.
2438
2439 Writes Value to the bit field specified by the StartBit and the EndBit in
2440 Operand. All other bits in Operand are preserved. The new 16-bit value is
2441 returned.
2442
2443 If 16-bit operations are not supported, then ASSERT().
2444 If StartBit is greater than 15, then ASSERT().
2445 If EndBit is greater than 15, then ASSERT().
2446 If EndBit is less than StartBit, then ASSERT().
2447
2448 @param Operand Operand on which to perform the bitfield operation.
2449 @param StartBit The ordinal of the least significant bit in the bit field.
2450 Range 0..15.
2451 @param EndBit The ordinal of the most significant bit in the bit field.
2452 Range 0..15.
2453 @param Value New value of the bit field.
2454
2455 @return The new 16-bit value.
2456
2457 **/
2458 UINT16
2459 EFIAPI
2460 BitFieldWrite16 (
2461 IN UINT16 Operand,
2462 IN UINTN StartBit,
2463 IN UINTN EndBit,
2464 IN UINT16 Value
2465 );
2466
2467
2468 /**
2469 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2470 result.
2471
2472 Performs a bitwise OR between the bit field specified by StartBit
2473 and EndBit in Operand and the value specified by OrData. All other bits in
2474 Operand are preserved. The new 16-bit value is returned.
2475
2476 If 16-bit operations are not supported, then ASSERT().
2477 If StartBit is greater than 15, then ASSERT().
2478 If EndBit is greater than 15, then ASSERT().
2479 If EndBit is less than StartBit, then ASSERT().
2480
2481 @param Operand Operand on which to perform the bitfield operation.
2482 @param StartBit The ordinal of the least significant bit in the bit field.
2483 Range 0..15.
2484 @param EndBit The ordinal of the most significant bit in the bit field.
2485 Range 0..15.
2486 @param OrData The value to OR with the read value from the value
2487
2488 @return The new 16-bit value.
2489
2490 **/
2491 UINT16
2492 EFIAPI
2493 BitFieldOr16 (
2494 IN UINT16 Operand,
2495 IN UINTN StartBit,
2496 IN UINTN EndBit,
2497 IN UINT16 OrData
2498 );
2499
2500
2501 /**
2502 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2503 the result.
2504
2505 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2506 in Operand and the value specified by AndData. All other bits in Operand are
2507 preserved. The new 16-bit value is returned.
2508
2509 If 16-bit operations are not supported, then ASSERT().
2510 If StartBit is greater than 15, then ASSERT().
2511 If EndBit is greater than 15, then ASSERT().
2512 If EndBit is less than StartBit, then ASSERT().
2513
2514 @param Operand Operand on which to perform the bitfield operation.
2515 @param StartBit The ordinal of the least significant bit in the bit field.
2516 Range 0..15.
2517 @param EndBit The ordinal of the most significant bit in the bit field.
2518 Range 0..15.
2519 @param AndData The value to AND with the read value from the value
2520
2521 @return The new 16-bit value.
2522
2523 **/
2524 UINT16
2525 EFIAPI
2526 BitFieldAnd16 (
2527 IN UINT16 Operand,
2528 IN UINTN StartBit,
2529 IN UINTN EndBit,
2530 IN UINT16 AndData
2531 );
2532
2533
2534 /**
2535 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2536 bitwise OR, and returns the result.
2537
2538 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2539 in Operand and the value specified by AndData, followed by a bitwise
2540 OR with value specified by OrData. All other bits in Operand are
2541 preserved. The new 16-bit value is returned.
2542
2543 If 16-bit operations are not supported, then ASSERT().
2544 If StartBit is greater than 15, then ASSERT().
2545 If EndBit is greater than 15, then ASSERT().
2546 If EndBit is less than StartBit, then ASSERT().
2547
2548 @param Operand Operand on which to perform the bitfield operation.
2549 @param StartBit The ordinal of the least significant bit in the bit field.
2550 Range 0..15.
2551 @param EndBit The ordinal of the most significant bit in the bit field.
2552 Range 0..15.
2553 @param AndData The value to AND with the read value from the value.
2554 @param OrData The value to OR with the result of the AND operation.
2555
2556 @return The new 16-bit value.
2557
2558 **/
2559 UINT16
2560 EFIAPI
2561 BitFieldAndThenOr16 (
2562 IN UINT16 Operand,
2563 IN UINTN StartBit,
2564 IN UINTN EndBit,
2565 IN UINT16 AndData,
2566 IN UINT16 OrData
2567 );
2568
2569
2570 /**
2571 Returns a bit field from a 32-bit value.
2572
2573 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2574
2575 If 32-bit operations are not supported, then ASSERT().
2576 If StartBit is greater than 31, then ASSERT().
2577 If EndBit is greater than 31, then ASSERT().
2578 If EndBit is less than StartBit, then ASSERT().
2579
2580 @param Operand Operand on which to perform the bitfield operation.
2581 @param StartBit The ordinal of the least significant bit in the bit field.
2582 Range 0..31.
2583 @param EndBit The ordinal of the most significant bit in the bit field.
2584 Range 0..31.
2585
2586 @return The bit field read.
2587
2588 **/
2589 UINT32
2590 EFIAPI
2591 BitFieldRead32 (
2592 IN UINT32 Operand,
2593 IN UINTN StartBit,
2594 IN UINTN EndBit
2595 );
2596
2597
2598 /**
2599 Writes a bit field to a 32-bit value, and returns the result.
2600
2601 Writes Value to the bit field specified by the StartBit and the EndBit in
2602 Operand. All other bits in Operand are preserved. The new 32-bit value is
2603 returned.
2604
2605 If 32-bit operations are not supported, then ASSERT().
2606 If StartBit is greater than 31, then ASSERT().
2607 If EndBit is greater than 31, then ASSERT().
2608 If EndBit is less than StartBit, then ASSERT().
2609
2610 @param Operand Operand on which to perform the bitfield operation.
2611 @param StartBit The ordinal of the least significant bit in the bit field.
2612 Range 0..31.
2613 @param EndBit The ordinal of the most significant bit in the bit field.
2614 Range 0..31.
2615 @param Value New value of the bit field.
2616
2617 @return The new 32-bit value.
2618
2619 **/
2620 UINT32
2621 EFIAPI
2622 BitFieldWrite32 (
2623 IN UINT32 Operand,
2624 IN UINTN StartBit,
2625 IN UINTN EndBit,
2626 IN UINT32 Value
2627 );
2628
2629
2630 /**
2631 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2632 result.
2633
2634 Performs a bitwise OR between the bit field specified by StartBit
2635 and EndBit in Operand and the value specified by OrData. All other bits in
2636 Operand are preserved. The new 32-bit value is returned.
2637
2638 If 32-bit operations are not supported, then ASSERT().
2639 If StartBit is greater than 31, then ASSERT().
2640 If EndBit is greater than 31, then ASSERT().
2641 If EndBit is less than StartBit, then ASSERT().
2642
2643 @param Operand Operand on which to perform the bitfield operation.
2644 @param StartBit The ordinal of the least significant bit in the bit field.
2645 Range 0..31.
2646 @param EndBit The ordinal of the most significant bit in the bit field.
2647 Range 0..31.
2648 @param OrData The value to OR with the read value from the value
2649
2650 @return The new 32-bit value.
2651
2652 **/
2653 UINT32
2654 EFIAPI
2655 BitFieldOr32 (
2656 IN UINT32 Operand,
2657 IN UINTN StartBit,
2658 IN UINTN EndBit,
2659 IN UINT32 OrData
2660 );
2661
2662
2663 /**
2664 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2665 the result.
2666
2667 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2668 in Operand and the value specified by AndData. All other bits in Operand are
2669 preserved. The new 32-bit value is returned.
2670
2671 If 32-bit operations are not supported, then ASSERT().
2672 If StartBit is greater than 31, then ASSERT().
2673 If EndBit is greater than 31, then ASSERT().
2674 If EndBit is less than StartBit, then ASSERT().
2675
2676 @param Operand Operand on which to perform the bitfield operation.
2677 @param StartBit The ordinal of the least significant bit in the bit field.
2678 Range 0..31.
2679 @param EndBit The ordinal of the most significant bit in the bit field.
2680 Range 0..31.
2681 @param AndData The value to AND with the read value from the value
2682
2683 @return The new 32-bit value.
2684
2685 **/
2686 UINT32
2687 EFIAPI
2688 BitFieldAnd32 (
2689 IN UINT32 Operand,
2690 IN UINTN StartBit,
2691 IN UINTN EndBit,
2692 IN UINT32 AndData
2693 );
2694
2695
2696 /**
2697 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2698 bitwise OR, and returns the result.
2699
2700 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2701 in Operand and the value specified by AndData, followed by a bitwise
2702 OR with value specified by OrData. All other bits in Operand are
2703 preserved. The new 32-bit value is returned.
2704
2705 If 32-bit operations are not supported, then ASSERT().
2706 If StartBit is greater than 31, then ASSERT().
2707 If EndBit is greater than 31, then ASSERT().
2708 If EndBit is less than StartBit, then ASSERT().
2709
2710 @param Operand Operand on which to perform the bitfield operation.
2711 @param StartBit The ordinal of the least significant bit in the bit field.
2712 Range 0..31.
2713 @param EndBit The ordinal of the most significant bit in the bit field.
2714 Range 0..31.
2715 @param AndData The value to AND with the read value from the value.
2716 @param OrData The value to OR with the result of the AND operation.
2717
2718 @return The new 32-bit value.
2719
2720 **/
2721 UINT32
2722 EFIAPI
2723 BitFieldAndThenOr32 (
2724 IN UINT32 Operand,
2725 IN UINTN StartBit,
2726 IN UINTN EndBit,
2727 IN UINT32 AndData,
2728 IN UINT32 OrData
2729 );
2730
2731
2732 /**
2733 Returns a bit field from a 64-bit value.
2734
2735 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2736
2737 If 64-bit operations are not supported, then ASSERT().
2738 If StartBit is greater than 63, then ASSERT().
2739 If EndBit is greater than 63, then ASSERT().
2740 If EndBit is less than StartBit, then ASSERT().
2741
2742 @param Operand Operand on which to perform the bitfield operation.
2743 @param StartBit The ordinal of the least significant bit in the bit field.
2744 Range 0..63.
2745 @param EndBit The ordinal of the most significant bit in the bit field.
2746 Range 0..63.
2747
2748 @return The bit field read.
2749
2750 **/
2751 UINT64
2752 EFIAPI
2753 BitFieldRead64 (
2754 IN UINT64 Operand,
2755 IN UINTN StartBit,
2756 IN UINTN EndBit
2757 );
2758
2759
2760 /**
2761 Writes a bit field to a 64-bit value, and returns the result.
2762
2763 Writes Value to the bit field specified by the StartBit and the EndBit in
2764 Operand. All other bits in Operand are preserved. The new 64-bit value is
2765 returned.
2766
2767 If 64-bit operations are not supported, then ASSERT().
2768 If StartBit is greater than 63, then ASSERT().
2769 If EndBit is greater than 63, then ASSERT().
2770 If EndBit is less than StartBit, then ASSERT().
2771
2772 @param Operand Operand on which to perform the bitfield operation.
2773 @param StartBit The ordinal of the least significant bit in the bit field.
2774 Range 0..63.
2775 @param EndBit The ordinal of the most significant bit in the bit field.
2776 Range 0..63.
2777 @param Value New value of the bit field.
2778
2779 @return The new 64-bit value.
2780
2781 **/
2782 UINT64
2783 EFIAPI
2784 BitFieldWrite64 (
2785 IN UINT64 Operand,
2786 IN UINTN StartBit,
2787 IN UINTN EndBit,
2788 IN UINT64 Value
2789 );
2790
2791
2792 /**
2793 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2794 result.
2795
2796 Performs a bitwise OR between the bit field specified by StartBit
2797 and EndBit in Operand and the value specified by OrData. All other bits in
2798 Operand are preserved. The new 64-bit value is returned.
2799
2800 If 64-bit operations are not supported, then ASSERT().
2801 If StartBit is greater than 63, then ASSERT().
2802 If EndBit is greater than 63, then ASSERT().
2803 If EndBit is less than StartBit, then ASSERT().
2804
2805 @param Operand Operand on which to perform the bitfield operation.
2806 @param StartBit The ordinal of the least significant bit in the bit field.
2807 Range 0..63.
2808 @param EndBit The ordinal of the most significant bit in the bit field.
2809 Range 0..63.
2810 @param OrData The value to OR with the read value from the value
2811
2812 @return The new 64-bit value.
2813
2814 **/
2815 UINT64
2816 EFIAPI
2817 BitFieldOr64 (
2818 IN UINT64 Operand,
2819 IN UINTN StartBit,
2820 IN UINTN EndBit,
2821 IN UINT64 OrData
2822 );
2823
2824
2825 /**
2826 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2827 the result.
2828
2829 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2830 in Operand and the value specified by AndData. All other bits in Operand are
2831 preserved. The new 64-bit value is returned.
2832
2833 If 64-bit operations are not supported, then ASSERT().
2834 If StartBit is greater than 63, then ASSERT().
2835 If EndBit is greater than 63, then ASSERT().
2836 If EndBit is less than StartBit, then ASSERT().
2837
2838 @param Operand Operand on which to perform the bitfield operation.
2839 @param StartBit The ordinal of the least significant bit in the bit field.
2840 Range 0..63.
2841 @param EndBit The ordinal of the most significant bit in the bit field.
2842 Range 0..63.
2843 @param AndData The value to AND with the read value from the value
2844
2845 @return The new 64-bit value.
2846
2847 **/
2848 UINT64
2849 EFIAPI
2850 BitFieldAnd64 (
2851 IN UINT64 Operand,
2852 IN UINTN StartBit,
2853 IN UINTN EndBit,
2854 IN UINT64 AndData
2855 );
2856
2857
2858 /**
2859 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2860 bitwise OR, and returns the result.
2861
2862 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2863 in Operand and the value specified by AndData, followed by a bitwise
2864 OR with value specified by OrData. All other bits in Operand are
2865 preserved. The new 64-bit value is returned.
2866
2867 If 64-bit operations are not supported, then ASSERT().
2868 If StartBit is greater than 63, then ASSERT().
2869 If EndBit is greater than 63, then ASSERT().
2870 If EndBit is less than StartBit, then ASSERT().
2871
2872 @param Operand Operand on which to perform the bitfield operation.
2873 @param StartBit The ordinal of the least significant bit in the bit field.
2874 Range 0..63.
2875 @param EndBit The ordinal of the most significant bit in the bit field.
2876 Range 0..63.
2877 @param AndData The value to AND with the read value from the value.
2878 @param OrData The value to OR with the result of the AND operation.
2879
2880 @return The new 64-bit value.
2881
2882 **/
2883 UINT64
2884 EFIAPI
2885 BitFieldAndThenOr64 (
2886 IN UINT64 Operand,
2887 IN UINTN StartBit,
2888 IN UINTN EndBit,
2889 IN UINT64 AndData,
2890 IN UINT64 OrData
2891 );
2892
2893
2894 //
2895 // Base Library Synchronization Functions
2896 //
2897
2898 /**
2899 Retrieves the architecture specific spin lock alignment requirements for
2900 optimal spin lock performance.
2901
2902 This function retrieves the spin lock alignment requirements for optimal
2903 performance on a given CPU architecture. The spin lock alignment must be a
2904 power of two and is returned by this function. If there are no alignment
2905 requirements, then 1 must be returned. The spin lock synchronization
2906 functions must function correctly if the spin lock size and alignment values
2907 returned by this function are not used at all. These values are hints to the
2908 consumers of the spin lock synchronization functions to obtain optimal spin
2909 lock performance.
2910
2911 @return The architecture specific spin lock alignment.
2912
2913 **/
2914 UINTN
2915 EFIAPI
2916 GetSpinLockProperties (
2917 VOID
2918 );
2919
2920
2921 /**
2922 Initializes a spin lock to the released state and returns the spin lock.
2923
2924 This function initializes the spin lock specified by SpinLock to the released
2925 state, and returns SpinLock. Optimal performance can be achieved by calling
2926 GetSpinLockProperties() to determine the size and alignment requirements for
2927 SpinLock.
2928
2929 If SpinLock is NULL, then ASSERT().
2930
2931 @param SpinLock A pointer to the spin lock to initialize to the released
2932 state.
2933
2934 @return SpinLock in release state.
2935
2936 **/
2937 SPIN_LOCK *
2938 EFIAPI
2939 InitializeSpinLock (
2940 OUT SPIN_LOCK *SpinLock
2941 );
2942
2943
2944 /**
2945 Waits until a spin lock can be placed in the acquired state.
2946
2947 This function checks the state of the spin lock specified by SpinLock. If
2948 SpinLock is in the released state, then this function places SpinLock in the
2949 acquired state and returns SpinLock. Otherwise, this function waits
2950 indefinitely for the spin lock to be released, and then places it in the
2951 acquired state and returns SpinLock. All state transitions of SpinLock must
2952 be performed using MP safe mechanisms.
2953
2954 If SpinLock is NULL, then ASSERT().
2955 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
2956 If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
2957 PcdSpinLockTimeout microseconds, then ASSERT().
2958
2959 @param SpinLock A pointer to the spin lock to place in the acquired state.
2960
2961 @return SpinLock acquired lock.
2962
2963 **/
2964 SPIN_LOCK *
2965 EFIAPI
2966 AcquireSpinLock (
2967 IN OUT SPIN_LOCK *SpinLock
2968 );
2969
2970
2971 /**
2972 Attempts to place a spin lock in the acquired state.
2973
2974 This function checks the state of the spin lock specified by SpinLock. If
2975 SpinLock is in the released state, then this function places SpinLock in the
2976 acquired state and returns TRUE. Otherwise, FALSE is returned. All state
2977 transitions of SpinLock must be performed using MP safe mechanisms.
2978
2979 If SpinLock is NULL, then ASSERT().
2980 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
2981
2982 @param SpinLock A pointer to the spin lock to place in the acquired state.
2983
2984 @retval TRUE SpinLock was placed in the acquired state.
2985 @retval FALSE SpinLock could not be acquired.
2986
2987 **/
2988 BOOLEAN
2989 EFIAPI
2990 AcquireSpinLockOrFail (
2991 IN OUT SPIN_LOCK *SpinLock
2992 );
2993
2994
2995 /**
2996 Releases a spin lock.
2997
2998 This function places the spin lock specified by SpinLock in the release state
2999 and returns SpinLock.
3000
3001 If SpinLock is NULL, then ASSERT().
3002 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
3003
3004 @param SpinLock A pointer to the spin lock to release.
3005
3006 @return SpinLock released lock.
3007
3008 **/
3009 SPIN_LOCK *
3010 EFIAPI
3011 ReleaseSpinLock (
3012 IN OUT SPIN_LOCK *SpinLock
3013 );
3014
3015
3016 /**
3017 Performs an atomic increment of an 32-bit unsigned integer.
3018
3019 Performs an atomic increment of the 32-bit unsigned integer specified by
3020 Value and returns the incremented value. The increment operation must be
3021 performed using MP safe mechanisms. The state of the return value is not
3022 guaranteed to be MP safe.
3023
3024 If Value is NULL, then ASSERT().
3025
3026 @param Value A pointer to the 32-bit value to increment.
3027
3028 @return The incremented value.
3029
3030 **/
3031 UINT32
3032 EFIAPI
3033 InterlockedIncrement (
3034 IN UINT32 *Value
3035 );
3036
3037
3038 /**
3039 Performs an atomic decrement of an 32-bit unsigned integer.
3040
3041 Performs an atomic decrement of the 32-bit unsigned integer specified by
3042 Value and returns the decremented value. The decrement operation must be
3043 performed using MP safe mechanisms. The state of the return value is not
3044 guaranteed to be MP safe.
3045
3046 If Value is NULL, then ASSERT().
3047
3048 @param Value A pointer to the 32-bit value to decrement.
3049
3050 @return The decremented value.
3051
3052 **/
3053 UINT32
3054 EFIAPI
3055 InterlockedDecrement (
3056 IN UINT32 *Value
3057 );
3058
3059
3060 /**
3061 Performs an atomic compare exchange operation on a 32-bit unsigned integer.
3062
3063 Performs an atomic compare exchange operation on the 32-bit unsigned integer
3064 specified by Value. If Value is equal to CompareValue, then Value is set to
3065 ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
3066 then Value is returned. The compare exchange operation must be performed using
3067 MP safe mechanisms.
3068
3069 If Value is NULL, then ASSERT().
3070
3071 @param Value A pointer to the 32-bit value for the compare exchange
3072 operation.
3073 @param CompareValue 32-bit value used in compare operation.
3074 @param ExchangeValue 32-bit value used in exchange operation.
3075
3076 @return The original *Value before exchange.
3077
3078 **/
3079 UINT32
3080 EFIAPI
3081 InterlockedCompareExchange32 (
3082 IN OUT UINT32 *Value,
3083 IN UINT32 CompareValue,
3084 IN UINT32 ExchangeValue
3085 );
3086
3087
3088 /**
3089 Performs an atomic compare exchange operation on a 64-bit unsigned integer.
3090
3091 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
3092 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
3093 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
3094 The compare exchange operation must be performed using MP safe mechanisms.
3095
3096 If Value is NULL, then ASSERT().
3097
3098 @param Value A pointer to the 64-bit value for the compare exchange
3099 operation.
3100 @param CompareValue 64-bit value used in compare operation.
3101 @param ExchangeValue 64-bit value used in exchange operation.
3102
3103 @return The original *Value before exchange.
3104
3105 **/
3106 UINT64
3107 EFIAPI
3108 InterlockedCompareExchange64 (
3109 IN OUT UINT64 *Value,
3110 IN UINT64 CompareValue,
3111 IN UINT64 ExchangeValue
3112 );
3113
3114
3115 /**
3116 Performs an atomic compare exchange operation on a pointer value.
3117
3118 Performs an atomic compare exchange operation on the pointer value specified
3119 by Value. If Value is equal to CompareValue, then Value is set to
3120 ExchangeValue and CompareValue is returned. If Value is not equal to
3121 CompareValue, then Value is returned. The compare exchange operation must be
3122 performed using MP safe mechanisms.
3123
3124 If Value is NULL, then ASSERT().
3125
3126 @param Value A pointer to the pointer value for the compare exchange
3127 operation.
3128 @param CompareValue Pointer value used in compare operation.
3129 @param ExchangeValue Pointer value used in exchange operation.
3130
3131 @return The original *Value before exchange.
3132 **/
3133 VOID *
3134 EFIAPI
3135 InterlockedCompareExchangePointer (
3136 IN OUT VOID **Value,
3137 IN VOID *CompareValue,
3138 IN VOID *ExchangeValue
3139 );
3140
3141
3142 //
3143 // Base Library Checksum Functions
3144 //
3145
3146 /**
3147 Returns the sum of all elements in a buffer in unit of UINT8.
3148 During calculation, the carry bits are dropped.
3149
3150 This function calculates the sum of all elements in a buffer
3151 in unit of UINT8. The carry bits in result of addition are dropped.
3152 The result is returned as UINT8. If Length is Zero, then Zero is
3153 returned.
3154
3155 If Buffer is NULL, then ASSERT().
3156 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3157
3158 @param Buffer Pointer to the buffer to carry out the sum operation.
3159 @param Length The size, in bytes, of Buffer.
3160
3161 @return Sum The sum of Buffer with carry bits dropped during additions.
3162
3163 **/
3164 UINT8
3165 EFIAPI
3166 CalculateSum8 (
3167 IN CONST UINT8 *Buffer,
3168 IN UINTN Length
3169 );
3170
3171
3172 /**
3173 Returns the two's complement checksum of all elements in a buffer
3174 of 8-bit values.
3175
3176 This function first calculates the sum of the 8-bit values in the
3177 buffer specified by Buffer and Length. The carry bits in the result
3178 of addition are dropped. Then, the two's complement of the sum is
3179 returned. If Length is 0, then 0 is returned.
3180
3181 If Buffer is NULL, then ASSERT().
3182 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3183
3184 @param Buffer Pointer to the buffer to carry out the checksum operation.
3185 @param Length The size, in bytes, of Buffer.
3186
3187 @return Checksum The 2's complement checksum of Buffer.
3188
3189 **/
3190 UINT8
3191 EFIAPI
3192 CalculateCheckSum8 (
3193 IN CONST UINT8 *Buffer,
3194 IN UINTN Length
3195 );
3196
3197
3198 /**
3199 Returns the sum of all elements in a buffer of 16-bit values. During
3200 calculation, the carry bits are dropped.
3201
3202 This function calculates the sum of the 16-bit values in the buffer
3203 specified by Buffer and Length. The carry bits in result of addition are dropped.
3204 The 16-bit result is returned. If Length is 0, then 0 is returned.
3205
3206 If Buffer is NULL, then ASSERT().
3207 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3208 If Length is not aligned on a 16-bit boundary, then ASSERT().
3209 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3210
3211 @param Buffer Pointer to the buffer to carry out the sum operation.
3212 @param Length The size, in bytes, of Buffer.
3213
3214 @return Sum The sum of Buffer with carry bits dropped during additions.
3215
3216 **/
3217 UINT16
3218 EFIAPI
3219 CalculateSum16 (
3220 IN CONST UINT16 *Buffer,
3221 IN UINTN Length
3222 );
3223
3224
3225 /**
3226 Returns the two's complement checksum of all elements in a buffer of
3227 16-bit values.
3228
3229 This function first calculates the sum of the 16-bit values in the buffer
3230 specified by Buffer and Length. The carry bits in the result of addition
3231 are dropped. Then, the two's complement of the sum is returned. If Length
3232 is 0, then 0 is returned.
3233
3234 If Buffer is NULL, then ASSERT().
3235 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3236 If Length is not aligned on a 16-bit boundary, then ASSERT().
3237 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3238
3239 @param Buffer Pointer to the buffer to carry out the checksum operation.
3240 @param Length The size, in bytes, of Buffer.
3241
3242 @return Checksum The 2's complement checksum of Buffer.
3243
3244 **/
3245 UINT16
3246 EFIAPI
3247 CalculateCheckSum16 (
3248 IN CONST UINT16 *Buffer,
3249 IN UINTN Length
3250 );
3251
3252
3253 /**
3254 Returns the sum of all elements in a buffer of 32-bit values. During
3255 calculation, the carry bits are dropped.
3256
3257 This function calculates the sum of the 32-bit values in the buffer
3258 specified by Buffer and Length. The carry bits in result of addition are dropped.
3259 The 32-bit result is returned. If Length is 0, then 0 is returned.
3260
3261 If Buffer is NULL, then ASSERT().
3262 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3263 If Length is not aligned on a 32-bit boundary, then ASSERT().
3264 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3265
3266 @param Buffer Pointer to the buffer to carry out the sum operation.
3267 @param Length The size, in bytes, of Buffer.
3268
3269 @return Sum The sum of Buffer with carry bits dropped during additions.
3270
3271 **/
3272 UINT32
3273 EFIAPI
3274 CalculateSum32 (
3275 IN CONST UINT32 *Buffer,
3276 IN UINTN Length
3277 );
3278
3279
3280 /**
3281 Returns the two's complement checksum of all elements in a buffer of
3282 32-bit values.
3283
3284 This function first calculates the sum of the 32-bit values in the buffer
3285 specified by Buffer and Length. The carry bits in the result of addition
3286 are dropped. Then, the two's complement of the sum is returned. If Length
3287 is 0, then 0 is returned.
3288
3289 If Buffer is NULL, then ASSERT().
3290 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3291 If Length is not aligned on a 32-bit boundary, then ASSERT().
3292 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3293
3294 @param Buffer Pointer to the buffer to carry out the checksum operation.
3295 @param Length The size, in bytes, of Buffer.
3296
3297 @return Checksum The 2's complement checksum of Buffer.
3298
3299 **/
3300 UINT32
3301 EFIAPI
3302 CalculateCheckSum32 (
3303 IN CONST UINT32 *Buffer,
3304 IN UINTN Length
3305 );
3306
3307
3308 /**
3309 Returns the sum of all elements in a buffer of 64-bit values. During
3310 calculation, the carry bits are dropped.
3311
3312 This function calculates the sum of the 64-bit values in the buffer
3313 specified by Buffer and Length. The carry bits in result of addition are dropped.
3314 The 64-bit result is returned. If Length is 0, then 0 is returned.
3315
3316 If Buffer is NULL, then ASSERT().
3317 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3318 If Length is not aligned on a 64-bit boundary, then ASSERT().
3319 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3320
3321 @param Buffer Pointer to the buffer to carry out the sum operation.
3322 @param Length The size, in bytes, of Buffer.
3323
3324 @return Sum The sum of Buffer with carry bits dropped during additions.
3325
3326 **/
3327 UINT64
3328 EFIAPI
3329 CalculateSum64 (
3330 IN CONST UINT64 *Buffer,
3331 IN UINTN Length
3332 );
3333
3334
3335 /**
3336 Returns the two's complement checksum of all elements in a buffer of
3337 64-bit values.
3338
3339 This function first calculates the sum of the 64-bit values in the buffer
3340 specified by Buffer and Length. The carry bits in the result of addition
3341 are dropped. Then, the two's complement of the sum is returned. If Length
3342 is 0, then 0 is returned.
3343
3344 If Buffer is NULL, then ASSERT().
3345 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3346 If Length is not aligned on a 64-bit boundary, then ASSERT().
3347 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3348
3349 @param Buffer Pointer to the buffer to carry out the checksum operation.
3350 @param Length The size, in bytes, of Buffer.
3351
3352 @return Checksum The 2's complement checksum of Buffer.
3353
3354 **/
3355 UINT64
3356 EFIAPI
3357 CalculateCheckSum64 (
3358 IN CONST UINT64 *Buffer,
3359 IN UINTN Length
3360 );
3361
3362
3363 //
3364 // Base Library CPU Functions
3365 //
3366
3367 /**
3368 Function entry point used when a stack switch is requested with SwitchStack()
3369
3370 @param Context1 Context1 parameter passed into SwitchStack().
3371 @param Context2 Context2 parameter passed into SwitchStack().
3372
3373 **/
3374 typedef
3375 VOID
3376 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3377 IN VOID *Context1, OPTIONAL
3378 IN VOID *Context2 OPTIONAL
3379 );
3380
3381
3382 /**
3383 Used to serialize load and store operations.
3384
3385 All loads and stores that proceed calls to this function are guaranteed to be
3386 globally visible when this function returns.
3387
3388 **/
3389 VOID
3390 EFIAPI
3391 MemoryFence (
3392 VOID
3393 );
3394
3395
3396 /**
3397 Saves the current CPU context that can be restored with a call to LongJump()
3398 and returns 0.
3399
3400 Saves the current CPU context in the buffer specified by JumpBuffer and
3401 returns 0. The initial call to SetJump() must always return 0. Subsequent
3402 calls to LongJump() cause a non-zero value to be returned by SetJump().
3403
3404 If JumpBuffer is NULL, then ASSERT().
3405 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3406
3407 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3408 The same structure must never be used for more than one CPU architecture context.
3409 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3410 SetJump()/LongJump() is not currently supported for the EBC processor type.
3411
3412 @param JumpBuffer A pointer to CPU context buffer.
3413
3414 @retval 0 Indicates a return from SetJump().
3415
3416 **/
3417 UINTN
3418 EFIAPI
3419 SetJump (
3420 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3421 );
3422
3423
3424 /**
3425 Restores the CPU context that was saved with SetJump().
3426
3427 Restores the CPU context from the buffer specified by JumpBuffer. This
3428 function never returns to the caller. Instead is resumes execution based on
3429 the state of JumpBuffer.
3430
3431 If JumpBuffer is NULL, then ASSERT().
3432 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3433 If Value is 0, then ASSERT().
3434
3435 @param JumpBuffer A pointer to CPU context buffer.
3436 @param Value The value to return when the SetJump() context is
3437 restored and must be non-zero.
3438
3439 **/
3440 VOID
3441 EFIAPI
3442 LongJump (
3443 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3444 IN UINTN Value
3445 );
3446
3447
3448 /**
3449 Enables CPU interrupts.
3450
3451 **/
3452 VOID
3453 EFIAPI
3454 EnableInterrupts (
3455 VOID
3456 );
3457
3458
3459 /**
3460 Disables CPU interrupts.
3461
3462 **/
3463 VOID
3464 EFIAPI
3465 DisableInterrupts (
3466 VOID
3467 );
3468
3469
3470 /**
3471 Disables CPU interrupts and returns the interrupt state prior to the disable
3472 operation.
3473
3474 @retval TRUE CPU interrupts were enabled on entry to this call.
3475 @retval FALSE CPU interrupts were disabled on entry to this call.
3476
3477 **/
3478 BOOLEAN
3479 EFIAPI
3480 SaveAndDisableInterrupts (
3481 VOID
3482 );
3483
3484
3485 /**
3486 Enables CPU interrupts for the smallest window required to capture any
3487 pending interrupts.
3488
3489 **/
3490 VOID
3491 EFIAPI
3492 EnableDisableInterrupts (
3493 VOID
3494 );
3495
3496
3497 /**
3498 Retrieves the current CPU interrupt state.
3499
3500 Returns TRUE is interrupts are currently enabled. Otherwise
3501 returns FALSE.
3502
3503 @retval TRUE CPU interrupts are enabled.
3504 @retval FALSE CPU interrupts are disabled.
3505
3506 **/
3507 BOOLEAN
3508 EFIAPI
3509 GetInterruptState (
3510 VOID
3511 );
3512
3513
3514 /**
3515 Set the current CPU interrupt state.
3516
3517 Sets the current CPU interrupt state to the state specified by
3518 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3519 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3520 returned.
3521
3522 @param InterruptState TRUE if interrupts should enabled. FALSE if
3523 interrupts should be disabled.
3524
3525 @return InterruptState
3526
3527 **/
3528 BOOLEAN
3529 EFIAPI
3530 SetInterruptState (
3531 IN BOOLEAN InterruptState
3532 );
3533
3534
3535 /**
3536 Requests CPU to pause for a short period of time.
3537
3538 Requests CPU to pause for a short period of time. Typically used in MP
3539 systems to prevent memory starvation while waiting for a spin lock.
3540
3541 **/
3542 VOID
3543 EFIAPI
3544 CpuPause (
3545 VOID
3546 );
3547
3548
3549 /**
3550 Transfers control to a function starting with a new stack.
3551
3552 Transfers control to the function specified by EntryPoint using the
3553 new stack specified by NewStack and passing in the parameters specified
3554 by Context1 and Context2. Context1 and Context2 are optional and may
3555 be NULL. The function EntryPoint must never return. This function
3556 supports a variable number of arguments following the NewStack parameter.
3557 These additional arguments are ignored on IA-32, x64, and EBC.
3558 IPF CPUs expect one additional parameter of type VOID * that specifies
3559 the new backing store pointer.
3560
3561 If EntryPoint is NULL, then ASSERT().
3562 If NewStack is NULL, then ASSERT().
3563
3564 @param EntryPoint A pointer to function to call with the new stack.
3565 @param Context1 A pointer to the context to pass into the EntryPoint
3566 function.
3567 @param Context2 A pointer to the context to pass into the EntryPoint
3568 function.
3569 @param NewStack A pointer to the new stack to use for the EntryPoint
3570 function.
3571 @param ... This variable argument list is ignored for IA32, x64, and EBC.
3572 For IPF, this variable argument list is expected to contain
3573 a single parameter of type VOID * that specifies the new backing
3574 store pointer.
3575
3576
3577 **/
3578 VOID
3579 EFIAPI
3580 SwitchStack (
3581 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3582 IN VOID *Context1, OPTIONAL
3583 IN VOID *Context2, OPTIONAL
3584 IN VOID *NewStack,
3585 ...
3586 );
3587
3588
3589 /**
3590 Generates a breakpoint on the CPU.
3591
3592 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3593 that code can resume normal execution after the breakpoint.
3594
3595 **/
3596 VOID
3597 EFIAPI
3598 CpuBreakpoint (
3599 VOID
3600 );
3601
3602
3603 /**
3604 Executes an infinite loop.
3605
3606 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3607 past the loop and the code that follows the loop must execute properly. This
3608 implies that the infinite loop must not cause the code that follow it to be
3609 optimized away.
3610
3611 **/
3612 VOID
3613 EFIAPI
3614 CpuDeadLoop (
3615 VOID
3616 );
3617
3618 #if defined (MDE_CPU_IPF)
3619
3620 /**
3621 Flush a range of cache lines in the cache coherency domain of the calling
3622 CPU.
3623
3624 Flushes the cache lines specified by Address and Length. If Address is not aligned
3625 on a cache line boundary, then entire cache line containing Address is flushed.
3626 If Address + Length is not aligned on a cache line boundary, then the entire cache
3627 line containing Address + Length - 1 is flushed. This function may choose to flush
3628 the entire cache if that is more efficient than flushing the specified range. If
3629 Length is 0, the no cache lines are flushed. Address is returned.
3630 This function is only available on IPF.
3631
3632 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3633
3634 @param Address The base address of the instruction lines to invalidate. If
3635 the CPU is in a physical addressing mode, then Address is a
3636 physical address. If the CPU is in a virtual addressing mode,
3637 then Address is a virtual address.
3638
3639 @param Length The number of bytes to invalidate from the instruction cache.
3640
3641 @return Address.
3642
3643 **/
3644 VOID *
3645 EFIAPI
3646 AsmFlushCacheRange (
3647 IN VOID *Address,
3648 IN UINTN Length
3649 );
3650
3651
3652 /**
3653 Executes a FC instruction
3654 Executes a FC instruction on the cache line specified by Address.
3655 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3656 An implementation may flush a larger region. This function is only available on IPF.
3657
3658 @param Address The Address of cache line to be flushed.
3659
3660 @return The address of FC instruction executed.
3661
3662 **/
3663 UINT64
3664 EFIAPI
3665 AsmFc (
3666 IN UINT64 Address
3667 );
3668
3669
3670 /**
3671 Executes a FC.I instruction.
3672 Executes a FC.I instruction on the cache line specified by Address.
3673 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3674 An implementation may flush a larger region. This function is only available on IPF.
3675
3676 @param Address The Address of cache line to be flushed.
3677
3678 @return The address of FC.I instruction executed.
3679
3680 **/
3681 UINT64
3682 EFIAPI
3683 AsmFci (
3684 IN UINT64 Address
3685 );
3686
3687
3688 /**
3689 Reads the current value of a Processor Identifier Register (CPUID).
3690
3691 Reads and returns the current value of Processor Identifier Register specified by Index.
3692 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3693 registers) is determined by CPUID [3] bits {7:0}.
3694 No parameter checking is performed on Index. If the Index value is beyond the
3695 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3696 must either guarantee that Index is valid, or the caller must set up fault handlers to
3697 catch the faults. This function is only available on IPF.
3698
3699 @param Index The 8-bit Processor Identifier Register index to read.
3700
3701 @return The current value of Processor Identifier Register specified by Index.
3702
3703 **/
3704 UINT64
3705 EFIAPI
3706 AsmReadCpuid (
3707 IN UINT8 Index
3708 );
3709
3710
3711 /**
3712 Reads the current value of 64-bit Processor Status Register (PSR).
3713 This function is only available on IPF.
3714
3715 @return The current value of PSR.
3716
3717 **/
3718 UINT64
3719 EFIAPI
3720 AsmReadPsr (
3721 VOID
3722 );
3723
3724
3725 /**
3726 Writes the current value of 64-bit Processor Status Register (PSR).
3727
3728 No parameter checking is performed on Value. All bits of Value corresponding to
3729 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3730 The caller must either guarantee that Value is valid, or the caller must set up
3731 fault handlers to catch the faults. This function is only available on IPF.
3732
3733 @param Value The 64-bit value to write to PSR.
3734
3735 @return The 64-bit value written to the PSR.
3736
3737 **/
3738 UINT64
3739 EFIAPI
3740 AsmWritePsr (
3741 IN UINT64 Value
3742 );
3743
3744
3745 /**
3746 Reads the current value of 64-bit Kernel Register #0 (KR0).
3747
3748 Reads and returns the current value of KR0.
3749 This function is only available on IPF.
3750
3751 @return The current value of KR0.
3752
3753 **/
3754 UINT64
3755 EFIAPI
3756 AsmReadKr0 (
3757 VOID
3758 );
3759
3760
3761 /**
3762 Reads the current value of 64-bit Kernel Register #1 (KR1).
3763
3764 Reads and returns the current value of KR1.
3765 This function is only available on IPF.
3766
3767 @return The current value of KR1.
3768
3769 **/
3770 UINT64
3771 EFIAPI
3772 AsmReadKr1 (
3773 VOID
3774 );
3775
3776
3777 /**
3778 Reads the current value of 64-bit Kernel Register #2 (KR2).
3779
3780 Reads and returns the current value of KR2.
3781 This function is only available on IPF.
3782
3783 @return The current value of KR2.
3784
3785 **/
3786 UINT64
3787 EFIAPI
3788 AsmReadKr2 (
3789 VOID
3790 );
3791
3792
3793 /**
3794 Reads the current value of 64-bit Kernel Register #3 (KR3).
3795
3796 Reads and returns the current value of KR3.
3797 This function is only available on IPF.
3798
3799 @return The current value of KR3.
3800
3801 **/
3802 UINT64
3803 EFIAPI
3804 AsmReadKr3 (
3805 VOID
3806 );
3807
3808
3809 /**
3810 Reads the current value of 64-bit Kernel Register #4 (KR4).
3811
3812 Reads and returns the current value of KR4.
3813 This function is only available on IPF.
3814
3815 @return The current value of KR4.
3816
3817 **/
3818 UINT64
3819 EFIAPI
3820 AsmReadKr4 (
3821 VOID
3822 );
3823
3824
3825 /**
3826 Reads the current value of 64-bit Kernel Register #5 (KR5).
3827
3828 Reads and returns the current value of KR5.
3829 This function is only available on IPF.
3830
3831 @return The current value of KR5.
3832
3833 **/
3834 UINT64
3835 EFIAPI
3836 AsmReadKr5 (
3837 VOID
3838 );
3839
3840
3841 /**
3842 Reads the current value of 64-bit Kernel Register #6 (KR6).
3843
3844 Reads and returns the current value of KR6.
3845 This function is only available on IPF.
3846
3847 @return The current value of KR6.
3848
3849 **/
3850 UINT64
3851 EFIAPI
3852 AsmReadKr6 (
3853 VOID
3854 );
3855
3856
3857 /**
3858 Reads the current value of 64-bit Kernel Register #7 (KR7).
3859
3860 Reads and returns the current value of KR7.
3861 This function is only available on IPF.
3862
3863 @return The current value of KR7.
3864
3865 **/
3866 UINT64
3867 EFIAPI
3868 AsmReadKr7 (
3869 VOID
3870 );
3871
3872
3873 /**
3874 Write the current value of 64-bit Kernel Register #0 (KR0).
3875
3876 Writes the current value of KR0. The 64-bit value written to
3877 the KR0 is returned. This function is only available on IPF.
3878
3879 @param Value The 64-bit value to write to KR0.
3880
3881 @return The 64-bit value written to the KR0.
3882
3883 **/
3884 UINT64
3885 EFIAPI
3886 AsmWriteKr0 (
3887 IN UINT64 Value
3888 );
3889
3890
3891 /**
3892 Write the current value of 64-bit Kernel Register #1 (KR1).
3893
3894 Writes the current value of KR1. The 64-bit value written to
3895 the KR1 is returned. This function is only available on IPF.
3896
3897 @param Value The 64-bit value to write to KR1.
3898
3899 @return The 64-bit value written to the KR1.
3900
3901 **/
3902 UINT64
3903 EFIAPI
3904 AsmWriteKr1 (
3905 IN UINT64 Value
3906 );
3907
3908
3909 /**
3910 Write the current value of 64-bit Kernel Register #2 (KR2).
3911
3912 Writes the current value of KR2. The 64-bit value written to
3913 the KR2 is returned. This function is only available on IPF.
3914
3915 @param Value The 64-bit value to write to KR2.
3916
3917 @return The 64-bit value written to the KR2.
3918
3919 **/
3920 UINT64
3921 EFIAPI
3922 AsmWriteKr2 (
3923 IN UINT64 Value
3924 );
3925
3926
3927 /**
3928 Write the current value of 64-bit Kernel Register #3 (KR3).
3929
3930 Writes the current value of KR3. The 64-bit value written to
3931 the KR3 is returned. This function is only available on IPF.
3932
3933 @param Value The 64-bit value to write to KR3.
3934
3935 @return The 64-bit value written to the KR3.
3936
3937 **/
3938 UINT64
3939 EFIAPI
3940 AsmWriteKr3 (
3941 IN UINT64 Value
3942 );
3943
3944
3945 /**
3946 Write the current value of 64-bit Kernel Register #4 (KR4).
3947
3948 Writes the current value of KR4. The 64-bit value written to
3949 the KR4 is returned. This function is only available on IPF.
3950
3951 @param Value The 64-bit value to write to KR4.
3952
3953 @return The 64-bit value written to the KR4.
3954
3955 **/
3956 UINT64
3957 EFIAPI
3958 AsmWriteKr4 (
3959 IN UINT64 Value
3960 );
3961
3962
3963 /**
3964 Write the current value of 64-bit Kernel Register #5 (KR5).
3965
3966 Writes the current value of KR5. The 64-bit value written to
3967 the KR5 is returned. This function is only available on IPF.
3968
3969 @param Value The 64-bit value to write to KR5.
3970
3971 @return The 64-bit value written to the KR5.
3972
3973 **/
3974 UINT64
3975 EFIAPI
3976 AsmWriteKr5 (
3977 IN UINT64 Value
3978 );
3979
3980
3981 /**
3982 Write the current value of 64-bit Kernel Register #6 (KR6).
3983
3984 Writes the current value of KR6. The 64-bit value written to
3985 the KR6 is returned. This function is only available on IPF.
3986
3987 @param Value The 64-bit value to write to KR6.
3988
3989 @return The 64-bit value written to the KR6.
3990
3991 **/
3992 UINT64
3993 EFIAPI
3994 AsmWriteKr6 (
3995 IN UINT64 Value
3996 );
3997
3998
3999 /**
4000 Write the current value of 64-bit Kernel Register #7 (KR7).
4001
4002 Writes the current value of KR7. The 64-bit value written to
4003 the KR7 is returned. This function is only available on IPF.
4004
4005 @param Value The 64-bit value to write to KR7.
4006
4007 @return The 64-bit value written to the KR7.
4008
4009 **/
4010 UINT64
4011 EFIAPI
4012 AsmWriteKr7 (
4013 IN UINT64 Value
4014 );
4015
4016
4017 /**
4018 Reads the current value of Interval Timer Counter Register (ITC).
4019
4020 Reads and returns the current value of ITC.
4021 This function is only available on IPF.
4022
4023 @return The current value of ITC.
4024
4025 **/
4026 UINT64
4027 EFIAPI
4028 AsmReadItc (
4029 VOID
4030 );
4031
4032
4033 /**
4034 Reads the current value of Interval Timer Vector Register (ITV).
4035
4036 Reads and returns the current value of ITV.
4037 This function is only available on IPF.
4038
4039 @return The current value of ITV.
4040
4041 **/
4042 UINT64
4043 EFIAPI
4044 AsmReadItv (
4045 VOID
4046 );
4047
4048
4049 /**
4050 Reads the current value of Interval Timer Match Register (ITM).
4051
4052 Reads and returns the current value of ITM.
4053 This function is only available on IPF.
4054
4055 @return The current value of ITM.
4056 **/
4057 UINT64
4058 EFIAPI
4059 AsmReadItm (
4060 VOID
4061 );
4062
4063
4064 /**
4065 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
4066
4067 Writes the current value of ITC. The 64-bit value written to the ITC is returned.
4068 This function is only available on IPF.
4069
4070 @param Value The 64-bit value to write to ITC.
4071
4072 @return The 64-bit value written to the ITC.
4073
4074 **/
4075 UINT64
4076 EFIAPI
4077 AsmWriteItc (
4078 IN UINT64 Value
4079 );
4080
4081
4082 /**
4083 Writes the current value of 64-bit Interval Timer Match Register (ITM).
4084
4085 Writes the current value of ITM. The 64-bit value written to the ITM is returned.
4086 This function is only available on IPF.
4087
4088 @param Value The 64-bit value to write to ITM.
4089
4090 @return The 64-bit value written to the ITM.
4091
4092 **/
4093 UINT64
4094 EFIAPI
4095 AsmWriteItm (
4096 IN UINT64 Value
4097 );
4098
4099
4100 /**
4101 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
4102
4103 Writes the current value of ITV. The 64-bit value written to the ITV is returned.
4104 No parameter checking is performed on Value. All bits of Value corresponding to
4105 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
4106 The caller must either guarantee that Value is valid, or the caller must set up
4107 fault handlers to catch the faults.
4108 This function is only available on IPF.
4109
4110 @param Value The 64-bit value to write to ITV.
4111
4112 @return The 64-bit value written to the ITV.
4113
4114 **/
4115 UINT64
4116 EFIAPI
4117 AsmWriteItv (
4118 IN UINT64 Value
4119 );
4120
4121
4122 /**
4123 Reads the current value of Default Control Register (DCR).
4124
4125 Reads and returns the current value of DCR. This function is only available on IPF.
4126
4127 @return The current value of DCR.
4128
4129 **/
4130 UINT64
4131 EFIAPI
4132 AsmReadDcr (
4133 VOID
4134 );
4135
4136
4137 /**
4138 Reads the current value of Interruption Vector Address Register (IVA).
4139
4140 Reads and returns the current value of IVA. This function is only available on IPF.
4141
4142 @return The current value of IVA.
4143 **/
4144 UINT64
4145 EFIAPI
4146 AsmReadIva (
4147 VOID
4148 );
4149
4150
4151 /**
4152 Reads the current value of Page Table Address Register (PTA).
4153
4154 Reads and returns the current value of PTA. This function is only available on IPF.
4155
4156 @return The current value of PTA.
4157
4158 **/
4159 UINT64
4160 EFIAPI
4161 AsmReadPta (
4162 VOID
4163 );
4164
4165
4166 /**
4167 Writes the current value of 64-bit Default Control Register (DCR).
4168
4169 Writes the current value of DCR. The 64-bit value written to the DCR is returned.
4170 No parameter checking is performed on Value. All bits of Value corresponding to
4171 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4172 The caller must either guarantee that Value is valid, or the caller must set up
4173 fault handlers to catch the faults.
4174 This function is only available on IPF.
4175
4176 @param Value The 64-bit value to write to DCR.
4177
4178 @return The 64-bit value written to the DCR.
4179
4180 **/
4181 UINT64
4182 EFIAPI
4183 AsmWriteDcr (
4184 IN UINT64 Value
4185 );
4186
4187
4188 /**
4189 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
4190
4191 Writes the current value of IVA. The 64-bit value written to the IVA is returned.
4192 The size of vector table is 32 K bytes and is 32 K bytes aligned
4193 the low 15 bits of Value is ignored when written.
4194 This function is only available on IPF.
4195
4196 @param Value The 64-bit value to write to IVA.
4197
4198 @return The 64-bit value written to the IVA.
4199
4200 **/
4201 UINT64
4202 EFIAPI
4203 AsmWriteIva (
4204 IN UINT64 Value
4205 );
4206
4207
4208 /**
4209 Writes the current value of 64-bit Page Table Address Register (PTA).
4210
4211 Writes the current value of PTA. The 64-bit value written to the PTA is returned.
4212 No parameter checking is performed on Value. All bits of Value corresponding to
4213 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4214 The caller must either guarantee that Value is valid, or the caller must set up
4215 fault handlers to catch the faults.
4216 This function is only available on IPF.
4217
4218 @param Value The 64-bit value to write to PTA.
4219
4220 @return The 64-bit value written to the PTA.
4221 **/
4222 UINT64
4223 EFIAPI
4224 AsmWritePta (
4225 IN UINT64 Value
4226 );
4227
4228
4229 /**
4230 Reads the current value of Local Interrupt ID Register (LID).
4231
4232 Reads and returns the current value of LID. This function is only available on IPF.
4233
4234 @return The current value of LID.
4235
4236 **/
4237 UINT64
4238 EFIAPI
4239 AsmReadLid (
4240 VOID
4241 );
4242
4243
4244 /**
4245 Reads the current value of External Interrupt Vector Register (IVR).
4246
4247 Reads and returns the current value of IVR. This function is only available on IPF.
4248
4249 @return The current value of IVR.
4250
4251 **/
4252 UINT64
4253 EFIAPI
4254 AsmReadIvr (
4255 VOID
4256 );
4257
4258
4259 /**
4260 Reads the current value of Task Priority Register (TPR).
4261
4262 Reads and returns the current value of TPR. This function is only available on IPF.
4263
4264 @return The current value of TPR.
4265
4266 **/
4267 UINT64
4268 EFIAPI
4269 AsmReadTpr (
4270 VOID
4271 );
4272
4273
4274 /**
4275 Reads the current value of External Interrupt Request Register #0 (IRR0).
4276
4277 Reads and returns the current value of IRR0. This function is only available on IPF.
4278
4279 @return The current value of IRR0.
4280
4281 **/
4282 UINT64
4283 EFIAPI
4284 AsmReadIrr0 (
4285 VOID
4286 );
4287
4288
4289 /**
4290 Reads the current value of External Interrupt Request Register #1 (IRR1).
4291
4292 Reads and returns the current value of IRR1. This function is only available on IPF.
4293
4294 @return The current value of IRR1.
4295
4296 **/
4297 UINT64
4298 EFIAPI
4299 AsmReadIrr1 (
4300 VOID
4301 );
4302
4303
4304 /**
4305 Reads the current value of External Interrupt Request Register #2 (IRR2).
4306
4307 Reads and returns the current value of IRR2. This function is only available on IPF.
4308
4309 @return The current value of IRR2.
4310
4311 **/
4312 UINT64
4313 EFIAPI
4314 AsmReadIrr2 (
4315 VOID
4316 );
4317
4318
4319 /**
4320 Reads the current value of External Interrupt Request Register #3 (IRR3).
4321
4322 Reads and returns the current value of IRR3. This function is only available on IPF.
4323
4324 @return The current value of IRR3.
4325
4326 **/
4327 UINT64
4328 EFIAPI
4329 AsmReadIrr3 (
4330 VOID
4331 );
4332
4333
4334 /**
4335 Reads the current value of Performance Monitor Vector Register (PMV).
4336
4337 Reads and returns the current value of PMV. This function is only available on IPF.
4338
4339 @return The current value of PMV.
4340
4341 **/
4342 UINT64
4343 EFIAPI
4344 AsmReadPmv (
4345 VOID
4346 );
4347
4348
4349 /**
4350 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4351
4352 Reads and returns the current value of CMCV. This function is only available on IPF.
4353
4354 @return The current value of CMCV.
4355
4356 **/
4357 UINT64
4358 EFIAPI
4359 AsmReadCmcv (
4360 VOID
4361 );
4362
4363
4364 /**
4365 Reads the current value of Local Redirection Register #0 (LRR0).
4366
4367 Reads and returns the current value of LRR0. This function is only available on IPF.
4368
4369 @return The current value of LRR0.
4370
4371 **/
4372 UINT64
4373 EFIAPI
4374 AsmReadLrr0 (
4375 VOID
4376 );
4377
4378
4379 /**
4380 Reads the current value of Local Redirection Register #1 (LRR1).
4381
4382 Reads and returns the current value of LRR1. This function is only available on IPF.
4383
4384 @return The current value of LRR1.
4385
4386 **/
4387 UINT64
4388 EFIAPI
4389 AsmReadLrr1 (
4390 VOID
4391 );
4392
4393
4394 /**
4395 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4396
4397 Writes the current value of LID. The 64-bit value written to the LID is returned.
4398 No parameter checking is performed on Value. All bits of Value corresponding to
4399 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4400 The caller must either guarantee that Value is valid, or the caller must set up
4401 fault handlers to catch the faults.
4402 This function is only available on IPF.
4403
4404 @param Value The 64-bit value to write to LID.
4405
4406 @return The 64-bit value written to the LID.
4407
4408 **/
4409 UINT64
4410 EFIAPI
4411 AsmWriteLid (
4412 IN UINT64 Value
4413 );
4414
4415
4416 /**
4417 Writes the current value of 64-bit Task Priority Register (TPR).
4418
4419 Writes the current value of TPR. The 64-bit value written to the TPR is returned.
4420 No parameter checking is performed on Value. All bits of Value corresponding to
4421 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4422 The caller must either guarantee that Value is valid, or the caller must set up
4423 fault handlers to catch the faults.
4424 This function is only available on IPF.
4425
4426 @param Value The 64-bit value to write to TPR.
4427
4428 @return The 64-bit value written to the TPR.
4429
4430 **/
4431 UINT64
4432 EFIAPI
4433 AsmWriteTpr (
4434 IN UINT64 Value
4435 );
4436
4437
4438 /**
4439 Performs a write operation on End OF External Interrupt Register (EOI).
4440
4441 Writes a value of 0 to the EOI Register. This function is only available on IPF.
4442
4443 **/
4444 VOID
4445 EFIAPI
4446 AsmWriteEoi (
4447 VOID
4448 );
4449
4450
4451 /**
4452 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4453
4454 Writes the current value of PMV. The 64-bit value written to the PMV is returned.
4455 No parameter checking is performed on Value. All bits of Value corresponding
4456 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4457 The caller must either guarantee that Value is valid, or the caller must set up
4458 fault handlers to catch the faults.
4459 This function is only available on IPF.
4460
4461 @param Value The 64-bit value to write to PMV.
4462
4463 @return The 64-bit value written to the PMV.
4464
4465 **/
4466 UINT64
4467 EFIAPI
4468 AsmWritePmv (
4469 IN UINT64 Value
4470 );
4471
4472
4473 /**
4474 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4475
4476 Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.
4477 No parameter checking is performed on Value. All bits of Value corresponding
4478 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4479 The caller must either guarantee that Value is valid, or the caller must set up
4480 fault handlers to catch the faults.
4481 This function is only available on IPF.
4482
4483 @param Value The 64-bit value to write to CMCV.
4484
4485 @return The 64-bit value written to the CMCV.
4486
4487 **/
4488 UINT64
4489 EFIAPI
4490 AsmWriteCmcv (
4491 IN UINT64 Value
4492 );
4493
4494
4495 /**
4496 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4497
4498 Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.
4499 No parameter checking is performed on Value. All bits of Value corresponding
4500 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4501 The caller must either guarantee that Value is valid, or the caller must set up
4502 fault handlers to catch the faults.
4503 This function is only available on IPF.
4504
4505 @param Value The 64-bit value to write to LRR0.
4506
4507 @return The 64-bit value written to the LRR0.
4508
4509 **/
4510 UINT64
4511 EFIAPI
4512 AsmWriteLrr0 (
4513 IN UINT64 Value
4514 );
4515
4516
4517 /**
4518 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4519
4520 Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.
4521 No parameter checking is performed on Value. All bits of Value corresponding
4522 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4523 The caller must either guarantee that Value is valid, or the caller must
4524 set up fault handlers to catch the faults.
4525 This function is only available on IPF.
4526
4527 @param Value The 64-bit value to write to LRR1.
4528
4529 @return The 64-bit value written to the LRR1.
4530
4531 **/
4532 UINT64
4533 EFIAPI
4534 AsmWriteLrr1 (
4535 IN UINT64 Value
4536 );
4537
4538
4539 /**
4540 Reads the current value of Instruction Breakpoint Register (IBR).
4541
4542 The Instruction Breakpoint Registers are used in pairs. The even numbered
4543 registers contain breakpoint addresses, and the odd numbered registers contain
4544 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4545 on all processor models. Implemented registers are contiguous starting with
4546 register 0. No parameter checking is performed on Index, and if the Index value
4547 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4548 occur. The caller must either guarantee that Index is valid, or the caller must
4549 set up fault handlers to catch the faults.
4550 This function is only available on IPF.
4551
4552 @param Index The 8-bit Instruction Breakpoint Register index to read.
4553
4554 @return The current value of Instruction Breakpoint Register specified by Index.
4555
4556 **/
4557 UINT64
4558 EFIAPI
4559 AsmReadIbr (
4560 IN UINT8 Index
4561 );
4562
4563
4564 /**
4565 Reads the current value of Data Breakpoint Register (DBR).
4566
4567 The Data Breakpoint Registers are used in pairs. The even numbered registers
4568 contain breakpoint addresses, and odd numbered registers contain breakpoint
4569 mask conditions. At least 4 data registers pairs are implemented on all processor
4570 models. Implemented registers are contiguous starting with register 0.
4571 No parameter checking is performed on Index. If the Index value is beyond
4572 the implemented DBR register range, a Reserved Register/Field fault may occur.
4573 The caller must either guarantee that Index is valid, or the caller must set up
4574 fault handlers to catch the faults.
4575 This function is only available on IPF.
4576
4577 @param Index The 8-bit Data Breakpoint Register index to read.
4578
4579 @return The current value of Data Breakpoint Register specified by Index.
4580
4581 **/
4582 UINT64
4583 EFIAPI
4584 AsmReadDbr (
4585 IN UINT8 Index
4586 );
4587
4588
4589 /**
4590 Reads the current value of Performance Monitor Configuration Register (PMC).
4591
4592 All processor implementations provide at least 4 performance counters
4593 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4594 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4595 additional implementation-dependent PMC and PMD to increase the number of
4596 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4597 register set is implementation dependent. No parameter checking is performed
4598 on Index. If the Index value is beyond the implemented PMC register range,
4599 zero value will be returned.
4600 This function is only available on IPF.
4601
4602 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4603
4604 @return The current value of Performance Monitor Configuration Register
4605 specified by Index.
4606
4607 **/
4608 UINT64
4609 EFIAPI
4610 AsmReadPmc (
4611 IN UINT8 Index
4612 );
4613
4614
4615 /**
4616 Reads the current value of Performance Monitor Data Register (PMD).
4617
4618 All processor implementations provide at least 4 performance counters
4619 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4620 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4621 provide additional implementation-dependent PMC and PMD to increase the number
4622 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4623 register set is implementation dependent. No parameter checking is performed
4624 on Index. If the Index value is beyond the implemented PMD register range,
4625 zero value will be returned.
4626 This function is only available on IPF.
4627
4628 @param Index The 8-bit Performance Monitor Data Register index to read.
4629
4630 @return The current value of Performance Monitor Data Register specified by Index.
4631
4632 **/
4633 UINT64
4634 EFIAPI
4635 AsmReadPmd (
4636 IN UINT8 Index
4637 );
4638
4639
4640 /**
4641 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4642
4643 Writes current value of Instruction Breakpoint Register specified by Index.
4644 The Instruction Breakpoint Registers are used in pairs. The even numbered
4645 registers contain breakpoint addresses, and odd numbered registers contain
4646 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4647 on all processor models. Implemented registers are contiguous starting with
4648 register 0. No parameter checking is performed on Index. If the Index value
4649 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4650 occur. The caller must either guarantee that Index is valid, or the caller must
4651 set up fault handlers to catch the faults.
4652 This function is only available on IPF.
4653
4654 @param Index The 8-bit Instruction Breakpoint Register index to write.
4655 @param Value The 64-bit value to write to IBR.
4656
4657 @return The 64-bit value written to the IBR.
4658
4659 **/
4660 UINT64
4661 EFIAPI
4662 AsmWriteIbr (
4663 IN UINT8 Index,
4664 IN UINT64 Value
4665 );
4666
4667
4668 /**
4669 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4670
4671 Writes current value of Data Breakpoint Register specified by Index.
4672 The Data Breakpoint Registers are used in pairs. The even numbered registers
4673 contain breakpoint addresses, and odd numbered registers contain breakpoint
4674 mask conditions. At least 4 data registers pairs are implemented on all processor
4675 models. Implemented registers are contiguous starting with register 0. No parameter
4676 checking is performed on Index. If the Index value is beyond the implemented
4677 DBR register range, a Reserved Register/Field fault may occur. The caller must
4678 either guarantee that Index is valid, or the caller must set up fault handlers to
4679 catch the faults.
4680 This function is only available on IPF.
4681
4682 @param Index The 8-bit Data Breakpoint Register index to write.
4683 @param Value The 64-bit value to write to DBR.
4684
4685 @return The 64-bit value written to the DBR.
4686
4687 **/
4688 UINT64
4689 EFIAPI
4690 AsmWriteDbr (
4691 IN UINT8 Index,
4692 IN UINT64 Value
4693 );
4694
4695
4696 /**
4697 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4698
4699 Writes current value of Performance Monitor Configuration Register specified by Index.
4700 All processor implementations provide at least 4 performance counters
4701 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
4702 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4703 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4704 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4705 dependent. No parameter checking is performed on Index. If the Index value is
4706 beyond the implemented PMC register range, the write is ignored.
4707 This function is only available on IPF.
4708
4709 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4710 @param Value The 64-bit value to write to PMC.
4711
4712 @return The 64-bit value written to the PMC.
4713
4714 **/
4715 UINT64
4716 EFIAPI
4717 AsmWritePmc (
4718 IN UINT8 Index,
4719 IN UINT64 Value
4720 );
4721
4722
4723 /**
4724 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4725
4726 Writes current value of Performance Monitor Data Register specified by Index.
4727 All processor implementations provide at least 4 performance counters
4728 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4729 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4730 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4731 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4732 is implementation dependent. No parameter checking is performed on Index. If the
4733 Index value is beyond the implemented PMD register range, the write is ignored.
4734 This function is only available on IPF.
4735
4736 @param Index The 8-bit Performance Monitor Data Register index to write.
4737 @param Value The 64-bit value to write to PMD.
4738
4739 @return The 64-bit value written to the PMD.
4740
4741 **/
4742 UINT64
4743 EFIAPI
4744 AsmWritePmd (
4745 IN UINT8 Index,
4746 IN UINT64 Value
4747 );
4748
4749
4750 /**
4751 Reads the current value of 64-bit Global Pointer (GP).
4752
4753 Reads and returns the current value of GP.
4754 This function is only available on IPF.
4755
4756 @return The current value of GP.
4757
4758 **/
4759 UINT64
4760 EFIAPI
4761 AsmReadGp (
4762 VOID
4763 );
4764
4765
4766 /**
4767 Write the current value of 64-bit Global Pointer (GP).
4768
4769 Writes the current value of GP. The 64-bit value written to the GP is returned.
4770 No parameter checking is performed on Value.
4771 This function is only available on IPF.
4772
4773 @param Value The 64-bit value to write to GP.
4774
4775 @return The 64-bit value written to the GP.
4776
4777 **/
4778 UINT64
4779 EFIAPI
4780 AsmWriteGp (
4781 IN UINT64 Value
4782 );
4783
4784
4785 /**
4786 Reads the current value of 64-bit Stack Pointer (SP).
4787
4788 Reads and returns the current value of SP.
4789 This function is only available on IPF.
4790
4791 @return The current value of SP.
4792
4793 **/
4794 UINT64
4795 EFIAPI
4796 AsmReadSp (
4797 VOID
4798 );
4799
4800
4801 ///
4802 /// Valid Index value for AsmReadControlRegister()
4803 ///
4804 #define IPF_CONTROL_REGISTER_DCR 0
4805 #define IPF_CONTROL_REGISTER_ITM 1
4806 #define IPF_CONTROL_REGISTER_IVA 2
4807 #define IPF_CONTROL_REGISTER_PTA 8
4808 #define IPF_CONTROL_REGISTER_IPSR 16
4809 #define IPF_CONTROL_REGISTER_ISR 17
4810 #define IPF_CONTROL_REGISTER_IIP 19
4811 #define IPF_CONTROL_REGISTER_IFA 20
4812 #define IPF_CONTROL_REGISTER_ITIR 21
4813 #define IPF_CONTROL_REGISTER_IIPA 22
4814 #define IPF_CONTROL_REGISTER_IFS 23
4815 #define IPF_CONTROL_REGISTER_IIM 24
4816 #define IPF_CONTROL_REGISTER_IHA 25
4817 #define IPF_CONTROL_REGISTER_LID 64
4818 #define IPF_CONTROL_REGISTER_IVR 65
4819 #define IPF_CONTROL_REGISTER_TPR 66
4820 #define IPF_CONTROL_REGISTER_EOI 67
4821 #define IPF_CONTROL_REGISTER_IRR0 68
4822 #define IPF_CONTROL_REGISTER_IRR1 69
4823 #define IPF_CONTROL_REGISTER_IRR2 70
4824 #define IPF_CONTROL_REGISTER_IRR3 71
4825 #define IPF_CONTROL_REGISTER_ITV 72
4826 #define IPF_CONTROL_REGISTER_PMV 73
4827 #define IPF_CONTROL_REGISTER_CMCV 74
4828 #define IPF_CONTROL_REGISTER_LRR0 80
4829 #define IPF_CONTROL_REGISTER_LRR1 81
4830
4831 /**
4832 Reads a 64-bit control register.
4833
4834 Reads and returns the control register specified by Index. The valid Index valued are defined
4835 above in "Related Definitions".
4836 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
4837
4838 @param Index The index of the control register to read.
4839
4840 @return The control register specified by Index.
4841
4842 **/
4843 UINT64
4844 EFIAPI
4845 AsmReadControlRegister (
4846 IN UINT64 Index
4847 );
4848
4849
4850 ///
4851 /// Valid Index value for AsmReadApplicationRegister()
4852 ///
4853 #define IPF_APPLICATION_REGISTER_K0 0
4854 #define IPF_APPLICATION_REGISTER_K1 1
4855 #define IPF_APPLICATION_REGISTER_K2 2
4856 #define IPF_APPLICATION_REGISTER_K3 3
4857 #define IPF_APPLICATION_REGISTER_K4 4
4858 #define IPF_APPLICATION_REGISTER_K5 5
4859 #define IPF_APPLICATION_REGISTER_K6 6
4860 #define IPF_APPLICATION_REGISTER_K7 7
4861 #define IPF_APPLICATION_REGISTER_RSC 16
4862 #define IPF_APPLICATION_REGISTER_BSP 17
4863 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4864 #define IPF_APPLICATION_REGISTER_RNAT 19
4865 #define IPF_APPLICATION_REGISTER_FCR 21
4866 #define IPF_APPLICATION_REGISTER_EFLAG 24
4867 #define IPF_APPLICATION_REGISTER_CSD 25
4868 #define IPF_APPLICATION_REGISTER_SSD 26
4869 #define IPF_APPLICATION_REGISTER_CFLG 27
4870 #define IPF_APPLICATION_REGISTER_FSR 28
4871 #define IPF_APPLICATION_REGISTER_FIR 29
4872 #define IPF_APPLICATION_REGISTER_FDR 30
4873 #define IPF_APPLICATION_REGISTER_CCV 32
4874 #define IPF_APPLICATION_REGISTER_UNAT 36
4875 #define IPF_APPLICATION_REGISTER_FPSR 40
4876 #define IPF_APPLICATION_REGISTER_ITC 44
4877 #define IPF_APPLICATION_REGISTER_PFS 64
4878 #define IPF_APPLICATION_REGISTER_LC 65
4879 #define IPF_APPLICATION_REGISTER_EC 66
4880
4881 /**
4882 Reads a 64-bit application register.
4883
4884 Reads and returns the application register specified by Index. The valid Index valued are defined
4885 above in "Related Definitions".
4886 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
4887
4888 @param Index The index of the application register to read.
4889
4890 @return The application register specified by Index.
4891
4892 **/
4893 UINT64
4894 EFIAPI
4895 AsmReadApplicationRegister (
4896 IN UINT64 Index
4897 );
4898
4899
4900 /**
4901 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4902
4903 Determines the current execution mode of the CPU.
4904 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4905 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4906 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4907 and -1 is returned.
4908 This function is only available on IPF.
4909
4910 @retval 1 The CPU is in virtual mode.
4911 @retval 0 The CPU is in physical mode.
4912 @retval -1 The CPU is in mixed mode.
4913
4914 **/
4915 INT64
4916 EFIAPI
4917 AsmCpuVirtual (
4918 VOID
4919 );
4920
4921
4922 /**
4923 Makes a PAL procedure call.
4924
4925 This is a wrapper function to make a PAL procedure call. Based on the Index
4926 value this API will make static or stacked PAL call. The following table
4927 describes the usage of PAL Procedure Index Assignment. Architected procedures
4928 may be designated as required or optional. If a PAL procedure is specified
4929 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4930 Status field of the PAL_CALL_RETURN structure.
4931 This indicates that the procedure is not present in this PAL implementation.
4932 It is the caller's responsibility to check for this return code after calling
4933 any optional PAL procedure.
4934 No parameter checking is performed on the 5 input parameters, but there are
4935 some common rules that the caller should follow when making a PAL call. Any
4936 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4937 Unaligned addresses may cause undefined results. For those parameters defined
4938 as reserved or some fields defined as reserved must be zero filled or the invalid
4939 argument return value may be returned or undefined result may occur during the
4940 execution of the procedure. If the PalEntryPoint does not point to a valid
4941 PAL entry point then the system behavior is undefined. This function is only
4942 available on IPF.
4943
4944 @param PalEntryPoint The PAL procedure calls entry point.
4945 @param Index The PAL procedure Index number.
4946 @param Arg2 The 2nd parameter for PAL procedure calls.
4947 @param Arg3 The 3rd parameter for PAL procedure calls.
4948 @param Arg4 The 4th parameter for PAL procedure calls.
4949
4950 @return structure returned from the PAL Call procedure, including the status and return value.
4951
4952 **/
4953 PAL_CALL_RETURN
4954 EFIAPI
4955 AsmPalCall (
4956 IN UINT64 PalEntryPoint,
4957 IN UINT64 Index,
4958 IN UINT64 Arg2,
4959 IN UINT64 Arg3,
4960 IN UINT64 Arg4
4961 );
4962 #endif
4963
4964 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4965 ///
4966 /// IA32 and x64 Specific Functions
4967 /// Byte packed structure for 16-bit Real Mode EFLAGS
4968 ///
4969 typedef union {
4970 struct {
4971 UINT32 CF:1; ///< Carry Flag
4972 UINT32 Reserved_0:1; ///< Reserved
4973 UINT32 PF:1; ///< Parity Flag
4974 UINT32 Reserved_1:1; ///< Reserved
4975 UINT32 AF:1; ///< Auxiliary Carry Flag
4976 UINT32 Reserved_2:1; ///< Reserved
4977 UINT32 ZF:1; ///< Zero Flag
4978 UINT32 SF:1; ///< Sign Flag
4979 UINT32 TF:1; ///< Trap Flag
4980 UINT32 IF:1; ///< Interrupt Enable Flag
4981 UINT32 DF:1; ///< Direction Flag
4982 UINT32 OF:1; ///< Overflow Flag
4983 UINT32 IOPL:2; ///< I/O Privilege Level
4984 UINT32 NT:1; ///< Nested Task
4985 UINT32 Reserved_3:1; ///< Reserved
4986 } Bits;
4987 UINT16 Uint16;
4988 } IA32_FLAGS16;
4989
4990 ///
4991 /// Byte packed structure for EFLAGS/RFLAGS
4992 /// 32-bits on IA-32
4993 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4994 ///
4995 typedef union {
4996 struct {
4997 UINT32 CF:1; ///< Carry Flag
4998 UINT32 Reserved_0:1; ///< Reserved
4999 UINT32 PF:1; ///< Parity Flag
5000 UINT32 Reserved_1:1; ///< Reserved
5001 UINT32 AF:1; ///< Auxiliary Carry Flag
5002 UINT32 Reserved_2:1; ///< Reserved
5003 UINT32 ZF:1; ///< Zero Flag
5004 UINT32 SF:1; ///< Sign Flag
5005 UINT32 TF:1; ///< Trap Flag
5006 UINT32 IF:1; ///< Interrupt Enable Flag
5007 UINT32 DF:1; ///< Direction Flag
5008 UINT32 OF:1; ///< Overflow Flag
5009 UINT32 IOPL:2; ///< I/O Privilege Level
5010 UINT32 NT:1; ///< Nested Task
5011 UINT32 Reserved_3:1; ///< Reserved
5012 UINT32 RF:1; ///< Resume Flag
5013 UINT32 VM:1; ///< Virtual 8086 Mode
5014 UINT32 AC:1; ///< Alignment Check
5015 UINT32 VIF:1; ///< Virtual Interrupt Flag
5016 UINT32 VIP:1; ///< Virtual Interrupt Pending
5017 UINT32 ID:1; ///< ID Flag
5018 UINT32 Reserved_4:10; ///< Reserved
5019 } Bits;
5020 UINTN UintN;
5021 } IA32_EFLAGS32;
5022
5023 ///
5024 /// Byte packed structure for Control Register 0 (CR0)
5025 /// 32-bits on IA-32
5026 /// 64-bits on x64. The upper 32-bits on x64 are reserved
5027 ///
5028 typedef union {
5029 struct {
5030 UINT32 PE:1; ///< Protection Enable
5031 UINT32 MP:1; ///< Monitor Coprocessor
5032 UINT32 EM:1; ///< Emulation
5033 UINT32 TS:1; ///< Task Switched
5034 UINT32 ET:1; ///< Extension Type
5035 UINT32 NE:1; ///< Numeric Error
5036 UINT32 Reserved_0:10; ///< Reserved
5037 UINT32 WP:1; ///< Write Protect
5038 UINT32 Reserved_1:1; ///< Reserved
5039 UINT32 AM:1; ///< Alignment Mask
5040 UINT32 Reserved_2:10; ///< Reserved
5041 UINT32 NW:1; ///< Mot Write-through
5042 UINT32 CD:1; ///< Cache Disable
5043 UINT32 PG:1; ///< Paging
5044 } Bits;
5045 UINTN UintN;
5046 } IA32_CR0;
5047
5048 ///
5049 /// Byte packed structure for Control Register 4 (CR4)
5050 /// 32-bits on IA-32
5051 /// 64-bits on x64. The upper 32-bits on x64 are reserved
5052 ///
5053 typedef union {
5054 struct {
5055 UINT32 VME:1; ///< Virtual-8086 Mode Extensions
5056 UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts
5057 UINT32 TSD:1; ///< Time Stamp Disable
5058 UINT32 DE:1; ///< Debugging Extensions
5059 UINT32 PSE:1; ///< Page Size Extensions
5060 UINT32 PAE:1; ///< Physical Address Extension
5061 UINT32 MCE:1; ///< Machine Check Enable
5062 UINT32 PGE:1; ///< Page Global Enable
5063 UINT32 PCE:1; ///< Performance Monitoring Counter
5064 ///< Enable
5065 UINT32 OSFXSR:1; ///< Operating System Support for
5066 ///< FXSAVE and FXRSTOR instructions
5067 UINT32 OSXMMEXCPT:1; ///< Operating System Support for
5068 ///< Unmasked SIMD Floating Point
5069 ///< Exceptions
5070 UINT32 Reserved_0:2; ///< Reserved
5071 UINT32 VMXE:1; ///< VMX Enable
5072 UINT32 Reserved_1:18; ///< Reseved
5073 } Bits;
5074 UINTN UintN;
5075 } IA32_CR4;
5076
5077 ///
5078 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor
5079 ///
5080 #pragma pack (1)
5081 typedef struct {
5082 UINT16 Limit;
5083 UINTN Base;
5084 } IA32_DESCRIPTOR;
5085 #pragma pack ()
5086
5087 #define IA32_IDT_GATE_TYPE_TASK 0x85
5088 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
5089 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
5090 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
5091 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
5092
5093
5094 #if defined (MDE_CPU_IA32)
5095 ///
5096 /// Byte packed structure for an IA32 Interrupt Gate Descriptor
5097 ///
5098 typedef union {
5099 struct {
5100 UINT32 OffsetLow:16; ///< Offset bits 15..0
5101 UINT32 Selector:16; ///< Selector
5102 UINT32 Reserved_0:8; ///< Reserved
5103 UINT32 GateType:8; ///< Gate Type. See #defines above
5104 UINT32 OffsetHigh:16; ///< Offset bits 31..16
5105 } Bits;
5106 UINT64 Uint64;
5107 } IA32_IDT_GATE_DESCRIPTOR;
5108
5109 #endif
5110
5111 #if defined (MDE_CPU_X64)
5112 ///
5113 /// Byte packed structure for an x64 Interrupt Gate Descriptor
5114 ///
5115 typedef union {
5116 struct {
5117 UINT32 OffsetLow:16; ///< Offset bits 15..0
5118 UINT32 Selector:16; ///< Selector
5119 UINT32 Reserved_0:8; ///< Reserved
5120 UINT32 GateType:8; ///< Gate Type. See #defines above
5121 UINT32 OffsetHigh:16; ///< Offset bits 31..16
5122 UINT32 OffsetUpper:32; ///< Offset bits 63..32
5123 UINT32 Reserved_1:32; ///< Reserved
5124 } Bits;
5125 struct {
5126 UINT64 Uint64;
5127 UINT64 Uint64_1;
5128 } Uint128;
5129 } IA32_IDT_GATE_DESCRIPTOR;
5130
5131 #endif
5132
5133 ///
5134 /// Byte packed structure for an FP/SSE/SSE2 context
5135 ///
5136 typedef struct {
5137 UINT8 Buffer[512];
5138 } IA32_FX_BUFFER;
5139
5140 ///
5141 /// Structures for the 16-bit real mode thunks
5142 ///
5143 typedef struct {
5144 UINT32 Reserved1;
5145 UINT32 Reserved2;
5146 UINT32 Reserved3;
5147 UINT32 Reserved4;
5148 UINT8 BL;
5149 UINT8 BH;
5150 UINT16 Reserved5;
5151 UINT8 DL;
5152 UINT8 DH;
5153 UINT16 Reserved6;
5154 UINT8 CL;
5155 UINT8 CH;
5156 UINT16 Reserved7;
5157 UINT8 AL;
5158 UINT8 AH;
5159 UINT16 Reserved8;
5160 } IA32_BYTE_REGS;
5161
5162 typedef struct {
5163 UINT16 DI;
5164 UINT16 Reserved1;
5165 UINT16 SI;
5166 UINT16 Reserved2;
5167 UINT16 BP;
5168 UINT16 Reserved3;
5169 UINT16 SP;
5170 UINT16 Reserved4;
5171 UINT16 BX;
5172 UINT16 Reserved5;
5173 UINT16 DX;
5174 UINT16 Reserved6;
5175 UINT16 CX;
5176 UINT16 Reserved7;
5177 UINT16 AX;
5178 UINT16 Reserved8;
5179 } IA32_WORD_REGS;
5180
5181 typedef struct {
5182 UINT32 EDI;
5183 UINT32 ESI;
5184 UINT32 EBP;
5185 UINT32 ESP;
5186 UINT32 EBX;
5187 UINT32 EDX;
5188 UINT32 ECX;
5189 UINT32 EAX;
5190 UINT16 DS;
5191 UINT16 ES;
5192 UINT16 FS;
5193 UINT16 GS;
5194 IA32_EFLAGS32 EFLAGS;
5195 UINT32 Eip;
5196 UINT16 CS;
5197 UINT16 SS;
5198 } IA32_DWORD_REGS;
5199
5200 typedef union {
5201 IA32_DWORD_REGS E;
5202 IA32_WORD_REGS X;
5203 IA32_BYTE_REGS H;
5204 } IA32_REGISTER_SET;
5205
5206 ///
5207 /// Byte packed structure for an 16-bit real mode thunks
5208 ///
5209 typedef struct {
5210 IA32_REGISTER_SET *RealModeState;
5211 VOID *RealModeBuffer;
5212 UINT32 RealModeBufferSize;
5213 UINT32 ThunkAttributes;
5214 } THUNK_CONTEXT;
5215
5216 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5217 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5218 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5219
5220 /**
5221 Retrieves CPUID information.
5222
5223 Executes the CPUID instruction with EAX set to the value specified by Index.
5224 This function always returns Index.
5225 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5226 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5227 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5228 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5229 This function is only available on IA-32 and x64.
5230
5231 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5232 instruction.
5233 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5234 instruction. This is an optional parameter that may be NULL.
5235 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5236 instruction. This is an optional parameter that may be NULL.
5237 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5238 instruction. This is an optional parameter that may be NULL.
5239 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5240 instruction. This is an optional parameter that may be NULL.
5241
5242 @return Index.
5243
5244 **/
5245 UINT32
5246 EFIAPI
5247 AsmCpuid (
5248 IN UINT32 Index,
5249 OUT UINT32 *Eax, OPTIONAL
5250 OUT UINT32 *Ebx, OPTIONAL
5251 OUT UINT32 *Ecx, OPTIONAL
5252 OUT UINT32 *Edx OPTIONAL
5253 );
5254
5255
5256 /**
5257 Retrieves CPUID information using an extended leaf identifier.
5258
5259 Executes the CPUID instruction with EAX set to the value specified by Index
5260 and ECX set to the value specified by SubIndex. This function always returns
5261 Index. This function is only available on IA-32 and x64.
5262
5263 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5264 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5265 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5266 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5267
5268 @param Index The 32-bit value to load into EAX prior to invoking the
5269 CPUID instruction.
5270 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5271 CPUID instruction.
5272 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5273 instruction. This is an optional parameter that may be
5274 NULL.
5275 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5276 instruction. This is an optional parameter that may be
5277 NULL.
5278 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5279 instruction. This is an optional parameter that may be
5280 NULL.
5281 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5282 instruction. This is an optional parameter that may be
5283 NULL.
5284
5285 @return Index.
5286
5287 **/
5288 UINT32
5289 EFIAPI
5290 AsmCpuidEx (
5291 IN UINT32 Index,
5292 IN UINT32 SubIndex,
5293 OUT UINT32 *Eax, OPTIONAL
5294 OUT UINT32 *Ebx, OPTIONAL
5295 OUT UINT32 *Ecx, OPTIONAL
5296 OUT UINT32 *Edx OPTIONAL
5297 );
5298
5299
5300 /**
5301 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5302
5303 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5304 and executing a WBINVD instruction. This function is only available on IA-32 and x64.
5305
5306 **/
5307 VOID
5308 EFIAPI
5309 AsmDisableCache (
5310 VOID
5311 );
5312
5313
5314 /**
5315 Perform a WBINVD and clear both the CD and NW bits of CR0.
5316
5317 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5318 bits of CR0 to 0. This function is only available on IA-32 and x64.
5319
5320 **/
5321 VOID
5322 EFIAPI
5323 AsmEnableCache (
5324 VOID
5325 );
5326
5327
5328 /**
5329 Returns the lower 32-bits of a Machine Specific Register(MSR).
5330
5331 Reads and returns the lower 32-bits of the MSR specified by Index.
5332 No parameter checking is performed on Index, and some Index values may cause
5333 CPU exceptions. The caller must either guarantee that Index is valid, or the
5334 caller must set up exception handlers to catch the exceptions. This function
5335 is only available on IA-32 and x64.
5336
5337 @param Index The 32-bit MSR index to read.
5338
5339 @return The lower 32 bits of the MSR identified by Index.
5340
5341 **/
5342 UINT32
5343 EFIAPI
5344 AsmReadMsr32 (
5345 IN UINT32 Index
5346 );
5347
5348
5349 /**
5350 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5351 The upper 32-bits of the MSR are set to zero.
5352
5353 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5354 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5355 the MSR is returned. No parameter checking is performed on Index or Value,
5356 and some of these may cause CPU exceptions. The caller must either guarantee
5357 that Index and Value are valid, or the caller must establish proper exception
5358 handlers. This function is only available on IA-32 and x64.
5359
5360 @param Index The 32-bit MSR index to write.
5361 @param Value The 32-bit value to write to the MSR.
5362
5363 @return Value
5364
5365 **/
5366 UINT32
5367 EFIAPI
5368 AsmWriteMsr32 (
5369 IN UINT32 Index,
5370 IN UINT32 Value
5371 );
5372
5373
5374 /**
5375 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
5376 writes the result back to the 64-bit MSR.
5377
5378 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5379 between the lower 32-bits of the read result and the value specified by
5380 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5381 32-bits of the value written to the MSR is returned. No parameter checking is
5382 performed on Index or OrData, and some of these may cause CPU exceptions. The
5383 caller must either guarantee that Index and OrData are valid, or the caller
5384 must establish proper exception handlers. This function is only available on
5385 IA-32 and x64.
5386
5387 @param Index The 32-bit MSR index to write.
5388 @param OrData The value to OR with the read value from the MSR.
5389
5390 @return The lower 32-bit value written to the MSR.
5391
5392 **/
5393 UINT32
5394 EFIAPI
5395 AsmMsrOr32 (
5396 IN UINT32 Index,
5397 IN UINT32 OrData
5398 );
5399
5400
5401 /**
5402 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5403 the result back to the 64-bit MSR.
5404
5405 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5406 lower 32-bits of the read result and the value specified by AndData, and
5407 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5408 the value written to the MSR is returned. No parameter checking is performed
5409 on Index or AndData, and some of these may cause CPU exceptions. The caller
5410 must either guarantee that Index and AndData are valid, or the caller must
5411 establish proper exception handlers. This function is only available on IA-32
5412 and x64.
5413
5414 @param Index The 32-bit MSR index to write.
5415 @param AndData The value to AND with the read value from the MSR.
5416
5417 @return The lower 32-bit value written to the MSR.
5418
5419 **/
5420 UINT32
5421 EFIAPI
5422 AsmMsrAnd32 (
5423 IN UINT32 Index,
5424 IN UINT32 AndData
5425 );
5426
5427
5428 /**
5429 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
5430 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5431
5432 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5433 lower 32-bits of the read result and the value specified by AndData
5434 preserving the upper 32-bits, performs a bitwise OR between the
5435 result of the AND operation and the value specified by OrData, and writes the
5436 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5437 written to the MSR is returned. No parameter checking is performed on Index,
5438 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5439 must either guarantee that Index, AndData, and OrData are valid, or the
5440 caller must establish proper exception handlers. This function is only
5441 available on IA-32 and x64.
5442
5443 @param Index The 32-bit MSR index to write.
5444 @param AndData The value to AND with the read value from the MSR.
5445 @param OrData The value to OR with the result of the AND operation.
5446
5447 @return The lower 32-bit value written to the MSR.
5448
5449 **/
5450 UINT32
5451 EFIAPI
5452 AsmMsrAndThenOr32 (
5453 IN UINT32 Index,
5454 IN UINT32 AndData,
5455 IN UINT32 OrData
5456 );
5457
5458
5459 /**
5460 Reads a bit field of an MSR.
5461
5462 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5463 specified by the StartBit and the EndBit. The value of the bit field is
5464 returned. The caller must either guarantee that Index is valid, or the caller
5465 must set up exception handlers to catch the exceptions. This function is only
5466 available on IA-32 and x64.
5467
5468 If StartBit is greater than 31, then ASSERT().
5469 If EndBit is greater than 31, then ASSERT().
5470 If EndBit is less than StartBit, then ASSERT().
5471
5472 @param Index The 32-bit MSR index to read.
5473 @param StartBit The ordinal of the least significant bit in the bit field.
5474 Range 0..31.
5475 @param EndBit The ordinal of the most significant bit in the bit field.
5476 Range 0..31.
5477
5478 @return The bit field read from the MSR.
5479
5480 **/
5481 UINT32
5482 EFIAPI
5483 AsmMsrBitFieldRead32 (
5484 IN UINT32 Index,
5485 IN UINTN StartBit,
5486 IN UINTN EndBit
5487 );
5488
5489
5490 /**
5491 Writes a bit field to an MSR.
5492
5493 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5494 field is specified by the StartBit and the EndBit. All other bits in the
5495 destination MSR are preserved. The lower 32-bits of the MSR written is
5496 returned. The caller must either guarantee that Index and the data written
5497 is valid, or the caller must set up exception handlers to catch the exceptions.
5498 This function is only available on IA-32 and x64.
5499
5500 If StartBit is greater than 31, then ASSERT().
5501 If EndBit is greater than 31, then ASSERT().
5502 If EndBit is less than StartBit, then ASSERT().
5503
5504 @param Index The 32-bit MSR index to write.
5505 @param StartBit The ordinal of the least significant bit in the bit field.
5506 Range 0..31.
5507 @param EndBit The ordinal of the most significant bit in the bit field.
5508 Range 0..31.
5509 @param Value New value of the bit field.
5510
5511 @return The lower 32-bit of the value written to the MSR.
5512
5513 **/
5514 UINT32
5515 EFIAPI
5516 AsmMsrBitFieldWrite32 (
5517 IN UINT32 Index,
5518 IN UINTN StartBit,
5519 IN UINTN EndBit,
5520 IN UINT32 Value
5521 );
5522
5523
5524 /**
5525 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5526 result back to the bit field in the 64-bit MSR.
5527
5528 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5529 between the read result and the value specified by OrData, and writes the
5530 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5531 written to the MSR are returned. Extra left bits in OrData are stripped. The
5532 caller must either guarantee that Index and the data written is valid, or
5533 the caller must set up exception handlers to catch the exceptions. This
5534 function is only available on IA-32 and x64.
5535
5536 If StartBit is greater than 31, then ASSERT().
5537 If EndBit is greater than 31, then ASSERT().
5538 If EndBit is less than StartBit, then ASSERT().
5539
5540 @param Index The 32-bit MSR index to write.
5541 @param StartBit The ordinal of the least significant bit in the bit field.
5542 Range 0..31.
5543 @param EndBit The ordinal of the most significant bit in the bit field.
5544 Range 0..31.
5545 @param OrData The value to OR with the read value from the MSR.
5546
5547 @return The lower 32-bit of the value written to the MSR.
5548
5549 **/
5550 UINT32
5551 EFIAPI
5552 AsmMsrBitFieldOr32 (
5553 IN UINT32 Index,
5554 IN UINTN StartBit,
5555 IN UINTN EndBit,
5556 IN UINT32 OrData
5557 );
5558
5559
5560 /**
5561 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5562 result back to the bit field in the 64-bit MSR.
5563
5564 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5565 read result and the value specified by AndData, and writes the result to the
5566 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5567 MSR are returned. Extra left bits in AndData are stripped. The caller must
5568 either guarantee that Index and the data written is valid, or the caller must
5569 set up exception handlers to catch the exceptions. This function is only
5570 available on IA-32 and x64.
5571
5572 If StartBit is greater than 31, then ASSERT().
5573 If EndBit is greater than 31, then ASSERT().
5574 If EndBit is less than StartBit, then ASSERT().
5575
5576 @param Index The 32-bit MSR index to write.
5577 @param StartBit The ordinal of the least significant bit in the bit field.
5578 Range 0..31.
5579 @param EndBit The ordinal of the most significant bit in the bit field.
5580 Range 0..31.
5581 @param AndData The value to AND with the read value from the MSR.
5582
5583 @return The lower 32-bit of the value written to the MSR.
5584
5585 **/
5586 UINT32
5587 EFIAPI
5588 AsmMsrBitFieldAnd32 (
5589 IN UINT32 Index,
5590 IN UINTN StartBit,
5591 IN UINTN EndBit,
5592 IN UINT32 AndData
5593 );
5594
5595
5596 /**
5597 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5598 bitwise OR, and writes the result back to the bit field in the
5599 64-bit MSR.
5600
5601 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5602 bitwise OR between the read result and the value specified by
5603 AndData, and writes the result to the 64-bit MSR specified by Index. The
5604 lower 32-bits of the value written to the MSR are returned. Extra left bits
5605 in both AndData and OrData are stripped. The caller must either guarantee
5606 that Index and the data written is valid, or the caller must set up exception
5607 handlers to catch the exceptions. This function is only available on IA-32
5608 and x64.
5609
5610 If StartBit is greater than 31, then ASSERT().
5611 If EndBit is greater than 31, then ASSERT().
5612 If EndBit is less than StartBit, then ASSERT().
5613
5614 @param Index The 32-bit MSR index to write.
5615 @param StartBit The ordinal of the least significant bit in the bit field.
5616 Range 0..31.
5617 @param EndBit The ordinal of the most significant bit in the bit field.
5618 Range 0..31.
5619 @param AndData The value to AND with the read value from the MSR.
5620 @param OrData The value to OR with the result of the AND operation.
5621
5622 @return The lower 32-bit of the value written to the MSR.
5623
5624 **/
5625 UINT32
5626 EFIAPI
5627 AsmMsrBitFieldAndThenOr32 (
5628 IN UINT32 Index,
5629 IN UINTN StartBit,
5630 IN UINTN EndBit,
5631 IN UINT32 AndData,
5632 IN UINT32 OrData
5633 );
5634
5635
5636 /**
5637 Returns a 64-bit Machine Specific Register(MSR).
5638
5639 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5640 performed on Index, and some Index values may cause CPU exceptions. The
5641 caller must either guarantee that Index is valid, or the caller must set up
5642 exception handlers to catch the exceptions. This function is only available
5643 on IA-32 and x64.
5644
5645 @param Index The 32-bit MSR index to read.
5646
5647 @return The value of the MSR identified by Index.
5648
5649 **/
5650 UINT64
5651 EFIAPI
5652 AsmReadMsr64 (
5653 IN UINT32 Index
5654 );
5655
5656
5657 /**
5658 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5659 value.
5660
5661 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5662 64-bit value written to the MSR is returned. No parameter checking is
5663 performed on Index or Value, and some of these may cause CPU exceptions. The
5664 caller must either guarantee that Index and Value are valid, or the caller
5665 must establish proper exception handlers. This function is only available on
5666 IA-32 and x64.
5667
5668 @param Index The 32-bit MSR index to write.
5669 @param Value The 64-bit value to write to the MSR.
5670
5671 @return Value
5672
5673 **/
5674 UINT64
5675 EFIAPI
5676 AsmWriteMsr64 (
5677 IN UINT32 Index,
5678 IN UINT64 Value
5679 );
5680
5681
5682 /**
5683 Reads a 64-bit MSR, performs a bitwise OR, and writes the result
5684 back to the 64-bit MSR.
5685
5686 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5687 between the read result and the value specified by OrData, and writes the
5688 result to the 64-bit MSR specified by Index. The value written to the MSR is
5689 returned. No parameter checking is performed on Index or OrData, and some of
5690 these may cause CPU exceptions. The caller must either guarantee that Index
5691 and OrData are valid, or the caller must establish proper exception handlers.
5692 This function is only available on IA-32 and x64.
5693
5694 @param Index The 32-bit MSR index to write.
5695 @param OrData The value to OR with the read value from the MSR.
5696
5697 @return The value written back to the MSR.
5698
5699 **/
5700 UINT64
5701 EFIAPI
5702 AsmMsrOr64 (
5703 IN UINT32 Index,
5704 IN UINT64 OrData
5705 );
5706
5707
5708 /**
5709 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5710 64-bit MSR.
5711
5712 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5713 read result and the value specified by OrData, and writes the result to the
5714 64-bit MSR specified by Index. The value written to the MSR is returned. No
5715 parameter checking is performed on Index or OrData, and some of these may
5716 cause CPU exceptions. The caller must either guarantee that Index and OrData
5717 are valid, or the caller must establish proper exception handlers. This
5718 function is only available on IA-32 and x64.
5719
5720 @param Index The 32-bit MSR index to write.
5721 @param AndData The value to AND with the read value from the MSR.
5722
5723 @return The value written back to the MSR.
5724
5725 **/
5726 UINT64
5727 EFIAPI
5728 AsmMsrAnd64 (
5729 IN UINT32 Index,
5730 IN UINT64 AndData
5731 );
5732
5733
5734 /**
5735 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
5736 OR, and writes the result back to the 64-bit MSR.
5737
5738 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5739 result and the value specified by AndData, performs a bitwise OR
5740 between the result of the AND operation and the value specified by OrData,
5741 and writes the result to the 64-bit MSR specified by Index. The value written
5742 to the MSR is returned. No parameter checking is performed on Index, AndData,
5743 or OrData, and some of these may cause CPU exceptions. The caller must either
5744 guarantee that Index, AndData, and OrData are valid, or the caller must
5745 establish proper exception handlers. This function is only available on IA-32
5746 and x64.
5747
5748 @param Index The 32-bit MSR index to write.
5749 @param AndData The value to AND with the read value from the MSR.
5750 @param OrData The value to OR with the result of the AND operation.
5751
5752 @return The value written back to the MSR.
5753
5754 **/
5755 UINT64
5756 EFIAPI
5757 AsmMsrAndThenOr64 (
5758 IN UINT32 Index,
5759 IN UINT64 AndData,
5760 IN UINT64 OrData
5761 );
5762
5763
5764 /**
5765 Reads a bit field of an MSR.
5766
5767 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5768 StartBit and the EndBit. The value of the bit field is returned. The caller
5769 must either guarantee that Index is valid, or the caller must set up
5770 exception handlers to catch the exceptions. This function is only available
5771 on IA-32 and x64.
5772
5773 If StartBit is greater than 63, then ASSERT().
5774 If EndBit is greater than 63, then ASSERT().
5775 If EndBit is less than StartBit, then ASSERT().
5776
5777 @param Index The 32-bit MSR index to read.
5778 @param StartBit The ordinal of the least significant bit in the bit field.
5779 Range 0..63.
5780 @param EndBit The ordinal of the most significant bit in the bit field.
5781 Range 0..63.
5782
5783 @return The value read from the MSR.
5784
5785 **/
5786 UINT64
5787 EFIAPI
5788 AsmMsrBitFieldRead64 (
5789 IN UINT32 Index,
5790 IN UINTN StartBit,
5791 IN UINTN EndBit
5792 );
5793
5794
5795 /**
5796 Writes a bit field to an MSR.
5797
5798 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5799 the StartBit and the EndBit. All other bits in the destination MSR are
5800 preserved. The MSR written is returned. The caller must either guarantee
5801 that Index and the data written is valid, or the caller must set up exception
5802 handlers to catch the exceptions. This function is only available on IA-32 and x64.
5803
5804 If StartBit is greater than 63, then ASSERT().
5805 If EndBit is greater than 63, then ASSERT().
5806 If EndBit is less than StartBit, then ASSERT().
5807
5808 @param Index The 32-bit MSR index to write.
5809 @param StartBit The ordinal of the least significant bit in the bit field.
5810 Range 0..63.
5811 @param EndBit The ordinal of the most significant bit in the bit field.
5812 Range 0..63.
5813 @param Value New value of the bit field.
5814
5815 @return The value written back to the MSR.
5816
5817 **/
5818 UINT64
5819 EFIAPI
5820 AsmMsrBitFieldWrite64 (
5821 IN UINT32 Index,
5822 IN UINTN StartBit,
5823 IN UINTN EndBit,
5824 IN UINT64 Value
5825 );
5826
5827
5828 /**
5829 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
5830 writes the result back to the bit field in the 64-bit MSR.
5831
5832 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5833 between the read result and the value specified by OrData, and writes the
5834 result to the 64-bit MSR specified by Index. The value written to the MSR is
5835 returned. Extra left bits in OrData are stripped. The caller must either
5836 guarantee that Index and the data written is valid, or the caller must set up
5837 exception handlers to catch the exceptions. This function is only available
5838 on IA-32 and x64.
5839
5840 If StartBit is greater than 63, then ASSERT().
5841 If EndBit is greater than 63, then ASSERT().
5842 If EndBit is less than StartBit, then ASSERT().
5843
5844 @param Index The 32-bit MSR index to write.
5845 @param StartBit The ordinal of the least significant bit in the bit field.
5846 Range 0..63.
5847 @param EndBit The ordinal of the most significant bit in the bit field.
5848 Range 0..63.
5849 @param OrData The value to OR with the read value from the bit field.
5850
5851 @return The value written back to the MSR.
5852
5853 **/
5854 UINT64
5855 EFIAPI
5856 AsmMsrBitFieldOr64 (
5857 IN UINT32 Index,
5858 IN UINTN StartBit,
5859 IN UINTN EndBit,
5860 IN UINT64 OrData
5861 );
5862
5863
5864 /**
5865 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5866 result back to the bit field in the 64-bit MSR.
5867
5868 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5869 read result and the value specified by AndData, and writes the result to the
5870 64-bit MSR specified by Index. The value written to the MSR is returned.
5871 Extra left bits in AndData are stripped. The caller must either guarantee
5872 that Index and the data written is valid, or the caller must set up exception
5873 handlers to catch the exceptions. This function is only available on IA-32
5874 and x64.
5875
5876 If StartBit is greater than 63, then ASSERT().
5877 If EndBit is greater than 63, then ASSERT().
5878 If EndBit is less than StartBit, then ASSERT().
5879
5880 @param Index The 32-bit MSR index to write.
5881 @param StartBit The ordinal of the least significant bit in the bit field.
5882 Range 0..63.
5883 @param EndBit The ordinal of the most significant bit in the bit field.
5884 Range 0..63.
5885 @param AndData The value to AND with the read value from the bit field.
5886
5887 @return The value written back to the MSR.
5888
5889 **/
5890 UINT64
5891 EFIAPI
5892 AsmMsrBitFieldAnd64 (
5893 IN UINT32 Index,
5894 IN UINTN StartBit,
5895 IN UINTN EndBit,
5896 IN UINT64 AndData
5897 );
5898
5899
5900 /**
5901 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5902 bitwise OR, and writes the result back to the bit field in the
5903 64-bit MSR.
5904
5905 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5906 a bitwise OR between the read result and the value specified by
5907 AndData, and writes the result to the 64-bit MSR specified by Index. The
5908 value written to the MSR is returned. Extra left bits in both AndData and
5909 OrData are stripped. The caller must either guarantee that Index and the data
5910 written is valid, or the caller must set up exception handlers to catch the
5911 exceptions. This function is only available on IA-32 and x64.
5912
5913 If StartBit is greater than 63, then ASSERT().
5914 If EndBit is greater than 63, then ASSERT().
5915 If EndBit is less than StartBit, then ASSERT().
5916
5917 @param Index The 32-bit MSR index to write.
5918 @param StartBit The ordinal of the least significant bit in the bit field.
5919 Range 0..63.
5920 @param EndBit The ordinal of the most significant bit in the bit field.
5921 Range 0..63.
5922 @param AndData The value to AND with the read value from the bit field.
5923 @param OrData The value to OR with the result of the AND operation.
5924
5925 @return The value written back to the MSR.
5926
5927 **/
5928 UINT64
5929 EFIAPI
5930 AsmMsrBitFieldAndThenOr64 (
5931 IN UINT32 Index,
5932 IN UINTN StartBit,
5933 IN UINTN EndBit,
5934 IN UINT64 AndData,
5935 IN UINT64 OrData
5936 );
5937
5938
5939 /**
5940 Reads the current value of the EFLAGS register.
5941
5942 Reads and returns the current value of the EFLAGS register. This function is
5943 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
5944 64-bit value on x64.
5945
5946 @return EFLAGS on IA-32 or RFLAGS on x64.
5947
5948 **/
5949 UINTN
5950 EFIAPI
5951 AsmReadEflags (
5952 VOID
5953 );
5954
5955
5956 /**
5957 Reads the current value of the Control Register 0 (CR0).
5958
5959 Reads and returns the current value of CR0. This function is only available
5960 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5961 x64.
5962
5963 @return The value of the Control Register 0 (CR0).
5964
5965 **/
5966 UINTN
5967 EFIAPI
5968 AsmReadCr0 (
5969 VOID
5970 );
5971
5972
5973 /**
5974 Reads the current value of the Control Register 2 (CR2).
5975
5976 Reads and returns the current value of CR2. This function is only available
5977 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5978 x64.
5979
5980 @return The value of the Control Register 2 (CR2).
5981
5982 **/
5983 UINTN
5984 EFIAPI
5985 AsmReadCr2 (
5986 VOID
5987 );
5988
5989
5990 /**
5991 Reads the current value of the Control Register 3 (CR3).
5992
5993 Reads and returns the current value of CR3. This function is only available
5994 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5995 x64.
5996
5997 @return The value of the Control Register 3 (CR3).
5998
5999 **/
6000 UINTN
6001 EFIAPI
6002 AsmReadCr3 (
6003 VOID
6004 );
6005
6006
6007 /**
6008 Reads the current value of the Control Register 4 (CR4).
6009
6010 Reads and returns the current value of CR4. This function is only available
6011 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6012 x64.
6013
6014 @return The value of the Control Register 4 (CR4).
6015
6016 **/
6017 UINTN
6018 EFIAPI
6019 AsmReadCr4 (
6020 VOID
6021 );
6022
6023
6024 /**
6025 Writes a value to Control Register 0 (CR0).
6026
6027 Writes and returns a new value to CR0. This function is only available on
6028 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6029
6030 @param Cr0 The value to write to CR0.
6031
6032 @return The value written to CR0.
6033
6034 **/
6035 UINTN
6036 EFIAPI
6037 AsmWriteCr0 (
6038 UINTN Cr0
6039 );
6040
6041
6042 /**
6043 Writes a value to Control Register 2 (CR2).
6044
6045 Writes and returns a new value to CR2. This function is only available on
6046 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6047
6048 @param Cr2 The value to write to CR2.
6049
6050 @return The value written to CR2.
6051
6052 **/
6053 UINTN
6054 EFIAPI
6055 AsmWriteCr2 (
6056 UINTN Cr2
6057 );
6058
6059
6060 /**
6061 Writes a value to Control Register 3 (CR3).
6062
6063 Writes and returns a new value to CR3. This function is only available on
6064 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6065
6066 @param Cr3 The value to write to CR3.
6067
6068 @return The value written to CR3.
6069
6070 **/
6071 UINTN
6072 EFIAPI
6073 AsmWriteCr3 (
6074 UINTN Cr3
6075 );
6076
6077
6078 /**
6079 Writes a value to Control Register 4 (CR4).
6080
6081 Writes and returns a new value to CR4. This function is only available on
6082 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6083
6084 @param Cr4 The value to write to CR4.
6085
6086 @return The value written to CR4.
6087
6088 **/
6089 UINTN
6090 EFIAPI
6091 AsmWriteCr4 (
6092 UINTN Cr4
6093 );
6094
6095
6096 /**
6097 Reads the current value of Debug Register 0 (DR0).
6098
6099 Reads and returns the current value of DR0. This function is only available
6100 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6101 x64.
6102
6103 @return The value of Debug Register 0 (DR0).
6104
6105 **/
6106 UINTN
6107 EFIAPI
6108 AsmReadDr0 (
6109 VOID
6110 );
6111
6112
6113 /**
6114 Reads the current value of Debug Register 1 (DR1).
6115
6116 Reads and returns the current value of DR1. This function is only available
6117 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6118 x64.
6119
6120 @return The value of Debug Register 1 (DR1).
6121
6122 **/
6123 UINTN
6124 EFIAPI
6125 AsmReadDr1 (
6126 VOID
6127 );
6128
6129
6130 /**
6131 Reads the current value of Debug Register 2 (DR2).
6132
6133 Reads and returns the current value of DR2. This function is only available
6134 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6135 x64.
6136
6137 @return The value of Debug Register 2 (DR2).
6138
6139 **/
6140 UINTN
6141 EFIAPI
6142 AsmReadDr2 (
6143 VOID
6144 );
6145
6146
6147 /**
6148 Reads the current value of Debug Register 3 (DR3).
6149
6150 Reads and returns the current value of DR3. This function is only available
6151 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6152 x64.
6153
6154 @return The value of Debug Register 3 (DR3).
6155
6156 **/
6157 UINTN
6158 EFIAPI
6159 AsmReadDr3 (
6160 VOID
6161 );
6162
6163
6164 /**
6165 Reads the current value of Debug Register 4 (DR4).
6166
6167 Reads and returns the current value of DR4. This function is only available
6168 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6169 x64.
6170
6171 @return The value of Debug Register 4 (DR4).
6172
6173 **/
6174 UINTN
6175 EFIAPI
6176 AsmReadDr4 (
6177 VOID
6178 );
6179
6180
6181 /**
6182 Reads the current value of Debug Register 5 (DR5).
6183
6184 Reads and returns the current value of DR5. This function is only available
6185 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6186 x64.
6187
6188 @return The value of Debug Register 5 (DR5).
6189
6190 **/
6191 UINTN
6192 EFIAPI
6193 AsmReadDr5 (
6194 VOID
6195 );
6196
6197
6198 /**
6199 Reads the current value of Debug Register 6 (DR6).
6200
6201 Reads and returns the current value of DR6. This function is only available
6202 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6203 x64.
6204
6205 @return The value of Debug Register 6 (DR6).
6206
6207 **/
6208 UINTN
6209 EFIAPI
6210 AsmReadDr6 (
6211 VOID
6212 );
6213
6214
6215 /**
6216 Reads the current value of Debug Register 7 (DR7).
6217
6218 Reads and returns the current value of DR7. This function is only available
6219 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6220 x64.
6221
6222 @return The value of Debug Register 7 (DR7).
6223
6224 **/
6225 UINTN
6226 EFIAPI
6227 AsmReadDr7 (
6228 VOID
6229 );
6230
6231
6232 /**
6233 Writes a value to Debug Register 0 (DR0).
6234
6235 Writes and returns a new value to DR0. This function is only available on
6236 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6237
6238 @param Dr0 The value to write to Dr0.
6239
6240 @return The value written to Debug Register 0 (DR0).
6241
6242 **/
6243 UINTN
6244 EFIAPI
6245 AsmWriteDr0 (
6246 UINTN Dr0
6247 );
6248
6249
6250 /**
6251 Writes a value to Debug Register 1 (DR1).
6252
6253 Writes and returns a new value to DR1. This function is only available on
6254 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6255
6256 @param Dr1 The value to write to Dr1.
6257
6258 @return The value written to Debug Register 1 (DR1).
6259
6260 **/
6261 UINTN
6262 EFIAPI
6263 AsmWriteDr1 (
6264 UINTN Dr1
6265 );
6266
6267
6268 /**
6269 Writes a value to Debug Register 2 (DR2).
6270
6271 Writes and returns a new value to DR2. This function is only available on
6272 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6273
6274 @param Dr2 The value to write to Dr2.
6275
6276 @return The value written to Debug Register 2 (DR2).
6277
6278 **/
6279 UINTN
6280 EFIAPI
6281 AsmWriteDr2 (
6282 UINTN Dr2
6283 );
6284
6285
6286 /**
6287 Writes a value to Debug Register 3 (DR3).
6288
6289 Writes and returns a new value to DR3. This function is only available on
6290 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6291
6292 @param Dr3 The value to write to Dr3.
6293
6294 @return The value written to Debug Register 3 (DR3).
6295
6296 **/
6297 UINTN
6298 EFIAPI
6299 AsmWriteDr3 (
6300 UINTN Dr3
6301 );
6302
6303
6304 /**
6305 Writes a value to Debug Register 4 (DR4).
6306
6307 Writes and returns a new value to DR4. This function is only available on
6308 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6309
6310 @param Dr4 The value to write to Dr4.
6311
6312 @return The value written to Debug Register 4 (DR4).
6313
6314 **/
6315 UINTN
6316 EFIAPI
6317 AsmWriteDr4 (
6318 UINTN Dr4
6319 );
6320
6321
6322 /**
6323 Writes a value to Debug Register 5 (DR5).
6324
6325 Writes and returns a new value to DR5. This function is only available on
6326 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6327
6328 @param Dr5 The value to write to Dr5.
6329
6330 @return The value written to Debug Register 5 (DR5).
6331
6332 **/
6333 UINTN
6334 EFIAPI
6335 AsmWriteDr5 (
6336 UINTN Dr5
6337 );
6338
6339
6340 /**
6341 Writes a value to Debug Register 6 (DR6).
6342
6343 Writes and returns a new value to DR6. This function is only available on
6344 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6345
6346 @param Dr6 The value to write to Dr6.
6347
6348 @return The value written to Debug Register 6 (DR6).
6349
6350 **/
6351 UINTN
6352 EFIAPI
6353 AsmWriteDr6 (
6354 UINTN Dr6
6355 );
6356
6357
6358 /**
6359 Writes a value to Debug Register 7 (DR7).
6360
6361 Writes and returns a new value to DR7. This function is only available on
6362 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6363
6364 @param Dr7 The value to write to Dr7.
6365
6366 @return The value written to Debug Register 7 (DR7).
6367
6368 **/
6369 UINTN
6370 EFIAPI
6371 AsmWriteDr7 (
6372 UINTN Dr7
6373 );
6374
6375
6376 /**
6377 Reads the current value of Code Segment Register (CS).
6378
6379 Reads and returns the current value of CS. This function is only available on
6380 IA-32 and x64.
6381
6382 @return The current value of CS.
6383
6384 **/
6385 UINT16
6386 EFIAPI
6387 AsmReadCs (
6388 VOID
6389 );
6390
6391
6392 /**
6393 Reads the current value of Data Segment Register (DS).
6394
6395 Reads and returns the current value of DS. This function is only available on
6396 IA-32 and x64.
6397
6398 @return The current value of DS.
6399
6400 **/
6401 UINT16
6402 EFIAPI
6403 AsmReadDs (
6404 VOID
6405 );
6406
6407
6408 /**
6409 Reads the current value of Extra Segment Register (ES).
6410
6411 Reads and returns the current value of ES. This function is only available on
6412 IA-32 and x64.
6413
6414 @return The current value of ES.
6415
6416 **/
6417 UINT16
6418 EFIAPI
6419 AsmReadEs (
6420 VOID
6421 );
6422
6423
6424 /**
6425 Reads the current value of FS Data Segment Register (FS).
6426
6427 Reads and returns the current value of FS. This function is only available on
6428 IA-32 and x64.
6429
6430 @return The current value of FS.
6431
6432 **/
6433 UINT16
6434 EFIAPI
6435 AsmReadFs (
6436 VOID
6437 );
6438
6439
6440 /**
6441 Reads the current value of GS Data Segment Register (GS).
6442
6443 Reads and returns the current value of GS. This function is only available on
6444 IA-32 and x64.
6445
6446 @return The current value of GS.
6447
6448 **/
6449 UINT16
6450 EFIAPI
6451 AsmReadGs (
6452 VOID
6453 );
6454
6455
6456 /**
6457 Reads the current value of Stack Segment Register (SS).
6458
6459 Reads and returns the current value of SS. This function is only available on
6460 IA-32 and x64.
6461
6462 @return The current value of SS.
6463
6464 **/
6465 UINT16
6466 EFIAPI
6467 AsmReadSs (
6468 VOID
6469 );
6470
6471
6472 /**
6473 Reads the current value of Task Register (TR).
6474
6475 Reads and returns the current value of TR. This function is only available on
6476 IA-32 and x64.
6477
6478 @return The current value of TR.
6479
6480 **/
6481 UINT16
6482 EFIAPI
6483 AsmReadTr (
6484 VOID
6485 );
6486
6487
6488 /**
6489 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6490
6491 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6492 function is only available on IA-32 and x64.
6493
6494 If Gdtr is NULL, then ASSERT().
6495
6496 @param Gdtr Pointer to a GDTR descriptor.
6497
6498 **/
6499 VOID
6500 EFIAPI
6501 AsmReadGdtr (
6502 OUT IA32_DESCRIPTOR *Gdtr
6503 );
6504
6505
6506 /**
6507 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6508
6509 Writes and the current GDTR descriptor specified by Gdtr. This function is
6510 only available on IA-32 and x64.
6511
6512 If Gdtr is NULL, then ASSERT().
6513
6514 @param Gdtr Pointer to a GDTR descriptor.
6515
6516 **/
6517 VOID
6518 EFIAPI
6519 AsmWriteGdtr (
6520 IN CONST IA32_DESCRIPTOR *Gdtr
6521 );
6522
6523
6524 /**
6525 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6526
6527 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6528 function is only available on IA-32 and x64.
6529
6530 If Idtr is NULL, then ASSERT().
6531
6532 @param Idtr Pointer to a IDTR descriptor.
6533
6534 **/
6535 VOID
6536 EFIAPI
6537 AsmReadIdtr (
6538 OUT IA32_DESCRIPTOR *Idtr
6539 );
6540
6541
6542 /**
6543 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6544
6545 Writes the current IDTR descriptor and returns it in Idtr. This function is
6546 only available on IA-32 and x64.
6547
6548 If Idtr is NULL, then ASSERT().
6549
6550 @param Idtr Pointer to a IDTR descriptor.
6551
6552 **/
6553 VOID
6554 EFIAPI
6555 AsmWriteIdtr (
6556 IN CONST IA32_DESCRIPTOR *Idtr
6557 );
6558
6559
6560 /**
6561 Reads the current Local Descriptor Table Register(LDTR) selector.
6562
6563 Reads and returns the current 16-bit LDTR descriptor value. This function is
6564 only available on IA-32 and x64.
6565
6566 @return The current selector of LDT.
6567
6568 **/
6569 UINT16
6570 EFIAPI
6571 AsmReadLdtr (
6572 VOID
6573 );
6574
6575
6576 /**
6577 Writes the current Local Descriptor Table Register (LDTR) selector.
6578
6579 Writes and the current LDTR descriptor specified by Ldtr. This function is
6580 only available on IA-32 and x64.
6581
6582 @param Ldtr 16-bit LDTR selector value.
6583
6584 **/
6585 VOID
6586 EFIAPI
6587 AsmWriteLdtr (
6588 IN UINT16 Ldtr
6589 );
6590
6591
6592 /**
6593 Save the current floating point/SSE/SSE2 context to a buffer.
6594
6595 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6596 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6597 available on IA-32 and x64.
6598
6599 If Buffer is NULL, then ASSERT().
6600 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6601
6602 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6603
6604 **/
6605 VOID
6606 EFIAPI
6607 AsmFxSave (
6608 OUT IA32_FX_BUFFER *Buffer
6609 );
6610
6611
6612 /**
6613 Restores the current floating point/SSE/SSE2 context from a buffer.
6614
6615 Restores the current floating point/SSE/SSE2 state from the buffer specified
6616 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6617 only available on IA-32 and x64.
6618
6619 If Buffer is NULL, then ASSERT().
6620 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6621 If Buffer was not saved with AsmFxSave(), then ASSERT().
6622
6623 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6624
6625 **/
6626 VOID
6627 EFIAPI
6628 AsmFxRestore (
6629 IN CONST IA32_FX_BUFFER *Buffer
6630 );
6631
6632
6633 /**
6634 Reads the current value of 64-bit MMX Register #0 (MM0).
6635
6636 Reads and returns the current value of MM0. This function is only available
6637 on IA-32 and x64.
6638
6639 @return The current value of MM0.
6640
6641 **/
6642 UINT64
6643 EFIAPI
6644 AsmReadMm0 (
6645 VOID
6646 );
6647
6648
6649 /**
6650 Reads the current value of 64-bit MMX Register #1 (MM1).
6651
6652 Reads and returns the current value of MM1. This function is only available
6653 on IA-32 and x64.
6654
6655 @return The current value of MM1.
6656
6657 **/
6658 UINT64
6659 EFIAPI
6660 AsmReadMm1 (
6661 VOID
6662 );
6663
6664
6665 /**
6666 Reads the current value of 64-bit MMX Register #2 (MM2).
6667
6668 Reads and returns the current value of MM2. This function is only available
6669 on IA-32 and x64.
6670
6671 @return The current value of MM2.
6672
6673 **/
6674 UINT64
6675 EFIAPI
6676 AsmReadMm2 (
6677 VOID
6678 );
6679
6680
6681 /**
6682 Reads the current value of 64-bit MMX Register #3 (MM3).
6683
6684 Reads and returns the current value of MM3. This function is only available
6685 on IA-32 and x64.
6686
6687 @return The current value of MM3.
6688
6689 **/
6690 UINT64
6691 EFIAPI
6692 AsmReadMm3 (
6693 VOID
6694 );
6695
6696
6697 /**
6698 Reads the current value of 64-bit MMX Register #4 (MM4).
6699
6700 Reads and returns the current value of MM4. This function is only available
6701 on IA-32 and x64.
6702
6703 @return The current value of MM4.
6704
6705 **/
6706 UINT64
6707 EFIAPI
6708 AsmReadMm4 (
6709 VOID
6710 );
6711
6712
6713 /**
6714 Reads the current value of 64-bit MMX Register #5 (MM5).
6715
6716 Reads and returns the current value of MM5. This function is only available
6717 on IA-32 and x64.
6718
6719 @return The current value of MM5.
6720
6721 **/
6722 UINT64
6723 EFIAPI
6724 AsmReadMm5 (
6725 VOID
6726 );
6727
6728
6729 /**
6730 Reads the current value of 64-bit MMX Register #6 (MM6).
6731
6732 Reads and returns the current value of MM6. This function is only available
6733 on IA-32 and x64.
6734
6735 @return The current value of MM6.
6736
6737 **/
6738 UINT64
6739 EFIAPI
6740 AsmReadMm6 (
6741 VOID
6742 );
6743
6744
6745 /**
6746 Reads the current value of 64-bit MMX Register #7 (MM7).
6747
6748 Reads and returns the current value of MM7. This function is only available
6749 on IA-32 and x64.
6750
6751 @return The current value of MM7.
6752
6753 **/
6754 UINT64
6755 EFIAPI
6756 AsmReadMm7 (
6757 VOID
6758 );
6759
6760
6761 /**
6762 Writes the current value of 64-bit MMX Register #0 (MM0).
6763
6764 Writes the current value of MM0. This function is only available on IA32 and
6765 x64.
6766
6767 @param Value The 64-bit value to write to MM0.
6768
6769 **/
6770 VOID
6771 EFIAPI
6772 AsmWriteMm0 (
6773 IN UINT64 Value
6774 );
6775
6776
6777 /**
6778 Writes the current value of 64-bit MMX Register #1 (MM1).
6779
6780 Writes the current value of MM1. This function is only available on IA32 and
6781 x64.
6782
6783 @param Value The 64-bit value to write to MM1.
6784
6785 **/
6786 VOID
6787 EFIAPI
6788 AsmWriteMm1 (
6789 IN UINT64 Value
6790 );
6791
6792
6793 /**
6794 Writes the current value of 64-bit MMX Register #2 (MM2).
6795
6796 Writes the current value of MM2. This function is only available on IA32 and
6797 x64.
6798
6799 @param Value The 64-bit value to write to MM2.
6800
6801 **/
6802 VOID
6803 EFIAPI
6804 AsmWriteMm2 (
6805 IN UINT64 Value
6806 );
6807
6808
6809 /**
6810 Writes the current value of 64-bit MMX Register #3 (MM3).
6811
6812 Writes the current value of MM3. This function is only available on IA32 and
6813 x64.
6814
6815 @param Value The 64-bit value to write to MM3.
6816
6817 **/
6818 VOID
6819 EFIAPI
6820 AsmWriteMm3 (
6821 IN UINT64 Value
6822 );
6823
6824
6825 /**
6826 Writes the current value of 64-bit MMX Register #4 (MM4).
6827
6828 Writes the current value of MM4. This function is only available on IA32 and
6829 x64.
6830
6831 @param Value The 64-bit value to write to MM4.
6832
6833 **/
6834 VOID
6835 EFIAPI
6836 AsmWriteMm4 (
6837 IN UINT64 Value
6838 );
6839
6840
6841 /**
6842 Writes the current value of 64-bit MMX Register #5 (MM5).
6843
6844 Writes the current value of MM5. This function is only available on IA32 and
6845 x64.
6846
6847 @param Value The 64-bit value to write to MM5.
6848
6849 **/
6850 VOID
6851 EFIAPI
6852 AsmWriteMm5 (
6853 IN UINT64 Value
6854 );
6855
6856
6857 /**
6858 Writes the current value of 64-bit MMX Register #6 (MM6).
6859
6860 Writes the current value of MM6. This function is only available on IA32 and
6861 x64.
6862
6863 @param Value The 64-bit value to write to MM6.
6864
6865 **/
6866 VOID
6867 EFIAPI
6868 AsmWriteMm6 (
6869 IN UINT64 Value
6870 );
6871
6872
6873 /**
6874 Writes the current value of 64-bit MMX Register #7 (MM7).
6875
6876 Writes the current value of MM7. This function is only available on IA32 and
6877 x64.
6878
6879 @param Value The 64-bit value to write to MM7.
6880
6881 **/
6882 VOID
6883 EFIAPI
6884 AsmWriteMm7 (
6885 IN UINT64 Value
6886 );
6887
6888
6889 /**
6890 Reads the current value of Time Stamp Counter (TSC).
6891
6892 Reads and returns the current value of TSC. This function is only available
6893 on IA-32 and x64.
6894
6895 @return The current value of TSC
6896
6897 **/
6898 UINT64
6899 EFIAPI
6900 AsmReadTsc (
6901 VOID
6902 );
6903
6904
6905 /**
6906 Reads the current value of a Performance Counter (PMC).
6907
6908 Reads and returns the current value of performance counter specified by
6909 Index. This function is only available on IA-32 and x64.
6910
6911 @param Index The 32-bit Performance Counter index to read.
6912
6913 @return The value of the PMC specified by Index.
6914
6915 **/
6916 UINT64
6917 EFIAPI
6918 AsmReadPmc (
6919 IN UINT32 Index
6920 );
6921
6922
6923 /**
6924 Sets up a monitor buffer that is used by AsmMwait().
6925
6926 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6927 and Edx. Returns Eax. This function is only available on IA-32 and x64.
6928
6929 @param Eax The value to load into EAX or RAX before executing the MONITOR
6930 instruction.
6931 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6932 instruction.
6933 @param Edx The value to load into EDX or RDX before executing the MONITOR
6934 instruction.
6935
6936 @return Eax
6937
6938 **/
6939 UINTN
6940 EFIAPI
6941 AsmMonitor (
6942 IN UINTN Eax,
6943 IN UINTN Ecx,
6944 IN UINTN Edx
6945 );
6946
6947
6948 /**
6949 Executes an MWAIT instruction.
6950
6951 Executes an MWAIT instruction with the register state specified by Eax and
6952 Ecx. Returns Eax. This function is only available on IA-32 and x64.
6953
6954 @param Eax The value to load into EAX or RAX before executing the MONITOR
6955 instruction.
6956 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6957 instruction.
6958
6959 @return Eax
6960
6961 **/
6962 UINTN
6963 EFIAPI
6964 AsmMwait (
6965 IN UINTN Eax,
6966 IN UINTN Ecx
6967 );
6968
6969
6970 /**
6971 Executes a WBINVD instruction.
6972
6973 Executes a WBINVD instruction. This function is only available on IA-32 and
6974 x64.
6975
6976 **/
6977 VOID
6978 EFIAPI
6979 AsmWbinvd (
6980 VOID
6981 );
6982
6983
6984 /**
6985 Executes a INVD instruction.
6986
6987 Executes a INVD instruction. This function is only available on IA-32 and
6988 x64.
6989
6990 **/
6991 VOID
6992 EFIAPI
6993 AsmInvd (
6994 VOID
6995 );
6996
6997
6998 /**
6999 Flushes a cache line from all the instruction and data caches within the
7000 coherency domain of the CPU.
7001
7002 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
7003 This function is only available on IA-32 and x64.
7004
7005 @param LinearAddress The address of the cache line to flush. If the CPU is
7006 in a physical addressing mode, then LinearAddress is a
7007 physical address. If the CPU is in a virtual
7008 addressing mode, then LinearAddress is a virtual
7009 address.
7010
7011 @return LinearAddress
7012 **/
7013 VOID *
7014 EFIAPI
7015 AsmFlushCacheLine (
7016 IN VOID *LinearAddress
7017 );
7018
7019
7020 /**
7021 Enables the 32-bit paging mode on the CPU.
7022
7023 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
7024 must be properly initialized prior to calling this service. This function
7025 assumes the current execution mode is 32-bit protected mode. This function is
7026 only available on IA-32. After the 32-bit paging mode is enabled, control is
7027 transferred to the function specified by EntryPoint using the new stack
7028 specified by NewStack and passing in the parameters specified by Context1 and
7029 Context2. Context1 and Context2 are optional and may be NULL. The function
7030 EntryPoint must never return.
7031
7032 If the current execution mode is not 32-bit protected mode, then ASSERT().
7033 If EntryPoint is NULL, then ASSERT().
7034 If NewStack is NULL, then ASSERT().
7035
7036 There are a number of constraints that must be followed before calling this
7037 function:
7038 1) Interrupts must be disabled.
7039 2) The caller must be in 32-bit protected mode with flat descriptors. This
7040 means all descriptors must have a base of 0 and a limit of 4GB.
7041 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
7042 descriptors.
7043 4) CR3 must point to valid page tables that will be used once the transition
7044 is complete, and those page tables must guarantee that the pages for this
7045 function and the stack are identity mapped.
7046
7047 @param EntryPoint A pointer to function to call with the new stack after
7048 paging is enabled.
7049 @param Context1 A pointer to the context to pass into the EntryPoint
7050 function as the first parameter after paging is enabled.
7051 @param Context2 A pointer to the context to pass into the EntryPoint
7052 function as the second parameter after paging is enabled.
7053 @param NewStack A pointer to the new stack to use for the EntryPoint
7054 function after paging is enabled.
7055
7056 **/
7057 VOID
7058 EFIAPI
7059 AsmEnablePaging32 (
7060 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
7061 IN VOID *Context1, OPTIONAL
7062 IN VOID *Context2, OPTIONAL
7063 IN VOID *NewStack
7064 );
7065
7066
7067 /**
7068 Disables the 32-bit paging mode on the CPU.
7069
7070 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
7071 mode. This function assumes the current execution mode is 32-paged protected
7072 mode. This function is only available on IA-32. After the 32-bit paging mode
7073 is disabled, control is transferred to the function specified by EntryPoint
7074 using the new stack specified by NewStack and passing in the parameters
7075 specified by Context1 and Context2. Context1 and Context2 are optional and
7076 may be NULL. The function EntryPoint must never return.
7077
7078 If the current execution mode is not 32-bit paged mode, then ASSERT().
7079 If EntryPoint is NULL, then ASSERT().
7080 If NewStack is NULL, then ASSERT().
7081
7082 There are a number of constraints that must be followed before calling this
7083 function:
7084 1) Interrupts must be disabled.
7085 2) The caller must be in 32-bit paged mode.
7086 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
7087 4) CR3 must point to valid page tables that guarantee that the pages for
7088 this function and the stack are identity mapped.
7089
7090 @param EntryPoint A pointer to function to call with the new stack after
7091 paging is disabled.
7092 @param Context1 A pointer to the context to pass into the EntryPoint
7093 function as the first parameter after paging is disabled.
7094 @param Context2 A pointer to the context to pass into the EntryPoint
7095 function as the second parameter after paging is
7096 disabled.
7097 @param NewStack A pointer to the new stack to use for the EntryPoint
7098 function after paging is disabled.
7099
7100 **/
7101 VOID
7102 EFIAPI
7103 AsmDisablePaging32 (
7104 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
7105 IN VOID *Context1, OPTIONAL
7106 IN VOID *Context2, OPTIONAL
7107 IN VOID *NewStack
7108 );
7109
7110
7111 /**
7112 Enables the 64-bit paging mode on the CPU.
7113
7114 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
7115 must be properly initialized prior to calling this service. This function
7116 assumes the current execution mode is 32-bit protected mode with flat
7117 descriptors. This function is only available on IA-32. After the 64-bit
7118 paging mode is enabled, control is transferred to the function specified by
7119 EntryPoint using the new stack specified by NewStack and passing in the
7120 parameters specified by Context1 and Context2. Context1 and Context2 are
7121 optional and may be 0. The function EntryPoint must never return.
7122
7123 If the current execution mode is not 32-bit protected mode with flat
7124 descriptors, then ASSERT().
7125 If EntryPoint is 0, then ASSERT().
7126 If NewStack is 0, then ASSERT().
7127
7128 @param Cs The 16-bit selector to load in the CS before EntryPoint
7129 is called. The descriptor in the GDT that this selector
7130 references must be setup for long mode.
7131 @param EntryPoint The 64-bit virtual address of the function to call with
7132 the new stack after paging is enabled.
7133 @param Context1 The 64-bit virtual address of the context to pass into
7134 the EntryPoint function as the first parameter after
7135 paging is enabled.
7136 @param Context2 The 64-bit virtual address of the context to pass into
7137 the EntryPoint function as the second parameter after
7138 paging is enabled.
7139 @param NewStack The 64-bit virtual address of the new stack to use for
7140 the EntryPoint function after paging is enabled.
7141
7142 **/
7143 VOID
7144 EFIAPI
7145 AsmEnablePaging64 (
7146 IN UINT16 Cs,
7147 IN UINT64 EntryPoint,
7148 IN UINT64 Context1, OPTIONAL
7149 IN UINT64 Context2, OPTIONAL
7150 IN UINT64 NewStack
7151 );
7152
7153
7154 /**
7155 Disables the 64-bit paging mode on the CPU.
7156
7157 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
7158 mode. This function assumes the current execution mode is 64-paging mode.
7159 This function is only available on x64. After the 64-bit paging mode is
7160 disabled, control is transferred to the function specified by EntryPoint
7161 using the new stack specified by NewStack and passing in the parameters
7162 specified by Context1 and Context2. Context1 and Context2 are optional and
7163 may be 0. The function EntryPoint must never return.
7164
7165 If the current execution mode is not 64-bit paged mode, then ASSERT().
7166 If EntryPoint is 0, then ASSERT().
7167 If NewStack is 0, then ASSERT().
7168
7169 @param Cs The 16-bit selector to load in the CS before EntryPoint
7170 is called. The descriptor in the GDT that this selector
7171 references must be setup for 32-bit protected mode.
7172 @param EntryPoint The 64-bit virtual address of the function to call with
7173 the new stack after paging is disabled.
7174 @param Context1 The 64-bit virtual address of the context to pass into
7175 the EntryPoint function as the first parameter after
7176 paging is disabled.
7177 @param Context2 The 64-bit virtual address of the context to pass into
7178 the EntryPoint function as the second parameter after
7179 paging is disabled.
7180 @param NewStack The 64-bit virtual address of the new stack to use for
7181 the EntryPoint function after paging is disabled.
7182
7183 **/
7184 VOID
7185 EFIAPI
7186 AsmDisablePaging64 (
7187 IN UINT16 Cs,
7188 IN UINT32 EntryPoint,
7189 IN UINT32 Context1, OPTIONAL
7190 IN UINT32 Context2, OPTIONAL
7191 IN UINT32 NewStack
7192 );
7193
7194
7195 //
7196 // 16-bit thunking services
7197 //
7198
7199 /**
7200 Retrieves the properties for 16-bit thunk functions.
7201
7202 Computes the size of the buffer and stack below 1MB required to use the
7203 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7204 buffer size is returned in RealModeBufferSize, and the stack size is returned
7205 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7206 then the actual minimum stack size is ExtraStackSize plus the maximum number
7207 of bytes that need to be passed to the 16-bit real mode code.
7208
7209 If RealModeBufferSize is NULL, then ASSERT().
7210 If ExtraStackSize is NULL, then ASSERT().
7211
7212 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7213 required to use the 16-bit thunk functions.
7214 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7215 that the 16-bit thunk functions require for
7216 temporary storage in the transition to and from
7217 16-bit real mode.
7218
7219 **/
7220 VOID
7221 EFIAPI
7222 AsmGetThunk16Properties (
7223 OUT UINT32 *RealModeBufferSize,
7224 OUT UINT32 *ExtraStackSize
7225 );
7226
7227
7228 /**
7229 Prepares all structures a code required to use AsmThunk16().
7230
7231 Prepares all structures and code required to use AsmThunk16().
7232
7233 If ThunkContext is NULL, then ASSERT().
7234
7235 @param ThunkContext A pointer to the context structure that describes the
7236 16-bit real mode code to call.
7237
7238 **/
7239 VOID
7240 EFIAPI
7241 AsmPrepareThunk16 (
7242 OUT THUNK_CONTEXT *ThunkContext
7243 );
7244
7245
7246 /**
7247 Transfers control to a 16-bit real mode entry point and returns the results.
7248
7249 Transfers control to a 16-bit real mode entry point and returns the results.
7250 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7251 This function must be called with interrupts disabled.
7252
7253 The register state from the RealModeState field of ThunkContext is restored just prior
7254 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7255 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7256 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7257 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7258 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7259 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7260 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7261 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7262 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7263 after the RETF instruction is executed.
7264
7265 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7266 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7267 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7268
7269 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7270 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7271 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7272
7273 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7274 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7275
7276 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7277 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7278 disable the A20 mask.
7279
7280 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7281 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7282 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7283
7284 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7285 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7286
7287 If ThunkContext is NULL, then ASSERT().
7288 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7289 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7290 ThunkAttributes, then ASSERT().
7291
7292 @param ThunkContext A pointer to the context structure that describes the
7293 16-bit real mode code to call.
7294
7295 **/
7296 VOID
7297 EFIAPI
7298 AsmThunk16 (
7299 IN OUT THUNK_CONTEXT *ThunkContext
7300 );
7301
7302
7303 /**
7304 Prepares all structures and code for a 16-bit real mode thunk, transfers
7305 control to a 16-bit real mode entry point, and returns the results.
7306
7307 Prepares all structures and code for a 16-bit real mode thunk, transfers
7308 control to a 16-bit real mode entry point, and returns the results. If the
7309 caller only need to perform a single 16-bit real mode thunk, then this
7310 service should be used. If the caller intends to make more than one 16-bit
7311 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7312 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7313
7314 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7315
7316 @param ThunkContext A pointer to the context structure that describes the
7317 16-bit real mode code to call.
7318
7319 **/
7320 VOID
7321 EFIAPI
7322 AsmPrepareAndThunk16 (
7323 IN OUT THUNK_CONTEXT *ThunkContext
7324 );
7325
7326 #endif
7327 #endif
7328
7329