MdePkg/Include/Ppi/PciCfg2.h

   1 /** @file
   2   This file declares PciCfg2 PPI.
   3
   4   This ppi Provides platform or chipset-specific access to
   5   the PCI configuration space for a specific PCI segment.
   6
   7   Copyright (c) 2006 - 2008, Intel Corporation
   8   All rights reserved. This program and the accompanying materials
   9   are licensed and made available under the terms and conditions of the BSD License
  10   which accompanies this distribution.  The full text of the license may be found at
  11   http://opensource.org/licenses/bsd-license.php
  12
  13   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  14   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  15
  16   @par Revision Reference:
  17   This PPI is defined in PI
  18   Version 1.00.
  19
  20 **/
  21
  22 #ifndef __PEI_PCI_CFG2_H__
  23 #define __PEI_PCI_CFG2_H__
  24
  25 #include <Pi/PiPeiCis.h>
  26
  27 #define EFI_PEI_PCI_CFG2_PPI_GUID \
  28   { 0x57a449a, 0x1fdc, 0x4c06, { 0xbf, 0xc9, 0xf5, 0x3f, 0x6a, 0x99, 0xbb, 0x92 } }
  29
  30
  31 typedef struct _EFI_PEI_PCI_CFG2_PPI   EFI_PEI_PCI_CFG2_PPI;
  32
  33 #define EFI_PEI_PCI_CFG_ADDRESS(bus,dev,func,reg) \
  34   (((bus) << 24) | \
  35   ((dev) << 16) | \
  36   ((func) << 8) | \
  37   ((reg) < 256 ? (reg) : ((UINT64)(reg) << 32)));
  38
  39 ///
  40 /// EFI_PEI_PCI_CFG_PPI_WIDTH
  41 ///
  42 typedef enum {
  43   EfiPeiPciCfgWidthUint8  = 0,
  44   EfiPeiPciCfgWidthUint16 = 1,
  45   EfiPeiPciCfgWidthUint32 = 2,
  46   EfiPeiPciCfgWidthUint64 = 3,
  47   EfiPeiPciCfgWidthMaximum
  48 } EFI_PEI_PCI_CFG_PPI_WIDTH;
  49
  50 ///
  51 /// EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS
  52 ///
  53 typedef struct {
  54   ///
  55   /// 8-bit register offset within the PCI configuration space for a given device's function
  56   /// space.
  57   ///
  58   UINT8   Register;
  59   ///
  60   /// Only the 3 least-significant bits are used to encode one of 8 possible functions within a
  61   /// given device.
  62   ///
  63   UINT8   Function;
  64   ///
  65   /// Only the 5 least-significant bits are used to encode one of 32 possible devices.
  66   ///
  67   UINT8   Device;
  68   ///
  69   /// 8-bit value to encode between 0 and 255 buses.
  70   ///
  71   UINT8   Bus;
  72   ///
  73   /// Register number in PCI configuration space. If this field is zero, then Register is used
  74   /// for the register number. If this field is non-zero, then Register is ignored and this field
  75   /// is used for the register number.
  76   ///
  77   UINT32  ExtendedRegister;
  78 } EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS;
  79
  80 /**
  81   Reads from or write to a given location in the PCI configuration space.
  82
  83   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.
  84
  85   @param  This            Pointer to local data for the interface.
  86
  87   @param  Width           The width of the access. Enumerated in bytes.
  88                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.
  89
  90   @param  Address         The physical address of the access. The format of
  91                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
  92
  93   @param  Buffer          A pointer to the buffer of data..
  94
  95
  96   @retval EFI_SUCCESS           The function completed successfully.
  97
  98   @retval EFI_DEVICE_ERROR      There was a problem with the transaction.
  99
 100   @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this
 101                                 time.
 102
 103 **/
 104 typedef
 105 EFI_STATUS
 106 (EFIAPI *EFI_PEI_PCI_CFG2_PPI_IO)(
 107   IN CONST  EFI_PEI_SERVICES          **PeiServices,
 108   IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,
 109   IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,
 110   IN        UINT64                    Address,
 111   IN OUT    VOID                      *Buffer
 112 );
 113
 114
 115 /**
 116   Performs a read-modify-write operation on the contents
 117   from a given location in the PCI configuration space.
 118
 119   @param  PeiServices     An indirect pointer to the PEI Services Table
 120                           published by the PEI Foundation.
 121
 122   @param  This            Pointer to local data for the interface.
 123
 124   @param  Width           The width of the access. Enumerated in bytes. Type
 125                           EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
 126
 127   @param  Address         The physical address of the access.
 128
 129   @param  SetBits         Points to value to bitwise-OR with the read configuration value.
 130
 131                           The size of the value is determined by Width.
 132
 133   @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.
 134                           The size of the value is determined by Width.
 135
 136
 137   @retval EFI_SUCCESS           The function completed successfully.
 138
 139   @retval EFI_DEVICE_ERROR      There was a problem with the transaction.
 140
 141   @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting
 142                                 the operation at this time.
 143
 144 **/
 145 typedef
 146 EFI_STATUS
 147 (EFIAPI *EFI_PEI_PCI_CFG2_PPI_RW)(
 148   IN CONST  EFI_PEI_SERVICES          **PeiServices,
 149   IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,
 150   IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,
 151   IN        UINT64                    Address,
 152   IN        VOID                      *SetBits,
 153   IN        VOID                      *ClearBits
 154 );
 155
 156 ///
 157 /// The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
 158 /// controllers behind a PCI root bridge controller.
 159 ///
 160 struct _EFI_PEI_PCI_CFG2_PPI {
 161   EFI_PEI_PCI_CFG2_PPI_IO  Read;
 162   EFI_PEI_PCI_CFG2_PPI_IO  Write;
 163   EFI_PEI_PCI_CFG2_PPI_RW  Modify;
 164   ///
 165   /// The PCI bus segment which the specified functions will access.
 166   ///
 167   UINT16                  Segment;
 168 };
 169
 170
 171 extern EFI_GUID gEfiPciCfg2PpiGuid;
 172
 173 #endif