MdePkg/Include/Ppi/PciCfg2.h

   1 /** @file
   2   This file declares PciCfg PPI used to access PCI configuration space in PEI
   3
   4   Copyright (c) 2006 - 2007, Intel Corporation
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13   Module Name:  PciCfg.h
  14
  15   @par Revision Reference:
  16   This PPI is defined in PI
  17   Version 1.00.
  18
  19 **/
  20
  21 #ifndef __PEI_PCI_CFG2_H__
  22 #define __PEI_PCI_CFG2_H__
  23
  24
  25 #define EFI_PEI_PCI_CFG2_PPI_GUID \
  26   { 0x57a449a, 0x1fdc, 0x4c06, { 0xbf, 0xc9, 0xf5, 0x3f, 0x6a, 0x99, 0xbb, 0x92 } }
  27
  28
  29 typedef struct _EFI_PEI_PCI_CFG2_PPI   EFI_PEI_PCI_CFG2_PPI;
  30
  31 #define EFI_PEI_PCI_CFG_ADDRESS(bus,dev,func,reg) \
  32   (((bus) << 24) | \
  33   ((dev) << 16) | \
  34   ((func) << 8) | \
  35   ((reg) < 256 ? (reg) : ((UINT64) (reg) << 32)));
  36
  37 //
  38 // EFI_PEI_PCI_CFG_PPI_WIDTH
  39 //
  40 typedef enum {
  41   EfiPeiPciCfgWidthUint8  = 0,
  42   EfiPeiPciCfgWidthUint16 = 1,
  43   EfiPeiPciCfgWidthUint32 = 2,
  44   EfiPeiPciCfgWidthUint64 = 3,
  45   EfiPeiPciCfgWidthMaximum
  46 } EFI_PEI_PCI_CFG_PPI_WIDTH;
  47
  48 //
  49 // EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS
  50 //
  51 typedef struct {
  52   UINT8   Register;
  53   UINT8   Function;
  54   UINT8   Device;
  55   UINT8   Bus;
  56   UINT32  ExtendedRegister;
  57 } EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS;
  58
  59 /**
  60   Reads from or write to a given location in the PCI configuration space.
  61
  62   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.
  63
  64   @param  This            Pointer to local data for the interface.
  65
  66   @param  Width           The width of the access. Enumerated in bytes.
  67                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.
  68
  69   @param  Address         The physical address of the access. The format of
  70                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
  71
  72   @param  Buffer          A pointer to the buffer of data..
  73
  74
  75   @retval EFI_SUCCESS           The function completed successfully.
  76
  77   @retval EFI_DEVICE_ERROR      There was a problem with the transaction.
  78
  79   @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this
  80                                 time.
  81
  82 **/
  83 typedef
  84 EFI_STATUS
  85 (EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (
  86   IN CONST      EFI_PEI_SERVICES          **PeiServices,
  87   IN CONST      EFI_PEI_PCI_CFG2_PPI      *This,
  88   IN CONST      EFI_PEI_PCI_CFG_PPI_WIDTH Width,
  89   IN CONST      UINT64                    Address,
  90   IN OUT    VOID                      *Buffer
  91 );
  92
  93
  94 /**
  95   PCI read-modify-write operation.
  96
  97   @param  PeiServices     An indirect pointer to the PEI Services Table
  98                           published by the PEI Foundation.
  99
 100   @param  This            Pointer to local data for the interface.
 101
 102   @param  Width           The width of the access. Enumerated in bytes. Type
 103                           EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
 104
 105   @param  Address         The physical address of the access.
 106
 107   @param  SetBits         Points to value to bitwise-OR with the read configuration value.
 108
 109                           The size of the value is determined by Width.
 110
 111   @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.
 112                           The size of the value is determined by Width.
 113
 114
 115   @retval EFI_SUCCESS           The function completed successfully.
 116
 117   @retval EFI_DEVICE_ERROR      There was a problem with the transaction.
 118
 119   @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting
 120                                 the operation at this time.
 121
 122 **/
 123 typedef
 124 EFI_STATUS
 125 (EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (
 126   IN CONST  EFI_PEI_SERVICES          **PeiServices,
 127   IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,
 128   IN CONST  EFI_PEI_PCI_CFG_PPI_WIDTH Width,
 129   IN CONST  UINT64                    Address,
 130   IN CONST  VOID                      *SetBits,
 131   IN CONST  VOID                      *ClearBits
 132 );
 133
 134 /**
 135   @par Ppi Description:
 136   The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
 137   controllers behind a PCI root bridge controller.
 138
 139   @param Read     PCI read services.  See the Read() function description.
 140
 141   @param Write    PCI write services.  See the Write() function description.
 142
 143   @param Modify   PCI read-modify-write services.  See the Modify() function description.
 144
 145   @param Segment  The PCI bus segment which the specified functions will access.
 146
 147 **/
 148 struct _EFI_PEI_PCI_CFG2_PPI {
 149   EFI_PEI_PCI_CFG_PPI_IO  Read;
 150   EFI_PEI_PCI_CFG_PPI_IO  Write;
 151   EFI_PEI_PCI_CFG_PPI_RW  Modify;
 152   UINT16                  Segment;
 153 };
 154
 155
 156 extern EFI_GUID gEfiPciCfg2PpiGuid;
 157
 158 #endif