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1 /** @file
2 This file declares Sec Platform Information PPI.
3
4 This service is the primary handoff state into the PEI Foundation.
5 The Security (SEC) component creates the early, transitory memory
6 environment and also encapsulates knowledge of at least the
7 location of the Boot Firmware Volume (BFV).
8
9 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
10 This program and the accompanying materials are licensed and made available under
11 the terms and conditions of the BSD License that accompanies this distribution.
12 The full text of the license may be found at
13 http://opensource.org/licenses/bsd-license.php.
14
15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17
18 @par Revision Reference:
19 This PPI is introduced in PI Version 1.0.
20
21 **/
22
23 #ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
24 #define __SEC_PLATFORM_INFORMATION_PPI_H__
25
26 #define EFI_SEC_PLATFORM_INFORMATION_GUID \
27 { \
28 0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
29 }
30
31 typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;
32
33
34 ///
35 /// EFI_HEALTH_FLAGS
36 /// Contains information generated by microcode, hardware, and/or the Itanium
37 /// processor PAL code about the state of the processor upon reset.
38 ///
39 typedef union {
40 struct {
41 ///
42 /// A 2-bit field indicating self-test state after reset.
43 ///
44 UINT32 Status : 2;
45 ///
46 /// A 1-bit field indicating whether testing has occurred.
47 /// If this field is zero, the processor has not been tested,
48 /// and no further fields in the self-test State parameter are valid.
49 ///
50 UINT32 Tested : 1;
51 ///
52 /// Reserved 13 bits.
53 ///
54 UINT32 Reserved1 :13;
55 ///
56 /// A 1-bit field. If set to 1, this indicates that virtual
57 /// memory features are not available.
58 ///
59 UINT32 VirtualMemoryUnavailable : 1;
60 ///
61 /// A 1-bit field. If set to 1, this indicates that IA-32 execution
62 /// is not available.
63 ///
64 UINT32 Ia32ExecutionUnavailable : 1;
65 ///
66 /// A 1-bit field. If set to 1, this indicates that the floating
67 /// point unit is not available.
68 ///
69 UINT32 FloatingPointUnavailable : 1;
70 ///
71 /// A 1-bit field. If set to 1, this indicates miscellaneous
72 /// functional failure other than vm, ia, or fp.
73 /// The test status field provides additional information on
74 /// test failures when the State field returns a value of
75 /// performance restricted or functionally restricted.
76 /// The value returned is implementation dependent.
77 ///
78 UINT32 MiscFeaturesUnavailable : 1;
79 ///
80 /// Reserved 12 bits.
81 ///
82 UINT32 Reserved2 :12;
83 } Bits;
84 UINT32 Uint32;
85 } EFI_HEALTH_FLAGS;
86
87 #define NORMAL_BOOT_CALL 0x0
88 #define RECOVERY_CHECK_CALL 0x3
89
90 typedef EFI_HEALTH_FLAGS X64_HANDOFF_STATUS;
91 typedef EFI_HEALTH_FLAGS IA32_HANDOFF_STATUS;
92 ///
93 /// The hand-off status structure for Itanium architecture.
94 ///
95 typedef struct {
96 ///
97 /// SALE_ENTRY state : 3 = Recovery_Check
98 /// and 0 = RESET or Normal_Boot phase.
99 ///
100 UINT8 BootPhase;
101 ///
102 /// Firmware status on entry to SALE.
103 ///
104 UINT8 FWStatus;
105 UINT16 Reserved1;
106 UINT32 Reserved2;
107 ///
108 /// Geographically significant unique processor ID assigned by PAL.
109 ///
110 UINT16 ProcId;
111 UINT16 Reserved3;
112 UINT8 IdMask;
113 UINT8 EidMask;
114 UINT16 Reserved4;
115 ///
116 /// Address to make PAL calls.
117 ///
118 UINT64 PalCallAddress;
119 ///
120 /// If the entry state is RECOVERY_CHECK, this contains the PAL_RESET
121 /// return address, and if entry state is RESET, this contains
122 /// address for PAL_authentication call.
123 ///
124 UINT64 PalSpecialAddress;
125 ///
126 /// GR35 from PALE_EXIT state.
127 ///
128 UINT64 SelfTestStatus;
129 ///
130 /// GR37 from PALE_EXIT state.
131 ///
132 UINT64 SelfTestControl;
133 UINT64 MemoryBufferRequired;
134 } ITANIUM_HANDOFF_STATUS;
135
136 ///
137 /// EFI_SEC_PLATFORM_INFORMATION_RECORD.
138 ///
139 typedef union {
140 IA32_HANDOFF_STATUS IA32HealthFlags;
141 X64_HANDOFF_STATUS x64HealthFlags;
142 ITANIUM_HANDOFF_STATUS ItaniumHealthFlags;
143 } EFI_SEC_PLATFORM_INFORMATION_RECORD;
144
145 /**
146 This interface conveys state information out of the Security (SEC) phase into PEI.
147
148 This service is published by the SEC phase. The SEC phase handoff has an optional
149 EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
150 PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel
151 architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated
152 into the data structure abstracted by this service. This information is collected for the boot-strap
153 processor (BSP) on IA-32. For Itanium architecture, it is available on all processors that execute
154 the PEI Foundation.
155
156 @param PeiServices The pointer to the PEI Services Table.
157 @param StructureSize The pointer to the variable describing size of the input buffer.
158 @param PlatformInformationRecord The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
159
160 @retval EFI_SUCCESS The data was successfully returned.
161 @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
162 hold the record is returned in StructureSize.
163
164 **/
165 typedef
166 EFI_STATUS
167 (EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(
168 IN CONST EFI_PEI_SERVICES **PeiServices,
169 IN OUT UINT64 *StructureSize,
170 OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
171 );
172
173
174 ///
175 /// This service abstracts platform-specific information. It is necessary
176 /// to convey this information to the PEI Foundation so that it can
177 /// discover where to begin dispatching PEIMs.
178 ///
179 struct _EFI_SEC_PLATFORM_INFORMATION_PPI {
180 EFI_SEC_PLATFORM_INFORMATION PlatformInformation;
181 };
182
183
184 extern EFI_GUID gEfiSecPlatformInformationPpiGuid;
185
186 #endif