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1 /** @file
2 DebugSupport protocol and supporting definitions as defined in the UEFI2.0
3 specification.
4
5 The DebugSupport protocol is used by source level debuggers to abstract the
6 processor and handle context save and restore operations.
7
8 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved<BR>
9 This program and the accompanying materials are licensed and made available under
10 the terms and conditions of the BSD License that accompanies this distribution.
11 The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php.
13
14 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
15 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16
17 **/
18
19 #ifndef __DEBUG_SUPPORT_H__
20 #define __DEBUG_SUPPORT_H__
21
22 #include <IndustryStandard/PeImage.h>
23
24 typedef struct _EFI_DEBUG_SUPPORT_PROTOCOL EFI_DEBUG_SUPPORT_PROTOCOL;
25
26 ///
27 /// Debug Support protocol {2755590C-6F3C-42FA-9EA4-A3BA543CDA25}.
28 ///
29 #define EFI_DEBUG_SUPPORT_PROTOCOL_GUID \
30 { \
31 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \
32 }
33
34 ///
35 /// Processor exception to be hooked.
36 /// All exception types for IA32, X64, Itanium and EBC processors are defined.
37 ///
38 typedef INTN EFI_EXCEPTION_TYPE;
39
40 ///
41 /// IA-32 processor exception types.
42 ///
43 #define EXCEPT_IA32_DIVIDE_ERROR 0
44 #define EXCEPT_IA32_DEBUG 1
45 #define EXCEPT_IA32_NMI 2
46 #define EXCEPT_IA32_BREAKPOINT 3
47 #define EXCEPT_IA32_OVERFLOW 4
48 #define EXCEPT_IA32_BOUND 5
49 #define EXCEPT_IA32_INVALID_OPCODE 6
50 #define EXCEPT_IA32_DOUBLE_FAULT 8
51 #define EXCEPT_IA32_INVALID_TSS 10
52 #define EXCEPT_IA32_SEG_NOT_PRESENT 11
53 #define EXCEPT_IA32_STACK_FAULT 12
54 #define EXCEPT_IA32_GP_FAULT 13
55 #define EXCEPT_IA32_PAGE_FAULT 14
56 #define EXCEPT_IA32_FP_ERROR 16
57 #define EXCEPT_IA32_ALIGNMENT_CHECK 17
58 #define EXCEPT_IA32_MACHINE_CHECK 18
59 #define EXCEPT_IA32_SIMD 19
60
61 ///
62 /// FXSAVE_STATE.
63 /// FP / MMX / XMM registers (see fxrstor instruction definition).
64 ///
65 typedef struct {
66 UINT16 Fcw;
67 UINT16 Fsw;
68 UINT16 Ftw;
69 UINT16 Opcode;
70 UINT32 Eip;
71 UINT16 Cs;
72 UINT16 Reserved1;
73 UINT32 DataOffset;
74 UINT16 Ds;
75 UINT8 Reserved2[10];
76 UINT8 St0Mm0[10], Reserved3[6];
77 UINT8 St1Mm1[10], Reserved4[6];
78 UINT8 St2Mm2[10], Reserved5[6];
79 UINT8 St3Mm3[10], Reserved6[6];
80 UINT8 St4Mm4[10], Reserved7[6];
81 UINT8 St5Mm5[10], Reserved8[6];
82 UINT8 St6Mm6[10], Reserved9[6];
83 UINT8 St7Mm7[10], Reserved10[6];
84 UINT8 Xmm0[16];
85 UINT8 Xmm1[16];
86 UINT8 Xmm2[16];
87 UINT8 Xmm3[16];
88 UINT8 Xmm4[16];
89 UINT8 Xmm5[16];
90 UINT8 Xmm6[16];
91 UINT8 Xmm7[16];
92 UINT8 Reserved11[14 * 16];
93 } EFI_FX_SAVE_STATE_IA32;
94
95 ///
96 /// IA-32 processor context definition.
97 ///
98 typedef struct {
99 UINT32 ExceptionData;
100 EFI_FX_SAVE_STATE_IA32 FxSaveState;
101 UINT32 Dr0;
102 UINT32 Dr1;
103 UINT32 Dr2;
104 UINT32 Dr3;
105 UINT32 Dr6;
106 UINT32 Dr7;
107 UINT32 Cr0;
108 UINT32 Cr1; /* Reserved */
109 UINT32 Cr2;
110 UINT32 Cr3;
111 UINT32 Cr4;
112 UINT32 Eflags;
113 UINT32 Ldtr;
114 UINT32 Tr;
115 UINT32 Gdtr[2];
116 UINT32 Idtr[2];
117 UINT32 Eip;
118 UINT32 Gs;
119 UINT32 Fs;
120 UINT32 Es;
121 UINT32 Ds;
122 UINT32 Cs;
123 UINT32 Ss;
124 UINT32 Edi;
125 UINT32 Esi;
126 UINT32 Ebp;
127 UINT32 Esp;
128 UINT32 Ebx;
129 UINT32 Edx;
130 UINT32 Ecx;
131 UINT32 Eax;
132 } EFI_SYSTEM_CONTEXT_IA32;
133
134 ///
135 /// x64 processor exception types.
136 ///
137 #define EXCEPT_X64_DIVIDE_ERROR 0
138 #define EXCEPT_X64_DEBUG 1
139 #define EXCEPT_X64_NMI 2
140 #define EXCEPT_X64_BREAKPOINT 3
141 #define EXCEPT_X64_OVERFLOW 4
142 #define EXCEPT_X64_BOUND 5
143 #define EXCEPT_X64_INVALID_OPCODE 6
144 #define EXCEPT_X64_DOUBLE_FAULT 8
145 #define EXCEPT_X64_INVALID_TSS 10
146 #define EXCEPT_X64_SEG_NOT_PRESENT 11
147 #define EXCEPT_X64_STACK_FAULT 12
148 #define EXCEPT_X64_GP_FAULT 13
149 #define EXCEPT_X64_PAGE_FAULT 14
150 #define EXCEPT_X64_FP_ERROR 16
151 #define EXCEPT_X64_ALIGNMENT_CHECK 17
152 #define EXCEPT_X64_MACHINE_CHECK 18
153 #define EXCEPT_X64_SIMD 19
154
155 ///
156 /// FXSAVE_STATE.
157 /// FP / MMX / XMM registers (see fxrstor instruction definition).
158 ///
159 typedef struct {
160 UINT16 Fcw;
161 UINT16 Fsw;
162 UINT16 Ftw;
163 UINT16 Opcode;
164 UINT64 Rip;
165 UINT64 DataOffset;
166 UINT8 Reserved1[8];
167 UINT8 St0Mm0[10], Reserved2[6];
168 UINT8 St1Mm1[10], Reserved3[6];
169 UINT8 St2Mm2[10], Reserved4[6];
170 UINT8 St3Mm3[10], Reserved5[6];
171 UINT8 St4Mm4[10], Reserved6[6];
172 UINT8 St5Mm5[10], Reserved7[6];
173 UINT8 St6Mm6[10], Reserved8[6];
174 UINT8 St7Mm7[10], Reserved9[6];
175 UINT8 Xmm0[16];
176 UINT8 Xmm1[16];
177 UINT8 Xmm2[16];
178 UINT8 Xmm3[16];
179 UINT8 Xmm4[16];
180 UINT8 Xmm5[16];
181 UINT8 Xmm6[16];
182 UINT8 Xmm7[16];
183 //
184 // NOTE: UEFI 2.0 spec definition as follows.
185 //
186 UINT8 Reserved11[14 * 16];
187 } EFI_FX_SAVE_STATE_X64;
188
189 ///
190 /// x64 processor context definition.
191 ///
192 typedef struct {
193 UINT64 ExceptionData;
194 EFI_FX_SAVE_STATE_X64 FxSaveState;
195 UINT64 Dr0;
196 UINT64 Dr1;
197 UINT64 Dr2;
198 UINT64 Dr3;
199 UINT64 Dr6;
200 UINT64 Dr7;
201 UINT64 Cr0;
202 UINT64 Cr1; /* Reserved */
203 UINT64 Cr2;
204 UINT64 Cr3;
205 UINT64 Cr4;
206 UINT64 Cr8;
207 UINT64 Rflags;
208 UINT64 Ldtr;
209 UINT64 Tr;
210 UINT64 Gdtr[2];
211 UINT64 Idtr[2];
212 UINT64 Rip;
213 UINT64 Gs;
214 UINT64 Fs;
215 UINT64 Es;
216 UINT64 Ds;
217 UINT64 Cs;
218 UINT64 Ss;
219 UINT64 Rdi;
220 UINT64 Rsi;
221 UINT64 Rbp;
222 UINT64 Rsp;
223 UINT64 Rbx;
224 UINT64 Rdx;
225 UINT64 Rcx;
226 UINT64 Rax;
227 UINT64 R8;
228 UINT64 R9;
229 UINT64 R10;
230 UINT64 R11;
231 UINT64 R12;
232 UINT64 R13;
233 UINT64 R14;
234 UINT64 R15;
235 } EFI_SYSTEM_CONTEXT_X64;
236
237 ///
238 /// Itanium Processor Family Exception types.
239 ///
240 #define EXCEPT_IPF_VHTP_TRANSLATION 0
241 #define EXCEPT_IPF_INSTRUCTION_TLB 1
242 #define EXCEPT_IPF_DATA_TLB 2
243 #define EXCEPT_IPF_ALT_INSTRUCTION_TLB 3
244 #define EXCEPT_IPF_ALT_DATA_TLB 4
245 #define EXCEPT_IPF_DATA_NESTED_TLB 5
246 #define EXCEPT_IPF_INSTRUCTION_KEY_MISSED 6
247 #define EXCEPT_IPF_DATA_KEY_MISSED 7
248 #define EXCEPT_IPF_DIRTY_BIT 8
249 #define EXCEPT_IPF_INSTRUCTION_ACCESS_BIT 9
250 #define EXCEPT_IPF_DATA_ACCESS_BIT 10
251 #define EXCEPT_IPF_BREAKPOINT 11
252 #define EXCEPT_IPF_EXTERNAL_INTERRUPT 12
253 //
254 // 13 - 19 reserved
255 //
256 #define EXCEPT_IPF_PAGE_NOT_PRESENT 20
257 #define EXCEPT_IPF_KEY_PERMISSION 21
258 #define EXCEPT_IPF_INSTRUCTION_ACCESS_RIGHTS 22
259 #define EXCEPT_IPF_DATA_ACCESS_RIGHTS 23
260 #define EXCEPT_IPF_GENERAL_EXCEPTION 24
261 #define EXCEPT_IPF_DISABLED_FP_REGISTER 25
262 #define EXCEPT_IPF_NAT_CONSUMPTION 26
263 #define EXCEPT_IPF_SPECULATION 27
264 //
265 // 28 reserved
266 //
267 #define EXCEPT_IPF_DEBUG 29
268 #define EXCEPT_IPF_UNALIGNED_REFERENCE 30
269 #define EXCEPT_IPF_UNSUPPORTED_DATA_REFERENCE 31
270 #define EXCEPT_IPF_FP_FAULT 32
271 #define EXCEPT_IPF_FP_TRAP 33
272 #define EXCEPT_IPF_LOWER_PRIVILEGE_TRANSFER_TRAP 34
273 #define EXCEPT_IPF_TAKEN_BRANCH 35
274 #define EXCEPT_IPF_SINGLE_STEP 36
275 //
276 // 37 - 44 reserved
277 //
278 #define EXCEPT_IPF_IA32_EXCEPTION 45
279 #define EXCEPT_IPF_IA32_INTERCEPT 46
280 #define EXCEPT_IPF_IA32_INTERRUPT 47
281
282 ///
283 /// IPF processor context definition.
284 ///
285 typedef struct {
286 //
287 // The first reserved field is necessary to preserve alignment for the correct
288 // bits in UNAT and to insure F2 is 16 byte aligned.
289 //
290 UINT64 Reserved;
291 UINT64 R1;
292 UINT64 R2;
293 UINT64 R3;
294 UINT64 R4;
295 UINT64 R5;
296 UINT64 R6;
297 UINT64 R7;
298 UINT64 R8;
299 UINT64 R9;
300 UINT64 R10;
301 UINT64 R11;
302 UINT64 R12;
303 UINT64 R13;
304 UINT64 R14;
305 UINT64 R15;
306 UINT64 R16;
307 UINT64 R17;
308 UINT64 R18;
309 UINT64 R19;
310 UINT64 R20;
311 UINT64 R21;
312 UINT64 R22;
313 UINT64 R23;
314 UINT64 R24;
315 UINT64 R25;
316 UINT64 R26;
317 UINT64 R27;
318 UINT64 R28;
319 UINT64 R29;
320 UINT64 R30;
321 UINT64 R31;
322
323 UINT64 F2[2];
324 UINT64 F3[2];
325 UINT64 F4[2];
326 UINT64 F5[2];
327 UINT64 F6[2];
328 UINT64 F7[2];
329 UINT64 F8[2];
330 UINT64 F9[2];
331 UINT64 F10[2];
332 UINT64 F11[2];
333 UINT64 F12[2];
334 UINT64 F13[2];
335 UINT64 F14[2];
336 UINT64 F15[2];
337 UINT64 F16[2];
338 UINT64 F17[2];
339 UINT64 F18[2];
340 UINT64 F19[2];
341 UINT64 F20[2];
342 UINT64 F21[2];
343 UINT64 F22[2];
344 UINT64 F23[2];
345 UINT64 F24[2];
346 UINT64 F25[2];
347 UINT64 F26[2];
348 UINT64 F27[2];
349 UINT64 F28[2];
350 UINT64 F29[2];
351 UINT64 F30[2];
352 UINT64 F31[2];
353
354 UINT64 Pr;
355
356 UINT64 B0;
357 UINT64 B1;
358 UINT64 B2;
359 UINT64 B3;
360 UINT64 B4;
361 UINT64 B5;
362 UINT64 B6;
363 UINT64 B7;
364
365 //
366 // application registers
367 //
368 UINT64 ArRsc;
369 UINT64 ArBsp;
370 UINT64 ArBspstore;
371 UINT64 ArRnat;
372
373 UINT64 ArFcr;
374
375 UINT64 ArEflag;
376 UINT64 ArCsd;
377 UINT64 ArSsd;
378 UINT64 ArCflg;
379 UINT64 ArFsr;
380 UINT64 ArFir;
381 UINT64 ArFdr;
382
383 UINT64 ArCcv;
384
385 UINT64 ArUnat;
386
387 UINT64 ArFpsr;
388
389 UINT64 ArPfs;
390 UINT64 ArLc;
391 UINT64 ArEc;
392
393 //
394 // control registers
395 //
396 UINT64 CrDcr;
397 UINT64 CrItm;
398 UINT64 CrIva;
399 UINT64 CrPta;
400 UINT64 CrIpsr;
401 UINT64 CrIsr;
402 UINT64 CrIip;
403 UINT64 CrIfa;
404 UINT64 CrItir;
405 UINT64 CrIipa;
406 UINT64 CrIfs;
407 UINT64 CrIim;
408 UINT64 CrIha;
409
410 //
411 // debug registers
412 //
413 UINT64 Dbr0;
414 UINT64 Dbr1;
415 UINT64 Dbr2;
416 UINT64 Dbr3;
417 UINT64 Dbr4;
418 UINT64 Dbr5;
419 UINT64 Dbr6;
420 UINT64 Dbr7;
421
422 UINT64 Ibr0;
423 UINT64 Ibr1;
424 UINT64 Ibr2;
425 UINT64 Ibr3;
426 UINT64 Ibr4;
427 UINT64 Ibr5;
428 UINT64 Ibr6;
429 UINT64 Ibr7;
430
431 //
432 // virtual registers - nat bits for R1-R31
433 //
434 UINT64 IntNat;
435
436 } EFI_SYSTEM_CONTEXT_IPF;
437
438 ///
439 /// EBC processor exception types.
440 ///
441 #define EXCEPT_EBC_UNDEFINED 0
442 #define EXCEPT_EBC_DIVIDE_ERROR 1
443 #define EXCEPT_EBC_DEBUG 2
444 #define EXCEPT_EBC_BREAKPOINT 3
445 #define EXCEPT_EBC_OVERFLOW 4
446 #define EXCEPT_EBC_INVALID_OPCODE 5 ///< Opcode out of range.
447 #define EXCEPT_EBC_STACK_FAULT 6
448 #define EXCEPT_EBC_ALIGNMENT_CHECK 7
449 #define EXCEPT_EBC_INSTRUCTION_ENCODING 8 ///< Malformed instruction.
450 #define EXCEPT_EBC_BAD_BREAK 9 ///< BREAK 0 or undefined BREAK.
451 #define EXCEPT_EBC_STEP 10 ///< To support debug stepping.
452 ///
453 /// For coding convenience, define the maximum valid EBC exception.
454 ///
455 #define MAX_EBC_EXCEPTION EXCEPT_EBC_STEP
456
457 ///
458 /// EBC processor context definition.
459 ///
460 typedef struct {
461 UINT64 R0;
462 UINT64 R1;
463 UINT64 R2;
464 UINT64 R3;
465 UINT64 R4;
466 UINT64 R5;
467 UINT64 R6;
468 UINT64 R7;
469 UINT64 Flags;
470 UINT64 ControlFlags;
471 UINT64 Ip;
472 } EFI_SYSTEM_CONTEXT_EBC;
473
474
475
476 ///
477 /// ARM processor exception types.
478 ///
479 #define EXCEPT_ARM_RESET 0
480 #define EXCEPT_ARM_UNDEFINED_INSTRUCTION 1
481 #define EXCEPT_ARM_SOFTWARE_INTERRUPT 2
482 #define EXCEPT_ARM_PREFETCH_ABORT 3
483 #define EXCEPT_ARM_DATA_ABORT 4
484 #define EXCEPT_ARM_RESERVED 5
485 #define EXCEPT_ARM_IRQ 6
486 #define EXCEPT_ARM_FIQ 7
487
488 ///
489 /// For coding convenience, define the maximum valid ARM exception.
490 ///
491 #define MAX_ARM_EXCEPTION EXCEPT_ARM_FIQ
492
493 ///
494 /// ARM processor context definition.
495 ///
496 typedef struct {
497 UINT32 R0;
498 UINT32 R1;
499 UINT32 R2;
500 UINT32 R3;
501 UINT32 R4;
502 UINT32 R5;
503 UINT32 R6;
504 UINT32 R7;
505 UINT32 R8;
506 UINT32 R9;
507 UINT32 R10;
508 UINT32 R11;
509 UINT32 R12;
510 UINT32 SP;
511 UINT32 LR;
512 UINT32 PC;
513 UINT32 CPSR;
514 UINT32 DFSR;
515 UINT32 DFAR;
516 UINT32 IFSR;
517 UINT32 IFAR;
518 } EFI_SYSTEM_CONTEXT_ARM;
519
520 ///
521 /// Universal EFI_SYSTEM_CONTEXT definition.
522 ///
523 typedef union {
524 EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;
525 EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
526 EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;
527 EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
528 EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
529 } EFI_SYSTEM_CONTEXT;
530
531 //
532 // DebugSupport callback function prototypes
533 //
534
535 /**
536 Registers and enables an exception callback function for the specified exception.
537
538 @param ExceptionType Exception types in EBC, IA-32, x64, or IPF.
539 @param SystemContext Exception content.
540
541 **/
542 typedef
543 VOID
544 (EFIAPI *EFI_EXCEPTION_CALLBACK)(
545 IN EFI_EXCEPTION_TYPE ExceptionType,
546 IN OUT EFI_SYSTEM_CONTEXT SystemContext
547 );
548
549 /**
550 Registers and enables the on-target debug agent's periodic entry point.
551
552 @param SystemContext Exception content.
553
554 **/
555 typedef
556 VOID
557 (EFIAPI *EFI_PERIODIC_CALLBACK)(
558 IN OUT EFI_SYSTEM_CONTEXT SystemContext
559 );
560
561 ///
562 /// Machine type definition
563 ///
564 typedef enum {
565 IsaIa32 = IMAGE_FILE_MACHINE_I386, ///< 0x014C
566 IsaX64 = IMAGE_FILE_MACHINE_X64, ///< 0x8664
567 IsaIpf = IMAGE_FILE_MACHINE_IA64, ///< 0x0200
568 IsaEbc = IMAGE_FILE_MACHINE_EBC, ///< 0x0EBC
569 IsaArm = IMAGE_FILE_MACHINE_ARMTHUMB_MIXED ///< 0x01c2
570 } EFI_INSTRUCTION_SET_ARCHITECTURE;
571
572
573 //
574 // DebugSupport member function definitions
575 //
576
577 /**
578 Returns the maximum value that may be used for the ProcessorIndex parameter in
579 RegisterPeriodicCallback() and RegisterExceptionCallback().
580
581 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
582 @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported
583 processor index is returned.
584
585 @retval EFI_SUCCESS The function completed successfully.
586
587 **/
588 typedef
589 EFI_STATUS
590 (EFIAPI *EFI_GET_MAXIMUM_PROCESSOR_INDEX)(
591 IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
592 OUT UINTN *MaxProcessorIndex
593 );
594
595 /**
596 Registers a function to be called back periodically in interrupt context.
597
598 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
599 @param ProcessorIndex Specifies which processor the callback function applies to.
600 @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main
601 periodic entry point of the debug agent.
602
603 @retval EFI_SUCCESS The function completed successfully.
604 @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback
605 function was previously registered.
606 @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback
607 function.
608
609 **/
610 typedef
611 EFI_STATUS
612 (EFIAPI *EFI_REGISTER_PERIODIC_CALLBACK)(
613 IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
614 IN UINTN ProcessorIndex,
615 IN EFI_PERIODIC_CALLBACK PeriodicCallback
616 );
617
618 /**
619 Registers a function to be called when a given processor exception occurs.
620
621 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
622 @param ProcessorIndex Specifies which processor the callback function applies to.
623 @param ExceptionCallback A pointer to a function of type EXCEPTION_CALLBACK that is called
624 when the processor exception specified by ExceptionType occurs.
625 @param ExceptionType Specifies which processor exception to hook.
626
627 @retval EFI_SUCCESS The function completed successfully.
628 @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback
629 function was previously registered.
630 @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback
631 function.
632
633 **/
634 typedef
635 EFI_STATUS
636 (EFIAPI *EFI_REGISTER_EXCEPTION_CALLBACK)(
637 IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
638 IN UINTN ProcessorIndex,
639 IN EFI_EXCEPTION_CALLBACK ExceptionCallback,
640 IN EFI_EXCEPTION_TYPE ExceptionType
641 );
642
643 /**
644 Invalidates processor instruction cache for a memory range. Subsequent execution in this range
645 causes a fresh memory fetch to retrieve code to be executed.
646
647 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
648 @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated.
649 @param Start Specifies the physical base of the memory range to be invalidated.
650 @param Length Specifies the minimum number of bytes in the processor's instruction
651 cache to invalidate.
652
653 @retval EFI_SUCCESS The function completed successfully.
654
655 **/
656 typedef
657 EFI_STATUS
658 (EFIAPI *EFI_INVALIDATE_INSTRUCTION_CACHE)(
659 IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
660 IN UINTN ProcessorIndex,
661 IN VOID *Start,
662 IN UINT64 Length
663 );
664
665 ///
666 /// This protocol provides the services to allow the debug agent to register
667 /// callback functions that are called either periodically or when specific
668 /// processor exceptions occur.
669 ///
670 struct _EFI_DEBUG_SUPPORT_PROTOCOL {
671 ///
672 /// Declares the processor architecture for this instance of the EFI Debug Support protocol.
673 ///
674 EFI_INSTRUCTION_SET_ARCHITECTURE Isa;
675 EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex;
676 EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback;
677 EFI_REGISTER_EXCEPTION_CALLBACK RegisterExceptionCallback;
678 EFI_INVALIDATE_INSTRUCTION_CACHE InvalidateInstructionCache;
679 };
680
681 extern EFI_GUID gEfiDebugSupportProtocolGuid;
682
683 #endif
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