MdePkg/Include/Protocol/PciIo.h

   1 /** @file
   2   EFI PCI I/O Protocol
   3
   4   Copyright (c) 2006, Intel Corporation
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13   Module Name:  PciIo.h
  14
  15 **/
  16
  17 #ifndef __PCI_IO_H__
  18 #define __PCI_IO_H__
  19
  20 //
  21 // Global ID for the PCI I/O Protocol
  22 //
  23 #define EFI_PCI_IO_PROTOCOL_GUID \
  24   { \
  25     0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \
  26   }
  27
  28 typedef struct _EFI_PCI_IO_PROTOCOL  EFI_PCI_IO_PROTOCOL;
  29
  30 //
  31 // Prototypes for the PCI I/O Protocol
  32 //
  33 typedef enum {
  34   EfiPciIoWidthUint8      = 0,
  35   EfiPciIoWidthUint16,
  36   EfiPciIoWidthUint32,
  37   EfiPciIoWidthUint64,
  38   EfiPciIoWidthFifoUint8,
  39   EfiPciIoWidthFifoUint16,
  40   EfiPciIoWidthFifoUint32,
  41   EfiPciIoWidthFifoUint64,
  42   EfiPciIoWidthFillUint8,
  43   EfiPciIoWidthFillUint16,
  44   EfiPciIoWidthFillUint32,
  45   EfiPciIoWidthFillUint64,
  46   EfiPciIoWidthMaximum
  47 } EFI_PCI_IO_PROTOCOL_WIDTH;
  48
  49 //
  50 // Complete PCI address generater
  51 //
  52 #define EFI_PCI_IO_PASS_THROUGH_BAR               0xff    // Special BAR that passes a memory or I/O cycle through unchanged
  53 #define EFI_PCI_IO_ATTRIBUTE_MASK                 0x077f  // All the following I/O and Memory cycles
  54 #define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO   0x0001  // I/O cycles 0x0000-0x00FF (10 bit decode)
  55 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO               0x0002  // I/O cycles 0x0100-0x03FF or greater (10 bit decode)
  56 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO       0x0004  // I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
  57 #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY           0x0008  // MEM cycles 0xA0000-0xBFFFF (24 bit decode)
  58 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO               0x0010  // I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
  59 #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO       0x0020  // I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
  60 #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO     0x0040  // I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
  61 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080  // Map a memory range so write are combined
  62 #define EFI_PCI_IO_ATTRIBUTE_IO                   0x0100  // Enable the I/O decode bit in the PCI Config Header
  63 #define EFI_PCI_IO_ATTRIBUTE_MEMORY               0x0200  // Enable the Memory decode bit in the PCI Config Header
  64 #define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER           0x0400  // Enable the DMA bit in the PCI Config Header
  65 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED        0x0800  // Map a memory range so all r/w accesses are cached
  66 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE       0x1000  // Disable a memory range
  67 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE      0x2000  // Clear for an add-in PCI Device
  68 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM         0x4000  // Clear for a physical PCI Option ROM accessed through ROM BAR
  69 #define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE   0x8000  // Clear for PCI controllers that can not genrate a DAC
  70 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16            0x10000 // I/O cycles 0x0100-0x03FF or greater (16 bit decode)
  71 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16    0x20000 // I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
  72 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16            0x30000 // I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
  73
  74 #define EFI_PCI_DEVICE_ENABLE                     (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
  75 #define EFI_VGA_DEVICE_ENABLE                     (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
  76
  77 //
  78 // *******************************************************
  79 // EFI_PCI_IO_PROTOCOL_OPERATION
  80 // *******************************************************
  81 //
  82 typedef enum {
  83   EfiPciIoOperationBusMasterRead,
  84   EfiPciIoOperationBusMasterWrite,
  85   EfiPciIoOperationBusMasterCommonBuffer,
  86   EfiPciIoOperationMaximum
  87 } EFI_PCI_IO_PROTOCOL_OPERATION;
  88
  89 //
  90 // *******************************************************
  91 // EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
  92 // *******************************************************
  93 //
  94 typedef enum {
  95   EfiPciIoAttributeOperationGet,
  96   EfiPciIoAttributeOperationSet,
  97   EfiPciIoAttributeOperationEnable,
  98   EfiPciIoAttributeOperationDisable,
  99   EfiPciIoAttributeOperationSupported,
 100   EfiPciIoAttributeOperationMaximum
 101 } EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;
 102
 103 /**
 104   Reads from the memory space of a PCI controller. Returns when either the polling exit criteria is
 105   satisfied or after a defined duration.
 106
 107   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 108   @param  Width                 Signifies the width of the memory or I/O operations.
 109   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 110                                 base address for the memory operation to perform.
 111   @param  Offset                The offset within the selected BAR to start the memory operation.
 112   @param  Mask                  Mask used for the polling criteria.
 113   @param  Value                 The comparison value used for the polling exit criteria.
 114   @param  Delay                 The number of 100 ns units to poll.
 115   @param  Result                Pointer to the last value read from the memory location.
 116
 117   @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.
 118   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 119   @retval EFI_UNSUPPORTED       Offset is not valid for the BarIndex of this PCI controller.
 120   @retval EFI_TIMEOUT           Delay expired before a match occurred.
 121   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 122   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 123
 124 **/
 125 typedef
 126 EFI_STATUS
 127 (EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM) (
 128   IN EFI_PCI_IO_PROTOCOL           *This,
 129   IN  EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 130   IN  UINT8                        BarIndex,
 131   IN  UINT64                       Offset,
 132   IN  UINT64                       Mask,
 133   IN  UINT64                       Value,
 134   IN  UINT64                       Delay,
 135   OUT UINT64                       *Result
 136   );
 137
 138 /**
 139   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
 140
 141   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 142   @param  Width                 Signifies the width of the memory or I/O operations.
 143   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 144                                 base address for the memory or I/O operation to perform.
 145   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
 146   @param  Count                 The number of memory or I/O operations to perform.
 147   @param  Buffer                For read operations, the destination buffer to store the results. For write
 148                                 operations, the source buffer to write data from.
 149
 150   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 151   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 152   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 153                                 valid for the PCI BAR specified by BarIndex.
 154   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 155   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 156
 157 **/
 158 typedef
 159 EFI_STATUS
 160 (EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM) (
 161   IN EFI_PCI_IO_PROTOCOL              *This,
 162   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 163   IN     UINT8                        BarIndex,
 164   IN     UINT64                       Offset,
 165   IN     UINTN                        Count,
 166   IN OUT VOID                         *Buffer
 167   );
 168
 169 typedef struct {
 170   EFI_PCI_IO_PROTOCOL_IO_MEM  Read;
 171   EFI_PCI_IO_PROTOCOL_IO_MEM  Write;
 172 } EFI_PCI_IO_PROTOCOL_ACCESS;
 173
 174 /**
 175   Enable a PCI driver to access PCI controller registers in PCI configuration space.
 176
 177   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 178   @param  Width                 Signifies the width of the memory operations.
 179   @param  Offset                The offset within the PCI configuration space for the PCI controller.
 180   @param  Count                 The number of PCI configuration operations to perform.
 181   @param  Buffer                For read operations, the destination buffer to store the results. For write
 182                                 operations, the source buffer to write data from.
 183
 184
 185   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 186   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 187                                 valid for the PCI configuration header of the PCI controller.
 188   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 189   @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
 190
 191 **/
 192 typedef
 193 EFI_STATUS
 194 (EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG) (
 195   IN EFI_PCI_IO_PROTOCOL              *This,
 196   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 197   IN     UINT32                       Offset,
 198   IN     UINTN                        Count,
 199   IN OUT VOID                         *Buffer
 200   );
 201
 202 typedef struct {
 203   EFI_PCI_IO_PROTOCOL_CONFIG  Read;
 204   EFI_PCI_IO_PROTOCOL_CONFIG  Write;
 205 } EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;
 206
 207 /**
 208   Enables a PCI driver to copy one region of PCI memory space to another region of PCI
 209   memory space.
 210
 211   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 212   @param  Width                 Signifies the width of the memory operations.
 213   @param  DestBarIndex          The BAR index in the standard PCI Configuration header to use as the
 214                                 base address for the memory operation to perform.
 215   @param  DestOffset            The destination offset within the BAR specified by DestBarIndex to
 216                                 start the memory writes for the copy operation.
 217   @param  SrcBarIndex           The BAR index in the standard PCI Configuration header to use as the
 218                                 base address for the memory operation to perform.
 219   @param  SrcOffset             The source offset within the BAR specified by SrcBarIndex to start
 220                                 the memory reads for the copy operation.
 221   @param  Count                 The number of memory operations to perform. Bytes moved is Width
 222                                 size * Count, starting at DestOffset and SrcOffset.
 223
 224   @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.
 225   @retval EFI_UNSUPPORTED       DestBarIndex not valid for this PCI controller.
 226   @retval EFI_UNSUPPORTED       SrcBarIndex not valid for this PCI controller.
 227   @retval EFI_UNSUPPORTED       The address range specified by DestOffset, Width, and Count
 228                                 is not valid for the PCI BAR specified by DestBarIndex.
 229   @retval EFI_UNSUPPORTED       The address range specified by SrcOffset, Width, and Count is
 230                                 not valid for the PCI BAR specified by SrcBarIndex.
 231   @retval EFI_INVALID_PARAMETER Width is invalid.
 232   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 233
 234 **/
 235 typedef
 236 EFI_STATUS
 237 (EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM) (
 238   IN EFI_PCI_IO_PROTOCOL              *This,
 239   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 240   IN     UINT8                        DestBarIndex,
 241   IN     UINT64                       DestOffset,
 242   IN     UINT8                        SrcBarIndex,
 243   IN     UINT64                       SrcOffset,
 244   IN     UINTN                        Count
 245   );
 246
 247 /**
 248   Provides the PCI controller-Cspecific addresses needed to access system memory.
 249
 250   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 251   @param  Operation             Indicates if the bus master is going to read or write to system memory.
 252   @param  HostAddress           The system memory address to map to the PCI controller.
 253   @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes
 254                                 that were mapped.
 255   @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to
 256                                 access the hosts HostAddress.
 257   @param  Mapping               A resulting value to pass to Unmap().
 258
 259   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
 260   @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.
 261   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 262   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 263   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
 264
 265 **/
 266 typedef
 267 EFI_STATUS
 268 (EFIAPI *EFI_PCI_IO_PROTOCOL_MAP) (
 269   IN EFI_PCI_IO_PROTOCOL                *This,
 270   IN     EFI_PCI_IO_PROTOCOL_OPERATION  Operation,
 271   IN     VOID                           *HostAddress,
 272   IN OUT UINTN                          *NumberOfBytes,
 273   OUT    EFI_PHYSICAL_ADDRESS           *DeviceAddress,
 274   OUT    VOID                           **Mapping
 275   );
 276
 277 /**
 278   Completes the Map() operation and releases any corresponding resources.
 279
 280   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 281   @param  Mapping               The mapping value returned from Map().
 282
 283   @retval EFI_SUCCESS           The range was unmapped.
 284   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
 285
 286 **/
 287 typedef
 288 EFI_STATUS
 289 (EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP) (
 290   IN EFI_PCI_IO_PROTOCOL           *This,
 291   IN  VOID                         *Mapping
 292   );
 293
 294 /**
 295   Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
 296   mapping.
 297
 298   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 299   @param  Type                  This parameter is not used and must be ignored.
 300   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
 301                                 EfiRuntimeServicesData.
 302   @param  Pages                 The number of pages to allocate.
 303   @param  HostAddress           A pointer to store the base system memory address of the
 304                                 allocated range.
 305   @param  Attributes            The requested bit mask of attributes for the allocated range.
 306
 307   @retval EFI_SUCCESS           The requested memory pages were allocated.
 308   @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are
 309                                 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
 310   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 311   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
 312
 313 **/
 314 typedef
 315 EFI_STATUS
 316 (EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER) (
 317   IN EFI_PCI_IO_PROTOCOL           *This,
 318   IN  EFI_ALLOCATE_TYPE            Type,
 319   IN  EFI_MEMORY_TYPE              MemoryType,
 320   IN  UINTN                        Pages,
 321   OUT VOID                         **HostAddress,
 322   IN  UINT64                       Attributes
 323   );
 324
 325 /**
 326   Frees memory that was allocated with AllocateBuffer().
 327
 328   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 329   @param  Pages                 The number of pages to free.
 330   @param  HostAddress           The base system memory address of the allocated range.
 331
 332   @retval EFI_SUCCESS           The requested memory pages were freed.
 333   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
 334                                 was not allocated with AllocateBuffer().
 335
 336 **/
 337 typedef
 338 EFI_STATUS
 339 (EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER) (
 340   IN EFI_PCI_IO_PROTOCOL           *This,
 341   IN  UINTN                        Pages,
 342   IN  VOID                         *HostAddress
 343   );
 344
 345 /**
 346   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
 347
 348   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 349
 350   @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host
 351                                 bridge to system memory.
 352   @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI
 353                                 host bridge due to a hardware error.
 354
 355 **/
 356 typedef
 357 EFI_STATUS
 358 (EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH) (
 359   IN EFI_PCI_IO_PROTOCOL  *This
 360   );
 361
 362 /**
 363   Retrieves this PCI controller's current PCI bus number, device number, and function number.
 364
 365   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 366   @param  SegmentNumber         The PCI controller's current PCI segment number.
 367   @param  BusNumber             The PCI controller's current PCI bus number.
 368   @param  DeviceNumber          The PCI controller's current PCI device number.
 369   @param  FunctionNumber        The PCI controller's current PCI function number.
 370
 371   @retval EFI_SUCCESS           The PCI controller location was returned.
 372   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 373
 374 **/
 375 typedef
 376 EFI_STATUS
 377 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION) (
 378   IN EFI_PCI_IO_PROTOCOL          *This,
 379   OUT UINTN                       *SegmentNumber,
 380   OUT UINTN                       *BusNumber,
 381   OUT UINTN                       *DeviceNumber,
 382   OUT UINTN                       *FunctionNumber
 383   );
 384
 385 /**
 386   Performs an operation on the attributes that this PCI controller supports. The operations include
 387   getting the set of supported attributes, retrieving the current attributes, setting the current
 388   attributes, enabling attributes, and disabling attributes.
 389
 390   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 391   @param  Operation             The operation to perform on the attributes for this PCI controller.
 392   @param  Attributes            The mask of attributes that are used for Set, Enable, and Disable
 393                                 operations.
 394   @param  Result                A pointer to the result mask of attributes that are returned for the Get
 395                                 and Supported operations.
 396
 397   @retval EFI_SUCCESS           The operation on the PCI controller's attributes was completed.
 398   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 399   @retval EFI_UNSUPPORTED       one or more of the bits set in
 400                                 Attributes are not supported by this PCI controller or one of
 401                                 its parent bridges when Operation is Set, Enable or Disable.
 402
 403 **/
 404 typedef
 405 EFI_STATUS
 406 (EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES) (
 407   IN EFI_PCI_IO_PROTOCOL                       *This,
 408   IN  EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION  Operation,
 409   IN  UINT64                                   Attributes,
 410   OUT UINT64                                   *Result OPTIONAL
 411   );
 412
 413 /**
 414   Gets the attributes that this PCI controller supports setting on a BAR using
 415   SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
 416
 417   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 418   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 419                                 base address for resource range. The legal range for this field is 0..5.
 420   @param  Supports              A pointer to the mask of attributes that this PCI controller supports
 421                                 setting for this BAR with SetBarAttributes().
 422   @param  Resources             A pointer to the ACPI 2.0 resource descriptors that describe the current
 423                                 configuration of this BAR of the PCI controller.
 424
 425   @retval EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI
 426                                 controller supports are returned in Supports. If Resources
 427                                 is not NULL, then the ACPI 2.0 resource descriptors that the PCI
 428                                 controller is currently using are returned in Resources.
 429   @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
 430   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 431   @retval EFI_OUT_OF_RESOURCES  There are not enough resources available to allocate
 432                                 Resources.
 433
 434 **/
 435 typedef
 436 EFI_STATUS
 437 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES) (
 438   IN EFI_PCI_IO_PROTOCOL             *This,
 439   IN  UINT8                          BarIndex,
 440   OUT UINT64                         *Supports, OPTIONAL
 441   OUT VOID                           **Resources OPTIONAL
 442   );
 443
 444 /**
 445   Sets the attributes for a range of a BAR on a PCI controller.
 446
 447   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 448   @param  Attributes            The mask of attributes to set for the resource range specified by
 449                                 BarIndex, Offset, and Length.
 450   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 451                                 base address for resource range. The legal range for this field is 0..5.
 452   @param  Offset                A pointer to the BAR relative base address of the resource range to be
 453                                 modified by the attributes specified by Attributes.
 454   @param  Length                A pointer to the length of the resource range to be modified by the
 455                                 attributes specified by Attributes.
 456
 457   @retval EFI_SUCCESS           The set of attributes specified by Attributes for the resource
 458                                 range specified by BarIndex, Offset, and Length were
 459                                 set on the PCI controller, and the actual resource range is returned
 460                                 in Offset and Length.
 461   @retval EFI_INVALID_PARAMETER Offset or Length is NULL.
 462   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 463   @retval EFI_OUT_OF_RESOURCES  There are not enough resources to set the attributes on the
 464                                 resource range specified by BarIndex, Offset, and
 465                                 Length.
 466
 467 **/
 468 typedef
 469 EFI_STATUS
 470 (EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES) (
 471   IN EFI_PCI_IO_PROTOCOL              *This,
 472   IN     UINT64                       Attributes,
 473   IN     UINT8                        BarIndex,
 474   IN OUT UINT64                       *Offset,
 475   IN OUT UINT64                       *Length
 476   );
 477
 478 //
 479 // Interface structure for the PCI I/O Protocol
 480 //
 481 struct _EFI_PCI_IO_PROTOCOL {
 482   EFI_PCI_IO_PROTOCOL_POLL_IO_MEM         PollMem;
 483   EFI_PCI_IO_PROTOCOL_POLL_IO_MEM         PollIo;
 484   EFI_PCI_IO_PROTOCOL_ACCESS              Mem;
 485   EFI_PCI_IO_PROTOCOL_ACCESS              Io;
 486   EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS       Pci;
 487   EFI_PCI_IO_PROTOCOL_COPY_MEM            CopyMem;
 488   EFI_PCI_IO_PROTOCOL_MAP                 Map;
 489   EFI_PCI_IO_PROTOCOL_UNMAP               Unmap;
 490   EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER     AllocateBuffer;
 491   EFI_PCI_IO_PROTOCOL_FREE_BUFFER         FreeBuffer;
 492   EFI_PCI_IO_PROTOCOL_FLUSH               Flush;
 493   EFI_PCI_IO_PROTOCOL_GET_LOCATION        GetLocation;
 494   EFI_PCI_IO_PROTOCOL_ATTRIBUTES          Attributes;
 495   EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES  GetBarAttributes;
 496   EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES  SetBarAttributes;
 497   UINT64                                  RomSize;
 498   VOID                                    *RomImage;
 499 };
 500
 501 extern EFI_GUID gEfiPciIoProtocolGuid;
 502
 503 #endif