MdePkg/Include/Protocol/PciIo.h

   1 /** @file
   2   EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration,
   3   and DMA interfaces that a driver uses to access its PCI controller.
   4
   5   Copyright (c) 2006 - 2008, Intel Corporation
   6   All rights reserved. This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef __PCI_IO_H__
  17 #define __PCI_IO_H__
  18
  19 ///
  20 /// Global ID for the PCI I/O Protocol
  21 ///
  22 #define EFI_PCI_IO_PROTOCOL_GUID \
  23   { \
  24     0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \
  25   }
  26
  27 typedef struct _EFI_PCI_IO_PROTOCOL  EFI_PCI_IO_PROTOCOL;
  28
  29 ///
  30 /// Prototypes for the PCI I/O Protocol
  31 ///
  32 typedef enum {
  33   EfiPciIoWidthUint8      = 0,
  34   EfiPciIoWidthUint16,
  35   EfiPciIoWidthUint32,
  36   EfiPciIoWidthUint64,
  37   EfiPciIoWidthFifoUint8,
  38   EfiPciIoWidthFifoUint16,
  39   EfiPciIoWidthFifoUint32,
  40   EfiPciIoWidthFifoUint64,
  41   EfiPciIoWidthFillUint8,
  42   EfiPciIoWidthFillUint16,
  43   EfiPciIoWidthFillUint32,
  44   EfiPciIoWidthFillUint64,
  45   EfiPciIoWidthMaximum
  46 } EFI_PCI_IO_PROTOCOL_WIDTH;
  47
  48 //
  49 // Complete PCI address generater
  50 //
  51 #define EFI_PCI_IO_PASS_THROUGH_BAR               0xff    ///< Special BAR that passes a memory or I/O cycle through unchanged
  52 #define EFI_PCI_IO_ATTRIBUTE_MASK                 0x077f  ///< All the following I/O and Memory cycles
  53 #define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO   0x0001  ///< I/O cycles 0x0000-0x00FF (10 bit decode)
  54 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO               0x0002  ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
  55 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO       0x0004  ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
  56 #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY           0x0008  ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
  57 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO               0x0010  ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
  58 #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO       0x0020  ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
  59 #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO     0x0040  ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
  60 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080  ///< Map a memory range so write are combined
  61 #define EFI_PCI_IO_ATTRIBUTE_IO                   0x0100  ///< Enable the I/O decode bit in the PCI Config Header
  62 #define EFI_PCI_IO_ATTRIBUTE_MEMORY               0x0200  ///< Enable the Memory decode bit in the PCI Config Header
  63 #define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER           0x0400  ///< Enable the DMA bit in the PCI Config Header
  64 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED        0x0800  ///< Map a memory range so all r/w accesses are cached
  65 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE       0x1000  ///< Disable a memory range
  66 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE      0x2000  ///< Clear for an add-in PCI Device
  67 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM         0x4000  ///< Clear for a physical PCI Option ROM accessed through ROM BAR
  68 #define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE   0x8000  ///< Clear for PCI controllers that can not genrate a DAC
  69 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16            0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
  70 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16    0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
  71 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16            0x30000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
  72
  73 #define EFI_PCI_DEVICE_ENABLE                     (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
  74 #define EFI_VGA_DEVICE_ENABLE                     (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
  75
  76 ///
  77 /// *******************************************************
  78 /// EFI_PCI_IO_PROTOCOL_OPERATION
  79 /// *******************************************************
  80 ///
  81 typedef enum {
  82   EfiPciIoOperationBusMasterRead,
  83   EfiPciIoOperationBusMasterWrite,
  84   EfiPciIoOperationBusMasterCommonBuffer,
  85   EfiPciIoOperationMaximum
  86 } EFI_PCI_IO_PROTOCOL_OPERATION;
  87
  88 ///
  89 /// *******************************************************
  90 /// EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
  91 /// *******************************************************
  92 ///
  93 typedef enum {
  94   EfiPciIoAttributeOperationGet,
  95   EfiPciIoAttributeOperationSet,
  96   EfiPciIoAttributeOperationEnable,
  97   EfiPciIoAttributeOperationDisable,
  98   EfiPciIoAttributeOperationSupported,
  99   EfiPciIoAttributeOperationMaximum
 100 } EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;
 101
 102 /**
 103   Reads from the memory space of a PCI controller. Returns when either the polling exit criteria is
 104   satisfied or after a defined duration.
 105
 106   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 107   @param  Width                 Signifies the width of the memory or I/O operations.
 108   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 109                                 base address for the memory operation to perform.
 110   @param  Offset                The offset within the selected BAR to start the memory operation.
 111   @param  Mask                  Mask used for the polling criteria.
 112   @param  Value                 The comparison value used for the polling exit criteria.
 113   @param  Delay                 The number of 100 ns units to poll.
 114   @param  Result                Pointer to the last value read from the memory location.
 115
 116   @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.
 117   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 118   @retval EFI_UNSUPPORTED       Offset is not valid for the BarIndex of this PCI controller.
 119   @retval EFI_TIMEOUT           Delay expired before a match occurred.
 120   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 121   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 122
 123 **/
 124 typedef
 125 EFI_STATUS
 126 (EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM)(
 127   IN EFI_PCI_IO_PROTOCOL           *This,
 128   IN  EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 129   IN  UINT8                        BarIndex,
 130   IN  UINT64                       Offset,
 131   IN  UINT64                       Mask,
 132   IN  UINT64                       Value,
 133   IN  UINT64                       Delay,
 134   OUT UINT64                       *Result
 135   );
 136
 137 /**
 138   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
 139
 140   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 141   @param  Width                 Signifies the width of the memory or I/O operations.
 142   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 143                                 base address for the memory or I/O operation to perform.
 144   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
 145   @param  Count                 The number of memory or I/O operations to perform.
 146   @param  Buffer                For read operations, the destination buffer to store the results. For write
 147                                 operations, the source buffer to write data from.
 148
 149   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 150   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 151   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 152                                 valid for the PCI BAR specified by BarIndex.
 153   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 154   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 155
 156 **/
 157 typedef
 158 EFI_STATUS
 159 (EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM)(
 160   IN EFI_PCI_IO_PROTOCOL              *This,
 161   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 162   IN     UINT8                        BarIndex,
 163   IN     UINT64                       Offset,
 164   IN     UINTN                        Count,
 165   IN OUT VOID                         *Buffer
 166   );
 167
 168 typedef struct {
 169   EFI_PCI_IO_PROTOCOL_IO_MEM  Read;
 170   EFI_PCI_IO_PROTOCOL_IO_MEM  Write;
 171 } EFI_PCI_IO_PROTOCOL_ACCESS;
 172
 173 /**
 174   Enable a PCI driver to access PCI controller registers in PCI configuration space.
 175
 176   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 177   @param  Width                 Signifies the width of the memory operations.
 178   @param  Offset                The offset within the PCI configuration space for the PCI controller.
 179   @param  Count                 The number of PCI configuration operations to perform.
 180   @param  Buffer                For read operations, the destination buffer to store the results. For write
 181                                 operations, the source buffer to write data from.
 182
 183
 184   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 185   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 186                                 valid for the PCI configuration header of the PCI controller.
 187   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 188   @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
 189
 190 **/
 191 typedef
 192 EFI_STATUS
 193 (EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG)(
 194   IN EFI_PCI_IO_PROTOCOL              *This,
 195   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 196   IN     UINT32                       Offset,
 197   IN     UINTN                        Count,
 198   IN OUT VOID                         *Buffer
 199   );
 200
 201 typedef struct {
 202   EFI_PCI_IO_PROTOCOL_CONFIG  Read;
 203   EFI_PCI_IO_PROTOCOL_CONFIG  Write;
 204 } EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;
 205
 206 /**
 207   Enables a PCI driver to copy one region of PCI memory space to another region of PCI
 208   memory space.
 209
 210   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 211   @param  Width                 Signifies the width of the memory operations.
 212   @param  DestBarIndex          The BAR index in the standard PCI Configuration header to use as the
 213                                 base address for the memory operation to perform.
 214   @param  DestOffset            The destination offset within the BAR specified by DestBarIndex to
 215                                 start the memory writes for the copy operation.
 216   @param  SrcBarIndex           The BAR index in the standard PCI Configuration header to use as the
 217                                 base address for the memory operation to perform.
 218   @param  SrcOffset             The source offset within the BAR specified by SrcBarIndex to start
 219                                 the memory reads for the copy operation.
 220   @param  Count                 The number of memory operations to perform. Bytes moved is Width
 221                                 size * Count, starting at DestOffset and SrcOffset.
 222
 223   @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.
 224   @retval EFI_UNSUPPORTED       DestBarIndex not valid for this PCI controller.
 225   @retval EFI_UNSUPPORTED       SrcBarIndex not valid for this PCI controller.
 226   @retval EFI_UNSUPPORTED       The address range specified by DestOffset, Width, and Count
 227                                 is not valid for the PCI BAR specified by DestBarIndex.
 228   @retval EFI_UNSUPPORTED       The address range specified by SrcOffset, Width, and Count is
 229                                 not valid for the PCI BAR specified by SrcBarIndex.
 230   @retval EFI_INVALID_PARAMETER Width is invalid.
 231   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 232
 233 **/
 234 typedef
 235 EFI_STATUS
 236 (EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM)(
 237   IN EFI_PCI_IO_PROTOCOL              *This,
 238   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 239   IN     UINT8                        DestBarIndex,
 240   IN     UINT64                       DestOffset,
 241   IN     UINT8                        SrcBarIndex,
 242   IN     UINT64                       SrcOffset,
 243   IN     UINTN                        Count
 244   );
 245
 246 /**
 247   Provides the PCI controller-Cspecific addresses needed to access system memory.
 248
 249   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 250   @param  Operation             Indicates if the bus master is going to read or write to system memory.
 251   @param  HostAddress           The system memory address to map to the PCI controller.
 252   @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes
 253                                 that were mapped.
 254   @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to
 255                                 access the hosts HostAddress.
 256   @param  Mapping               A resulting value to pass to Unmap().
 257
 258   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
 259   @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.
 260   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 261   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 262   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
 263
 264 **/
 265 typedef
 266 EFI_STATUS
 267 (EFIAPI *EFI_PCI_IO_PROTOCOL_MAP)(
 268   IN EFI_PCI_IO_PROTOCOL                *This,
 269   IN     EFI_PCI_IO_PROTOCOL_OPERATION  Operation,
 270   IN     VOID                           *HostAddress,
 271   IN OUT UINTN                          *NumberOfBytes,
 272   OUT    EFI_PHYSICAL_ADDRESS           *DeviceAddress,
 273   OUT    VOID                           **Mapping
 274   );
 275
 276 /**
 277   Completes the Map() operation and releases any corresponding resources.
 278
 279   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 280   @param  Mapping               The mapping value returned from Map().
 281
 282   @retval EFI_SUCCESS           The range was unmapped.
 283   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
 284
 285 **/
 286 typedef
 287 EFI_STATUS
 288 (EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP)(
 289   IN EFI_PCI_IO_PROTOCOL           *This,
 290   IN  VOID                         *Mapping
 291   );
 292
 293 /**
 294   Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
 295   mapping.
 296
 297   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 298   @param  Type                  This parameter is not used and must be ignored.
 299   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
 300                                 EfiRuntimeServicesData.
 301   @param  Pages                 The number of pages to allocate.
 302   @param  HostAddress           A pointer to store the base system memory address of the
 303                                 allocated range.
 304   @param  Attributes            The requested bit mask of attributes for the allocated range.
 305
 306   @retval EFI_SUCCESS           The requested memory pages were allocated.
 307   @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are
 308                                 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
 309   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 310   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
 311
 312 **/
 313 typedef
 314 EFI_STATUS
 315 (EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER)(
 316   IN EFI_PCI_IO_PROTOCOL           *This,
 317   IN  EFI_ALLOCATE_TYPE            Type,
 318   IN  EFI_MEMORY_TYPE              MemoryType,
 319   IN  UINTN                        Pages,
 320   OUT VOID                         **HostAddress,
 321   IN  UINT64                       Attributes
 322   );
 323
 324 /**
 325   Frees memory that was allocated with AllocateBuffer().
 326
 327   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 328   @param  Pages                 The number of pages to free.
 329   @param  HostAddress           The base system memory address of the allocated range.
 330
 331   @retval EFI_SUCCESS           The requested memory pages were freed.
 332   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
 333                                 was not allocated with AllocateBuffer().
 334
 335 **/
 336 typedef
 337 EFI_STATUS
 338 (EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER)(
 339   IN EFI_PCI_IO_PROTOCOL           *This,
 340   IN  UINTN                        Pages,
 341   IN  VOID                         *HostAddress
 342   );
 343
 344 /**
 345   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
 346
 347   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 348
 349   @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host
 350                                 bridge to system memory.
 351   @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI
 352                                 host bridge due to a hardware error.
 353
 354 **/
 355 typedef
 356 EFI_STATUS
 357 (EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH)(
 358   IN EFI_PCI_IO_PROTOCOL  *This
 359   );
 360
 361 /**
 362   Retrieves this PCI controller's current PCI bus number, device number, and function number.
 363
 364   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 365   @param  SegmentNumber         The PCI controller's current PCI segment number.
 366   @param  BusNumber             The PCI controller's current PCI bus number.
 367   @param  DeviceNumber          The PCI controller's current PCI device number.
 368   @param  FunctionNumber        The PCI controller's current PCI function number.
 369
 370   @retval EFI_SUCCESS           The PCI controller location was returned.
 371   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 372
 373 **/
 374 typedef
 375 EFI_STATUS
 376 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION)(
 377   IN EFI_PCI_IO_PROTOCOL          *This,
 378   OUT UINTN                       *SegmentNumber,
 379   OUT UINTN                       *BusNumber,
 380   OUT UINTN                       *DeviceNumber,
 381   OUT UINTN                       *FunctionNumber
 382   );
 383
 384 /**
 385   Performs an operation on the attributes that this PCI controller supports. The operations include
 386   getting the set of supported attributes, retrieving the current attributes, setting the current
 387   attributes, enabling attributes, and disabling attributes.
 388
 389   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 390   @param  Operation             The operation to perform on the attributes for this PCI controller.
 391   @param  Attributes            The mask of attributes that are used for Set, Enable, and Disable
 392                                 operations.
 393   @param  Result                A pointer to the result mask of attributes that are returned for the Get
 394                                 and Supported operations.
 395
 396   @retval EFI_SUCCESS           The operation on the PCI controller's attributes was completed.
 397   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 398   @retval EFI_UNSUPPORTED       one or more of the bits set in
 399                                 Attributes are not supported by this PCI controller or one of
 400                                 its parent bridges when Operation is Set, Enable or Disable.
 401
 402 **/
 403 typedef
 404 EFI_STATUS
 405 (EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES)(
 406   IN EFI_PCI_IO_PROTOCOL                       *This,
 407   IN  EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION  Operation,
 408   IN  UINT64                                   Attributes,
 409   OUT UINT64                                   *Result OPTIONAL
 410   );
 411
 412 /**
 413   Gets the attributes that this PCI controller supports setting on a BAR using
 414   SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
 415
 416   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 417   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 418                                 base address for resource range. The legal range for this field is 0..5.
 419   @param  Supports              A pointer to the mask of attributes that this PCI controller supports
 420                                 setting for this BAR with SetBarAttributes().
 421   @param  Resources             A pointer to the ACPI 2.0 resource descriptors that describe the current
 422                                 configuration of this BAR of the PCI controller.
 423
 424   @retval EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI
 425                                 controller supports are returned in Supports. If Resources
 426                                 is not NULL, then the ACPI 2.0 resource descriptors that the PCI
 427                                 controller is currently using are returned in Resources.
 428   @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
 429   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 430   @retval EFI_OUT_OF_RESOURCES  There are not enough resources available to allocate
 431                                 Resources.
 432
 433 **/
 434 typedef
 435 EFI_STATUS
 436 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES)(
 437   IN EFI_PCI_IO_PROTOCOL             *This,
 438   IN  UINT8                          BarIndex,
 439   OUT UINT64                         *Supports, OPTIONAL
 440   OUT VOID                           **Resources OPTIONAL
 441   );
 442
 443 /**
 444   Sets the attributes for a range of a BAR on a PCI controller.
 445
 446   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 447   @param  Attributes            The mask of attributes to set for the resource range specified by
 448                                 BarIndex, Offset, and Length.
 449   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 450                                 base address for resource range. The legal range for this field is 0..5.
 451   @param  Offset                A pointer to the BAR relative base address of the resource range to be
 452                                 modified by the attributes specified by Attributes.
 453   @param  Length                A pointer to the length of the resource range to be modified by the
 454                                 attributes specified by Attributes.
 455
 456   @retval EFI_SUCCESS           The set of attributes specified by Attributes for the resource
 457                                 range specified by BarIndex, Offset, and Length were
 458                                 set on the PCI controller, and the actual resource range is returned
 459                                 in Offset and Length.
 460   @retval EFI_INVALID_PARAMETER Offset or Length is NULL.
 461   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 462   @retval EFI_OUT_OF_RESOURCES  There are not enough resources to set the attributes on the
 463                                 resource range specified by BarIndex, Offset, and
 464                                 Length.
 465
 466 **/
 467 typedef
 468 EFI_STATUS
 469 (EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES)(
 470   IN EFI_PCI_IO_PROTOCOL              *This,
 471   IN     UINT64                       Attributes,
 472   IN     UINT8                        BarIndex,
 473   IN OUT UINT64                       *Offset,
 474   IN OUT UINT64                       *Length
 475   );
 476
 477 /**
 478   @par Protocol Description:
 479   The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration,
 480   and DMA interfaces that are used to abstract accesses to PCI controllers.
 481   There is one EFI_PCI_IO_PROTOCOL instance for each PCI controller on a PCI bus.
 482   A device driver that wishes to manage a PCI controller in a system will have to
 483   retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller.
 484 **/
 485 struct _EFI_PCI_IO_PROTOCOL {
 486   EFI_PCI_IO_PROTOCOL_POLL_IO_MEM         PollMem;
 487   EFI_PCI_IO_PROTOCOL_POLL_IO_MEM         PollIo;
 488   EFI_PCI_IO_PROTOCOL_ACCESS              Mem;
 489   EFI_PCI_IO_PROTOCOL_ACCESS              Io;
 490   EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS       Pci;
 491   EFI_PCI_IO_PROTOCOL_COPY_MEM            CopyMem;
 492   EFI_PCI_IO_PROTOCOL_MAP                 Map;
 493   EFI_PCI_IO_PROTOCOL_UNMAP               Unmap;
 494   EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER     AllocateBuffer;
 495   EFI_PCI_IO_PROTOCOL_FREE_BUFFER         FreeBuffer;
 496   EFI_PCI_IO_PROTOCOL_FLUSH               Flush;
 497   EFI_PCI_IO_PROTOCOL_GET_LOCATION        GetLocation;
 498   EFI_PCI_IO_PROTOCOL_ATTRIBUTES          Attributes;
 499   EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES  GetBarAttributes;
 500   EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES  SetBarAttributes;
 501
 502   ///
 503   /// The size, in bytes, of the ROM image.
 504   ///
 505   UINT64                                  RomSize;
 506
 507   ///
 508   /// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible
 509   /// for allocating memory for the ROM image, and copying the contents of the ROM to memory.
 510   /// The contents of this buffer are either from the PCI option ROM that can be accessed
 511   /// through the ROM BAR of the PCI controller, or it is from a platform-specific location.
 512   /// The Attributes() function can be used to determine from which of these two sources
 513   /// the RomImage buffer was initialized.
 514   ///
 515   VOID                                    *RomImage;
 516 };
 517
 518 extern EFI_GUID gEfiPciIoProtocolGuid;
 519
 520 #endif