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1 /** @file
2 EFI SMM Control2 Protocol as defined in the PI 1.2 specification.
3
4 This protocol is used initiate synchronous SMI activations. This protocol could be published by a
5 processor driver to abstract the SMI IPI or a driver which abstracts the ASIC that is supporting the
6 APM port. Because of the possibility of performing SMI IPI transactions, the ability to generate this
7 event from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.
8
9 The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an
10 abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when
11 accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of
12 these signals.
13
14 Copyright (c) 2009, Intel Corporation
15 All rights reserved. This program and the accompanying materials
16 are licensed and made available under the terms and conditions of the BSD License
17 which accompanies this distribution. The full text of the license may be found at
18 http://opensource.org/licenses/bsd-license.php
19
20 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
21 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
22
23 **/
24
25 #ifndef _SMM_CONTROL2_H_
26 #define _SMM_CONTROL2_H_
27
28 #include <PiDxe.h>
29
30 ///
31 /// Note:
32 /// To avoid name conflict between PI and Framework SMM spec, the following names defined
33 /// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.
34 ///
35 /// EFI_SMM_ACTIVATE -> EFI_SMM_ACTIVATE2
36 /// EFI_SMM_DEACTIVATE -> EFI_SMM_DEACTIVATE2
37 ///
38
39 #define EFI_SMM_CONTROL2_PROTOCOL_GUID \
40 { \
41 0x843dc720, 0xab1e, 0x42cb, {0x93, 0x57, 0x8a, 0x0, 0x78, 0xf3, 0x56, 0x1b} \
42 }
43
44 typedef struct _EFI_SMM_CONTROL2_PROTOCOL EFI_SMM_CONTROL2_PROTOCOL;
45 typedef UINTN EFI_SMM_PERIOD;
46
47 /**
48 Invokes SMI activation from either the preboot or runtime environment.
49
50 This function generates an SMI.
51
52 @param[in] This The EFI_SMM_CONTROL2_PROTOCOL instance.
53 @param[in,out] CommandPort The value written to the command port.
54 @param[in,out] DataPort The value written to the data port.
55 @param[in] Periodic Optional mechanism to engender a periodic stream.
56 @param[in] ActivationInterval Optional parameter to repeat at this period one
57 time or, if the Periodic Boolean is set, periodically.
58
59 @retval EFI_SUCCESS The SMI/PMI has been engendered.
60 @retval EFI_DEVICE_ERROR The timing is unsupported.
61 @retval EFI_INVALID_PARAMETER The activation period is unsupported.
62 @retval EFI_NOT_STARTED The SMM base service has not been initialized.
63 **/
64 typedef
65 EFI_STATUS
66 (EFIAPI *EFI_SMM_ACTIVATE2)(
67 IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
68 IN OUT UINT8 *CommandPort OPTIONAL,
69 IN OUT UINT8 *DataPort OPTIONAL,
70 IN BOOLEAN Periodic OPTIONAL,
71 IN UINTN ActivationInterval OPTIONAL
72 );
73
74 /**
75 Clears any system state that was created in response to the Trigger() call.
76
77 This function acknowledges and causes the deassertion of the SMI activation source.
78
79 @param[in] This The EFI_SMM_CONTROL2_PROTOCOL instance.
80 @param[in] Periodic Optional parameter to repeat at this period one time
81
82 @retval EFI_SUCCESS The SMI/PMI has been engendered.
83 @retval EFI_DEVICE_ERROR The source could not be cleared.
84 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
85 **/
86 typedef
87 EFI_STATUS
88 (EFIAPI *EFI_SMM_DEACTIVATE2)(
89 IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
90 IN BOOLEAN Periodic OPTIONAL
91 );
92
93 ///
94 /// The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an
95 /// abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when
96 /// accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of
97 /// these signals.
98 ///
99 struct _EFI_SMM_CONTROL2_PROTOCOL {
100 EFI_SMM_ACTIVATE2 Trigger;
101 EFI_SMM_DEACTIVATE2 Clear;
102 ///
103 /// Minimum interval at which the platform can set the period. A maximum is not
104 /// specified in that the SMM infrastructure code can emulate a maximum interval that is
105 /// greater than the hardware capabilities by using software emulation in the SMM
106 /// infrastructure code.
107 ///
108 EFI_SMM_PERIOD MinimumTriggerPeriod;
109 };
110
111 extern EFI_GUID gEfiSmmControl2ProtocolGuid;
112
113 #endif
114