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1 /** @file
2 This header file contains all of the PXE type definitions,
3 structure prototypes, global variables and constants that
4 are needed for porting PXE to EFI.
5
6 Copyright (c) 2006, Intel Corporation
7 All rights reserved. This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 Module name: EfiPxe.h
16
17 @par Revision Reference:
18 32/64-bit PXE specification:
19 alpha-4, 99-Dec-17
20
21 **/
22
23 #ifndef __EFI_PXE_H__
24 #define __EFI_PXE_H__
25
26 #pragma pack(1)
27
28
29
30 #define PXE_BUSTYPE(a, b, c, d) \
31 ( \
32 (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \
33 ((PXE_UINT32) (a) & 0xFF) \
34 )
35
36 //
37 // UNDI ROM ID and devive ID signature
38 //
39 #define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')
40
41 //
42 // BUS ROM ID signatures
43 //
44 #define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')
45 #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
46 #define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R')
47 #define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4')
48
49 #define PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))
50
51 #define PXE_SWAP_UINT32(n) \
52 ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \
53 (((PXE_UINT32)(n) & 0x0000FF00) << 8) | \
54 (((PXE_UINT32)(n) & 0x00FF0000) >> 8) | \
55 (((PXE_UINT32)(n) & 0xFF000000) >> 24))
56
57 #define PXE_SWAP_UINT64(n) \
58 ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \
59 (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \
60 (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \
61 (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8) | \
62 (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8) | \
63 (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \
64 (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \
65 (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))
66
67
68 #define PXE_CPBSIZE_NOT_USED 0 // zero
69 #define PXE_DBSIZE_NOT_USED 0 // zero
70 #define PXE_CPBADDR_NOT_USED (PXE_UINT64) 0 // zero
71 #define PXE_DBADDR_NOT_USED (PXE_UINT64) 0 // zero
72 #define PXE_CONST const
73
74 #define PXE_VOLATILE volatile
75
76 typedef VOID PXE_VOID;
77 typedef UINT8 PXE_UINT8;
78 typedef UINT16 PXE_UINT16;
79 typedef UINT32 PXE_UINT32;
80 typedef UINTN PXE_UINTN;
81
82 //
83 // typedef unsigned long PXE_UINT64;
84 //
85 typedef UINT64 PXE_UINT64;
86
87 typedef PXE_UINT8 PXE_BOOL;
88 #define PXE_FALSE 0 // zero
89 #define PXE_TRUE (!PXE_FALSE)
90
91 typedef PXE_UINT16 PXE_OPCODE;
92
93 //
94 // Return UNDI operational state.
95 //
96 #define PXE_OPCODE_GET_STATE 0x0000
97
98 //
99 // Change UNDI operational state from Stopped to Started.
100 //
101 #define PXE_OPCODE_START 0x0001
102
103 //
104 // Change UNDI operational state from Started to Stopped.
105 //
106 #define PXE_OPCODE_STOP 0x0002
107
108 //
109 // Get UNDI initialization information.
110 //
111 #define PXE_OPCODE_GET_INIT_INFO 0x0003
112
113 //
114 // Get NIC configuration information.
115 //
116 #define PXE_OPCODE_GET_CONFIG_INFO 0x0004
117
118 //
119 // Changed UNDI operational state from Started to Initialized.
120 //
121 #define PXE_OPCODE_INITIALIZE 0x0005
122
123 //
124 // Re-initialize the NIC H/W.
125 //
126 #define PXE_OPCODE_RESET 0x0006
127
128 //
129 // Change the UNDI operational state from Initialized to Started.
130 //
131 #define PXE_OPCODE_SHUTDOWN 0x0007
132
133 //
134 // Read & change state of external interrupt enables.
135 //
136 #define PXE_OPCODE_INTERRUPT_ENABLES 0x0008
137
138 //
139 // Read & change state of packet receive filters.
140 //
141 #define PXE_OPCODE_RECEIVE_FILTERS 0x0009
142
143 //
144 // Read & change station MAC address.
145 //
146 #define PXE_OPCODE_STATION_ADDRESS 0x000A
147
148 //
149 // Read traffic statistics.
150 //
151 #define PXE_OPCODE_STATISTICS 0x000B
152
153 //
154 // Convert multicast IP address to multicast MAC address.
155 //
156 #define PXE_OPCODE_MCAST_IP_TO_MAC 0x000C
157
158 //
159 // Read or change non-volatile storage on the NIC.
160 //
161 #define PXE_OPCODE_NVDATA 0x000D
162
163 //
164 // Get & clear interrupt status.
165 //
166 #define PXE_OPCODE_GET_STATUS 0x000E
167
168 //
169 // Fill media header in packet for transmit.
170 //
171 #define PXE_OPCODE_FILL_HEADER 0x000F
172
173 //
174 // Transmit packet(s).
175 //
176 #define PXE_OPCODE_TRANSMIT 0x0010
177
178 //
179 // Receive packet.
180 //
181 #define PXE_OPCODE_RECEIVE 0x0011
182
183 //
184 // Last valid PXE UNDI OpCode number.
185 //
186 #define PXE_OPCODE_LAST_VALID 0x0011
187
188 typedef PXE_UINT16 PXE_OPFLAGS;
189
190 #define PXE_OPFLAGS_NOT_USED 0x0000
191
192 //
193 // //////////////////////////////////////
194 // UNDI Get State
195 //
196 // No OpFlags
197
198 ////////////////////////////////////////
199 // UNDI Start
200 //
201 // No OpFlags
202
203 ////////////////////////////////////////
204 // UNDI Stop
205 //
206 // No OpFlags
207
208 ////////////////////////////////////////
209 // UNDI Get Init Info
210 //
211 // No Opflags
212
213 ////////////////////////////////////////
214 // UNDI Get Config Info
215 //
216 // No Opflags
217
218 ////////////////////////////////////////
219 // UNDI Initialize
220 //
221 #define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001
222 #define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000
223 #define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001
224
225 //
226 // //////////////////////////////////////
227 // UNDI Reset
228 //
229 #define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001
230 #define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002
231
232 //
233 // //////////////////////////////////////
234 // UNDI Shutdown
235 //
236 // No OpFlags
237
238 ////////////////////////////////////////
239 // UNDI Interrupt Enables
240 //
241 //
242 // Select whether to enable or disable external interrupt signals.
243 // Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
244 //
245 #define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000
246 #define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000
247 #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
248 #define PXE_OPFLAGS_INTERRUPT_READ 0x0000
249
250 //
251 // Enable receive interrupts. An external interrupt will be generated
252 // after a complete non-error packet has been received.
253 //
254 #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
255
256 //
257 // Enable transmit interrupts. An external interrupt will be generated
258 // after a complete non-error packet has been transmitted.
259 //
260 #define PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002
261
262 //
263 // Enable command interrupts. An external interrupt will be generated
264 // when command execution stops.
265 //
266 #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
267
268 //
269 // Generate software interrupt. Setting this bit generates an external
270 // interrupt, if it is supported by the hardware.
271 //
272 #define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008
273
274 //
275 // //////////////////////////////////////
276 // UNDI Receive Filters
277 //
278 //
279 // Select whether to enable or disable receive filters.
280 // Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
281 //
282 #define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000
283 #define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000
284 #define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000
285 #define PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000
286
287 //
288 // To reset the contents of the multicast MAC address filter list,
289 // set this OpFlag:
290 //
291 #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
292
293 //
294 // Enable unicast packet receiving. Packets sent to the current station
295 // MAC address will be received.
296 //
297 #define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001
298
299 //
300 // Enable broadcast packet receiving. Packets sent to the broadcast
301 // MAC address will be received.
302 //
303 #define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
304
305 //
306 // Enable filtered multicast packet receiving. Packets sent to any
307 // of the multicast MAC addresses in the multicast MAC address filter
308 // list will be received. If the filter list is empty, no multicast
309 //
310 #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
311
312 //
313 // Enable promiscuous packet receiving. All packets will be received.
314 //
315 #define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
316
317 //
318 // Enable promiscuous multicast packet receiving. All multicast
319 // packets will be received.
320 //
321 #define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
322
323 //
324 // //////////////////////////////////////
325 // UNDI Station Address
326 //
327 #define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000
328 #define PXE_OPFLAGS_STATION_ADDRESS_WRITE 0x0000
329 #define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001
330
331 //
332 // //////////////////////////////////////
333 // UNDI Statistics
334 //
335 #define PXE_OPFLAGS_STATISTICS_READ 0x0000
336 #define PXE_OPFLAGS_STATISTICS_RESET 0x0001
337
338 //
339 // //////////////////////////////////////
340 // UNDI MCast IP to MAC
341 //
342 //
343 // Identify the type of IP address in the CPB.
344 //
345 #define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003
346 #define PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000
347 #define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001
348
349 //
350 // //////////////////////////////////////
351 // UNDI NvData
352 //
353 //
354 // Select the type of non-volatile data operation.
355 //
356 #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
357 #define PXE_OPFLAGS_NVDATA_READ 0x0000
358 #define PXE_OPFLAGS_NVDATA_WRITE 0x0001
359
360 //
361 // //////////////////////////////////////
362 // UNDI Get Status
363 //
364 //
365 // Return current interrupt status. This will also clear any interrupts
366 // that are currently set. This can be used in a polling routine. The
367 // interrupt flags are still set and cleared even when the interrupts
368 // are disabled.
369 //
370 #define PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001
371
372 //
373 // Return list of transmitted buffers for recycling. Transmit buffers
374 // must not be changed or unallocated until they have recycled. After
375 // issuing a transmit command, wait for a transmit complete interrupt.
376 // When a transmit complete interrupt is received, read the transmitted
377 // buffers. Do not plan on getting one buffer per interrupt. Some
378 // NICs and UNDIs may transmit multiple buffers per interrupt.
379 //
380 #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
381
382 //
383 // //////////////////////////////////////
384 // UNDI Fill Header
385 //
386 #define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001
387 #define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001
388 #define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000
389
390 //
391 // //////////////////////////////////////
392 // UNDI Transmit
393 //
394 //
395 // S/W UNDI only. Return after the packet has been transmitted. A
396 // transmit complete interrupt will still be generated and the transmit
397 // buffer will have to be recycled.
398 //
399 #define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001
400 #define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001
401 #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000
402
403 //
404 //
405 //
406 #define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002
407 #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
408 #define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000
409
410 //
411 // //////////////////////////////////////
412 // UNDI Receive
413 //
414 // No OpFlags
415 //
416 typedef PXE_UINT16 PXE_STATFLAGS;
417
418 #define PXE_STATFLAGS_INITIALIZE 0x0000
419
420 //
421 // //////////////////////////////////////
422 // Common StatFlags that can be returned by all commands.
423 //
424 //
425 // The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
426 // implemented by all UNDIs. COMMAND_QUEUED is only needed by UNDIs
427 // that support command queuing.
428 //
429 #define PXE_STATFLAGS_STATUS_MASK 0xC000
430 #define PXE_STATFLAGS_COMMAND_COMPLETE 0xC000
431 #define PXE_STATFLAGS_COMMAND_FAILED 0x8000
432 #define PXE_STATFLAGS_COMMAND_QUEUED 0x4000
433
434 //
435 // //////////////////////////////////////
436 // UNDI Get State
437 //
438 #define PXE_STATFLAGS_GET_STATE_MASK 0x0003
439 #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
440 #define PXE_STATFLAGS_GET_STATE_STARTED 0x0001
441 #define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000
442
443 //
444 // //////////////////////////////////////
445 // UNDI Start
446 //
447 // No additional StatFlags
448
449 ////////////////////////////////////////
450 // UNDI Get Init Info
451 //
452 #define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001
453 #define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000
454 #define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001
455
456 //
457 // //////////////////////////////////////
458 // UNDI Initialize
459 //
460 #define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001
461
462 //
463 // //////////////////////////////////////
464 // UNDI Reset
465 //
466 #define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001
467
468 //
469 // //////////////////////////////////////
470 // UNDI Shutdown
471 //
472 // No additional StatFlags
473
474 ////////////////////////////////////////
475 // UNDI Interrupt Enables
476 //
477 //
478 // If set, receive interrupts are enabled.
479 //
480 #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
481
482 //
483 // If set, transmit interrupts are enabled.
484 //
485 #define PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002
486
487 //
488 // If set, command interrupts are enabled.
489 //
490 #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
491
492 //
493 // //////////////////////////////////////
494 // UNDI Receive Filters
495 //
496 //
497 // If set, unicast packets will be received.
498 //
499 #define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001
500
501 //
502 // If set, broadcast packets will be received.
503 //
504 #define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
505
506 //
507 // If set, multicast packets that match up with the multicast address
508 // filter list will be received.
509 //
510 #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
511
512 //
513 // If set, all packets will be received.
514 //
515 #define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
516
517 //
518 // If set, all multicast packets will be received.
519 //
520 #define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
521
522 //
523 // //////////////////////////////////////
524 // UNDI Station Address
525 //
526 // No additional StatFlags
527
528 ////////////////////////////////////////
529 // UNDI Statistics
530 //
531 // No additional StatFlags
532
533 ////////////////////////////////////////
534 // UNDI MCast IP to MAC
535 //
536 // No additional StatFlags
537
538 ////////////////////////////////////////
539 // UNDI NvData
540 //
541 // No additional StatFlags
542
543
544 ////////////////////////////////////////
545 // UNDI Get Status
546 //
547 //
548 // Use to determine if an interrupt has occurred.
549 //
550 #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
551 #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000
552
553 //
554 // If set, at least one receive interrupt occurred.
555 //
556 #define PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001
557
558 //
559 // If set, at least one transmit interrupt occurred.
560 //
561 #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
562
563 //
564 // If set, at least one command interrupt occurred.
565 //
566 #define PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004
567
568 //
569 // If set, at least one software interrupt occurred.
570 //
571 #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
572
573 //
574 // This flag is set if the transmitted buffer queue is empty. This flag
575 // will be set if all transmitted buffer addresses get written into the DB.
576 //
577 #define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010
578
579 //
580 // This flag is set if no transmitted buffer addresses were written
581 // into the DB. (This could be because DBsize was too small.)
582 //
583 #define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020
584
585 //
586 // //////////////////////////////////////
587 // UNDI Fill Header
588 //
589 // No additional StatFlags
590
591 ////////////////////////////////////////
592 // UNDI Transmit
593 //
594 // No additional StatFlags.
595
596 ////////////////////////////////////////
597 // UNDI Receive
598 //
599 // No additional StatFlags.
600 //
601 typedef PXE_UINT16 PXE_STATCODE;
602
603 #define PXE_STATCODE_INITIALIZE 0x0000
604
605 //
606 // //////////////////////////////////////
607 // Common StatCodes returned by all UNDI commands, UNDI protocol functions
608 // and BC protocol functions.
609 //
610 #define PXE_STATCODE_SUCCESS 0x0000
611
612 #define PXE_STATCODE_INVALID_CDB 0x0001
613 #define PXE_STATCODE_INVALID_CPB 0x0002
614 #define PXE_STATCODE_BUSY 0x0003
615 #define PXE_STATCODE_QUEUE_FULL 0x0004
616 #define PXE_STATCODE_ALREADY_STARTED 0x0005
617 #define PXE_STATCODE_NOT_STARTED 0x0006
618 #define PXE_STATCODE_NOT_SHUTDOWN 0x0007
619 #define PXE_STATCODE_ALREADY_INITIALIZED 0x0008
620 #define PXE_STATCODE_NOT_INITIALIZED 0x0009
621 #define PXE_STATCODE_DEVICE_FAILURE 0x000A
622 #define PXE_STATCODE_NVDATA_FAILURE 0x000B
623 #define PXE_STATCODE_UNSUPPORTED 0x000C
624 #define PXE_STATCODE_BUFFER_FULL 0x000D
625 #define PXE_STATCODE_INVALID_PARAMETER 0x000E
626 #define PXE_STATCODE_INVALID_UNDI 0x000F
627 #define PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010
628 #define PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011
629 #define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012
630 #define PXE_STATCODE_NO_DATA 0x0013
631
632 typedef PXE_UINT16 PXE_IFNUM;
633
634 //
635 // This interface number must be passed to the S/W UNDI Start command.
636 //
637 #define PXE_IFNUM_START 0x0000
638
639 //
640 // This interface number is returned by the S/W UNDI Get State and
641 // Start commands if information in the CDB, CPB or DB is invalid.
642 //
643 #define PXE_IFNUM_INVALID 0x0000
644
645 typedef PXE_UINT16 PXE_CONTROL;
646
647 //
648 // Setting this flag directs the UNDI to queue this command for later
649 // execution if the UNDI is busy and it supports command queuing.
650 // If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
651 // is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
652 // error is returned.
653 //
654 #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
655
656 //
657 // These two bit values are used to determine if there are more UNDI
658 // CDB structures following this one. If the link bit is set, there
659 // must be a CDB structure following this one. Execution will start
660 // on the next CDB structure as soon as this one completes successfully.
661 // If an error is generated by this command, execution will stop.
662 //
663 #define PXE_CONTROL_LINK 0x0001
664 #define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000
665
666 typedef PXE_UINT8 PXE_FRAME_TYPE;
667
668 #define PXE_FRAME_TYPE_NONE 0x00
669 #define PXE_FRAME_TYPE_UNICAST 0x01
670 #define PXE_FRAME_TYPE_BROADCAST 0x02
671 #define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03
672 #define PXE_FRAME_TYPE_PROMISCUOUS 0x04
673 #define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05
674
675 #define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST
676
677 typedef PXE_UINT32 PXE_IPV4;
678
679 typedef PXE_UINT32 PXE_IPV6[4];
680 #define PXE_MAC_LENGTH 32
681
682 typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH];
683
684 typedef PXE_UINT8 PXE_IFTYPE;
685 typedef UINT16 PXE_MEDIA_PROTOCOL;
686
687 //
688 // This information is from the ARP section of RFC 1700.
689 //
690 // 1 Ethernet (10Mb) [JBP]
691 // 2 Experimental Ethernet (3Mb) [JBP]
692 // 3 Amateur Radio AX.25 [PXK]
693 // 4 Proteon ProNET Token Ring [JBP]
694 // 5 Chaos [GXP]
695 // 6 IEEE 802 Networks [JBP]
696 // 7 ARCNET [JBP]
697 // 8 Hyperchannel [JBP]
698 // 9 Lanstar [TU]
699 // 10 Autonet Short Address [MXB1]
700 // 11 LocalTalk [JKR1]
701 // 12 LocalNet (IBM* PCNet or SYTEK* LocalNET) [JXM]
702 // 13 Ultra link [RXD2]
703 // 14 SMDS [GXC1]
704 // 15 Frame Relay [AGM]
705 // 16 Asynchronous Transmission Mode (ATM) [JXB2]
706 // 17 HDLC [JBP]
707 // 18 Fibre Channel [Yakov Rekhter]
708 // 19 Asynchronous Transmission Mode (ATM) [Mark Laubach]
709 // 20 Serial Line [JBP]
710 // 21 Asynchronous Transmission Mode (ATM) [MXB1]
711 //
712 // * Other names and brands may be claimed as the property of others.
713 //
714 #define PXE_IFTYPE_ETHERNET 0x01
715 #define PXE_IFTYPE_TOKENRING 0x04
716 #define PXE_IFTYPE_FIBRE_CHANNEL 0x12
717
718 typedef struct s_pxe_hw_undi {
719 PXE_UINT32 Signature; // PXE_ROMID_SIGNATURE
720 PXE_UINT8 Len; // sizeof(PXE_HW_UNDI)
721 PXE_UINT8 Fudge; // makes 8-bit cksum equal zero
722 PXE_UINT8 Rev; // PXE_ROMID_REV
723 PXE_UINT8 IFcnt; // physical connector count
724 PXE_UINT8 MajorVer; // PXE_ROMID_MAJORVER
725 PXE_UINT8 MinorVer; // PXE_ROMID_MINORVER
726 PXE_UINT16 reserved; // zero, not used
727 PXE_UINT32 Implementation; // implementation flags
728 // reserved // vendor use
729 // UINT32 Status; // status port
730 // UINT32 Command; // command port
731 // UINT64 CDBaddr; // CDB address port
732 //
733 } PXE_HW_UNDI;
734
735 //
736 // Status port bit definitions
737 //
738 //
739 // UNDI operation state
740 //
741 #define PXE_HWSTAT_STATE_MASK 0xC0000000
742 #define PXE_HWSTAT_BUSY 0xC0000000
743 #define PXE_HWSTAT_INITIALIZED 0x80000000
744 #define PXE_HWSTAT_STARTED 0x40000000
745 #define PXE_HWSTAT_STOPPED 0x00000000
746
747 //
748 // If set, last command failed
749 //
750 #define PXE_HWSTAT_COMMAND_FAILED 0x20000000
751
752 //
753 // If set, identifies enabled receive filters
754 //
755 #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
756 #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800
757 #define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400
758 #define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200
759 #define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100
760
761 //
762 // If set, identifies enabled external interrupts
763 //
764 #define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080
765 #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040
766 #define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020
767 #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
768
769 //
770 // If set, identifies pending interrupts
771 //
772 #define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008
773 #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004
774 #define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002
775 #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
776
777 //
778 // Command port definitions
779 //
780 //
781 // If set, CDB identified in CDBaddr port is given to UNDI.
782 // If not set, other bits in this word will be processed.
783 //
784 #define PXE_HWCMD_ISSUE_COMMAND 0x80000000
785 #define PXE_HWCMD_INTS_AND_FILTS 0x00000000
786
787 //
788 // Use these to enable/disable receive filters.
789 //
790 #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
791 #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800
792 #define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400
793 #define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200
794 #define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100
795
796 //
797 // Use these to enable/disable external interrupts
798 //
799 #define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080
800 #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040
801 #define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020
802 #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
803
804 //
805 // Use these to clear pending external interrupts
806 //
807 #define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008
808 #define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004
809 #define PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002
810 #define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001
811
812 typedef struct s_pxe_sw_undi {
813 PXE_UINT32 Signature; // PXE_ROMID_SIGNATURE
814 PXE_UINT8 Len; // sizeof(PXE_SW_UNDI)
815 PXE_UINT8 Fudge; // makes 8-bit cksum zero
816 PXE_UINT8 Rev; // PXE_ROMID_REV
817 PXE_UINT8 IFcnt; // physical connector count
818 PXE_UINT8 MajorVer; // PXE_ROMID_MAJORVER
819 PXE_UINT8 MinorVer; // PXE_ROMID_MINORVER
820 PXE_UINT16 reserved1; // zero, not used
821 PXE_UINT32 Implementation; // Implementation flags
822 PXE_UINT64 EntryPoint; // API entry point
823 PXE_UINT8 reserved2[3]; // zero, not used
824 PXE_UINT8 BusCnt; // number of bustypes supported
825 PXE_UINT32 BusType[1]; // list of supported bustypes
826 } PXE_SW_UNDI;
827
828 typedef union u_pxe_undi {
829 PXE_HW_UNDI hw;
830 PXE_SW_UNDI sw;
831 } PXE_UNDI;
832
833 //
834 // Signature of !PXE structure
835 //
836 #define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')
837
838 //
839 // !PXE structure format revision
840 //
841 #define PXE_ROMID_REV 0x02
842
843 //
844 // UNDI command interface revision. These are the values that get sent
845 // in option 94 (Client Network Interface Identifier) in the DHCP Discover
846 // and PXE Boot Server Request packets.
847 //
848 #define PXE_ROMID_MAJORVER 0x03
849 #define PXE_ROMID_MINORVER 0x01
850
851 //
852 // Implementation flags
853 //
854 #define PXE_ROMID_IMP_HW_UNDI 0x80000000
855 #define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000
856 #define PXE_ROMID_IMP_64BIT_DEVICE 0x00010000
857 #define PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000
858 #define PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000
859 #define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000
860 #define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000
861 #define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00
862 #define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00
863 #define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800
864 #define PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400
865 #define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000
866 #define PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200
867 #define PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100
868 #define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080
869 #define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040
870 #define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020
871 #define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010
872 #define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008
873 #define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004
874 #define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002
875 #define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001
876
877 typedef struct s_pxe_cdb {
878 PXE_OPCODE OpCode;
879 PXE_OPFLAGS OpFlags;
880 PXE_UINT16 CPBsize;
881 PXE_UINT16 DBsize;
882 PXE_UINT64 CPBaddr;
883 PXE_UINT64 DBaddr;
884 PXE_STATCODE StatCode;
885 PXE_STATFLAGS StatFlags;
886 PXE_UINT16 IFnum;
887 PXE_CONTROL Control;
888 } PXE_CDB;
889
890 typedef union u_pxe_ip_addr {
891 PXE_IPV6 IPv6;
892 PXE_IPV4 IPv4;
893 } PXE_IP_ADDR;
894
895 typedef union pxe_device {
896 //
897 // PCI and PC Card NICs are both identified using bus, device
898 // and function numbers. For PC Card, this may require PC
899 // Card services to be loaded in the BIOS or preboot
900 // environment.
901 //
902 struct {
903 //
904 // See S/W UNDI ROMID structure definition for PCI and
905 // PCC BusType definitions.
906 //
907 PXE_UINT32 BusType;
908
909 //
910 // Bus, device & function numbers that locate this device.
911 //
912 PXE_UINT16 Bus;
913 PXE_UINT8 Device;
914 PXE_UINT8 Function;
915 }
916 PCI, PCC;
917
918 //
919 // %%TBD - More information is needed about enumerating
920 // USB and 1394 devices.
921 //
922 struct {
923 PXE_UINT32 BusType;
924 PXE_UINT32 tdb;
925 }
926 USB, _1394;
927 } PXE_DEVICE;
928
929 //
930 // cpb and db definitions
931 //
932 #define MAX_PCI_CONFIG_LEN 64 // # of dwords
933 #define MAX_EEPROM_LEN 128 // #of dwords
934 #define MAX_XMIT_BUFFERS 32 // recycling Q length for xmit_done
935 #define MAX_MCAST_ADDRESS_CNT 8
936
937 typedef struct s_pxe_cpb_start_30 {
938 //
939 // PXE_VOID Delay(UINTN microseconds);
940 //
941 // UNDI will never request a delay smaller than 10 microseconds
942 // and will always request delays in increments of 10 microseconds.
943 // The Delay() CallBack routine must delay between n and n + 10
944 // microseconds before returning control to the UNDI.
945 //
946 // This field cannot be set to zero.
947 //
948 UINT64 Delay;
949
950 //
951 // PXE_VOID Block(UINT32 enable);
952 //
953 // UNDI may need to block multi-threaded/multi-processor access to
954 // critical code sections when programming or accessing the network
955 // device. To this end, a blocking service is needed by the UNDI.
956 // When UNDI needs a block, it will call Block() passing a non-zero
957 // value. When UNDI no longer needs a block, it will call Block()
958 // with a zero value. When called, if the Block() is already enabled,
959 // do not return control to the UNDI until the previous Block() is
960 // disabled.
961 //
962 // This field cannot be set to zero.
963 //
964 UINT64 Block;
965
966 //
967 // PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);
968 //
969 // UNDI will pass the virtual address of a buffer and the virtual
970 // address of a 64-bit physical buffer. Convert the virtual address
971 // to a physical address and write the result to the physical address
972 // buffer. If virtual and physical addresses are the same, just
973 // copy the virtual address to the physical address buffer.
974 //
975 // This field can be set to zero if virtual and physical addresses
976 // are equal.
977 //
978 UINT64 Virt2Phys;
979 //
980 // PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,
981 // UINT64 buf_addr);
982 //
983 // UNDI will read or write the device io space using this call back
984 // function. It passes the number of bytes as the len parameter and it
985 // will be either 1,2,4 or 8.
986 //
987 // This field can not be set to zero.
988 //
989 UINT64 Mem_IO;
990 } PXE_CPB_START_30;
991
992 typedef struct s_pxe_cpb_start_31 {
993 //
994 // PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);
995 //
996 // UNDI will never request a delay smaller than 10 microseconds
997 // and will always request delays in increments of 10 microseconds.
998 // The Delay() CallBack routine must delay between n and n + 10
999 // microseconds before returning control to the UNDI.
1000 //
1001 // This field cannot be set to zero.
1002 //
1003 UINT64 Delay;
1004
1005 //
1006 // PXE_VOID Block(UINT64 unq_id, UINT32 enable);
1007 //
1008 // UNDI may need to block multi-threaded/multi-processor access to
1009 // critical code sections when programming or accessing the network
1010 // device. To this end, a blocking service is needed by the UNDI.
1011 // When UNDI needs a block, it will call Block() passing a non-zero
1012 // value. When UNDI no longer needs a block, it will call Block()
1013 // with a zero value. When called, if the Block() is already enabled,
1014 // do not return control to the UNDI until the previous Block() is
1015 // disabled.
1016 //
1017 // This field cannot be set to zero.
1018 //
1019 UINT64 Block;
1020
1021 //
1022 // PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);
1023 //
1024 // UNDI will pass the virtual address of a buffer and the virtual
1025 // address of a 64-bit physical buffer. Convert the virtual address
1026 // to a physical address and write the result to the physical address
1027 // buffer. If virtual and physical addresses are the same, just
1028 // copy the virtual address to the physical address buffer.
1029 //
1030 // This field can be set to zero if virtual and physical addresses
1031 // are equal.
1032 //
1033 UINT64 Virt2Phys;
1034 //
1035 // PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,
1036 // UINT64 buf_addr);
1037 //
1038 // UNDI will read or write the device io space using this call back
1039 // function. It passes the number of bytes as the len parameter and it
1040 // will be either 1,2,4 or 8.
1041 //
1042 // This field can not be set to zero.
1043 //
1044 UINT64 Mem_IO;
1045 //
1046 // PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
1047 // UINT32 Direction, UINT64 mapped_addr);
1048 //
1049 // UNDI will pass the virtual address of a buffer, direction of the data
1050 // flow from/to the mapped buffer (the constants are defined below)
1051 // and a place holder (pointer) for the mapped address.
1052 // This call will Map the given address to a physical DMA address and write
1053 // the result to the mapped_addr pointer. If there is no need to
1054 // map the given address to a lower address (i.e. the given address is
1055 // associated with a physical address that is already compatible to be
1056 // used with the DMA, it converts the given virtual address to it's
1057 // physical address and write that in the mapped address pointer.
1058 //
1059 // This field can be set to zero if there is no mapping service available
1060 //
1061 UINT64 Map_Mem;
1062
1063 //
1064 // PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
1065 // UINT32 Direction, UINT64 mapped_addr);
1066 //
1067 // UNDI will pass the virtual and mapped addresses of a buffer
1068 // This call will un map the given address
1069 //
1070 // This field can be set to zero if there is no unmapping service available
1071 //
1072 UINT64 UnMap_Mem;
1073
1074 //
1075 // PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,
1076 // UINT32 size, UINT32 Direction, UINT64 mapped_addr);
1077 //
1078 // UNDI will pass the virtual and mapped addresses of a buffer
1079 // This call will synchronize the contents of both the virtual and mapped
1080 // buffers for the given Direction.
1081 //
1082 // This field can be set to zero if there is no service available
1083 //
1084 UINT64 Sync_Mem;
1085
1086 //
1087 // protocol driver can provide anything for this Unique_ID, UNDI remembers
1088 // that as just a 64bit value assocaited to the interface specified by
1089 // the ifnum and gives it back as a parameter to all the call-back routines
1090 // when calling for that interface!
1091 //
1092 UINT64 Unique_ID;
1093 //
1094 } PXE_CPB_START_31;
1095
1096 #define TO_AND_FROM_DEVICE 0
1097 #define FROM_DEVICE 1
1098 #define TO_DEVICE 2
1099
1100 #define PXE_DELAY_MILLISECOND 1000
1101 #define PXE_DELAY_SECOND 1000000
1102 #define PXE_IO_READ 0
1103 #define PXE_IO_WRITE 1
1104 #define PXE_MEM_READ 2
1105 #define PXE_MEM_WRITE 4
1106
1107 typedef struct s_pxe_db_get_init_info {
1108 //
1109 // Minimum length of locked memory buffer that must be given to
1110 // the Initialize command. Giving UNDI more memory will generally
1111 // give better performance.
1112 //
1113 // If MemoryRequired is zero, the UNDI does not need and will not
1114 // use system memory to receive and transmit packets.
1115 //
1116 PXE_UINT32 MemoryRequired;
1117
1118 //
1119 // Maximum frame data length for Tx/Rx excluding the media header.
1120 //
1121 PXE_UINT32 FrameDataLen;
1122
1123 //
1124 // Supported link speeds are in units of mega bits. Common ethernet
1125 // values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero
1126 // filled.
1127 //
1128 PXE_UINT32 LinkSpeeds[4];
1129
1130 //
1131 // Number of non-volatile storage items.
1132 //
1133 PXE_UINT32 NvCount;
1134
1135 //
1136 // Width of non-volatile storage item in bytes. 0, 1, 2 or 4
1137 //
1138 PXE_UINT16 NvWidth;
1139
1140 //
1141 // Media header length. This is the typical media header length for
1142 // this UNDI. This information is needed when allocating receive
1143 // and transmit buffers.
1144 //
1145 PXE_UINT16 MediaHeaderLen;
1146
1147 //
1148 // Number of bytes in the NIC hardware (MAC) address.
1149 //
1150 PXE_UINT16 HWaddrLen;
1151
1152 //
1153 // Maximum number of multicast MAC addresses in the multicast
1154 // MAC address filter list.
1155 //
1156 PXE_UINT16 MCastFilterCnt;
1157
1158 //
1159 // Default number and size of transmit and receive buffers that will
1160 // be allocated by the UNDI. If MemoryRequired is non-zero, this
1161 // allocation will come out of the memory buffer given to the Initialize
1162 // command. If MemoryRequired is zero, this allocation will come out of
1163 // memory on the NIC.
1164 //
1165 PXE_UINT16 TxBufCnt;
1166 PXE_UINT16 TxBufSize;
1167 PXE_UINT16 RxBufCnt;
1168 PXE_UINT16 RxBufSize;
1169
1170 //
1171 // Hardware interface types defined in the Assigned Numbers RFC
1172 // and used in DHCP and ARP packets.
1173 // See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
1174 //
1175 PXE_UINT8 IFtype;
1176
1177 //
1178 // Supported duplex. See PXE_DUPLEX_xxxxx #defines below.
1179 //
1180 PXE_UINT8 SupportedDuplexModes;
1181
1182 //
1183 // Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below.
1184 //
1185 PXE_UINT8 SupportedLoopBackModes;
1186 } PXE_DB_GET_INIT_INFO;
1187
1188 #define PXE_MAX_TXRX_UNIT_ETHER 1500
1189
1190 #define PXE_HWADDR_LEN_ETHER 0x0006
1191 #define PXE_MAC_HEADER_LEN_ETHER 0x000E
1192
1193 #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1
1194 #define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2
1195
1196 #define PXE_LOOPBACK_INTERNAL_SUPPORTED 1
1197 #define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2
1198
1199 typedef struct s_pxe_pci_config_info {
1200 //
1201 // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
1202 // For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
1203 //
1204 UINT32 BusType;
1205
1206 //
1207 // This identifies the PCI network device that this UNDI interface
1208 // is bound to.
1209 //
1210 UINT16 Bus;
1211 UINT8 Device;
1212 UINT8 Function;
1213
1214 //
1215 // This is a copy of the PCI configuration space for this
1216 // network device.
1217 //
1218 union {
1219 UINT8 Byte[256];
1220 UINT16 Word[128];
1221 UINT32 Dword[64];
1222 } Config;
1223 } PXE_PCI_CONFIG_INFO;
1224
1225 typedef struct s_pxe_pcc_config_info {
1226 //
1227 // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
1228 // For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
1229 //
1230 PXE_UINT32 BusType;
1231
1232 //
1233 // This identifies the PCC network device that this UNDI interface
1234 // is bound to.
1235 //
1236 PXE_UINT16 Bus;
1237 PXE_UINT8 Device;
1238 PXE_UINT8 Function;
1239
1240 //
1241 // This is a copy of the PCC configuration space for this
1242 // network device.
1243 //
1244 union {
1245 PXE_UINT8 Byte[256];
1246 PXE_UINT16 Word[128];
1247 PXE_UINT32 Dword[64];
1248 } Config;
1249 } PXE_PCC_CONFIG_INFO;
1250
1251 typedef union u_pxe_db_get_config_info {
1252 PXE_PCI_CONFIG_INFO pci;
1253 PXE_PCC_CONFIG_INFO pcc;
1254 } PXE_DB_GET_CONFIG_INFO;
1255
1256 typedef struct s_pxe_cpb_initialize {
1257 //
1258 // Address of first (lowest) byte of the memory buffer. This buffer must
1259 // be in contiguous physical memory and cannot be swapped out. The UNDI
1260 // will be using this for transmit and receive buffering.
1261 //
1262 PXE_UINT64 MemoryAddr;
1263
1264 //
1265 // MemoryLength must be greater than or equal to MemoryRequired
1266 // returned by the Get Init Info command.
1267 //
1268 PXE_UINT32 MemoryLength;
1269
1270 //
1271 // Desired link speed in Mbit/sec. Common ethernet values are 10, 100
1272 // and 1000. Setting a value of zero will auto-detect and/or use the
1273 // default link speed (operation depends on UNDI/NIC functionality).
1274 //
1275 PXE_UINT32 LinkSpeed;
1276
1277 //
1278 // Suggested number and size of receive and transmit buffers to
1279 // allocate. If MemoryAddr and MemoryLength are non-zero, this
1280 // allocation comes out of the supplied memory buffer. If MemoryAddr
1281 // and MemoryLength are zero, this allocation comes out of memory
1282 // on the NIC.
1283 //
1284 // If these fields are set to zero, the UNDI will allocate buffer
1285 // counts and sizes as it sees fit.
1286 //
1287 PXE_UINT16 TxBufCnt;
1288 PXE_UINT16 TxBufSize;
1289 PXE_UINT16 RxBufCnt;
1290 PXE_UINT16 RxBufSize;
1291
1292 //
1293 // The following configuration parameters are optional and must be zero
1294 // to use the default values.
1295 //
1296 PXE_UINT8 DuplexMode;
1297
1298 PXE_UINT8 LoopBackMode;
1299 } PXE_CPB_INITIALIZE;
1300
1301 #define PXE_DUPLEX_DEFAULT 0x00
1302 #define PXE_FORCE_FULL_DUPLEX 0x01
1303 #define PXE_ENABLE_FULL_DUPLEX 0x02
1304 #define PXE_FORCE_HALF_DUPLEX 0x04
1305 #define PXE_DISABLE_FULL_DUPLEX 0x08
1306
1307 #define LOOPBACK_NORMAL 0
1308 #define LOOPBACK_INTERNAL 1
1309 #define LOOPBACK_EXTERNAL 2
1310
1311 typedef struct s_pxe_db_initialize {
1312 //
1313 // Actual amount of memory used from the supplied memory buffer. This
1314 // may be less that the amount of memory suppllied and may be zero if
1315 // the UNDI and network device do not use external memory buffers.
1316 //
1317 // Memory used by the UNDI and network device is allocated from the
1318 // lowest memory buffer address.
1319 //
1320 PXE_UINT32 MemoryUsed;
1321
1322 //
1323 // Actual number and size of receive and transmit buffers that were
1324 // allocated.
1325 //
1326 PXE_UINT16 TxBufCnt;
1327 PXE_UINT16 TxBufSize;
1328 PXE_UINT16 RxBufCnt;
1329 PXE_UINT16 RxBufSize;
1330 } PXE_DB_INITIALIZE;
1331
1332 typedef struct s_pxe_cpb_receive_filters {
1333 //
1334 // List of multicast MAC addresses. This list, if present, will
1335 // replace the existing multicast MAC address filter list.
1336 //
1337 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
1338 } PXE_CPB_RECEIVE_FILTERS;
1339
1340 typedef struct s_pxe_db_receive_filters {
1341 //
1342 // Filtered multicast MAC address list.
1343 //
1344 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
1345 } PXE_DB_RECEIVE_FILTERS;
1346
1347 typedef struct s_pxe_cpb_station_address {
1348 //
1349 // If supplied and supported, the current station MAC address
1350 // will be changed.
1351 //
1352 PXE_MAC_ADDR StationAddr;
1353 } PXE_CPB_STATION_ADDRESS;
1354
1355 typedef struct s_pxe_dpb_station_address {
1356 //
1357 // Current station MAC address.
1358 //
1359 PXE_MAC_ADDR StationAddr;
1360
1361 //
1362 // Station broadcast MAC address.
1363 //
1364 PXE_MAC_ADDR BroadcastAddr;
1365
1366 //
1367 // Permanent station MAC address.
1368 //
1369 PXE_MAC_ADDR PermanentAddr;
1370 } PXE_DB_STATION_ADDRESS;
1371
1372 typedef struct s_pxe_db_statistics {
1373 //
1374 // Bit field identifying what statistic data is collected by the
1375 // UNDI/NIC.
1376 // If bit 0x00 is set, Data[0x00] is collected.
1377 // If bit 0x01 is set, Data[0x01] is collected.
1378 // If bit 0x20 is set, Data[0x20] is collected.
1379 // If bit 0x21 is set, Data[0x21] is collected.
1380 // Etc.
1381 //
1382 PXE_UINT64 Supported;
1383
1384 //
1385 // Statistic data.
1386 //
1387 PXE_UINT64 Data[64];
1388 } PXE_DB_STATISTICS;
1389
1390 //
1391 // Total number of frames received. Includes frames with errors and
1392 // dropped frames.
1393 //
1394 #define PXE_STATISTICS_RX_TOTAL_FRAMES 0x00
1395
1396 //
1397 // Number of valid frames received and copied into receive buffers.
1398 //
1399 #define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
1400
1401 //
1402 // Number of frames below the minimum length for the media.
1403 // This would be <64 for ethernet.
1404 //
1405 #define PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x02
1406
1407 //
1408 // Number of frames longer than the maxminum length for the
1409 // media. This would be >1500 for ethernet.
1410 //
1411 #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
1412
1413 //
1414 // Valid frames that were dropped because receive buffers were full.
1415 //
1416 #define PXE_STATISTICS_RX_DROPPED_FRAMES 0x04
1417
1418 //
1419 // Number of valid unicast frames received and not dropped.
1420 //
1421 #define PXE_STATISTICS_RX_UNICAST_FRAMES 0x05
1422
1423 //
1424 // Number of valid broadcast frames received and not dropped.
1425 //
1426 #define PXE_STATISTICS_RX_BROADCAST_FRAMES 0x06
1427
1428 //
1429 // Number of valid mutlicast frames received and not dropped.
1430 //
1431 #define PXE_STATISTICS_RX_MULTICAST_FRAMES 0x07
1432
1433 //
1434 // Number of frames w/ CRC or alignment errors.
1435 //
1436 #define PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x08
1437
1438 //
1439 // Total number of bytes received. Includes frames with errors
1440 // and dropped frames.
1441 //
1442 #define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
1443
1444 //
1445 // Transmit statistics.
1446 //
1447 #define PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A
1448 #define PXE_STATISTICS_TX_GOOD_FRAMES 0x0B
1449 #define PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C
1450 #define PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D
1451 #define PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E
1452 #define PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F
1453 #define PXE_STATISTICS_TX_BROADCAST_FRAMES 0x10
1454 #define PXE_STATISTICS_TX_MULTICAST_FRAMES 0x11
1455 #define PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x12
1456 #define PXE_STATISTICS_TX_TOTAL_BYTES 0x13
1457
1458 //
1459 // Number of collisions detection on this subnet.
1460 //
1461 #define PXE_STATISTICS_COLLISIONS 0x14
1462
1463 //
1464 // Number of frames destined for unsupported protocol.
1465 //
1466 #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
1467
1468 typedef struct s_pxe_cpb_mcast_ip_to_mac {
1469 //
1470 // Multicast IP address to be converted to multicast MAC address.
1471 //
1472 PXE_IP_ADDR IP;
1473 } PXE_CPB_MCAST_IP_TO_MAC;
1474
1475 typedef struct s_pxe_db_mcast_ip_to_mac {
1476 //
1477 // Multicast MAC address.
1478 //
1479 PXE_MAC_ADDR MAC;
1480 } PXE_DB_MCAST_IP_TO_MAC;
1481
1482 typedef struct s_pxe_cpb_nvdata_sparse {
1483 //
1484 // NvData item list. Only items in this list will be updated.
1485 //
1486 struct {
1487 //
1488 // Non-volatile storage address to be changed.
1489 //
1490 PXE_UINT32 Addr;
1491
1492 //
1493 // Data item to write into above storage address.
1494 //
1495 union {
1496 PXE_UINT8 Byte;
1497 PXE_UINT16 Word;
1498 PXE_UINT32 Dword;
1499 } Data;
1500 } Item[MAX_EEPROM_LEN];
1501 }
1502 PXE_CPB_NVDATA_SPARSE;
1503
1504 //
1505 // When using bulk update, the size of the CPB structure must be
1506 // the same size as the non-volatile NIC storage.
1507 //
1508 typedef union u_pxe_cpb_nvdata_bulk {
1509 //
1510 // Array of byte-wide data items.
1511 //
1512 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
1513
1514 //
1515 // Array of word-wide data items.
1516 //
1517 PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
1518
1519 //
1520 // Array of dword-wide data items.
1521 //
1522 PXE_UINT32 Dword[MAX_EEPROM_LEN];
1523 } PXE_CPB_NVDATA_BULK;
1524
1525 typedef struct s_pxe_db_nvdata {
1526 //
1527 // Arrays of data items from non-volatile storage.
1528 //
1529 union {
1530 //
1531 // Array of byte-wide data items.
1532 //
1533 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
1534
1535 //
1536 // Array of word-wide data items.
1537 //
1538 PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
1539
1540 //
1541 // Array of dword-wide data items.
1542 //
1543 PXE_UINT32 Dword[MAX_EEPROM_LEN];
1544 } Data;
1545 } PXE_DB_NVDATA;
1546
1547 typedef struct s_pxe_db_get_status {
1548 //
1549 // Length of next receive frame (header + data). If this is zero,
1550 // there is no next receive frame available.
1551 //
1552 PXE_UINT32 RxFrameLen;
1553
1554 //
1555 // Reserved, set to zero.
1556 //
1557 PXE_UINT32 reserved;
1558
1559 //
1560 // Addresses of transmitted buffers that need to be recycled.
1561 //
1562 PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];
1563 } PXE_DB_GET_STATUS;
1564
1565 typedef struct s_pxe_cpb_fill_header {
1566 //
1567 // Source and destination MAC addresses. These will be copied into
1568 // the media header without doing byte swapping.
1569 //
1570 PXE_MAC_ADDR SrcAddr;
1571 PXE_MAC_ADDR DestAddr;
1572
1573 //
1574 // Address of first byte of media header. The first byte of packet data
1575 // follows the last byte of the media header.
1576 //
1577 PXE_UINT64 MediaHeader;
1578
1579 //
1580 // Length of packet data in bytes (not including the media header).
1581 //
1582 PXE_UINT32 PacketLen;
1583
1584 //
1585 // Protocol type. This will be copied into the media header without
1586 // doing byte swapping. Protocol type numbers can be obtained from
1587 // the Assigned Numbers RFC 1700.
1588 //
1589 PXE_UINT16 Protocol;
1590
1591 //
1592 // Length of the media header in bytes.
1593 //
1594 PXE_UINT16 MediaHeaderLen;
1595 } PXE_CPB_FILL_HEADER;
1596
1597 #define PXE_PROTOCOL_ETHERNET_IP 0x0800
1598 #define PXE_PROTOCOL_ETHERNET_ARP 0x0806
1599 #define MAX_XMIT_FRAGMENTS 16
1600
1601 typedef struct s_pxe_cpb_fill_header_fragmented {
1602 //
1603 // Source and destination MAC addresses. These will be copied into
1604 // the media header without doing byte swapping.
1605 //
1606 PXE_MAC_ADDR SrcAddr;
1607 PXE_MAC_ADDR DestAddr;
1608
1609 //
1610 // Length of packet data in bytes (not including the media header).
1611 //
1612 PXE_UINT32 PacketLen;
1613
1614 //
1615 // Protocol type. This will be copied into the media header without
1616 // doing byte swapping. Protocol type numbers can be obtained from
1617 // the Assigned Numbers RFC 1700.
1618 //
1619 PXE_MEDIA_PROTOCOL Protocol;
1620
1621 //
1622 // Length of the media header in bytes.
1623 //
1624 PXE_UINT16 MediaHeaderLen;
1625
1626 //
1627 // Number of packet fragment descriptors.
1628 //
1629 PXE_UINT16 FragCnt;
1630
1631 //
1632 // Reserved, must be set to zero.
1633 //
1634 PXE_UINT16 reserved;
1635
1636 //
1637 // Array of packet fragment descriptors. The first byte of the media
1638 // header is the first byte of the first fragment.
1639 //
1640 struct {
1641 //
1642 // Address of this packet fragment.
1643 //
1644 PXE_UINT64 FragAddr;
1645
1646 //
1647 // Length of this packet fragment.
1648 //
1649 PXE_UINT32 FragLen;
1650
1651 //
1652 // Reserved, must be set to zero.
1653 //
1654 PXE_UINT32 reserved;
1655 } FragDesc[MAX_XMIT_FRAGMENTS];
1656 }
1657 PXE_CPB_FILL_HEADER_FRAGMENTED;
1658
1659 typedef struct s_pxe_cpb_transmit {
1660 //
1661 // Address of first byte of frame buffer. This is also the first byte
1662 // of the media header.
1663 //
1664 PXE_UINT64 FrameAddr;
1665
1666 //
1667 // Length of the data portion of the frame buffer in bytes. Do not
1668 // include the length of the media header.
1669 //
1670 PXE_UINT32 DataLen;
1671
1672 //
1673 // Length of the media header in bytes.
1674 //
1675 PXE_UINT16 MediaheaderLen;
1676
1677 //
1678 // Reserved, must be zero.
1679 //
1680 PXE_UINT16 reserved;
1681 } PXE_CPB_TRANSMIT;
1682
1683 typedef struct s_pxe_cpb_transmit_fragments {
1684 //
1685 // Length of packet data in bytes (not including the media header).
1686 //
1687 PXE_UINT32 FrameLen;
1688
1689 //
1690 // Length of the media header in bytes.
1691 //
1692 PXE_UINT16 MediaheaderLen;
1693
1694 //
1695 // Number of packet fragment descriptors.
1696 //
1697 PXE_UINT16 FragCnt;
1698
1699 //
1700 // Array of frame fragment descriptors. The first byte of the first
1701 // fragment is also the first byte of the media header.
1702 //
1703 struct {
1704 //
1705 // Address of this frame fragment.
1706 //
1707 PXE_UINT64 FragAddr;
1708
1709 //
1710 // Length of this frame fragment.
1711 //
1712 PXE_UINT32 FragLen;
1713
1714 //
1715 // Reserved, must be set to zero.
1716 //
1717 PXE_UINT32 reserved;
1718 } FragDesc[MAX_XMIT_FRAGMENTS];
1719 }
1720 PXE_CPB_TRANSMIT_FRAGMENTS;
1721
1722 typedef struct s_pxe_cpb_receive {
1723 //
1724 // Address of first byte of receive buffer. This is also the first byte
1725 // of the frame header.
1726 //
1727 PXE_UINT64 BufferAddr;
1728
1729 //
1730 // Length of receive buffer. This must be large enough to hold the
1731 // received frame (media header + data). If the length of smaller than
1732 // the received frame, data will be lost.
1733 //
1734 PXE_UINT32 BufferLen;
1735
1736 //
1737 // Reserved, must be set to zero.
1738 //
1739 PXE_UINT32 reserved;
1740 } PXE_CPB_RECEIVE;
1741
1742 typedef struct s_pxe_db_receive {
1743 //
1744 // Source and destination MAC addresses from media header.
1745 //
1746 PXE_MAC_ADDR SrcAddr;
1747 PXE_MAC_ADDR DestAddr;
1748
1749 //
1750 // Length of received frame. May be larger than receive buffer size.
1751 // The receive buffer will not be overwritten. This is how to tell
1752 // if data was lost because the receive buffer was too small.
1753 //
1754 PXE_UINT32 FrameLen;
1755
1756 //
1757 // Protocol type from media header.
1758 //
1759 PXE_MEDIA_PROTOCOL Protocol;
1760
1761 //
1762 // Length of media header in received frame.
1763 //
1764 PXE_UINT16 MediaHeaderLen;
1765
1766 //
1767 // Type of receive frame.
1768 //
1769 PXE_FRAME_TYPE Type;
1770
1771 //
1772 // Reserved, must be zero.
1773 //
1774 PXE_UINT8 reserved[7];
1775
1776 } PXE_DB_RECEIVE;
1777
1778 //
1779 // Packet definitions
1780 //
1781 typedef struct {
1782 UINT8 BootpOpcode;
1783 UINT8 BootpHwType;
1784 UINT8 BootpHwAddrLen;
1785 UINT8 BootpGateHops;
1786 UINT32 BootpIdent;
1787 UINT16 BootpSeconds;
1788 UINT16 BootpFlags;
1789 UINT8 BootpCiAddr[4];
1790 UINT8 BootpYiAddr[4];
1791 UINT8 BootpSiAddr[4];
1792 UINT8 BootpGiAddr[4];
1793 UINT8 BootpHwAddr[16];
1794 UINT8 BootpSrvName[64];
1795 UINT8 BootpBootFile[128];
1796 UINT32 DhcpMagik;
1797 UINT8 DhcpOptions[56];
1798 } EFI_PXE_BASE_CODE_DHCPV4_PACKET;
1799
1800 typedef union {
1801 UINT8 Raw[1472];
1802 EFI_PXE_BASE_CODE_DHCPV4_PACKET Dhcpv4;
1803
1804 //
1805 // EFI_PXE_BASE_CODE_DHCPV6_PACKET Dhcpv6;
1806 //
1807 } EFI_PXE_BASE_CODE_PACKET;
1808
1809
1810
1811 #pragma pack()
1812
1813 #endif