1 ;------------------------------------------------------------------------------
7 ; MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction
9 ; But this is a no-op on ARMv7
11 ; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
12 ; Portions copyright (c) 2008 - 2011, Apple Inc. All rights reserved.<BR>
13 ; This program and the accompanying materials
14 ; are licensed and made available under the terms and conditions of the BSD License
15 ; which accompanies this distribution. The full text of the license may be found at
16 ; http://opensource.org/licenses/bsd-license.php.
18 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
19 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
21 ;------------------------------------------------------------------------------
24 AREA cpu_sleep, CODE, READONLY
27 ; Places the CPU in a sleep state until an interrupt is received.
29 ; Places the CPU in a sleep state until an interrupt is received. If interrupts
30 ; are disabled prior to calling this function, then the CPU will be placed in a
31 ; sleep state indefinitely.