MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c

   1 /** @file
   2   Base Library CPU functions for Itanium
   3
   4   Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include <Library/PalLib.h>
  16 #include <Library/BaseLib.h>
  17
  18 /**
  19   Places the CPU in a sleep state until an interrupt is received.
  20
  21   Places the CPU in a sleep state until an interrupt is received. If interrupts
  22   are disabled prior to calling this function, then the CPU will be placed in a
  23   sleep state indefinitely.
  24
  25 **/
  26 VOID
  27 EFIAPI
  28 CpuSleep (
  29   VOID
  30   )
  31 {
  32   UINT64  Tpr;
  33
  34   //
  35   // It is the TPR register that controls if external interrupt would bring processor in LIGHT HALT low-power state
  36   // back to normal state. PAL_HALT_LIGHT does not depend on PSR setting.
  37   // So here if interrupts are disabled (via PSR.i), TRP.mmi needs to be set to prevent processor being interrupted by external interrupts.
  38   // If interrupts are enabled, then just use current TRP setting.
  39   //
  40   if (GetInterruptState ()) {
  41     //
  42     // If interrupts are enabled, then call PAL_HALT_LIGHT with the current TPR setting.
  43     //
  44     PalCall (PAL_HALT_LIGHT, 0, 0, 0);
  45   } else {
  46     //
  47     // If interrupts are disabled on entry, then mask all interrupts in TPR before calling PAL_HALT_LIGHT.
  48     //
  49
  50     //
  51     // Save TPR
  52     //
  53     Tpr = AsmReadTpr();
  54     //
  55     // Set TPR.mmi to mask all external interrupts
  56     //
  57     AsmWriteTpr (BIT16 | Tpr);
  58
  59     PalCall (PAL_HALT_LIGHT, 0, 0, 0);
  60
  61     //
  62     // Restore TPR
  63     //
  64     AsmWriteTpr (Tpr);
  65   }
  66 }