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1 ;------------------------------------------------------------------------------
2 ;
3 ; CpuBreakpoint() for AArch64
4 ;
5 ; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
6 ; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
7 ; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
8 ; SPDX-License-Identifier: BSD-2-Clause-Patent
9 ;
10 ;------------------------------------------------------------------------------
11
12
13 EXPORT CpuBreakpoint
14 AREA BaseLib_LowLevel, CODE, READONLY
15
16 ;/**
17 ; Generates a breakpoint on the CPU.
18 ;
19 ; Generates a breakpoint on the CPU. The breakpoint must be implemented such
20 ; that code can resume normal execution after the breakpoint.
21 ;
22 ;**/
23 ;VOID
24 ;EFIAPI
25 ;CpuBreakpoint (
26 ; VOID
27 ; );
28 ;
29 CpuBreakpoint
30 svc 0xdbdb // Superviser exception. Takes 16bit arg -> Armv7 had 'swi' here.
31 ret
32
33 END