MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
   4 # This program and the accompanying materials
   5 # are licensed and made available under the terms and conditions of the BSD License
   6 # which accompanies this distribution.  The full text of the license may be found at
   7 # http://opensource.org/licenses/bsd-license.php.
   8 #
   9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 # Module Name:
  13 #
  14 #   DivError.S
  15 #
  16 # Abstract:
  17 #
  18 #   Set error flag for all division functions
  19 #
  20 #------------------------------------------------------------------------------
  21
  22 ASM_GLOBAL ASM_PFX(InternalMathDivRemU64x32)
  23
  24 #------------------------------------------------------------------------------
  25 # UINT64
  26 # EFIAPI
  27 # InternalMathDivRemU64x32 (
  28 #   IN      UINT64                    Dividend,
  29 #   IN      UINT32                    Divisor,
  30 #   OUT     UINT32                    *Remainder
  31 #   );
  32 #------------------------------------------------------------------------------
  33 ASM_PFX(InternalMathDivRemU64x32):
  34     movl    12(%esp), %ecx          # ecx <- divisor
  35     movl    8(%esp), %eax           # eax <- dividend[32..63]
  36     xorl    %edx, %edx
  37     divl    %ecx                    # eax <- quotient[32..63], edx <- remainder
  38     push    %eax
  39     movl    8(%esp), %eax           # eax <- dividend[0..31]
  40     divl    %ecx                    # eax <- quotient[0..31]
  41     movl    20(%esp), %ecx          # ecx <- Remainder
  42     jecxz   L1                      # abandon remainder if Remainder == NULL
  43     movl    %edx, (%ecx)
  44 L1:
  45     pop     %edx                    # edx <- quotient[32..63]
  46     ret