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1 ;------------------------------------------------------------------------------
2 ;
3 ; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
4 ; SPDX-License-Identifier: BSD-2-Clause-Patent
5 ;
6 ; Module Name:
7 ;
8 ; EnablePaging64.Asm
9 ;
10 ; Abstract:
11 ;
12 ; AsmEnablePaging64 function
13 ;
14 ; Notes:
15 ;
16 ;------------------------------------------------------------------------------
17
18 SECTION .text
19
20 ;------------------------------------------------------------------------------
21 ; VOID
22 ; EFIAPI
23 ; InternalX86EnablePaging64 (
24 ; IN UINT16 Cs,
25 ; IN UINT64 EntryPoint,
26 ; IN UINT64 Context1, OPTIONAL
27 ; IN UINT64 Context2, OPTIONAL
28 ; IN UINT64 NewStack
29 ; );
30 ;------------------------------------------------------------------------------
31 global ASM_PFX(InternalX86EnablePaging64)
32 ASM_PFX(InternalX86EnablePaging64):
33 cli
34 mov DWORD [esp], .0 ; offset for far retf, seg is the 1st arg
35 mov eax, cr4
36 or al, (1 << 5)
37 mov cr4, eax ; enable PAE
38 mov ecx, 0xc0000080
39 rdmsr
40 or ah, 1 ; set LME
41 wrmsr
42 mov eax, cr0
43 bts eax, 31 ; set PG
44 mov cr0, eax ; enable paging
45 retf ; topmost 2 dwords hold the address
46 .0:
47 DB 0x67, 0x48 ; 32-bit address size, 64-bit operand size
48 mov ebx, [esp] ; mov rbx, [esp]
49 DB 0x67, 0x48
50 mov ecx, [esp + 8] ; mov rcx, [esp + 8]
51 DB 0x67, 0x48
52 mov edx, [esp + 0x10] ; mov rdx, [esp + 10h]
53 DB 0x67, 0x48
54 mov esp, [esp + 0x18] ; mov rsp, [esp + 18h]
55 DB 0x48
56 add esp, -0x20 ; add rsp, -20h
57 call ebx ; call rbx
58 hlt ; no one should get here
59