MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c

   1 /** @file
   2   AsmFlushCacheLine function
   3
   4   Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php.
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15
  16
  17
  18 /**
  19   Flushes a cache line from all the instruction and data caches within the
  20   coherency domain of the CPU.
  21
  22   Flushed the cache line specified by LinearAddress, and returns LinearAddress.
  23   This function is only available on IA-32 and x64.
  24
  25   @param  LinearAddress The address of the cache line to flush. If the CPU is
  26                         in a physical addressing mode, then LinearAddress is a
  27                         physical address. If the CPU is in a virtual
  28                         addressing mode, then LinearAddress is a virtual
  29                         address.
  30
  31   @return LinearAddress
  32 **/
  33 VOID *
  34 EFIAPI
  35 AsmFlushCacheLine (
  36   IN      VOID                      *LinearAddress
  37   )
  38 {
  39   //
  40   // If the CPU does not support CLFLUSH instruction,
  41   // then promote flush range to flush entire cache.
  42   //
  43   _asm {
  44     mov     eax, 1
  45     cpuid
  46     test    edx, BIT19
  47     jz      NoClflush
  48     mov     eax, [esp + 4]
  49     clflush [eax]
  50     jmp     Done
  51 NoClflush:
  52     wbinvd
  53 Done:
  54   }
  55
  56   return LinearAddress;
  57 }
  58