]> git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Library/BaseLib/Ia32/Thunk16.S
88657f8182ea0c6094ad82ff12a5131f51d0d952
[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / Thunk16.S
1 #------------------------------------------------------------------------------
2 #
3 # Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
4 # This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php.
8 #
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 #
12 # Module Name:
13 #
14 # Thunk16.S
15 #
16 # Abstract:
17 #
18 # Real mode thunk
19 #
20 #------------------------------------------------------------------------------
21
22 #include <Library/BaseLib.h>
23
24 ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
25 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
26
27 ASM_PFX(m16Start):
28
29 SavedGdt: .space 6
30
31 ASM_PFX(BackFromUserCode):
32 push %ss
33 push %cs
34 .byte 0x66
35 call L_Base1 # push eip
36 L_Base1:
37 pushfw # pushfd actually
38 cli # disable interrupts
39 push %gs
40 push %fs
41 push %es
42 push %ds
43 pushaw # pushad actually
44 .byte 0x66, 0xba # mov edx, imm32
45 ASM_PFX(ThunkAttr): .space 4
46 testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
47 jz 1f
48 movl $0x15cd2401, %eax # mov ax, 2401h & int 15h
49 cli # disable interrupts
50 jnc 2f
51 1:
52 testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
53 jz 2f
54 inb $0x92, %al
55 orb $2, %al
56 outb %al, $0x92 # deactivate A20M#
57 2:
58 movl %ss, %eax
59 .byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
60 mov %ebp, 0xffffffd8(%esi)
61 mov 0xfffffff8(%esi), %ebx
62 shlw $4, %ax # shl eax, 4
63 addw %ax, %bp # add ebp, eax
64 .byte 0x66, 0xb8 # mov eax, imm32
65 SavedCr4: .space 4
66 movl %eax, %cr4
67 lgdtw %cs:0xfffffff2(%edi)
68 .byte 0x66, 0xb8 # mov eax, imm32
69 SavedCr0: .space 4
70 movl %eax, %cr0
71 .byte 0xb8 # mov ax, imm16
72 SavedSs: .space 2
73 movl %eax, %ss
74 .byte 0x66, 0xbc # mov esp, imm32
75 SavedEsp: .space 4
76 .byte 0x66
77 lret # return to protected mode
78
79 _EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
80 .word 0x8
81 _16Idtr: .word 0x3ff
82 .long 0
83 _16Gdtr: .word GdtEnd - _NullSegDesc - 1
84 _16GdtrBase: .long _NullSegDesc
85
86 ASM_PFX(ToUserCode):
87 movl %ss, %edx
88 movl %ecx, %ss # set new segment selectors
89 movl %ecx, %ds
90 movl %ecx, %es
91 movl %ecx, %fs
92 movl %ecx, %gs
93 movl %eax, %cr0
94 movl %ebp, %cr4 # real mode starts at next instruction
95 movl %esi, %ss # set up 16-bit stack segment
96 xchgw %bx, %sp # set up 16-bit stack pointer
97 .byte 0x66
98 call L_Base # push eip
99 L_Base:
100 popw %bp # ebp <- offset L_Base
101 .byte 0x67; # address size override
102 push 54(%esp)
103 lea 0xc(%esi), %eax
104 push %eax
105 lret
106
107 L_RealMode:
108 mov %edx, %cs:0xffffffc5(%esi)
109 mov %bx, %cs:0xffffffcb(%esi)
110 lidtw %cs:0xffffffd7(%esi)
111 popaw # popad actually
112 pop %ds
113 pop %es
114 pop %fs
115 pop %gs
116 popfw # popfd
117 lretw # transfer control to user code
118
119 _NullSegDesc: .quad 0
120 _16CsDesc:
121 .word -1
122 .word 0
123 .byte 0
124 .byte 0x9b
125 .byte 0x8f # 16-bit segment, 4GB limit
126 .byte 0
127 _16DsDesc:
128 .word -1
129 .word 0
130 .byte 0
131 .byte 0x93
132 .byte 0x8f # 16-bit segment, 4GB limit
133 .byte 0
134 GdtEnd:
135
136 #
137 # @param RegSet Pointer to a IA32_DWORD_REGS structure
138 # @param Transition Pointer to the transition code
139 # @return The address of the 16-bit stack after returning from user code
140 #
141 ASM_PFX(InternalAsmThunk16):
142 push %ebp
143 push %ebx
144 push %esi
145 push %edi
146 push %ds
147 push %es
148 push %fs
149 push %gs
150 movl 36(%esp), %esi # esi <- RegSet
151 movzwl 0x32(%esi), %edx
152 mov 0xc(%esi), %edi
153 add $0xffffffc8, %edi
154 movl %edi, %ebx # ebx <- stack offset
155 imul $0x10, %edx, %eax
156 push $0xd
157 addl %eax, %edi # edi <- linear address of 16-bit stack
158 pop %ecx
159 rep
160 movsl # copy RegSet
161 movl 40(%esp), %eax # eax <- address of transition code
162 movl %edx, %esi # esi <- 16-bit stack segment
163 lea 0x5e(%eax), %edx
164 movl %eax, %ecx
165 andl $0xf, %ecx
166 shll $12, %eax
167 lea 0x6(%ecx), %ecx
168 movw %cx, %ax
169 stosl # [edi] <- return address of user code
170 sgdtl 0xffffffa2(%edx)
171 sidtl 0x24(%esp)
172 movl %cr0, %eax
173 movl %eax, (%edx) # save CR0 in SavedCr0
174 andl $0x7ffffffe, %eax # clear PE, PG bits
175 movl %cr4, %ebp
176 mov %ebp, 0xfffffff1(%edx)
177 andl $0x300, %ebp # clear all but PCE and OSFXSR bits
178 pushl $0x10
179 pop %ecx # ecx <- selector for data segments
180 lgdtl 0x20(%edx)
181 pushfl
182 lcall *0x14(%edx)
183 popfl
184 lidtl 0x24(%esp)
185 lea 0xffffffcc(%ebp), %eax
186 pop %gs
187 pop %fs
188 pop %es
189 pop %ds
190 pop %edi
191 pop %esi
192 pop %ebx
193 pop %ebp
194 ret
195
196 .const:
197
198 ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
199 ASM_PFX(mThunk16Attr): .word ASM_PFX(ThunkAttr) - ASM_PFX(m16Start)
200 ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
201 ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
202 ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)