1 #------------------------------------------------------------------------------
3 # Copyright (c) 2006, Intel Corporation
4 # All rights reserved. This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 #------------------------------------------------------------------------------
22 .global _m16Start, _m16Size, _mThunk16Attr, _m16GdtrBase, _m16Gdt, _m16GdtrBase, _mTransition
23 .global _InternalAsmThunk16
25 #THUNK_ATTRIBUTE_BIG_REAL_MODE EQU 1
26 #THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 EQU 2
27 #THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL EQU 4
39 call @Base1 # push eip
41 pushfw # pushfd actually
42 cli # disable interrupts
47 pushaw # pushad actually
48 .byte 0x66,0xba # mov edx, imm32
50 testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
52 movl $0x15cd2401, %eax # mov ax, 2401h & int 15h
53 cli # disable interrupts
56 testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
60 outb %al, $0x92 # deactivate A20M#
63 .byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
64 mov %ebp,0xffffffd8(%esi)
65 mov 0xfffffff8(%esi),%ebx
66 shlw $4, %ax # shl eax, 4
67 addw %ax, %bp # add ebp, eax
68 .byte 0x66,0xb8 # mov eax, imm32
71 lgdtw %cs:0xfffffff2(%edi)
72 .byte 0x66,0xb8 # mov eax, imm32
75 .byte 0xb8 # mov ax, imm16
78 .byte 0x66,0xbc # mov esp, imm32
81 lret # return to protected mode
83 _EntryPoint: .long _ToUserCode - _m16Start
87 _16Gdtr: .word GdtEnd - _NullSegDesc - 1
88 _16GdtrBase: .long _NullSegDesc
92 movl %ecx, %ss # set new segment selectors
98 movl %ebp, %cr4 # real mode starts at next instruction
99 movl %esi, %ss # set up 16-bit stack segment
100 xchgw %bx, %sp # set up 16-bit stack pointer
102 call @Base # push eip
104 popw %bp # ebp <- offset @Base
112 mov %edx,%cs:0xffffffc5(%esi)
113 mov %bx,%cs:0xffffffcb(%esi)
114 lidtw %cs:0xffffffd7(%esi)
115 popaw # popad actually
121 lretw # transfer control to user code
123 _NullSegDesc: .quad 0
129 .byte 0x8f # 16-bit segment, 4GB limit
136 .byte 0x8f # 16-bit segment, 4GB limit
141 # @param RegSet Pointer to a IA32_DWORD_REGS structure
142 # @param Transition Pointer to the transition code
143 # @return The address of the 16-bit stack after returning from user code
154 movl 36(%esp), %esi # esi <- RegSet
155 movzwl 0x32(%esi),%edx
158 movl %edi, %ebx # ebx <- stack offset
161 addl %eax, %edi # edi <- linear address of 16-bit stack
165 movl 40(%esp), %eax # eax <- address of transition code
166 movl %edx, %esi # esi <- 16-bit stack segment
173 stosl # [edi] <- return address of user code
174 sgdtl 0xffffffa2(%edx)
177 movl %eax, (%edx) # save CR0 in SavedCr0
178 andl $0x7ffffffe, %eax # clear PE, PG bits
180 mov %ebp,0xfffffff1(%edx)
181 andl $0x300, %ebp # clear all but PCE and OSFXSR bits
183 popl %ecx # ecx <- selector for data segments
189 lea 0xffffffcc(%ebp),%eax
202 _m16Size: .word _InternalAsmThunk16 - _m16Start
203 _mThunk16Attr: .word _ThunkAttr - _m16Start
204 _m16Gdt: .word _NullSegDesc - _m16Start
205 _m16GdtrBase: .word _16GdtrBase - _m16Start
206 _mTransition: .word _EntryPoint - _m16Start