1 #------------------------------------------------------------------------------
3 # Copyright (c) 2006, Intel Corporation
4 # All rights reserved. This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 #------------------------------------------------------------------------------
22 .globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
23 .globl ASM_PFX(InternalAsmThunk16)
29 ASM_PFX(BackFromUserCode):
33 call L_Base1 # push eip
35 pushfw # pushfd actually
36 cli # disable interrupts
41 pushaw # pushad actually
42 .byte 0x66, 0xba # mov edx, imm32
43 ASM_PFX(ThunkAttr): .space 4
44 testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
46 movl $0x15cd2401, %eax # mov ax, 2401h & int 15h
47 cli # disable interrupts
50 testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
54 outb %al, $0x92 # deactivate A20M#
57 .byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
58 mov %ebp, 0xffffffd8(%esi)
59 mov 0xfffffff8(%esi), %ebx
60 shlw $4, %ax # shl eax, 4
61 addw %ax, %bp # add ebp, eax
62 .byte 0x66, 0xb8 # mov eax, imm32
65 lgdtw %cs:0xfffffff2(%edi)
66 .byte 0x66, 0xb8 # mov eax, imm32
69 .byte 0xb8 # mov ax, imm16
72 .byte 0x66, 0xbc # mov esp, imm32
75 lret # return to protected mode
77 _EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
81 _16Gdtr: .word GdtEnd - _NullSegDesc - 1
82 _16GdtrBase: .long _NullSegDesc
86 movl %ecx, %ss # set new segment selectors
92 movl %ebp, %cr4 # real mode starts at next instruction
93 movl %esi, %ss # set up 16-bit stack segment
94 xchgw %bx, %sp # set up 16-bit stack pointer
96 call L_Base # push eip
98 popw %bp # ebp <- offset L_Base
106 mov %edx, %cs:0xffffffc5(%esi)
107 mov %bx, %cs:0xffffffcb(%esi)
108 lidtw %cs:0xffffffd7(%esi)
109 popaw # popad actually
115 lretw # transfer control to user code
117 _NullSegDesc: .quad 0
123 .byte 0x8f # 16-bit segment, 4GB limit
130 .byte 0x8f # 16-bit segment, 4GB limit
135 # @param RegSet Pointer to a IA32_DWORD_REGS structure
136 # @param Transition Pointer to the transition code
137 # @return The address of the 16-bit stack after returning from user code
139 ASM_PFX(InternalAsmThunk16):
148 movl 36(%esp), %esi # esi <- RegSet
149 movzwl 0x32(%esi), %edx
151 add $0xffffffc8, %edi
152 movl %edi, %ebx # ebx <- stack offset
153 imul $0x10, %edx, %eax
155 addl %eax, %edi # edi <- linear address of 16-bit stack
159 movl 40(%esp), %eax # eax <- address of transition code
160 movl %edx, %esi # esi <- 16-bit stack segment
167 stosl # [edi] <- return address of user code
168 sgdtl 0xffffffa2(%edx)
171 movl %eax, (%edx) # save CR0 in SavedCr0
172 andl $0x7ffffffe, %eax # clear PE, PG bits
174 mov %ebp, 0xfffffff1(%edx)
175 andl $0x300, %ebp # clear all but PCE and OSFXSR bits
177 pop %ecx # ecx <- selector for data segments
183 lea 0xffffffcc(%ebp), %eax
196 ASM_PFX(m16Size): .word _InternalAsmThunk16 - ASM_PFX(m16Start)
197 ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)
198 ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
199 ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
200 ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)