MdePkg/Library/BaseLib/X64/Thunk16.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
   4 # This program and the accompanying materials
   5 # are licensed and made available under the terms and conditions of the BSD License
   6 # which accompanies this distribution.  The full text of the license may be found at
   7 # http://opensource.org/licenses/bsd-license.php
   8 #
   9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 # Module Name:
  13 #
  14 #   Thunk16.S
  15 #
  16 # Abstract:
  17 #
  18 #   Real mode thunk
  19 #
  20 #------------------------------------------------------------------------------
  21
  22 #include <Library/BaseLib.h>
  23
  24 ASM_GLOBAL ASM_PFX(m16Start)
  25 ASM_GLOBAL ASM_PFX(m16Size)
  26 ASM_GLOBAL ASM_PFX(mThunk16Attr)
  27 ASM_GLOBAL ASM_PFX(m16Gdt)
  28 ASM_GLOBAL ASM_PFX(m16GdtrBase)
  29 ASM_GLOBAL ASM_PFX(mTransition)
  30 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
  31
  32 # define the structure of IA32_REGS
  33 .set  _EDI, 0       #size 4
  34 .set  _ESI, 4       #size 4
  35 .set  _EBP, 8       #size 4
  36 .set  _ESP, 12      #size 4
  37 .set  _EBX, 16      #size 4
  38 .set  _EDX, 20      #size 4
  39 .set  _ECX, 24      #size 4
  40 .set  _EAX, 28      #size 4
  41 .set  _DS,  32      #size 2
  42 .set  _ES,  34      #size 2
  43 .set  _FS,  36      #size 2
  44 .set  _GS,  38      #size 2
  45 .set  _EFLAGS, 40   #size 8
  46 .set  _EIP, 48      #size 4
  47 .set  _CS, 52       #size 2
  48 .set  _SS, 54       #size 2
  49 .set  IA32_REGS_SIZE, 56
  50
  51     .data
  52
  53 ASM_PFX(m16Size):         .word      ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
  54 ASM_PFX(mThunk16Attr):    .word      _ThunkAttr - ASM_PFX(m16Start)
  55 ASM_PFX(m16Gdt):          .word      ASM_PFX(NullSeg) - ASM_PFX(m16Start)
  56 ASM_PFX(m16GdtrBase):     .word      _16GdtrBase - ASM_PFX(m16Start)
  57 ASM_PFX(mTransition):     .word      _EntryPoint - ASM_PFX(m16Start)
  58
  59     .text
  60
  61 ASM_PFX(m16Start):
  62
  63 SavedGdt:    .space 10
  64
  65 #------------------------------------------------------------------------------
  66 # _BackFromUserCode() takes control in real mode after 'retf' has been executed
  67 # by user code. It will be shadowed to somewhere in memory below 1MB.
  68 #------------------------------------------------------------------------------
  69 ASM_GLOBAL ASM_PFX(BackFromUserCode)
  70 ASM_PFX(BackFromUserCode):
  71     #
  72     # The order of saved registers on the stack matches the order they appears
  73     # in IA32_REGS structure. This facilitates wrapper function to extract them
  74     # into that structure.
  75     #
  76     # Some instructions for manipulation of segment registers have to be written
  77     # in opcode since 64-bit MASM prevents accesses to those registers.
  78     #
  79     .byte 0x16                          # push ss
  80     .byte 0xe                           # push cs
  81     .byte 0x66
  82     call    L_Base                       # push eip
  83 L_Base:
  84     .byte 0x66
  85     pushq   $0                          # reserved high order 32 bits of EFlags
  86     .byte 0x66, 0x9c                    # pushfd actually
  87     cli                                 # disable interrupts
  88     push    %gs
  89     push    %fs
  90     .byte 6                             # push es
  91     .byte 0x1e                          # push ds
  92     .byte 0x66,0x60                     # pushad
  93     .byte 0x66,0xba                     # mov edx, imm32
  94 _ThunkAttr:  .space  4
  95     testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
  96     jz      L_1
  97     movl    $0x15cd2401,%eax            # mov ax, 2401h & int 15h
  98     cli                                 # disable interrupts
  99     jnc     L_2
 100 L_1:
 101     testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
 102     jz      L_2
 103     inb     $0x92,%al
 104     orb     $2,%al
 105     outb    %al, $0x92                   # deactivate A20M#
 106 L_2:
 107     movl    %ss,%eax
 108     lea     IA32_REGS_SIZE(%esp), %bp
 109     #
 110     # rsi in the following 2 instructions is indeed bp in 16-bit code
 111     #
 112     movw    %bp, (_ESP - IA32_REGS_SIZE)(%rsi)
 113     .byte 0x66
 114     movl    (_EIP - IA32_REGS_SIZE)(%rsi), %ebx
 115     shlw    $4,%ax                      # shl eax, 4
 116     addw    %ax,%bp                     # add ebp, eax
 117     movw    %cs,%ax
 118     shlw    $4,%ax
 119     lea     (L_64BitCode - L_Base)(%ebx, %eax), %ax
 120     .byte 0x66,0x2e,0x89,0x87           # mov cs:[bx + (L_64Eip - L_Base)], eax
 121     .word   L_64Eip - L_Base
 122     .byte 0x66,0xb8                     # mov eax, imm32
 123 SavedCr4:   .space  4
 124     movq    %rax, %cr4
 125     #
 126     # rdi in the instruction below is indeed bx in 16-bit code
 127     #
 128     .byte 0x66,0x2e                     # 2eh is "cs:" segment override
 129     lgdt    (SavedGdt - L_Base)(%rdi)
 130     .byte 0x66
 131     movl    $0xc0000080,%ecx
 132     rdmsr
 133     orb     $1,%ah
 134     wrmsr
 135     .byte 0x66,0xb8                     # mov eax, imm32
 136 SavedCr0:    .space      4
 137     movq    %rax, %cr0
 138     .byte 0x66,0xea                     # jmp far cs:L_64Bit
 139 L_64Eip:     .space      4
 140 SavedCs:     .space      2
 141 L_64BitCode:
 142     .byte   0x90
 143     .byte   0x67,0xbc                  # mov esp, imm32
 144 SavedSp:    .space 4                   # restore stack
 145     nop
 146     ret
 147
 148 _EntryPoint: .long      ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
 149              .word      CODE16
 150 _16Gdtr:     .word      GDT_SIZE - 1
 151 _16GdtrBase: .quad      ASM_PFX(NullSeg)
 152 _16Idtr:     .word      0x3ff
 153              .long      0
 154
 155 #------------------------------------------------------------------------------
 156 # _ToUserCode() takes control in real mode before passing control to user code.
 157 # It will be shadowed to somewhere in memory below 1MB.
 158 #------------------------------------------------------------------------------
 159 ASM_GLOBAL ASM_PFX(ToUserCode)
 160 ASM_PFX(ToUserCode):
 161     movl    %edx,%ss                    # set new segment selectors
 162     movl    %edx,%ds
 163     movl    %edx,%es
 164     movl    %edx,%fs
 165     movl    %edx,%gs
 166     .byte 0x66
 167     movl    $0xc0000080,%ecx
 168     movq    %rax, %cr0
 169     rdmsr
 170     andb    $0xfe, %ah                  # $0b11111110
 171     wrmsr
 172     movq    %rbp, %cr4
 173     movl    %esi,%ss                    # set up 16-bit stack segment
 174     movw    %bx,%sp                     # set up 16-bit stack pointer
 175     .byte 0x66                          # make the following call 32-bit
 176     call    L_Base1                       # push eip
 177 L_Base1:
 178     popw    %bp                         # ebp <- address of L_Base1
 179     pushq   (IA32_REGS_SIZE + 2)(%esp)
 180     lea     0x0c(%rsi), %eax
 181     pushq   %rax
 182     lret                                # execution begins at next instruction
 183 L_RealMode:
 184     .byte 0x66,0x2e                     # CS and operand size override
 185     lidt    (_16Idtr - L_Base1)(%rsi)
 186     .byte 0x66,0x61                     # popad
 187     .byte 0x1f                          # pop ds
 188     .byte 0x7                           # pop es
 189     .byte 0x0f, 0xa1                    # pop fs
 190     .byte 0x0f, 0xa9                    # pop gs
 191     .byte 0x66, 0x9d                    # popfd
 192     leaw    4(%esp),%sp                 # skip high order 32 bits of EFlags
 193     .byte 0x66                          # make the following retf 32-bit
 194     lret                                # transfer control to user code
 195
 196 .set  CODE16,  ASM_PFX(_16Code) - .
 197 .set  DATA16,  ASM_PFX(_16Data) - .
 198 .set  DATA32,  ASM_PFX(_32Data) - .
 199
 200 ASM_PFX(NullSeg):   .quad      0
 201 ASM_PFX(_16Code):
 202             .word -1
 203             .word 0
 204             .byte 0
 205             .byte 0x9b
 206             .byte 0x8f                  # 16-bit segment, 4GB limit
 207             .byte 0
 208 ASM_PFX(_16Data):
 209             .word -1
 210             .word 0
 211             .byte 0
 212             .byte 0x93
 213             .byte 0x8f                  # 16-bit segment, 4GB limit
 214             .byte 0
 215 ASM_PFX(_32Data):
 216             .word -1
 217             .word 0
 218             .byte 0
 219             .byte 0x93
 220             .byte 0xcf                  # 16-bit segment, 4GB limit
 221             .byte 0
 222
 223 .set  GDT_SIZE, . - ASM_PFX(NullSeg)
 224
 225 #------------------------------------------------------------------------------
 226 # IA32_REGISTER_SET *
 227 # EFIAPI
 228 # InternalAsmThunk16 (
 229 #   IN      IA32_REGISTER_SET         *RegisterSet,
 230 #   IN OUT  VOID                      *Transition
 231 #   );
 232 #------------------------------------------------------------------------------
 233
 234 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
 235 ASM_PFX(InternalAsmThunk16):
 236     pushq   %rbp
 237     pushq   %rbx
 238     pushq   %rsi
 239     pushq   %rdi
 240
 241     movl    %ds, %ebx
 242     pushq   %rbx      # Save ds segment register on the stack
 243     movl    %es, %ebx
 244     pushq   %rbx      # Save es segment register on the stack
 245     movl    %ss, %ebx
 246     pushq   %rbx      # Save ss segment register on the stack
 247
 248     .byte   0x0f, 0xa0                  #push   fs
 249     .byte   0x0f, 0xa8                  #push   gs
 250     movq    %rcx, %rsi
 251     movzwl  _SS(%rsi), %r8d
 252     movl    _ESP(%rsi), %edi
 253     lea     -(IA32_REGS_SIZE + 4)(%edi), %rdi
 254     imul    $16, %r8d, %eax
 255     movl    %edi,%ebx                   # ebx <- stack for 16-bit code
 256     pushq   $(IA32_REGS_SIZE / 4)
 257     addl    %eax,%edi                   # edi <- linear address of 16-bit stack
 258     popq    %rcx
 259     rep
 260     movsl                               # copy RegSet
 261     lea     (SavedCr4 - ASM_PFX(m16Start))(%rdx), %ecx
 262     movl    %edx,%eax                   # eax <- transition code address
 263     andl    $0xf,%edx
 264     shll    $12,%eax                    # segment address in high order 16 bits
 265     lea     (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%rdx), %ax
 266     stosl                               # [edi] <- return address of user code
 267     sgdt    0x60(%rsp)                  # save GDT stack in argument space
 268     movzwq  0x60(%rsp), %r10            # r10 <- GDT limit
 269     lea     ((ASM_PFX(InternalAsmThunk16) - SavedCr4) + 0xf)(%rcx), %r11
 270     andq    $0xfffffffffffffff0, %r11   # r11 <- 16-byte aligned shadowed GDT table in real mode buffer
 271
 272     movw    %r10w, (SavedGdt - SavedCr4)(%rcx)       # save the limit of shadowed GDT table
 273     movq    %r11, (SavedGdt - SavedCr4 + 0x2)(%rcx)  # save the base address of shadowed GDT table
 274
 275     movq    0x62(%rsp) ,%rsi            # rsi <- the original GDT base address
 276     xchg   %r10, %rcx                   # save rcx to r10 and initialize rcx to be the limit of GDT table
 277     incq   %rcx                         # rcx <- the size of memory to copy
 278     xchg   %r11, %rdi                   # save rdi to r11 and initialize rdi to the base address of shadowed GDT table
 279     rep
 280     movsb                               # perform memory copy to shadow GDT table
 281     movq   %r10, %rcx                   # restore the orignal rcx before memory copy
 282     movq   %r11, %rdi                   # restore the original rdi before memory copy
 283
 284     sidt    0x50(%rsp)
 285     movq    %cr0, %rax
 286     movl    %eax, (SavedCr0 - SavedCr4)(%rcx)
 287     andl    $0x7ffffffe,%eax            # clear PE, PG bits
 288     movq    %cr4, %rbp
 289     movl    %ebp, (%rcx)                # save CR4 in SavedCr4
 290     andl    $0x300,%ebp                 # clear all but PCE and OSFXSR bits
 291     movl    %r8d, %esi                  # esi <- 16-bit stack segment
 292     .byte      0x6a, DATA32
 293     popq    %rdx
 294     lgdt    (_16Gdtr - SavedCr4)(%rcx)
 295     movl    %edx,%ss
 296     pushfq
 297     lea     -8(%rdx), %edx
 298     lea     L_RetFromRealMode(%rip), %r8
 299     pushq   %r8
 300     movl    %cs, %r8d
 301     movw    %r8w, (SavedCs - SavedCr4)(%rcx)
 302     movl    %esp, (SavedSp - SavedCr4)(%rcx)
 303     .byte   0xff, 0x69                  #  jmp (_EntryPoint - SavedCr4)(%rcx)
 304     .byte   _EntryPoint - SavedCr4
 305 L_RetFromRealMode:
 306     popfq
 307     lgdt    0x60(%rsp)                  # restore protected mode GDTR
 308     lidt    0x50(%rsp)                  # restore protected mode IDTR
 309     lea     -IA32_REGS_SIZE(%rbp), %eax
 310     .byte 0x0f, 0xa9                    # pop gs
 311     .byte 0x0f, 0xa1                    # pop fs
 312
 313     popq     %rbx
 314     movl     %ebx, %ss
 315     popq     %rbx
 316     movl     %ebx, %es
 317     popq     %rbx
 318     movl     %ebx, %ds
 319
 320     popq    %rdi
 321     popq    %rsi
 322     popq    %rbx
 323     popq    %rbp
 324
 325     ret