1 ;------------------------------------------------------------------------------
3 ; Copyright (c) 2006, Intel Corporation
4 ; All rights reserved. This program and the accompanying materials
5 ; are licensed and made available under the terms and conditions of the BSD License
6 ; which accompanies this distribution. The full text of the license may be found at
7 ; http://opensource.org/licenses/bsd-license.php
9 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 ;------------------------------------------------------------------------------
25 _16CsSegSel LABEL QWORD
30 DB 8fh ; 16-bit segment
32 _16BitDsSel LABEL QWORD
37 DB 8fh ; 16-bit segment
44 DW offset GdtEnd - offset NullSegSel - 1
47 _16Idtr FWORD (1 SHL 10) - 1
70 InternalAsmThunk16 PROC USES rbp rbx rsi rdi r12 r13 r14 r15
77 mov rsi, rcx ; rsi <- RegSet
78 push sizeof (IA32_REGS)
80 movzx r8, (IA32_REGS ptr [rsi])._SS
82 mov edi, (IA32_REGS ptr [rsi])._ESP
83 sub rdi, rcx ; reserve space on realmode stack
84 push rdi ; save stack offset
86 add rdi, rax ; rdi <- linear address of 16-bit stack
87 rep movsb ; copy RegSet
88 mov rsi, r8 ; si <- 16-bit stack segment
89 pop rbx ; rbx <- 16-bit stack offset
90 mov rdi, rdx ; rdi <- realmode patch
91 lea eax, @BackToThunk ; rax <- address to back from real mode
92 push rax ; use in a far return
94 mov [rsp + 4], eax ; save CS
95 lea eax, @16Return ; thus @Return must < 4GB
96 stosd ; set ret address offset
98 stosw ; set ret CS base to 0
100 stosd ; rsp must < 4GB
104 mov ecx, eax ; ecx <- CR0
105 and ecx, 7ffffffeh ; clear PE, PG bits
109 and ebp, 300h ; clear all but PCE and OSFXSR bits
111 sidt fword ptr [rsp + 70h] ; use parameter space to save IDTR
114 lea eax, @16Start ; rax <- seg:offset of @16Start
116 mov dword ptr [rsp + 4], 8
118 pop rax ; rax <- 10h as dataseg selector
121 @16Start: ; 16-bit starts here
122 mov ss, eax ; set SS to be a 16-bit segment
123 mov cr0, rcx ; disable protected mode
128 and ah, NOT 1 ; clear LME
130 mov ss, esi ; set up 16-bit stack
131 mov sp, bx ; mov esp, ebx actually
138 add sp, 8 ; skip _RFLAGS
140 retf ; transfer control to 16-bit code
143 push 0 ; high order 32 bits of rflags
144 pushf ; pushfd actually
150 DB 67h, 66h, 0c5h, 74h, 24h, 30h ; lds esi, [esp + 12*4]
153 mov cr4, rax ; restore CR4
155 lgdt fword ptr [esi + 16]
163 mov cr0, rax ; restore CR0
164 xor ax, ax ; xor eax, eax actually
166 mov dword ptr (IA32_REGS ptr [esp])._SS, eax
167 shl ax, 4 ; shl eax, 4 actually
168 add ax, sp ; add eax, esp actually
169 add sp, sizeof (IA32_REGS) ; add esp, sizeof (IA32_REGS)
171 mov dword ptr (IA32_REGS ptr [esp - sizeof (IA32_REGS)])._ESP, esp
173 lss esp, fword ptr [esi] ; restore protected mode stack
175 retf ; go back to protected mode
177 lidt fword ptr [rsp + 68h] ; restore protected mode IDTR
179 shr rax, 32 ; clear high order 32 bits of RAX
187 InternalAsmThunk16 ENDP