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1 /** @file
2 IA-32/x64 specific functions.
3
4 Copyright (c) 2006, Intel Corporation<BR>
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 Module Name: x86LowLevel.c
14
15 **/
16
17 #include "BaseLibInternals.h"
18
19 //
20 // Bit-wise MSR operations
21 //
22
23 /**
24 Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
25 writes the result back to the 64-bit MSR.
26
27 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
28 between the lower 32-bits of the read result and the value specified by
29 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
30 32-bits of the value written to the MSR is returned. No parameter checking is
31 performed on Index or OrData, and some of these may cause CPU exceptions. The
32 caller must either guarantee that Index and OrData are valid, or the caller
33 must establish proper exception handlers. This function is only available on
34 IA-32 and X64.
35
36 @param Index The 32-bit MSR index to write.
37 @param OrData The value to OR with the read value from the MSR.
38
39 @return The lower 32-bit value written to the MSR.
40
41 **/
42 UINT32
43 EFIAPI
44 AsmMsrOr32 (
45 IN UINT32 Index,
46 IN UINT32 OrData
47 )
48 {
49 return (UINT32)AsmMsrOr64 (Index, OrData);
50 }
51
52 /**
53 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
54 the result back to the 64-bit MSR.
55
56 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
57 lower 32-bits of the read result and the value specified by AndData, and
58 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
59 the value written to the MSR is returned. No parameter checking is performed
60 on Index or AndData, and some of these may cause CPU exceptions. The caller
61 must either guarantee that Index and AndData are valid, or the caller must
62 establish proper exception handlers. This function is only available on IA-32
63 and X64.
64
65 @param Index The 32-bit MSR index to write.
66 @param AndData The value to AND with the read value from the MSR.
67
68 @return The lower 32-bit value written to the MSR.
69
70 **/
71 UINT32
72 EFIAPI
73 AsmMsrAnd32 (
74 IN UINT32 Index,
75 IN UINT32 AndData
76 )
77 {
78 return (UINT32)AsmMsrAnd64 (Index, AndData);
79 }
80
81 /**
82 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
83 on the lower 32-bits, and writes the result back to the 64-bit MSR.
84
85 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
86 lower 32-bits of the read result and the value specified by AndData
87 preserving the upper 32-bits, performs a bitwise inclusive OR between the
88 result of the AND operation and the value specified by OrData, and writes the
89 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
90 written to the MSR is returned. No parameter checking is performed on Index,
91 AndData, or OrData, and some of these may cause CPU exceptions. The caller
92 must either guarantee that Index, AndData, and OrData are valid, or the
93 caller must establish proper exception handlers. This function is only
94 available on IA-32 and X64.
95
96 @param Index The 32-bit MSR index to write.
97 @param AndData The value to AND with the read value from the MSR.
98 @param OrData The value to OR with the result of the AND operation.
99
100 @return The lower 32-bit value written to the MSR.
101
102 **/
103 UINT32
104 EFIAPI
105 AsmMsrAndThenOr32 (
106 IN UINT32 Index,
107 IN UINT32 AndData,
108 IN UINT32 OrData
109 )
110 {
111 return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);
112 }
113
114 /**
115 Reads a bit field of an MSR.
116
117 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
118 specified by the StartBit and the EndBit. The value of the bit field is
119 returned. The caller must either guarantee that Index is valid, or the caller
120 must set up exception handlers to catch the exceptions. This function is only
121 available on IA-32 and X64.
122
123 If StartBit is greater than 31, then ASSERT().
124 If EndBit is greater than 31, then ASSERT().
125 If EndBit is less than StartBit, then ASSERT().
126
127 @param Index The 32-bit MSR index to read.
128 @param StartBit The ordinal of the least significant bit in the bit field.
129 Range 0..31.
130 @param EndBit The ordinal of the most significant bit in the bit field.
131 Range 0..31.
132
133 @return The bit field read from the MSR.
134
135 **/
136 UINT32
137 EFIAPI
138 AsmMsrBitFieldRead32 (
139 IN UINT32 Index,
140 IN UINTN StartBit,
141 IN UINTN EndBit
142 )
143 {
144 return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);
145 }
146
147 /**
148 Writes a bit field to an MSR.
149
150 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
151 field is specified by the StartBit and the EndBit. All other bits in the
152 destination MSR are preserved. The lower 32-bits of the MSR written is
153 returned. Extra left bits in Value are stripped. The caller must either
154 guarantee that Index and the data written is valid, or the caller must set up
155 exception handlers to catch the exceptions. This function is only available
156 on IA-32 and X64.
157
158 If StartBit is greater than 31, then ASSERT().
159 If EndBit is greater than 31, then ASSERT().
160 If EndBit is less than StartBit, then ASSERT().
161
162 @param Index The 32-bit MSR index to write.
163 @param StartBit The ordinal of the least significant bit in the bit field.
164 Range 0..31.
165 @param EndBit The ordinal of the most significant bit in the bit field.
166 Range 0..31.
167 @param Value New value of the bit field.
168
169 @return The lower 32-bit of the value written to the MSR.
170
171 **/
172 UINT32
173 EFIAPI
174 AsmMsrBitFieldWrite32 (
175 IN UINT32 Index,
176 IN UINTN StartBit,
177 IN UINTN EndBit,
178 IN UINT32 Value
179 )
180 {
181 ASSERT (EndBit < sizeof (Value) * 8);
182 ASSERT (StartBit <= EndBit);
183 return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);
184 }
185
186 /**
187 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
188 result back to the bit field in the 64-bit MSR.
189
190 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
191 between the read result and the value specified by OrData, and writes the
192 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
193 written to the MSR are returned. Extra left bits in OrData are stripped. The
194 caller must either guarantee that Index and the data written is valid, or
195 the caller must set up exception handlers to catch the exceptions. This
196 function is only available on IA-32 and X64.
197
198 If StartBit is greater than 31, then ASSERT().
199 If EndBit is greater than 31, then ASSERT().
200 If EndBit is less than StartBit, then ASSERT().
201
202 @param Index The 32-bit MSR index to write.
203 @param StartBit The ordinal of the least significant bit in the bit field.
204 Range 0..31.
205 @param EndBit The ordinal of the most significant bit in the bit field.
206 Range 0..31.
207 @param OrData The value to OR with the read value from the MSR.
208
209 @return The lower 32-bit of the value written to the MSR.
210
211 **/
212 UINT32
213 EFIAPI
214 AsmMsrBitFieldOr32 (
215 IN UINT32 Index,
216 IN UINTN StartBit,
217 IN UINTN EndBit,
218 IN UINT32 OrData
219 )
220 {
221 ASSERT (EndBit < sizeof (OrData) * 8);
222 ASSERT (StartBit <= EndBit);
223 return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);
224 }
225
226 /**
227 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
228 result back to the bit field in the 64-bit MSR.
229
230 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
231 read result and the value specified by AndData, and writes the result to the
232 64-bit MSR specified by Index. The lower 32-bits of the value written to the
233 MSR are returned. Extra left bits in AndData are stripped. The caller must
234 either guarantee that Index and the data written is valid, or the caller must
235 set up exception handlers to catch the exceptions. This function is only
236 available on IA-32 and X64.
237
238 If StartBit is greater than 31, then ASSERT().
239 If EndBit is greater than 31, then ASSERT().
240 If EndBit is less than StartBit, then ASSERT().
241
242 @param Index The 32-bit MSR index to write.
243 @param StartBit The ordinal of the least significant bit in the bit field.
244 Range 0..31.
245 @param EndBit The ordinal of the most significant bit in the bit field.
246 Range 0..31.
247 @param AndData The value to AND with the read value from the MSR.
248
249 @return The lower 32-bit of the value written to the MSR.
250
251 **/
252 UINT32
253 EFIAPI
254 AsmMsrBitFieldAnd32 (
255 IN UINT32 Index,
256 IN UINTN StartBit,
257 IN UINTN EndBit,
258 IN UINT32 AndData
259 )
260 {
261 ASSERT (EndBit < sizeof (AndData) * 8);
262 ASSERT (StartBit <= EndBit);
263 return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);
264 }
265
266 /**
267 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
268 bitwise inclusive OR, and writes the result back to the bit field in the
269 64-bit MSR.
270
271 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
272 bitwise inclusive OR between the read result and the value specified by
273 AndData, and writes the result to the 64-bit MSR specified by Index. The
274 lower 32-bits of the value written to the MSR are returned. Extra left bits
275 in both AndData and OrData are stripped. The caller must either guarantee
276 that Index and the data written is valid, or the caller must set up exception
277 handlers to catch the exceptions. This function is only available on IA-32
278 and X64.
279
280 If StartBit is greater than 31, then ASSERT().
281 If EndBit is greater than 31, then ASSERT().
282 If EndBit is less than StartBit, then ASSERT().
283
284 @param Index The 32-bit MSR index to write.
285 @param StartBit The ordinal of the least significant bit in the bit field.
286 Range 0..31.
287 @param EndBit The ordinal of the most significant bit in the bit field.
288 Range 0..31.
289 @param AndData The value to AND with the read value from the MSR.
290 @param OrData The value to OR with the result of the AND operation.
291
292 @return The lower 32-bit of the value written to the MSR.
293
294 **/
295 UINT32
296 EFIAPI
297 AsmMsrBitFieldAndThenOr32 (
298 IN UINT32 Index,
299 IN UINTN StartBit,
300 IN UINTN EndBit,
301 IN UINT32 AndData,
302 IN UINT32 OrData
303 )
304 {
305 ASSERT (EndBit < sizeof (AndData) * 8);
306 ASSERT (StartBit <= EndBit);
307 return (UINT32)AsmMsrBitFieldAndThenOr64 (
308 Index,
309 StartBit,
310 EndBit,
311 AndData,
312 OrData
313 );
314 }
315
316 /**
317 Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
318 back to the 64-bit MSR.
319
320 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
321 between the read result and the value specified by OrData, and writes the
322 result to the 64-bit MSR specified by Index. The value written to the MSR is
323 returned. No parameter checking is performed on Index or OrData, and some of
324 these may cause CPU exceptions. The caller must either guarantee that Index
325 and OrData are valid, or the caller must establish proper exception handlers.
326 This function is only available on IA-32 and X64.
327
328 @param Index The 32-bit MSR index to write.
329 @param OrData The value to OR with the read value from the MSR.
330
331 @return The value written back to the MSR.
332
333 **/
334 UINT64
335 EFIAPI
336 AsmMsrOr64 (
337 IN UINT32 Index,
338 IN UINT64 OrData
339 )
340 {
341 return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);
342 }
343
344 /**
345 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
346 64-bit MSR.
347
348 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
349 read result and the value specified by OrData, and writes the result to the
350 64-bit MSR specified by Index. The value written to the MSR is returned. No
351 parameter checking is performed on Index or OrData, and some of these may
352 cause CPU exceptions. The caller must either guarantee that Index and OrData
353 are valid, or the caller must establish proper exception handlers. This
354 function is only available on IA-32 and X64.
355
356 @param Index The 32-bit MSR index to write.
357 @param AndData The value to AND with the read value from the MSR.
358
359 @return The value written back to the MSR.
360
361 **/
362 UINT64
363 EFIAPI
364 AsmMsrAnd64 (
365 IN UINT32 Index,
366 IN UINT64 AndData
367 )
368 {
369 return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);
370 }
371
372 /**
373 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
374 OR, and writes the result back to the 64-bit MSR.
375
376 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
377 result and the value specified by AndData, performs a bitwise inclusive OR
378 between the result of the AND operation and the value specified by OrData,
379 and writes the result to the 64-bit MSR specified by Index. The value written
380 to the MSR is returned. No parameter checking is performed on Index, AndData,
381 or OrData, and some of these may cause CPU exceptions. The caller must either
382 guarantee that Index, AndData, and OrData are valid, or the caller must
383 establish proper exception handlers. This function is only available on IA-32
384 and X64.
385
386 @param Index The 32-bit MSR index to write.
387 @param AndData The value to AND with the read value from the MSR.
388 @param OrData The value to OR with the result of the AND operation.
389
390 @return The value written back to the MSR.
391
392 **/
393 UINT64
394 EFIAPI
395 AsmMsrAndThenOr64 (
396 IN UINT32 Index,
397 IN UINT64 AndData,
398 IN UINT64 OrData
399 )
400 {
401 return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);
402 }
403
404 /**
405 Reads a bit field of an MSR.
406
407 Reads the bit field in the 64-bit MSR. The bit field is specified by the
408 StartBit and the EndBit. The value of the bit field is returned. The caller
409 must either guarantee that Index is valid, or the caller must set up
410 exception handlers to catch the exceptions. This function is only available
411 on IA-32 and X64.
412
413 If StartBit is greater than 63, then ASSERT().
414 If EndBit is greater than 63, then ASSERT().
415 If EndBit is less than StartBit, then ASSERT().
416
417 @param Index The 32-bit MSR index to read.
418 @param StartBit The ordinal of the least significant bit in the bit field.
419 Range 0..63.
420 @param EndBit The ordinal of the most significant bit in the bit field.
421 Range 0..63.
422
423 @return The value written back to the MSR.
424
425 **/
426 UINT64
427 EFIAPI
428 AsmMsrBitFieldRead64 (
429 IN UINT32 Index,
430 IN UINTN StartBit,
431 IN UINTN EndBit
432 )
433 {
434 return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);
435 }
436
437 /**
438 Writes a bit field to an MSR.
439
440 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
441 the StartBit and the EndBit. All other bits in the destination MSR are
442 preserved. The MSR written is returned. Extra left bits in Value are
443 stripped. The caller must either guarantee that Index and the data written is
444 valid, or the caller must set up exception handlers to catch the exceptions.
445 This function is only available on IA-32 and X64.
446
447 If StartBit is greater than 63, then ASSERT().
448 If EndBit is greater than 63, then ASSERT().
449 If EndBit is less than StartBit, then ASSERT().
450
451 @param Index The 32-bit MSR index to write.
452 @param StartBit The ordinal of the least significant bit in the bit field.
453 Range 0..63.
454 @param EndBit The ordinal of the most significant bit in the bit field.
455 Range 0..63.
456 @param Value New value of the bit field.
457
458 @return The value written back to the MSR.
459
460 **/
461 UINT64
462 EFIAPI
463 AsmMsrBitFieldWrite64 (
464 IN UINT32 Index,
465 IN UINTN StartBit,
466 IN UINTN EndBit,
467 IN UINT64 Value
468 )
469 {
470 return AsmWriteMsr64 (
471 Index,
472 BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)
473 );
474 }
475
476 /**
477 Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
478 writes the result back to the bit field in the 64-bit MSR.
479
480 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
481 between the read result and the value specified by OrData, and writes the
482 result to the 64-bit MSR specified by Index. The value written to the MSR is
483 returned. Extra left bits in OrData are stripped. The caller must either
484 guarantee that Index and the data written is valid, or the caller must set up
485 exception handlers to catch the exceptions. This function is only available
486 on IA-32 and X64.
487
488 If StartBit is greater than 63, then ASSERT().
489 If EndBit is greater than 63, then ASSERT().
490 If EndBit is less than StartBit, then ASSERT().
491
492 @param Index The 32-bit MSR index to write.
493 @param StartBit The ordinal of the least significant bit in the bit field.
494 Range 0..63.
495 @param EndBit The ordinal of the most significant bit in the bit field.
496 Range 0..63.
497 @param OrData The value to OR with the read value from the bit field.
498
499 @return The value written back to the MSR.
500
501 **/
502 UINT64
503 EFIAPI
504 AsmMsrBitFieldOr64 (
505 IN UINT32 Index,
506 IN UINTN StartBit,
507 IN UINTN EndBit,
508 IN UINT64 OrData
509 )
510 {
511 return AsmWriteMsr64 (
512 Index,
513 BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)
514 );
515 }
516
517 /**
518 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
519 result back to the bit field in the 64-bit MSR.
520
521 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
522 read result and the value specified by AndData, and writes the result to the
523 64-bit MSR specified by Index. The value written to the MSR is returned.
524 Extra left bits in AndData are stripped. The caller must either guarantee
525 that Index and the data written is valid, or the caller must set up exception
526 handlers to catch the exceptions. This function is only available on IA-32
527 and X64.
528
529 If StartBit is greater than 63, then ASSERT().
530 If EndBit is greater than 63, then ASSERT().
531 If EndBit is less than StartBit, then ASSERT().
532
533 @param Index The 32-bit MSR index to write.
534 @param StartBit The ordinal of the least significant bit in the bit field.
535 Range 0..63.
536 @param EndBit The ordinal of the most significant bit in the bit field.
537 Range 0..63.
538 @param AndData The value to AND with the read value from the bit field.
539
540 @return The value written back to the MSR.
541
542 **/
543 UINT64
544 EFIAPI
545 AsmMsrBitFieldAnd64 (
546 IN UINT32 Index,
547 IN UINTN StartBit,
548 IN UINTN EndBit,
549 IN UINT64 AndData
550 )
551 {
552 return AsmWriteMsr64 (
553 Index,
554 BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)
555 );
556 }
557
558 /**
559 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
560 bitwise inclusive OR, and writes the result back to the bit field in the
561 64-bit MSR.
562
563 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
564 a bitwise inclusive OR between the read result and the value specified by
565 AndData, and writes the result to the 64-bit MSR specified by Index. The
566 value written to the MSR is returned. Extra left bits in both AndData and
567 OrData are stripped. The caller must either guarantee that Index and the data
568 written is valid, or the caller must set up exception handlers to catch the
569 exceptions. This function is only available on IA-32 and X64.
570
571 If StartBit is greater than 63, then ASSERT().
572 If EndBit is greater than 63, then ASSERT().
573 If EndBit is less than StartBit, then ASSERT().
574
575 @param Index The 32-bit MSR index to write.
576 @param StartBit The ordinal of the least significant bit in the bit field.
577 Range 0..63.
578 @param EndBit The ordinal of the most significant bit in the bit field.
579 Range 0..63.
580 @param AndData The value to AND with the read value from the bit field.
581 @param OrData The value to OR with the result of the AND operation.
582
583 @return The value written back to the MSR.
584
585 **/
586 UINT64
587 EFIAPI
588 AsmMsrBitFieldAndThenOr64 (
589 IN UINT32 Index,
590 IN UINTN StartBit,
591 IN UINTN EndBit,
592 IN UINT64 AndData,
593 IN UINT64 OrData
594 )
595 {
596 return AsmWriteMsr64 (
597 Index,
598 BitFieldAndThenOr64 (
599 AsmReadMsr64 (Index),
600 StartBit,
601 EndBit,
602 AndData,
603 OrData
604 )
605 );
606 }
607
608 //
609 // Base Library CPU Functions
610 //
611
612 /**
613 Retrieves the current CPU interrupt state.
614
615 Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
616 currently enabled. Otherwise returns FALSE.
617
618 @retval TRUE CPU interrupts are enabled.
619 @retval FALSE CPU interrupts are disabled.
620
621 **/
622 BOOLEAN
623 EFIAPI
624 GetInterruptState (
625 VOID
626 )
627 {
628 IA32_EFLAGS32 EFlags;
629
630 EFlags.UintN = AsmReadEflags ();
631 return (BOOLEAN)(EFlags.Bits.IF == 1);
632 }
633
634 //
635 // Ia32 and x64 specific functions
636 //
637
638 /**
639 Reads the current Global Descriptor Table Register(GDTR) descriptor.
640
641 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
642 function is only available on IA-32 and X64.
643
644 If Gdtr is NULL, then ASSERT().
645
646 @param Gdtr Pointer to a GDTR descriptor.
647
648 **/
649 VOID
650 EFIAPI
651 AsmReadGdtr (
652 OUT IA32_DESCRIPTOR *Gdtr
653 )
654 {
655 ASSERT (Gdtr != NULL);
656 InternalX86ReadGdtr (Gdtr);
657 }
658
659 /**
660 Writes the current Global Descriptor Table Register (GDTR) descriptor.
661
662 Writes and the current GDTR descriptor specified by Gdtr. This function is
663 only available on IA-32 and X64.
664
665 If Gdtr is NULL, then ASSERT().
666
667 @param Gdtr Pointer to a GDTR descriptor.
668
669 **/
670 VOID
671 EFIAPI
672 AsmWriteGdtr (
673 IN CONST IA32_DESCRIPTOR *Gdtr
674 )
675 {
676 ASSERT (Gdtr != NULL);
677 InternalX86WriteGdtr (Gdtr);
678 }
679
680 /**
681 Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
682
683 Reads and returns the current IDTR descriptor and returns it in Idtr. This
684 function is only available on IA-32 and X64.
685
686 If Idtr is NULL, then ASSERT().
687
688 @param Idtr Pointer to a IDTR descriptor.
689
690 **/
691 VOID
692 EFIAPI
693 AsmReadIdtr (
694 OUT IA32_DESCRIPTOR *Idtr
695 )
696 {
697 ASSERT (Idtr != NULL);
698 InternalX86ReadIdtr (Idtr);
699 }
700
701 /**
702 Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
703
704 Writes the current IDTR descriptor and returns it in Idtr. This function is
705 only available on IA-32 and X64.
706
707 If Idtr is NULL, then ASSERT().
708
709 @param Idtr Pointer to a IDTR descriptor.
710
711 **/
712 VOID
713 EFIAPI
714 AsmWriteIdtr (
715 IN CONST IA32_DESCRIPTOR *Idtr
716 )
717 {
718 ASSERT (Idtr != NULL);
719 InternalX86WriteIdtr (Idtr);
720 }
721
722 /**
723 Save the current floating point/SSE/SSE2 context to a buffer.
724
725 Saves the current floating point/SSE/SSE2 state to the buffer specified by
726 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
727 available on IA-32 and X64.
728
729 If Buffer is NULL, then ASSERT().
730 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
731
732 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
733
734 **/
735 VOID
736 EFIAPI
737 AsmFxSave (
738 OUT IA32_FX_BUFFER *Buffer
739 )
740 {
741 ASSERT (Buffer != NULL);
742 ASSERT (((UINTN)Buffer & 0xf) == 0);
743
744 InternalX86FxSave (Buffer);
745
746 //
747 // Mark one flag at end of Buffer, it will be check by AsmFxRestor()
748 //
749 *(UINT32 *) (&Buffer[sizeof (IA32_FX_BUFFER) - 4]) = 0xAA5555AA;
750 }
751
752 /**
753 Restores the current floating point/SSE/SSE2 context from a buffer.
754
755 Restores the current floating point/SSE/SSE2 state from the buffer specified
756 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
757 only available on IA-32 and X64.
758
759 If Buffer is NULL, then ASSERT().
760 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
761 If Buffer was not saved with AsmFxSave(), then ASSERT().
762
763 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
764
765 **/
766 VOID
767 EFIAPI
768 AsmFxRestore (
769 IN CONST IA32_FX_BUFFER *Buffer
770 )
771 {
772 ASSERT (Buffer != NULL);
773 ASSERT (((UINTN)Buffer & 0xf) == 0);
774
775 //
776 // Check the flag recorded by AsmFxSave()
777 //
778 ASSERT (*(UINT32 *) (&Buffer[sizeof (IA32_FX_BUFFER) - 4]) == 0xAA5555AA);
779
780 InternalX86FxRestore (Buffer);
781 }
782
783 /**
784 Enables the 32-bit paging mode on the CPU.
785
786 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
787 must be properly initialized prior to calling this service. This function
788 assumes the current execution mode is 32-bit protected mode. This function is
789 only available on IA-32. After the 32-bit paging mode is enabled, control is
790 transferred to the function specified by EntryPoint using the new stack
791 specified by NewStack and passing in the parameters specified by Context1 and
792 Context2. Context1 and Context2 are optional and may be NULL. The function
793 EntryPoint must never return.
794
795 If the current execution mode is not 32-bit protected mode, then ASSERT().
796 If EntryPoint is NULL, then ASSERT().
797 If NewStack is NULL, then ASSERT().
798
799 There are a number of constraints that must be followed before calling this
800 function:
801 1) Interrupts must be disabled.
802 2) The caller must be in 32-bit protected mode with flat descriptors. This
803 means all descriptors must have a base of 0 and a limit of 4GB.
804 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
805 descriptors.
806 4) CR3 must point to valid page tables that will be used once the transition
807 is complete, and those page tables must guarantee that the pages for this
808 function and the stack are identity mapped.
809
810 @param EntryPoint A pointer to function to call with the new stack after
811 paging is enabled.
812 @param Context1 A pointer to the context to pass into the EntryPoint
813 function as the first parameter after paging is enabled.
814 @param Context2 A pointer to the context to pass into the EntryPoint
815 function as the second parameter after paging is enabled.
816 @param NewStack A pointer to the new stack to use for the EntryPoint
817 function after paging is enabled.
818
819 **/
820 VOID
821 EFIAPI
822 AsmEnablePaging32 (
823 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
824 IN VOID *Context1, OPTIONAL
825 IN VOID *Context2, OPTIONAL
826 IN VOID *NewStack
827 )
828 {
829 ASSERT (EntryPoint != NULL);
830 ASSERT (NewStack != NULL);
831 InternalX86EnablePaging32 (EntryPoint, Context1, Context2, NewStack);
832 }
833
834 /**
835 Disables the 32-bit paging mode on the CPU.
836
837 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
838 mode. This function assumes the current execution mode is 32-paged protected
839 mode. This function is only available on IA-32. After the 32-bit paging mode
840 is disabled, control is transferred to the function specified by EntryPoint
841 using the new stack specified by NewStack and passing in the parameters
842 specified by Context1 and Context2. Context1 and Context2 are optional and
843 may be NULL. The function EntryPoint must never return.
844
845 If the current execution mode is not 32-bit paged mode, then ASSERT().
846 If EntryPoint is NULL, then ASSERT().
847 If NewStack is NULL, then ASSERT().
848
849 There are a number of constraints that must be followed before calling this
850 function:
851 1) Interrupts must be disabled.
852 2) The caller must be in 32-bit paged mode.
853 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
854 4) CR3 must point to valid page tables that guarantee that the pages for
855 this function and the stack are identity mapped.
856
857 @param EntryPoint A pointer to function to call with the new stack after
858 paging is disabled.
859 @param Context1 A pointer to the context to pass into the EntryPoint
860 function as the first parameter after paging is disabled.
861 @param Context2 A pointer to the context to pass into the EntryPoint
862 function as the second parameter after paging is
863 disabled.
864 @param NewStack A pointer to the new stack to use for the EntryPoint
865 function after paging is disabled.
866
867 **/
868 VOID
869 EFIAPI
870 AsmDisablePaging32 (
871 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
872 IN VOID *Context1, OPTIONAL
873 IN VOID *Context2, OPTIONAL
874 IN VOID *NewStack
875 )
876 {
877 ASSERT (EntryPoint != NULL);
878 ASSERT (NewStack != NULL);
879 InternalX86DisablePaging32 (EntryPoint, Context1, Context2, NewStack);
880 }
881
882 /**
883 Enables the 64-bit paging mode on the CPU.
884
885 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
886 must be properly initialized prior to calling this service. This function
887 assumes the current execution mode is 32-bit protected mode with flat
888 descriptors. This function is only available on IA-32. After the 64-bit
889 paging mode is enabled, control is transferred to the function specified by
890 EntryPoint using the new stack specified by NewStack and passing in the
891 parameters specified by Context1 and Context2. Context1 and Context2 are
892 optional and may be 0. The function EntryPoint must never return.
893
894 If the current execution mode is not 32-bit protected mode with flat
895 descriptors, then ASSERT().
896 If EntryPoint is 0, then ASSERT().
897 If NewStack is 0, then ASSERT().
898
899 @param Cs The 16-bit selector to load in the CS before EntryPoint
900 is called. The descriptor in the GDT that this selector
901 references must be setup for long mode.
902 @param EntryPoint The 64-bit virtual address of the function to call with
903 the new stack after paging is enabled.
904 @param Context1 The 64-bit virtual address of the context to pass into
905 the EntryPoint function as the first parameter after
906 paging is enabled.
907 @param Context2 The 64-bit virtual address of the context to pass into
908 the EntryPoint function as the second parameter after
909 paging is enabled.
910 @param NewStack The 64-bit virtual address of the new stack to use for
911 the EntryPoint function after paging is enabled.
912
913 **/
914 VOID
915 EFIAPI
916 AsmEnablePaging64 (
917 IN UINT16 Cs,
918 IN UINT64 EntryPoint,
919 IN UINT64 Context1, OPTIONAL
920 IN UINT64 Context2, OPTIONAL
921 IN UINT64 NewStack
922 )
923 {
924 ASSERT (EntryPoint != 0);
925 ASSERT (NewStack != 0);
926 InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
927 }
928
929 /**
930 Disables the 64-bit paging mode on the CPU.
931
932 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
933 mode. This function assumes the current execution mode is 64-paging mode.
934 This function is only available on X64. After the 64-bit paging mode is
935 disabled, control is transferred to the function specified by EntryPoint
936 using the new stack specified by NewStack and passing in the parameters
937 specified by Context1 and Context2. Context1 and Context2 are optional and
938 may be 0. The function EntryPoint must never return.
939
940 If the current execution mode is not 64-bit paged mode, then ASSERT().
941 If EntryPoint is 0, then ASSERT().
942 If NewStack is 0, then ASSERT().
943
944 @param Cs The 16-bit selector to load in the CS before EntryPoint
945 is called. The descriptor in the GDT that this selector
946 references must be setup for 32-bit protected mode.
947 @param EntryPoint The 64-bit virtual address of the function to call with
948 the new stack after paging is disabled.
949 @param Context1 The 64-bit virtual address of the context to pass into
950 the EntryPoint function as the first parameter after
951 paging is disabled.
952 @param Context2 The 64-bit virtual address of the context to pass into
953 the EntryPoint function as the second parameter after
954 paging is disabled.
955 @param NewStack The 64-bit virtual address of the new stack to use for
956 the EntryPoint function after paging is disabled.
957
958 **/
959 VOID
960 EFIAPI
961 AsmDisablePaging64 (
962 IN UINT16 Cs,
963 IN UINT32 EntryPoint,
964 IN UINT32 Context1, OPTIONAL
965 IN UINT32 Context2, OPTIONAL
966 IN UINT32 NewStack
967 )
968 {
969 ASSERT (EntryPoint != 0);
970 ASSERT (NewStack != 0);
971 InternalX86DisablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
972 }
973
974 //
975 // x86 version of MemoryFence()
976 //
977
978 /**
979 Used to serialize load and store operations.
980
981 All loads and stores that proceed calls to this function are guaranteed to be
982 globally visible when this function returns.
983
984 **/
985 VOID
986 EFIAPI
987 MemoryFence (
988 VOID
989 )
990 {
991 }