2 Fixes Intel Itanium(TM) specific relocation types.
4 Copyright (c) 2006, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 Module Name: PeCoffLoaderEx.c
21 #define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
22 Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
24 #define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
25 *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
26 ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
28 #define IMM64_IMM7B_INST_WORD_X 3
29 #define IMM64_IMM7B_SIZE_X 7
30 #define IMM64_IMM7B_INST_WORD_POS_X 4
31 #define IMM64_IMM7B_VAL_POS_X 0
33 #define IMM64_IMM9D_INST_WORD_X 3
34 #define IMM64_IMM9D_SIZE_X 9
35 #define IMM64_IMM9D_INST_WORD_POS_X 18
36 #define IMM64_IMM9D_VAL_POS_X 7
38 #define IMM64_IMM5C_INST_WORD_X 3
39 #define IMM64_IMM5C_SIZE_X 5
40 #define IMM64_IMM5C_INST_WORD_POS_X 13
41 #define IMM64_IMM5C_VAL_POS_X 16
43 #define IMM64_IC_INST_WORD_X 3
44 #define IMM64_IC_SIZE_X 1
45 #define IMM64_IC_INST_WORD_POS_X 12
46 #define IMM64_IC_VAL_POS_X 21
48 #define IMM64_IMM41a_INST_WORD_X 1
49 #define IMM64_IMM41a_SIZE_X 10
50 #define IMM64_IMM41a_INST_WORD_POS_X 14
51 #define IMM64_IMM41a_VAL_POS_X 22
53 #define IMM64_IMM41b_INST_WORD_X 1
54 #define IMM64_IMM41b_SIZE_X 8
55 #define IMM64_IMM41b_INST_WORD_POS_X 24
56 #define IMM64_IMM41b_VAL_POS_X 32
58 #define IMM64_IMM41c_INST_WORD_X 2
59 #define IMM64_IMM41c_SIZE_X 23
60 #define IMM64_IMM41c_INST_WORD_POS_X 0
61 #define IMM64_IMM41c_VAL_POS_X 40
63 #define IMM64_SIGN_INST_WORD_X 3
64 #define IMM64_SIGN_SIZE_X 1
65 #define IMM64_SIGN_INST_WORD_POS_X 27
66 #define IMM64_SIGN_VAL_POS_X 63
69 Performs an Itanium-based specific relocation fixup.
71 @param Reloc Pointer to the relocation record.
73 @param Fixup Pointer to the address to fix up.
75 @param FixupData Pointer to a buffer to log the fixups.
77 @param Adjust The offset to adjust the fixup.
83 PeCoffLoaderRelocateImageEx (
86 IN OUT CHAR8
**FixupData
,
93 switch ((*Reloc
) >> 12) {
95 case EFI_IMAGE_REL_BASED_DIR64
:
96 F64
= (UINT64
*) Fixup
;
97 *F64
= *F64
+ (UINT64
) Adjust
;
98 if (*FixupData
!= NULL
) {
99 *FixupData
= ALIGN_POINTER(*FixupData
, sizeof(UINT64
));
100 *(UINT64
*)(*FixupData
) = *F64
;
101 *FixupData
= *FixupData
+ sizeof(UINT64
);
105 case EFI_IMAGE_REL_BASED_IA64_IMM64
:
108 // Align it to bundle address before fixing up the
109 // 64-bit immediate value of the movl instruction.
112 Fixup
= (CHAR8
*)((UINTN
) Fixup
& (UINTN
) ~(15));
113 FixupVal
= (UINT64
)0;
116 // Extract the lower 32 bits of IMM64 from bundle
119 (UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
,
121 IMM64_IMM7B_INST_WORD_POS_X
,
122 IMM64_IMM7B_VAL_POS_X
126 (UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
,
128 IMM64_IMM9D_INST_WORD_POS_X
,
129 IMM64_IMM9D_VAL_POS_X
133 (UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
,
135 IMM64_IMM5C_INST_WORD_POS_X
,
136 IMM64_IMM5C_VAL_POS_X
140 (UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
,
142 IMM64_IC_INST_WORD_POS_X
,
147 (UINT32
*)Fixup
+ IMM64_IMM41a_INST_WORD_X
,
149 IMM64_IMM41a_INST_WORD_POS_X
,
150 IMM64_IMM41a_VAL_POS_X
154 // Update 64-bit address
159 // Insert IMM64 into bundle
162 ((UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
),
164 IMM64_IMM7B_INST_WORD_POS_X
,
165 IMM64_IMM7B_VAL_POS_X
169 ((UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
),
171 IMM64_IMM9D_INST_WORD_POS_X
,
172 IMM64_IMM9D_VAL_POS_X
176 ((UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
),
178 IMM64_IMM5C_INST_WORD_POS_X
,
179 IMM64_IMM5C_VAL_POS_X
183 ((UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
),
185 IMM64_IC_INST_WORD_POS_X
,
190 ((UINT32
*)Fixup
+ IMM64_IMM41a_INST_WORD_X
),
192 IMM64_IMM41a_INST_WORD_POS_X
,
193 IMM64_IMM41a_VAL_POS_X
197 ((UINT32
*)Fixup
+ IMM64_IMM41b_INST_WORD_X
),
199 IMM64_IMM41b_INST_WORD_POS_X
,
200 IMM64_IMM41b_VAL_POS_X
204 ((UINT32
*)Fixup
+ IMM64_IMM41c_INST_WORD_X
),
206 IMM64_IMM41c_INST_WORD_POS_X
,
207 IMM64_IMM41c_VAL_POS_X
211 ((UINT32
*)Fixup
+ IMM64_SIGN_INST_WORD_X
),
213 IMM64_SIGN_INST_WORD_POS_X
,
217 F64
= (UINT64
*) Fixup
;
218 if (*FixupData
!= NULL
) {
219 *FixupData
= ALIGN_POINTER(*FixupData
, sizeof(UINT64
));
220 *(UINT64
*)(*FixupData
) = *F64
;
221 *FixupData
= *FixupData
+ sizeof(UINT64
);
226 return RETURN_UNSUPPORTED
;
229 return RETURN_SUCCESS
;