BaseMemoryLib: Add missing ASSERT()s for some interfaces.
[mirror_edk2.git] / MdePkg / Library / DxeIoLibCpuIo / IoLib.c
1 /** @file
2 I/O Library.
3
4 Copyright (c) 2006, Intel Corporation<BR>
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 Module Name: IoLib.c
14
15 **/
16
17 //
18 // Globle varible to cache pointer to CpuIo protocol.
19 //
20 STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;
21
22 /**
23 The constructor function caches the pointer to CpuIo protocol.
24
25 The constructor function locates CpuIo protocol from protocol database.
26 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
27
28 @param ImageHandle The firmware allocated handle for the EFI image.
29 @param SystemTable A pointer to the EFI System Table.
30
31 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
32
33 **/
34 EFI_STATUS
35 IoLibConstructor (
36 IN EFI_HANDLE ImageHandle,
37 IN EFI_SYSTEM_TABLE *SystemTable
38 )
39 {
40 EFI_STATUS Status;
41
42 Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID**) &mCpuIo);
43 ASSERT_EFI_ERROR (Status);
44
45 return Status;
46 }
47
48 /**
49 Reads registers in the EFI CPU I/O space.
50
51 Reads the I/O port specified by Port with registers width specified by Width.
52 The read value is returned. If such operations are not supported, then ASSERT().
53 This function must guarantee that all I/O read and write operations are serialized.
54
55 @param Port The base address of the I/O operation.
56 The caller is responsible for aligning the Address if required.
57 @param Width The width of the I/O operation.
58
59 @return Data read from registers in the EFI CPU I/O space.
60
61 **/
62 UINT64
63 EFIAPI
64 IoReadWorker (
65 IN UINTN Port,
66 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
67 )
68 {
69 EFI_STATUS Status;
70 UINT64 Data;
71
72 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
73 ASSERT_EFI_ERROR (Status);
74
75 return Data;
76 }
77
78 /**
79 Writes registers in the EFI CPU I/O space.
80
81 Writes the I/O port specified by Port with registers width and value specified by Width
82 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
83 This function must guarantee that all I/O read and write operations are serialized.
84
85 @param Port The base address of the I/O operation.
86 The caller is responsible for aligning the Address if required.
87 @param Width The width of the I/O operation.
88 @param Data The value to write to the I/O port.
89
90 @return The paramter of Data.
91
92 **/
93 UINT64
94 EFIAPI
95 IoWriteWorker (
96 IN UINTN Port,
97 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
98 IN UINT64 Data
99 )
100 {
101 EFI_STATUS Status;
102
103 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
104 ASSERT_EFI_ERROR (Status);
105
106 return Data;
107 }
108
109 /**
110 Reads memory-mapped registers in the EFI system memory space.
111
112 Reads the MMIO registers specified by Address with registers width specified by Width.
113 The read value is returned. If such operations are not supported, then ASSERT().
114 This function must guarantee that all MMIO read and write operations are serialized.
115
116 @param Address The MMIO register to read.
117 The caller is responsible for aligning the Address if required.
118 @param Width The width of the I/O operation.
119
120 @return Data read from registers in the EFI system memory space.
121
122 **/
123 UINT64
124 EFIAPI
125 MmioReadWorker (
126 IN UINTN Address,
127 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
128 )
129 {
130 EFI_STATUS Status;
131 UINT64 Data;
132
133 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
134 ASSERT_EFI_ERROR (Status);
135
136 return Data;
137 }
138
139 /**
140 Writes memory-mapped registers in the EFI system memory space.
141
142 Writes the MMIO registers specified by Address with registers width and value specified by Width
143 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
144 This function must guarantee that all MMIO read and write operations are serialized.
145
146 @param Address The MMIO register to read.
147 The caller is responsible for aligning the Address if required.
148 @param Width The width of the I/O operation.
149
150 @return Data read from registers in the EFI system memory space.
151
152 **/
153 UINT64
154 EFIAPI
155 MmioWriteWorker (
156 IN UINTN Address,
157 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
158 IN UINT64 Data
159 )
160 {
161 EFI_STATUS Status;
162
163 Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
164 ASSERT_EFI_ERROR (Status);
165
166 return Data;
167 }
168
169 /**
170 Reads an 8-bit I/O port.
171
172 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
173 This function must guarantee that all I/O read and write operations are
174 serialized.
175
176 If 8-bit I/O port operations are not supported, then ASSERT().
177
178 @param Port The I/O port to read.
179
180 @return The value read.
181
182 **/
183 UINT8
184 EFIAPI
185 IoRead8 (
186 IN UINTN Port
187 )
188 {
189 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
190 }
191
192 /**
193 Writes an 8-bit I/O port.
194
195 Writes the 8-bit I/O port specified by Port with the value specified by Value
196 and returns Value. This function must guarantee that all I/O read and write
197 operations are serialized.
198
199 If 8-bit I/O port operations are not supported, then ASSERT().
200
201 @param Port The I/O port to write.
202 @param Value The value to write to the I/O port.
203
204 @return The value written the I/O port.
205
206 **/
207 UINT8
208 EFIAPI
209 IoWrite8 (
210 IN UINTN Port,
211 IN UINT8 Value
212 )
213 {
214 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
215 }
216
217 /**
218 Reads a 16-bit I/O port.
219
220 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
221 This function must guarantee that all I/O read and write operations are
222 serialized.
223
224 If 16-bit I/O port operations are not supported, then ASSERT().
225
226 @param Port The I/O port to read.
227
228 @return The value read.
229
230 **/
231 UINT16
232 EFIAPI
233 IoRead16 (
234 IN UINTN Port
235 )
236 {
237 //
238 // Make sure Port is aligned on a 16-bit boundary.
239 //
240 ASSERT ((Port & 1) == 0);
241 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
242 }
243
244 /**
245 Writes a 16-bit I/O port.
246
247 Writes the 16-bit I/O port specified by Port with the value specified by Value
248 and returns Value. This function must guarantee that all I/O read and write
249 operations are serialized.
250
251 If 16-bit I/O port operations are not supported, then ASSERT().
252
253 @param Port The I/O port to write.
254 @param Value The value to write to the I/O port.
255
256 @return The value written the I/O port.
257
258 **/
259 UINT16
260 EFIAPI
261 IoWrite16 (
262 IN UINTN Port,
263 IN UINT16 Value
264 )
265 {
266 //
267 // Make sure Port is aligned on a 16-bit boundary.
268 //
269 ASSERT ((Port & 1) == 0);
270 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
271 }
272
273 /**
274 Reads a 32-bit I/O port.
275
276 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
277 This function must guarantee that all I/O read and write operations are
278 serialized.
279
280 If 32-bit I/O port operations are not supported, then ASSERT().
281
282 @param Port The I/O port to read.
283
284 @return The value read.
285
286 **/
287 UINT32
288 EFIAPI
289 IoRead32 (
290 IN UINTN Port
291 )
292 {
293 //
294 // Make sure Port is aligned on a 32-bit boundary.
295 //
296 ASSERT ((Port & 3) == 0);
297 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
298 }
299
300 /**
301 Writes a 32-bit I/O port.
302
303 Writes the 32-bit I/O port specified by Port with the value specified by Value
304 and returns Value. This function must guarantee that all I/O read and write
305 operations are serialized.
306
307 If 32-bit I/O port operations are not supported, then ASSERT().
308
309 @param Port The I/O port to write.
310 @param Value The value to write to the I/O port.
311
312 @return The value written the I/O port.
313
314 **/
315 UINT32
316 EFIAPI
317 IoWrite32 (
318 IN UINTN Port,
319 IN UINT32 Value
320 )
321 {
322 //
323 // Make sure Port is aligned on a 32-bit boundary.
324 //
325 ASSERT ((Port & 3) == 0);
326 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
327 }
328
329 /**
330 Reads a 64-bit I/O port.
331
332 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
333 This function must guarantee that all I/O read and write operations are
334 serialized.
335
336 If 64-bit I/O port operations are not supported, then ASSERT().
337
338 @param Port The I/O port to read.
339
340 @return The value read.
341
342 **/
343 UINT64
344 EFIAPI
345 IoRead64 (
346 IN UINTN Port
347 )
348 {
349 //
350 // Make sure Port is aligned on a 64-bit boundary.
351 //
352 ASSERT ((Port & 7) == 0);
353 return IoReadWorker (Port, EfiCpuIoWidthUint64);
354 }
355
356 /**
357 Writes a 64-bit I/O port.
358
359 Writes the 64-bit I/O port specified by Port with the value specified by Value
360 and returns Value. This function must guarantee that all I/O read and write
361 operations are serialized.
362
363 If 64-bit I/O port operations are not supported, then ASSERT().
364
365 @param Port The I/O port to write.
366 @param Value The value to write to the I/O port.
367
368 @return The value written the I/O port.
369
370 **/
371 UINT64
372 EFIAPI
373 IoWrite64 (
374 IN UINTN Port,
375 IN UINT64 Value
376 )
377 {
378 //
379 // Make sure Port is aligned on a 64-bit boundary.
380 //
381 ASSERT ((Port & 7) == 0);
382 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
383 }
384
385 /**
386 Reads an 8-bit MMIO register.
387
388 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
389 returned. This function must guarantee that all MMIO read and write
390 operations are serialized.
391
392 If 8-bit MMIO register operations are not supported, then ASSERT().
393
394 @param Address The MMIO register to read.
395
396 @return The value read.
397
398 **/
399 UINT8
400 EFIAPI
401 MmioRead8 (
402 IN UINTN Address
403 )
404 {
405 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
406 }
407
408 /**
409 Writes an 8-bit MMIO register.
410
411 Writes the 8-bit MMIO register specified by Address with the value specified
412 by Value and returns Value. This function must guarantee that all MMIO read
413 and write operations are serialized.
414
415 If 8-bit MMIO register operations are not supported, then ASSERT().
416
417 @param Address The MMIO register to write.
418 @param Value The value to write to the MMIO register.
419
420 **/
421 UINT8
422 EFIAPI
423 MmioWrite8 (
424 IN UINTN Address,
425 IN UINT8 Value
426 )
427 {
428 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
429 }
430
431 /**
432 Reads a 16-bit MMIO register.
433
434 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
435 returned. This function must guarantee that all MMIO read and write
436 operations are serialized.
437
438 If 16-bit MMIO register operations are not supported, then ASSERT().
439
440 @param Address The MMIO register to read.
441
442 @return The value read.
443
444 **/
445 UINT16
446 EFIAPI
447 MmioRead16 (
448 IN UINTN Address
449 )
450 {
451 //
452 // Make sure Address is aligned on a 16-bit boundary.
453 //
454 ASSERT ((Address & 1) == 0);
455 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
456 }
457
458 /**
459 Writes a 16-bit MMIO register.
460
461 Writes the 16-bit MMIO register specified by Address with the value specified
462 by Value and returns Value. This function must guarantee that all MMIO read
463 and write operations are serialized.
464
465 If 16-bit MMIO register operations are not supported, then ASSERT().
466
467 @param Address The MMIO register to write.
468 @param Value The value to write to the MMIO register.
469
470 **/
471 UINT16
472 EFIAPI
473 MmioWrite16 (
474 IN UINTN Address,
475 IN UINT16 Value
476 )
477 {
478 //
479 // Make sure Address is aligned on a 16-bit boundary.
480 //
481 ASSERT ((Address & 1) == 0);
482 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
483 }
484
485 /**
486 Reads a 32-bit MMIO register.
487
488 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
489 returned. This function must guarantee that all MMIO read and write
490 operations are serialized.
491
492 If 32-bit MMIO register operations are not supported, then ASSERT().
493
494 @param Address The MMIO register to read.
495
496 @return The value read.
497
498 **/
499 UINT32
500 EFIAPI
501 MmioRead32 (
502 IN UINTN Address
503 )
504 {
505 //
506 // Make sure Address is aligned on a 32-bit boundary.
507 //
508 ASSERT ((Address & 3) == 0);
509 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
510 }
511
512 /**
513 Writes a 32-bit MMIO register.
514
515 Writes the 32-bit MMIO register specified by Address with the value specified
516 by Value and returns Value. This function must guarantee that all MMIO read
517 and write operations are serialized.
518
519 If 32-bit MMIO register operations are not supported, then ASSERT().
520
521 @param Address The MMIO register to write.
522 @param Value The value to write to the MMIO register.
523
524 **/
525 UINT32
526 EFIAPI
527 MmioWrite32 (
528 IN UINTN Address,
529 IN UINT32 Value
530 )
531 {
532 //
533 // Make sure Address is aligned on a 32-bit boundary.
534 //
535 ASSERT ((Address & 3) == 0);
536 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
537 }
538
539 /**
540 Reads a 64-bit MMIO register.
541
542 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
543 returned. This function must guarantee that all MMIO read and write
544 operations are serialized.
545
546 If 64-bit MMIO register operations are not supported, then ASSERT().
547
548 @param Address The MMIO register to read.
549
550 @return The value read.
551
552 **/
553 UINT64
554 EFIAPI
555 MmioRead64 (
556 IN UINTN Address
557 )
558 {
559 //
560 // Make sure Address is aligned on a 64-bit boundary.
561 //
562 ASSERT ((Address & 7) == 0);
563 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
564 }
565
566 /**
567 Writes a 64-bit MMIO register.
568
569 Writes the 64-bit MMIO register specified by Address with the value specified
570 by Value and returns Value. This function must guarantee that all MMIO read
571 and write operations are serialized.
572
573 If 64-bit MMIO register operations are not supported, then ASSERT().
574
575 @param Address The MMIO register to write.
576 @param Value The value to write to the MMIO register.
577
578 **/
579 UINT64
580 EFIAPI
581 MmioWrite64 (
582 IN UINTN Address,
583 IN UINT64 Value
584 )
585 {
586 //
587 // Make sure Address is aligned on a 64-bit boundary.
588 //
589 ASSERT ((Address & 7) == 0);
590 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
591 }