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1 /** @file
2 I/O Library basic function implementation and worker functions.
3
4 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php.
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #include "DxeIoLibEsalInternal.h"
18
19 /**
20 Reads registers in the EFI CPU I/O space.
21
22 Reads the I/O port specified by Port with registers width specified by Width.
23 The read value is returned.
24
25 This function must guarantee that all I/O read and write operations are serialized.
26 If such operations are not supported, then ASSERT().
27
28 @param Port The base address of the I/O operation.
29 The caller is responsible for aligning the Address if required.
30 @param Width The width of the I/O operation.
31
32 @return Data read from registers in the EFI CPU I/O space.
33
34 **/
35 UINT64
36 EFIAPI
37 IoReadWorker (
38 IN UINTN Port,
39 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
40 )
41 {
42 SAL_RETURN_REGS ReturnReg;
43 UINT64 Data;
44
45 Data = 0;
46
47 ReturnReg = EsalCall (
48 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
49 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
50 IoReadFunctionId,
51 (UINT64)Width,
52 Port,
53 1,
54 (UINT64)&Data,
55 0,
56 0,
57 0
58 );
59 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
60 return Data;
61 }
62
63 /**
64 Writes registers in the EFI CPU I/O space.
65
66 Writes the I/O port specified by Port with registers width and value specified by Width
67 and Data respectively. Data is returned.
68
69 This function must guarantee that all I/O read and write operations are serialized.
70 If such operations are not supported, then ASSERT().
71
72 @param Port The base address of the I/O operation.
73 The caller is responsible for aligning the Address if required.
74 @param Width The width of the I/O operation.
75 @param Data The value to write to the I/O port.
76
77 @return The parameter of Data.
78
79 **/
80 UINT64
81 EFIAPI
82 IoWriteWorker (
83 IN UINTN Port,
84 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
85 IN UINT64 Data
86 )
87 {
88 SAL_RETURN_REGS ReturnReg;
89
90 ReturnReg = EsalCall (
91 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
92 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
93 IoWriteFunctionId,
94 (UINT64)Width,
95 Port,
96 1,
97 (UINT64)&Data,
98 0,
99 0,
100 0
101 );
102 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
103 return Data;
104 }
105
106 /**
107 Reads registers in the EFI CPU I/O space.
108
109 Reads the I/O port specified by Port with registers width specified by Width.
110 The port is read Count times, and the read data is stored in the provided Buffer.
111
112 This function must guarantee that all I/O read and write operations are serialized.
113 If such operations are not supported, then ASSERT().
114
115 @param Port The base address of the I/O operation.
116 The caller is responsible for aligning the Address if required.
117 @param Width The width of the I/O operation.
118 @param Count The number of times to read I/O port.
119 @param Buffer The buffer to store the read data into.
120
121 **/
122 VOID
123 EFIAPI
124 IoReadFifoWorker (
125 IN UINTN Port,
126 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
127 IN UINTN Count,
128 IN VOID *Buffer
129 )
130 {
131 SAL_RETURN_REGS ReturnReg;
132
133 ReturnReg = EsalCall (
134 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
135 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
136 IoReadFunctionId,
137 (UINT64)Width,
138 Port,
139 Count,
140 (UINT64)Buffer,
141 0,
142 0,
143 0
144 );
145 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
146 }
147
148 /**
149 Writes registers in the EFI CPU I/O space.
150
151 Writes the I/O port specified by Port with registers width specified by Width.
152 The port is written Count times, and the write data is retrieved from the provided Buffer.
153
154 This function must guarantee that all I/O read and write operations are serialized.
155 If such operations are not supported, then ASSERT().
156
157 @param Port The base address of the I/O operation.
158 The caller is responsible for aligning the Address if required.
159 @param Width The width of the I/O operation.
160 @param Count The number of times to write I/O port.
161 @param Buffer The buffer to store the read data into.
162
163 **/
164 VOID
165 EFIAPI
166 IoWriteFifoWorker (
167 IN UINTN Port,
168 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
169 IN UINTN Count,
170 IN VOID *Buffer
171 )
172 {
173 SAL_RETURN_REGS ReturnReg;
174
175 ReturnReg = EsalCall (
176 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
177 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
178 IoWriteFunctionId,
179 (UINT64)Width,
180 Port,
181 Count,
182 (UINT64)Buffer,
183 0,
184 0,
185 0
186 );
187 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
188 }
189
190 /**
191 Reads memory-mapped registers in the EFI system memory space.
192
193 Reads the MMIO registers specified by Address with registers width specified by Width.
194 The read value is returned. If such operations are not supported, then ASSERT().
195 This function must guarantee that all MMIO read and write operations are serialized.
196
197 @param Address The MMIO register to read.
198 The caller is responsible for aligning the Address if required.
199 @param Width The width of the I/O operation.
200
201 @return Data read from registers in the EFI system memory space.
202
203 **/
204 UINT64
205 EFIAPI
206 MmioReadWorker (
207 IN UINTN Address,
208 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
209 )
210 {
211 SAL_RETURN_REGS ReturnReg;
212 UINT64 Data;
213
214 Data = 0;
215
216 ReturnReg = EsalCall (
217 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
218 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
219 MemReadFunctionId,
220 (UINT64)Width,
221 Address,
222 1,
223 (UINT64)&Data,
224 0,
225 0,
226 0
227 );
228 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
229 return Data;
230 }
231
232 /**
233 Writes memory-mapped registers in the EFI system memory space.
234
235 Writes the MMIO registers specified by Address with registers width and value specified by Width
236 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
237 This function must guarantee that all MMIO read and write operations are serialized.
238
239 @param Address The MMIO register to read.
240 The caller is responsible for aligning the Address if required.
241 @param Width The width of the I/O operation.
242 @param Data The value to write to memory-mapped registers
243
244 @return Data read from registers in the EFI system memory space.
245
246 **/
247 UINT64
248 EFIAPI
249 MmioWriteWorker (
250 IN UINTN Address,
251 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
252 IN UINT64 Data
253 )
254 {
255 SAL_RETURN_REGS ReturnReg;
256
257 ReturnReg = EsalCall (
258 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
259 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
260 MemWriteFunctionId,
261 (UINT64)Width,
262 Address,
263 1,
264 (UINT64)&Data,
265 0,
266 0,
267 0
268 );
269 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
270 return Data;
271 }
272
273 /**
274 Reads an 8-bit I/O port.
275
276 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
277 This function must guarantee that all I/O read and write operations are
278 serialized.
279
280 If 8-bit I/O port operations are not supported, then ASSERT().
281
282 @param Port The I/O port to read.
283
284 @return The value read.
285
286 **/
287 UINT8
288 EFIAPI
289 IoRead8 (
290 IN UINTN Port
291 )
292 {
293 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
294 }
295
296 /**
297 Writes an 8-bit I/O port.
298
299 Writes the 8-bit I/O port specified by Port with the value specified by Value
300 and returns Value. This function must guarantee that all I/O read and write
301 operations are serialized.
302
303 If 8-bit I/O port operations are not supported, then ASSERT().
304
305 @param Port The I/O port to write.
306 @param Value The value to write to the I/O port.
307
308 @return The value written the I/O port.
309
310 **/
311 UINT8
312 EFIAPI
313 IoWrite8 (
314 IN UINTN Port,
315 IN UINT8 Value
316 )
317 {
318 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
319 }
320
321 /**
322 Reads a 16-bit I/O port.
323
324 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
325 This function must guarantee that all I/O read and write operations are
326 serialized.
327
328 If 16-bit I/O port operations are not supported, then ASSERT().
329
330 @param Port The I/O port to read.
331
332 @return The value read.
333
334 **/
335 UINT16
336 EFIAPI
337 IoRead16 (
338 IN UINTN Port
339 )
340 {
341 //
342 // Make sure Port is aligned on a 16-bit boundary.
343 //
344 ASSERT ((Port & 1) == 0);
345 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
346 }
347
348 /**
349 Writes a 16-bit I/O port.
350
351 Writes the 16-bit I/O port specified by Port with the value specified by Value
352 and returns Value. This function must guarantee that all I/O read and write
353 operations are serialized.
354
355 If 16-bit I/O port operations are not supported, then ASSERT().
356
357 @param Port The I/O port to write.
358 @param Value The value to write to the I/O port.
359
360 @return The value written the I/O port.
361
362 **/
363 UINT16
364 EFIAPI
365 IoWrite16 (
366 IN UINTN Port,
367 IN UINT16 Value
368 )
369 {
370 //
371 // Make sure Port is aligned on a 16-bit boundary.
372 //
373 ASSERT ((Port & 1) == 0);
374 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
375 }
376
377 /**
378 Reads a 32-bit I/O port.
379
380 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
381 This function must guarantee that all I/O read and write operations are
382 serialized.
383
384 If 32-bit I/O port operations are not supported, then ASSERT().
385
386 @param Port The I/O port to read.
387
388 @return The value read.
389
390 **/
391 UINT32
392 EFIAPI
393 IoRead32 (
394 IN UINTN Port
395 )
396 {
397 //
398 // Make sure Port is aligned on a 32-bit boundary.
399 //
400 ASSERT ((Port & 3) == 0);
401 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
402 }
403
404 /**
405 Writes a 32-bit I/O port.
406
407 Writes the 32-bit I/O port specified by Port with the value specified by Value
408 and returns Value. This function must guarantee that all I/O read and write
409 operations are serialized.
410
411 If 32-bit I/O port operations are not supported, then ASSERT().
412
413 @param Port The I/O port to write.
414 @param Value The value to write to the I/O port.
415
416 @return The value written the I/O port.
417
418 **/
419 UINT32
420 EFIAPI
421 IoWrite32 (
422 IN UINTN Port,
423 IN UINT32 Value
424 )
425 {
426 //
427 // Make sure Port is aligned on a 32-bit boundary.
428 //
429 ASSERT ((Port & 3) == 0);
430 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
431 }
432
433 /**
434 Reads a 64-bit I/O port.
435
436 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
437 This function must guarantee that all I/O read and write operations are
438 serialized.
439
440 If 64-bit I/O port operations are not supported, then ASSERT().
441
442 @param Port The I/O port to read.
443
444 @return The value read.
445
446 **/
447 UINT64
448 EFIAPI
449 IoRead64 (
450 IN UINTN Port
451 )
452 {
453 //
454 // Make sure Port is aligned on a 64-bit boundary.
455 //
456 ASSERT ((Port & 7) == 0);
457 return IoReadWorker (Port, EfiCpuIoWidthUint64);
458 }
459
460 /**
461 Writes a 64-bit I/O port.
462
463 Writes the 64-bit I/O port specified by Port with the value specified by Value
464 and returns Value. This function must guarantee that all I/O read and write
465 operations are serialized.
466
467 If 64-bit I/O port operations are not supported, then ASSERT().
468
469 @param Port The I/O port to write.
470 @param Value The value to write to the I/O port.
471
472 @return The value written the I/O port.
473
474 **/
475 UINT64
476 EFIAPI
477 IoWrite64 (
478 IN UINTN Port,
479 IN UINT64 Value
480 )
481 {
482 //
483 // Make sure Port is aligned on a 64-bit boundary.
484 //
485 ASSERT ((Port & 7) == 0);
486 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
487 }
488
489 /**
490 Reads an 8-bit I/O port fifo into a block of memory.
491
492 Reads the 8-bit I/O fifo port specified by Port.
493 The port is read Count times, and the read data is
494 stored in the provided Buffer.
495
496 This function must guarantee that all I/O read and write operations are
497 serialized.
498
499 If 8-bit I/O port operations are not supported, then ASSERT().
500
501 @param Port The I/O port to read.
502 @param Count The number of times to read I/O port.
503 @param Buffer The buffer to store the read data into.
504
505 **/
506 VOID
507 EFIAPI
508 IoReadFifo8 (
509 IN UINTN Port,
510 IN UINTN Count,
511 OUT VOID *Buffer
512 )
513 {
514 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
515 }
516
517 /**
518 Writes a block of memory into an 8-bit I/O port fifo.
519
520 Writes the 8-bit I/O fifo port specified by Port.
521 The port is written Count times, and the write data is
522 retrieved from the provided Buffer.
523
524 This function must guarantee that all I/O write and write operations are
525 serialized.
526
527 If 8-bit I/O port operations are not supported, then ASSERT().
528
529 @param Port The I/O port to write.
530 @param Count The number of times to write I/O port.
531 @param Buffer The buffer to retrieve the write data from.
532
533 **/
534 VOID
535 EFIAPI
536 IoWriteFifo8 (
537 IN UINTN Port,
538 IN UINTN Count,
539 IN VOID *Buffer
540 )
541 {
542 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
543 }
544
545 /**
546 Reads a 16-bit I/O port fifo into a block of memory.
547
548 Reads the 16-bit I/O fifo port specified by Port.
549 The port is read Count times, and the read data is
550 stored in the provided Buffer.
551
552 This function must guarantee that all I/O read and write operations are
553 serialized.
554
555 If 16-bit I/O port operations are not supported, then ASSERT().
556
557 @param Port The I/O port to read.
558 @param Count The number of times to read I/O port.
559 @param Buffer The buffer to store the read data into.
560
561 **/
562 VOID
563 EFIAPI
564 IoReadFifo16 (
565 IN UINTN Port,
566 IN UINTN Count,
567 OUT VOID *Buffer
568 )
569 {
570 //
571 // Make sure Port is aligned on a 16-bit boundary.
572 //
573 ASSERT ((Port & 1) == 0);
574 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
575 }
576
577 /**
578 Writes a block of memory into a 16-bit I/O port fifo.
579
580 Writes the 16-bit I/O fifo port specified by Port.
581 The port is written Count times, and the write data is
582 retrieved from the provided Buffer.
583
584 This function must guarantee that all I/O write and write operations are
585 serialized.
586
587 If 16-bit I/O port operations are not supported, then ASSERT().
588
589 @param Port The I/O port to write.
590 @param Count The number of times to write I/O port.
591 @param Buffer The buffer to retrieve the write data from.
592
593 **/
594 VOID
595 EFIAPI
596 IoWriteFifo16 (
597 IN UINTN Port,
598 IN UINTN Count,
599 IN VOID *Buffer
600 )
601 {
602 //
603 // Make sure Port is aligned on a 16-bit boundary.
604 //
605 ASSERT ((Port & 1) == 0);
606 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
607 }
608
609 /**
610 Reads a 32-bit I/O port fifo into a block of memory.
611
612 Reads the 32-bit I/O fifo port specified by Port.
613 The port is read Count times, and the read data is
614 stored in the provided Buffer.
615
616 This function must guarantee that all I/O read and write operations are
617 serialized.
618
619 If 32-bit I/O port operations are not supported, then ASSERT().
620
621 @param Port The I/O port to read.
622 @param Count The number of times to read I/O port.
623 @param Buffer The buffer to store the read data into.
624
625 **/
626 VOID
627 EFIAPI
628 IoReadFifo32 (
629 IN UINTN Port,
630 IN UINTN Count,
631 OUT VOID *Buffer
632 )
633 {
634 //
635 // Make sure Port is aligned on a 32-bit boundary.
636 //
637 ASSERT ((Port & 3) == 0);
638 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
639 }
640
641 /**
642 Writes a block of memory into a 32-bit I/O port fifo.
643
644 Writes the 32-bit I/O fifo port specified by Port.
645 The port is written Count times, and the write data is
646 retrieved from the provided Buffer.
647
648 This function must guarantee that all I/O write and write operations are
649 serialized.
650
651 If 32-bit I/O port operations are not supported, then ASSERT().
652
653 @param Port The I/O port to write.
654 @param Count The number of times to write I/O port.
655 @param Buffer The buffer to retrieve the write data from.
656
657 **/
658 VOID
659 EFIAPI
660 IoWriteFifo32 (
661 IN UINTN Port,
662 IN UINTN Count,
663 IN VOID *Buffer
664 )
665 {
666 //
667 // Make sure Port is aligned on a 32-bit boundary.
668 //
669 ASSERT ((Port & 3) == 0);
670 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
671 }
672
673 /**
674 Reads an 8-bit MMIO register.
675
676 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
677 returned. This function must guarantee that all MMIO read and write
678 operations are serialized.
679
680 If 8-bit MMIO register operations are not supported, then ASSERT().
681
682 @param Address The MMIO register to read.
683
684 @return The value read.
685
686 **/
687 UINT8
688 EFIAPI
689 MmioRead8 (
690 IN UINTN Address
691 )
692 {
693 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
694 }
695
696 /**
697 Writes an 8-bit MMIO register.
698
699 Writes the 8-bit MMIO register specified by Address with the value specified
700 by Value and returns Value. This function must guarantee that all MMIO read
701 and write operations are serialized.
702
703 If 8-bit MMIO register operations are not supported, then ASSERT().
704
705 @param Address The MMIO register to write.
706 @param Value The value to write to the MMIO register.
707
708 **/
709 UINT8
710 EFIAPI
711 MmioWrite8 (
712 IN UINTN Address,
713 IN UINT8 Value
714 )
715 {
716 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
717 }
718
719 /**
720 Reads a 16-bit MMIO register.
721
722 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
723 returned. This function must guarantee that all MMIO read and write
724 operations are serialized.
725
726 If 16-bit MMIO register operations are not supported, then ASSERT().
727
728 @param Address The MMIO register to read.
729
730 @return The value read.
731
732 **/
733 UINT16
734 EFIAPI
735 MmioRead16 (
736 IN UINTN Address
737 )
738 {
739 //
740 // Make sure Address is aligned on a 16-bit boundary.
741 //
742 ASSERT ((Address & 1) == 0);
743 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
744 }
745
746 /**
747 Writes a 16-bit MMIO register.
748
749 Writes the 16-bit MMIO register specified by Address with the value specified
750 by Value and returns Value. This function must guarantee that all MMIO read
751 and write operations are serialized.
752
753 If 16-bit MMIO register operations are not supported, then ASSERT().
754
755 @param Address The MMIO register to write.
756 @param Value The value to write to the MMIO register.
757
758 **/
759 UINT16
760 EFIAPI
761 MmioWrite16 (
762 IN UINTN Address,
763 IN UINT16 Value
764 )
765 {
766 //
767 // Make sure Address is aligned on a 16-bit boundary.
768 //
769 ASSERT ((Address & 1) == 0);
770 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
771 }
772
773 /**
774 Reads a 32-bit MMIO register.
775
776 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
777 returned. This function must guarantee that all MMIO read and write
778 operations are serialized.
779
780 If 32-bit MMIO register operations are not supported, then ASSERT().
781
782 @param Address The MMIO register to read.
783
784 @return The value read.
785
786 **/
787 UINT32
788 EFIAPI
789 MmioRead32 (
790 IN UINTN Address
791 )
792 {
793 //
794 // Make sure Address is aligned on a 32-bit boundary.
795 //
796 ASSERT ((Address & 3) == 0);
797 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
798 }
799
800 /**
801 Writes a 32-bit MMIO register.
802
803 Writes the 32-bit MMIO register specified by Address with the value specified
804 by Value and returns Value. This function must guarantee that all MMIO read
805 and write operations are serialized.
806
807 If 32-bit MMIO register operations are not supported, then ASSERT().
808
809 @param Address The MMIO register to write.
810 @param Value The value to write to the MMIO register.
811
812 **/
813 UINT32
814 EFIAPI
815 MmioWrite32 (
816 IN UINTN Address,
817 IN UINT32 Value
818 )
819 {
820 //
821 // Make sure Address is aligned on a 32-bit boundary.
822 //
823 ASSERT ((Address & 3) == 0);
824 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
825 }
826
827 /**
828 Reads a 64-bit MMIO register.
829
830 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
831 returned. This function must guarantee that all MMIO read and write
832 operations are serialized.
833
834 If 64-bit MMIO register operations are not supported, then ASSERT().
835
836 @param Address The MMIO register to read.
837
838 @return The value read.
839
840 **/
841 UINT64
842 EFIAPI
843 MmioRead64 (
844 IN UINTN Address
845 )
846 {
847 //
848 // Make sure Address is aligned on a 64-bit boundary.
849 //
850 ASSERT ((Address & 7) == 0);
851 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
852 }
853
854 /**
855 Writes a 64-bit MMIO register.
856
857 Writes the 64-bit MMIO register specified by Address with the value specified
858 by Value and returns Value. This function must guarantee that all MMIO read
859 and write operations are serialized.
860
861 If 64-bit MMIO register operations are not supported, then ASSERT().
862
863 @param Address The MMIO register to write.
864 @param Value The value to write to the MMIO register.
865
866 **/
867 UINT64
868 EFIAPI
869 MmioWrite64 (
870 IN UINTN Address,
871 IN UINT64 Value
872 )
873 {
874 //
875 // Make sure Address is aligned on a 64-bit boundary.
876 //
877 ASSERT ((Address & 7) == 0);
878 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
879 }