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1 /** @file
2 I/O Library. The implementations are based on EFI_PEI_SERVICE->CpuIo interface.
3
4 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php.
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17
18 #include <PiPei.h>
19
20 #include <Library/IoLib.h>
21 #include <Library/DebugLib.h>
22 #include <Library/BaseLib.h>
23 #include <Library/PeiServicesTablePointerLib.h>
24
25
26 /**
27 Reads registers in the EFI CPU I/O space.
28
29 Reads the I/O port specified by Port with registers width specified by Width.
30 The port is read Count times, and the read data is stored in the provided Buffer.
31
32 This function must guarantee that all I/O read and write operations are serialized.
33 If such operations are not supported, then ASSERT().
34
35 @param Port The base address of the I/O operation.
36 The caller is responsible for aligning the Address if required.
37 @param Width The width of the I/O operation.
38 @param Count The number of times to read I/O port.
39 @param Buffer The buffer to store the read data into.
40
41 **/
42 VOID
43 EFIAPI
44 IoReadFifoWorker (
45 IN UINTN Port,
46 IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
47 IN UINTN Count,
48 IN VOID *Buffer
49 )
50 {
51 CONST EFI_PEI_SERVICES **PeiServices;
52 EFI_PEI_CPU_IO_PPI *CpuIo;
53 EFI_STATUS Status;
54
55 PeiServices = GetPeiServicesTablePointer ();
56 CpuIo = (*PeiServices)->CpuIo;
57 ASSERT (CpuIo != NULL);
58
59 Status = CpuIo->Io.Read (PeiServices, CpuIo, Width, Port, Count, Buffer);
60 ASSERT_EFI_ERROR (Status);
61 }
62
63 /**
64 Writes registers in the EFI CPU I/O space.
65
66 Writes the I/O port specified by Port with registers width specified by Width.
67 The port is written Count times, and the write data is retrieved from the provided Buffer.
68
69 This function must guarantee that all I/O read and write operations are serialized.
70 If such operations are not supported, then ASSERT().
71
72 @param Port The base address of the I/O operation.
73 The caller is responsible for aligning the Address if required.
74 @param Width The width of the I/O operation.
75 @param Count The number of times to write I/O port.
76 @param Buffer The buffer to store the read data into.
77
78 **/
79 VOID
80 EFIAPI
81 IoWriteFifoWorker (
82 IN UINTN Port,
83 IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
84 IN UINTN Count,
85 IN VOID *Buffer
86 )
87 {
88 CONST EFI_PEI_SERVICES **PeiServices;
89 EFI_PEI_CPU_IO_PPI *CpuIo;
90 EFI_STATUS Status;
91
92 PeiServices = GetPeiServicesTablePointer ();
93 CpuIo = (*PeiServices)->CpuIo;
94 ASSERT (CpuIo != NULL);
95
96 Status = CpuIo->Io.Write (PeiServices, CpuIo, Width, Port, Count, Buffer);
97 ASSERT_EFI_ERROR (Status);
98 }
99
100 /**
101 Reads an 8-bit I/O port.
102
103 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
104 This function must guarantee that all I/O read and write operations are
105 serialized.
106
107 If 8-bit I/O port operations are not supported, then ASSERT().
108
109 @param Port The I/O port to read.
110
111 @return The value read.
112
113 **/
114 UINT8
115 EFIAPI
116 IoRead8 (
117 IN UINTN Port
118 )
119 {
120 CONST EFI_PEI_SERVICES **PeiServices;
121 EFI_PEI_CPU_IO_PPI *CpuIo;
122
123 PeiServices = GetPeiServicesTablePointer ();
124 CpuIo = (*PeiServices)->CpuIo;
125 ASSERT (CpuIo != NULL);
126
127 return CpuIo->IoRead8 (PeiServices, CpuIo, (UINT64) Port);
128 }
129
130 /**
131 Writes an 8-bit I/O port.
132
133 Writes the 8-bit I/O port specified by Port with the value specified by Value
134 and returns Value. This function must guarantee that all I/O read and write
135 operations are serialized.
136
137 If 8-bit I/O port operations are not supported, then ASSERT().
138
139 @param Port The I/O port to write.
140 @param Value The value to write to the I/O port.
141
142 @return The value written the I/O port.
143
144 **/
145 UINT8
146 EFIAPI
147 IoWrite8 (
148 IN UINTN Port,
149 IN UINT8 Value
150 )
151 {
152 CONST EFI_PEI_SERVICES **PeiServices;
153 EFI_PEI_CPU_IO_PPI *CpuIo;
154
155 PeiServices = GetPeiServicesTablePointer ();
156 CpuIo = (*PeiServices)->CpuIo;
157 ASSERT (CpuIo != NULL);
158
159 CpuIo->IoWrite8 (PeiServices, CpuIo, (UINT64) Port, Value);
160 return Value;
161 }
162
163 /**
164 Reads a 16-bit I/O port.
165
166 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
167 This function must guarantee that all I/O read and write operations are
168 serialized.
169
170 If 16-bit I/O port operations are not supported, then ASSERT().
171 If Port is not aligned on a 16-bit boundary, then ASSERT().
172
173 @param Port The I/O port to read.
174
175 @return The value read.
176
177 **/
178 UINT16
179 EFIAPI
180 IoRead16 (
181 IN UINTN Port
182 )
183 {
184 CONST EFI_PEI_SERVICES **PeiServices;
185 EFI_PEI_CPU_IO_PPI *CpuIo;
186
187 PeiServices = GetPeiServicesTablePointer ();
188 CpuIo = (*PeiServices)->CpuIo;
189 ASSERT (CpuIo != NULL);
190 //
191 // Make sure Port is aligned on a 16-bit boundary.
192 //
193 ASSERT ((Port & 1) == 0);
194 return CpuIo->IoRead16 (PeiServices, CpuIo, (UINT64) Port);
195 }
196
197 /**
198 Writes a 16-bit I/O port.
199
200 Writes the 16-bit I/O port specified by Port with the value specified by Value
201 and returns Value. This function must guarantee that all I/O read and write
202 operations are serialized.
203
204 If 16-bit I/O port operations are not supported, then ASSERT().
205 If Port is not aligned on a 16-bit boundary, then ASSERT().
206
207 @param Port The I/O port to write.
208 @param Value The value to write to the I/O port.
209
210 @return The value written the I/O port.
211
212 **/
213 UINT16
214 EFIAPI
215 IoWrite16 (
216 IN UINTN Port,
217 IN UINT16 Value
218 )
219 {
220 CONST EFI_PEI_SERVICES **PeiServices;
221 EFI_PEI_CPU_IO_PPI *CpuIo;
222
223 PeiServices = GetPeiServicesTablePointer ();
224 CpuIo = (*PeiServices)->CpuIo;
225 ASSERT (CpuIo != NULL);
226 //
227 // Make sure Port is aligned on a 16-bit boundary.
228 //
229 ASSERT ((Port & 1) == 0);
230 CpuIo->IoWrite16 (PeiServices, CpuIo, (UINT64) Port, Value);
231 return Value;
232 }
233
234 /**
235 Reads a 32-bit I/O port.
236
237 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
238 This function must guarantee that all I/O read and write operations are
239 serialized.
240
241 If 32-bit I/O port operations are not supported, then ASSERT().
242 If Port is not aligned on a 32-bit boundary, then ASSERT().
243
244 @param Port The I/O port to read.
245
246 @return The value read.
247
248 **/
249 UINT32
250 EFIAPI
251 IoRead32 (
252 IN UINTN Port
253 )
254 {
255 CONST EFI_PEI_SERVICES **PeiServices;
256 EFI_PEI_CPU_IO_PPI *CpuIo;
257
258 PeiServices = GetPeiServicesTablePointer ();
259 CpuIo = (*PeiServices)->CpuIo;
260 ASSERT (CpuIo != NULL);
261 //
262 // Make sure Port is aligned on a 32-bit boundary.
263 //
264 ASSERT ((Port & 3) == 0);
265 return CpuIo->IoRead32 (PeiServices, CpuIo, (UINT64) Port);
266 }
267
268 /**
269 Writes a 32-bit I/O port.
270
271 Writes the 32-bit I/O port specified by Port with the value specified by Value
272 and returns Value. This function must guarantee that all I/O read and write
273 operations are serialized.
274
275 If 32-bit I/O port operations are not supported, then ASSERT().
276 If Port is not aligned on a 32-bit boundary, then ASSERT().
277
278 @param Port The I/O port to write.
279 @param Value The value to write to the I/O port.
280
281 @return The value written the I/O port.
282
283 **/
284 UINT32
285 EFIAPI
286 IoWrite32 (
287 IN UINTN Port,
288 IN UINT32 Value
289 )
290 {
291 CONST EFI_PEI_SERVICES **PeiServices;
292 EFI_PEI_CPU_IO_PPI *CpuIo;
293
294 PeiServices = GetPeiServicesTablePointer ();
295 CpuIo = (*PeiServices)->CpuIo;
296 ASSERT (CpuIo != NULL);
297 //
298 // Make sure Port is aligned on a 32-bit boundary.
299 //
300 ASSERT ((Port & 3) == 0);
301 CpuIo->IoWrite32 (PeiServices, CpuIo, (UINT64) Port, Value);
302 return Value;
303 }
304
305 /**
306 Reads a 64-bit I/O port.
307
308 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
309 This function must guarantee that all I/O read and write operations are
310 serialized.
311
312 If 64-bit I/O port operations are not supported, then ASSERT().
313 If Port is not aligned on a 64-bit boundary, then ASSERT().
314
315 @param Port The I/O port to read.
316
317 @return The value read.
318
319 **/
320 UINT64
321 EFIAPI
322 IoRead64 (
323 IN UINTN Port
324 )
325 {
326 CONST EFI_PEI_SERVICES **PeiServices;
327 EFI_PEI_CPU_IO_PPI *CpuIo;
328
329 PeiServices = GetPeiServicesTablePointer ();
330 CpuIo = (*PeiServices)->CpuIo;
331 ASSERT (CpuIo != NULL);
332 //
333 // Make sure Port is aligned on a 64-bit boundary.
334 //
335 ASSERT ((Port & 7) == 0);
336 return CpuIo->IoRead64 (PeiServices, CpuIo, (UINT64) Port);
337 }
338
339 /**
340 Writes a 64-bit I/O port.
341
342 Writes the 64-bit I/O port specified by Port with the value specified by Value
343 and returns Value. This function must guarantee that all I/O read and write
344 operations are serialized.
345
346 If 64-bit I/O port operations are not supported, then ASSERT().
347 If Port is not aligned on a 64-bit boundary, then ASSERT().
348
349 @param Port The I/O port to write.
350 @param Value The value to write to the I/O port.
351
352 @return The value written the I/O port.
353
354 **/
355 UINT64
356 EFIAPI
357 IoWrite64 (
358 IN UINTN Port,
359 IN UINT64 Value
360 )
361 {
362 CONST EFI_PEI_SERVICES **PeiServices;
363 EFI_PEI_CPU_IO_PPI *CpuIo;
364
365 PeiServices = GetPeiServicesTablePointer ();
366 CpuIo = (*PeiServices)->CpuIo;
367 ASSERT (CpuIo != NULL);
368 //
369 // Make sure Port is aligned on a 64-bit boundary.
370 //
371 ASSERT ((Port & 7) == 0);
372 CpuIo->IoWrite64 (PeiServices, CpuIo, (UINT64) Port, Value);
373 return Value;;
374 }
375
376 /**
377 Reads an 8-bit I/O port fifo into a block of memory.
378
379 Reads the 8-bit I/O fifo port specified by Port.
380 The port is read Count times, and the read data is
381 stored in the provided Buffer.
382
383 This function must guarantee that all I/O read and write operations are
384 serialized.
385
386 If 8-bit I/O port operations are not supported, then ASSERT().
387
388 @param Port The I/O port to read.
389 @param Count The number of times to read I/O port.
390 @param Buffer The buffer to store the read data into.
391
392 **/
393 VOID
394 EFIAPI
395 IoReadFifo8 (
396 IN UINTN Port,
397 IN UINTN Count,
398 OUT VOID *Buffer
399 )
400 {
401 IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);
402 }
403
404 /**
405 Writes a block of memory into an 8-bit I/O port fifo.
406
407 Writes the 8-bit I/O fifo port specified by Port.
408 The port is written Count times, and the write data is
409 retrieved from the provided Buffer.
410
411 This function must guarantee that all I/O write and write operations are
412 serialized.
413
414 If 8-bit I/O port operations are not supported, then ASSERT().
415
416 @param Port The I/O port to write.
417 @param Count The number of times to write I/O port.
418 @param Buffer The buffer to retrieve the write data from.
419
420 **/
421 VOID
422 EFIAPI
423 IoWriteFifo8 (
424 IN UINTN Port,
425 IN UINTN Count,
426 IN VOID *Buffer
427 )
428 {
429 IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);
430 }
431
432 /**
433 Reads a 16-bit I/O port fifo into a block of memory.
434
435 Reads the 16-bit I/O fifo port specified by Port.
436 The port is read Count times, and the read data is
437 stored in the provided Buffer.
438
439 This function must guarantee that all I/O read and write operations are
440 serialized.
441
442 If 16-bit I/O port operations are not supported, then ASSERT().
443
444 @param Port The I/O port to read.
445 @param Count The number of times to read I/O port.
446 @param Buffer The buffer to store the read data into.
447
448 **/
449 VOID
450 EFIAPI
451 IoReadFifo16 (
452 IN UINTN Port,
453 IN UINTN Count,
454 OUT VOID *Buffer
455 )
456 {
457 //
458 // Make sure Port is aligned on a 16-bit boundary.
459 //
460 ASSERT ((Port & 1) == 0);
461 IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);
462 }
463
464 /**
465 Writes a block of memory into a 16-bit I/O port fifo.
466
467 Writes the 16-bit I/O fifo port specified by Port.
468 The port is written Count times, and the write data is
469 retrieved from the provided Buffer.
470
471 This function must guarantee that all I/O write and write operations are
472 serialized.
473
474 If 16-bit I/O port operations are not supported, then ASSERT().
475
476 @param Port The I/O port to write.
477 @param Count The number of times to write I/O port.
478 @param Buffer The buffer to retrieve the write data from.
479
480 **/
481 VOID
482 EFIAPI
483 IoWriteFifo16 (
484 IN UINTN Port,
485 IN UINTN Count,
486 IN VOID *Buffer
487 )
488 {
489 //
490 // Make sure Port is aligned on a 16-bit boundary.
491 //
492 ASSERT ((Port & 1) == 0);
493 IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);
494 }
495
496 /**
497 Reads a 32-bit I/O port fifo into a block of memory.
498
499 Reads the 32-bit I/O fifo port specified by Port.
500 The port is read Count times, and the read data is
501 stored in the provided Buffer.
502
503 This function must guarantee that all I/O read and write operations are
504 serialized.
505
506 If 32-bit I/O port operations are not supported, then ASSERT().
507
508 @param Port The I/O port to read.
509 @param Count The number of times to read I/O port.
510 @param Buffer The buffer to store the read data into.
511
512 **/
513 VOID
514 EFIAPI
515 IoReadFifo32 (
516 IN UINTN Port,
517 IN UINTN Count,
518 OUT VOID *Buffer
519 )
520 {
521 //
522 // Make sure Port is aligned on a 32-bit boundary.
523 //
524 ASSERT ((Port & 3) == 0);
525 IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);
526 }
527
528 /**
529 Writes a block of memory into a 32-bit I/O port fifo.
530
531 Writes the 32-bit I/O fifo port specified by Port.
532 The port is written Count times, and the write data is
533 retrieved from the provided Buffer.
534
535 This function must guarantee that all I/O write and write operations are
536 serialized.
537
538 If 32-bit I/O port operations are not supported, then ASSERT().
539
540 @param Port The I/O port to write.
541 @param Count The number of times to write I/O port.
542 @param Buffer The buffer to retrieve the write data from.
543
544 **/
545 VOID
546 EFIAPI
547 IoWriteFifo32 (
548 IN UINTN Port,
549 IN UINTN Count,
550 IN VOID *Buffer
551 )
552 {
553 //
554 // Make sure Port is aligned on a 32-bit boundary.
555 //
556 ASSERT ((Port & 3) == 0);
557 IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);
558 }
559
560 /**
561 Reads an 8-bit MMIO register.
562
563 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
564 returned. This function must guarantee that all MMIO read and write
565 operations are serialized.
566
567 If 8-bit MMIO register operations are not supported, then ASSERT().
568
569 @param Address The MMIO register to read.
570
571 @return The value read.
572
573 **/
574 UINT8
575 EFIAPI
576 MmioRead8 (
577 IN UINTN Address
578 )
579 {
580 CONST EFI_PEI_SERVICES **PeiServices;
581 EFI_PEI_CPU_IO_PPI *CpuIo;
582
583 PeiServices = GetPeiServicesTablePointer ();
584 CpuIo = (*PeiServices)->CpuIo;
585 ASSERT (CpuIo != NULL);
586
587 return CpuIo->MemRead8 (PeiServices, CpuIo, (UINT64) Address);
588 }
589
590 /**
591 Writes an 8-bit MMIO register.
592
593 Writes the 8-bit MMIO register specified by Address with the value specified
594 by Value and returns Value. This function must guarantee that all MMIO read
595 and write operations are serialized.
596
597 If 8-bit MMIO register operations are not supported, then ASSERT().
598
599 @param Address The MMIO register to write.
600 @param Value The value to write to the MMIO register.
601
602 @return Value.
603
604 **/
605 UINT8
606 EFIAPI
607 MmioWrite8 (
608 IN UINTN Address,
609 IN UINT8 Value
610 )
611 {
612 CONST EFI_PEI_SERVICES **PeiServices;
613 EFI_PEI_CPU_IO_PPI *CpuIo;
614
615 PeiServices = GetPeiServicesTablePointer ();
616 CpuIo = (*PeiServices)->CpuIo;
617 ASSERT (CpuIo != NULL);
618
619 CpuIo->MemWrite8 (PeiServices, CpuIo, (UINT64) Address, Value);
620 return Value;
621 }
622
623 /**
624 Reads a 16-bit MMIO register.
625
626 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
627 returned. This function must guarantee that all MMIO read and write
628 operations are serialized.
629
630 If 16-bit MMIO register operations are not supported, then ASSERT().
631 If Address is not aligned on a 16-bit boundary, then ASSERT().
632
633 @param Address The MMIO register to read.
634
635 @return The value read.
636
637 **/
638 UINT16
639 EFIAPI
640 MmioRead16 (
641 IN UINTN Address
642 )
643 {
644 CONST EFI_PEI_SERVICES **PeiServices;
645 EFI_PEI_CPU_IO_PPI *CpuIo;
646
647 PeiServices = GetPeiServicesTablePointer ();
648 CpuIo = (*PeiServices)->CpuIo;
649 ASSERT (CpuIo != NULL);
650 //
651 // Make sure Address is aligned on a 16-bit boundary.
652 //
653 ASSERT ((Address & 1) == 0);
654 return CpuIo->MemRead16 (PeiServices, CpuIo, (UINT64) Address);
655
656 }
657
658 /**
659 Writes a 16-bit MMIO register.
660
661 Writes the 16-bit MMIO register specified by Address with the value specified
662 by Value and returns Value. This function must guarantee that all MMIO read
663 and write operations are serialized.
664
665 If 16-bit MMIO register operations are not supported, then ASSERT().
666 If Address is not aligned on a 16-bit boundary, then ASSERT().
667
668 @param Address The MMIO register to write.
669 @param Value The value to write to the MMIO register.
670
671 @return Value.
672
673 **/
674 UINT16
675 EFIAPI
676 MmioWrite16 (
677 IN UINTN Address,
678 IN UINT16 Value
679 )
680 {
681 CONST EFI_PEI_SERVICES **PeiServices;
682 EFI_PEI_CPU_IO_PPI *CpuIo;
683
684 PeiServices = GetPeiServicesTablePointer ();
685 CpuIo = (*PeiServices)->CpuIo;
686 ASSERT (CpuIo != NULL);
687 //
688 // Make sure Address is aligned on a 16-bit boundary.
689 //
690 ASSERT ((Address & 1) == 0);
691 CpuIo->MemWrite16 (PeiServices, CpuIo, (UINT64) Address, Value);
692 return Value;
693 }
694
695 /**
696 Reads a 32-bit MMIO register.
697
698 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
699 returned. This function must guarantee that all MMIO read and write
700 operations are serialized.
701
702 If 32-bit MMIO register operations are not supported, then ASSERT().
703 If Address is not aligned on a 32-bit boundary, then ASSERT().
704
705 @param Address The MMIO register to read.
706
707 @return The value read.
708
709 **/
710 UINT32
711 EFIAPI
712 MmioRead32 (
713 IN UINTN Address
714 )
715 {
716 CONST EFI_PEI_SERVICES **PeiServices;
717 EFI_PEI_CPU_IO_PPI *CpuIo;
718
719 PeiServices = GetPeiServicesTablePointer ();
720 CpuIo = (*PeiServices)->CpuIo;
721 ASSERT (CpuIo != NULL);
722 //
723 // Make sure Address is aligned on a 32-bit boundary.
724 //
725 ASSERT ((Address & 3) == 0);
726 return CpuIo->MemRead32 (PeiServices, CpuIo, (UINT64) Address);
727
728 }
729
730 /**
731 Writes a 32-bit MMIO register.
732
733 Writes the 32-bit MMIO register specified by Address with the value specified
734 by Value and returns Value. This function must guarantee that all MMIO read
735 and write operations are serialized.
736
737 If 32-bit MMIO register operations are not supported, then ASSERT().
738 If Address is not aligned on a 32-bit boundary, then ASSERT().
739
740 @param Address The MMIO register to write.
741 @param Value The value to write to the MMIO register.
742
743 @return Value.
744
745 **/
746 UINT32
747 EFIAPI
748 MmioWrite32 (
749 IN UINTN Address,
750 IN UINT32 Value
751 )
752 {
753 CONST EFI_PEI_SERVICES **PeiServices;
754 EFI_PEI_CPU_IO_PPI *CpuIo;
755
756 PeiServices = GetPeiServicesTablePointer ();
757 CpuIo = (*PeiServices)->CpuIo;
758 ASSERT (CpuIo != NULL);
759 //
760 // Make sure Address is aligned on a 32-bit boundary.
761 //
762 ASSERT ((Address & 3) == 0);
763 CpuIo->MemWrite32 (PeiServices, CpuIo, (UINT64) Address, Value);
764 return Value;
765 }
766
767 /**
768 Reads a 64-bit MMIO register.
769
770 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
771 returned. This function must guarantee that all MMIO read and write
772 operations are serialized.
773
774 If 64-bit MMIO register operations are not supported, then ASSERT().
775 If Address is not aligned on a 64-bit boundary, then ASSERT().
776
777 @param Address The MMIO register to read.
778
779 @return The value read.
780
781 **/
782 UINT64
783 EFIAPI
784 MmioRead64 (
785 IN UINTN Address
786 )
787 {
788 CONST EFI_PEI_SERVICES **PeiServices;
789 EFI_PEI_CPU_IO_PPI *CpuIo;
790
791 PeiServices = GetPeiServicesTablePointer ();
792 CpuIo = (*PeiServices)->CpuIo;
793 ASSERT (CpuIo != NULL);
794 //
795 // Make sure Address is aligned on a 64-bit boundary.
796 //
797 ASSERT ((Address & (sizeof (UINT64) - 1)) == 0);
798 return CpuIo->MemRead64 (PeiServices, CpuIo, (UINT64) Address);
799
800 }
801
802 /**
803 Writes a 64-bit MMIO register.
804
805 Writes the 64-bit MMIO register specified by Address with the value specified
806 by Value and returns Value. This function must guarantee that all MMIO read
807 and write operations are serialized.
808
809 If 64-bit MMIO register operations are not supported, then ASSERT().
810 If Address is not aligned on a 64-bit boundary, then ASSERT().
811
812 @param Address The MMIO register to write.
813 @param Value The value to write to the MMIO register.
814
815 **/
816 UINT64
817 EFIAPI
818 MmioWrite64 (
819 IN UINTN Address,
820 IN UINT64 Value
821 )
822 {
823 CONST EFI_PEI_SERVICES **PeiServices;
824 EFI_PEI_CPU_IO_PPI *CpuIo;
825
826 PeiServices = GetPeiServicesTablePointer ();
827 CpuIo = (*PeiServices)->CpuIo;
828 ASSERT (CpuIo != NULL);
829 //
830 // Make sure Address is aligned on a 64-bit boundary.
831 //
832 ASSERT ((Address & 7) == 0);
833 CpuIo->MemWrite64 (PeiServices, CpuIo, (UINT64) Address, Value);
834 return Value;
835 }