2 PCI Segment Library implementation using PCI CFG2 PPI.
4 Copyright (c) 2007 - 2008, Intel Corporation All rights
5 reserved. This program and the accompanying materials are
6 licensed and made available under the terms and conditions of
7 the BSD License which accompanies this distribution. The full
8 text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <Ppi/PciCfg2.h>
20 #include <Library/PciSegmentLib.h>
21 #include <Library/BaseLib.h>
22 #include <Library/PeiServicesTablePointerLib.h>
23 #include <Library/DebugLib.h>
24 #include <Library/PeiServicesLib.h>
27 Assert the validity of a PCI Segment address.
28 A valid PCI Segment address should not contain 1's in bits 31:28
30 @param A The address to validate.
31 @param M Additional bits to assert to be zero.
34 #define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \
35 ASSERT (((A) & (0xf0000000 | (M))) == 0)
38 Translate PCI Lib address into format of PCI CFG2 PPI.
40 @param A Address that encodes the PCI Bus, Device, Function and
44 #define PCI_TO_PCICFG2_ADDRESS(A) \
45 ((((A) << 4) & 0xff000000) | (((A) >> 4) & 0x00000700) | (((A) << 1) & 0x001f0000) | (LShiftU64((A) & 0xfff, 32)))
50 This internal function retrieves PCI CFG2 PPI from PPI database.
52 @param Address Address that encodes the PCI Segment, Bus, Device, Function and Register.
54 @return The pointer to PCI CFG2 PPI.
57 EFI_PEI_PCI_CFG2_PPI
*
58 InternalGetPciCfg2Ppi (
64 EFI_PEI_PCI_CFG2_PPI
*PciCfg2Ppi
;
69 SegmentNumber
= BitFieldRead64 (Address
, 32, 63);
72 // Loop through all instances of the PPI and match segment number
75 Status
= PeiServicesLocatePpi(
81 ASSERT_EFI_ERROR (Status
);
83 } while (PciCfg2Ppi
->Segment
!= SegmentNumber
);
89 Internal worker function to read a PCI configuration register.
91 This function wraps EFI_PEI_PCI_CFG2_PPI.Read() service.
92 It reads and returns the PCI configuration register specified by Address,
93 the width of data is specified by Width.
95 @param Address Address that encodes the PCI Bus, Device, Function and
97 @param Width Width of data to read
99 @return The value read from the PCI configuration register.
103 PeiPciSegmentLibPciCfg2ReadWorker (
105 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width
109 CONST EFI_PEI_PCI_CFG2_PPI
*PciCfg2Ppi
;
110 UINT64 PciCfg2Address
;
112 PciCfg2Ppi
= InternalGetPciCfg2Ppi (Address
);
113 PciCfg2Address
= PCI_TO_PCICFG2_ADDRESS (Address
);
115 GetPeiServicesTablePointer (),
126 Internal worker function to writes a PCI configuration register.
128 This function wraps EFI_PEI_PCI_CFG2_PPI.Write() service.
129 It writes the PCI configuration register specified by Address with the
130 value specified by Data. The width of data is specifed by Width.
133 @param Address Address that encodes the PCI Bus, Device, Function and
135 @param Width Width of data to write
136 @param Data The value to write.
138 @return The value written to the PCI configuration register.
142 PeiPciSegmentLibPciCfg2WriteWorker (
144 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width
,
148 CONST EFI_PEI_PCI_CFG2_PPI
*PciCfg2Ppi
;
149 UINT64 PciCfg2Address
;
151 PciCfg2Ppi
= InternalGetPciCfg2Ppi (Address
);
152 PciCfg2Address
= PCI_TO_PCICFG2_ADDRESS (Address
);
154 GetPeiServicesTablePointer (),
165 Register a PCI device so PCI configuration registers may be accessed after
166 SetVirtualAddressMap().
168 If Address > 0x0FFFFFFF, then ASSERT().
170 @param Address Address that encodes the PCI Bus, Device, Function and
173 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
174 @retval RETURN_UNSUPPORTED An attempt was made to call this function
175 after ExitBootServices().
176 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
177 at runtime could not be mapped.
178 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
179 complete the registration.
184 PciSegmentRegisterForRuntimeAccess (
188 return RETURN_UNSUPPORTED
;
192 Reads an 8-bit PCI configuration register.
194 Reads and returns the 8-bit PCI configuration register specified by Address.
195 This function must guarantee that all PCI read and write operations are serialized.
197 If any reserved bits in Address are set, then ASSERT().
199 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
201 @return The 8-bit PCI configuration register specified by Address.
210 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 0);
212 return (UINT8
) PeiPciSegmentLibPciCfg2ReadWorker (Address
, EfiPeiPciCfgWidthUint8
);
216 Writes an 8-bit PCI configuration register.
218 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
219 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
221 If Address > 0x0FFFFFFF, then ASSERT().
223 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
224 @param Value The value to write.
226 @return The value written to the PCI configuration register.
236 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 0);
238 return (UINT8
) PeiPciSegmentLibPciCfg2WriteWorker (Address
, EfiPeiPciCfgWidthUint8
, Value
);
242 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.
244 Reads the 8-bit PCI configuration register specified by Address,
245 performs a bitwise OR between the read result and the value specified by OrData,
246 and writes the result to the 8-bit PCI configuration register specified by Address.
247 The value written to the PCI configuration register is returned.
248 This function must guarantee that all PCI read and write operations are serialized.
250 If any reserved bits in Address are set, then ASSERT().
252 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
253 @param OrData The value to OR with the PCI configuration register.
255 @return The value written to the PCI configuration register.
265 return PciSegmentWrite8 (Address
, (UINT8
) (PciSegmentRead8 (Address
) | OrData
));
269 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.
271 Reads the 8-bit PCI configuration register specified by Address,
272 performs a bitwise AND between the read result and the value specified by AndData,
273 and writes the result to the 8-bit PCI configuration register specified by Address.
274 The value written to the PCI configuration register is returned.
275 This function must guarantee that all PCI read and write operations are serialized.
276 If any reserved bits in Address are set, then ASSERT().
278 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
279 @param AndData The value to AND with the PCI configuration register.
281 @return The value written to the PCI configuration register.
291 return PciSegmentWrite8 (Address
, (UINT8
) (PciSegmentRead8 (Address
) & AndData
));
295 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
296 followed a bitwise OR with another 8-bit value.
298 Reads the 8-bit PCI configuration register specified by Address,
299 performs a bitwise AND between the read result and the value specified by AndData,
300 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
301 and writes the result to the 8-bit PCI configuration register specified by Address.
302 The value written to the PCI configuration register is returned.
303 This function must guarantee that all PCI read and write operations are serialized.
305 If any reserved bits in Address are set, then ASSERT().
307 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
308 @param AndData The value to AND with the PCI configuration register.
309 @param OrData The value to OR with the PCI configuration register.
311 @return The value written to the PCI configuration register.
316 PciSegmentAndThenOr8 (
322 return PciSegmentWrite8 (Address
, (UINT8
) ((PciSegmentRead8 (Address
) & AndData
) | OrData
));
326 Reads a bit field of a PCI configuration register.
328 Reads the bit field in an 8-bit PCI configuration register. The bit field is
329 specified by the StartBit and the EndBit. The value of the bit field is
332 If any reserved bits in Address are set, then ASSERT().
333 If StartBit is greater than 7, then ASSERT().
334 If EndBit is greater than 7, then ASSERT().
335 If EndBit is less than StartBit, then ASSERT().
337 @param Address PCI configuration register to read.
338 @param StartBit The ordinal of the least significant bit in the bit field.
340 @param EndBit The ordinal of the most significant bit in the bit field.
343 @return The value of the bit field read from the PCI configuration register.
348 PciSegmentBitFieldRead8 (
354 return BitFieldRead8 (PciSegmentRead8 (Address
), StartBit
, EndBit
);
358 Writes a bit field to a PCI configuration register.
360 Writes Value to the bit field of the PCI configuration register. The bit
361 field is specified by the StartBit and the EndBit. All other bits in the
362 destination PCI configuration register are preserved. The new value of the
363 8-bit register is returned.
365 If any reserved bits in Address are set, then ASSERT().
366 If StartBit is greater than 7, then ASSERT().
367 If EndBit is greater than 7, then ASSERT().
368 If EndBit is less than StartBit, then ASSERT().
370 @param Address PCI configuration register to write.
371 @param StartBit The ordinal of the least significant bit in the bit field.
373 @param EndBit The ordinal of the most significant bit in the bit field.
375 @param Value New value of the bit field.
377 @return The value written back to the PCI configuration register.
382 PciSegmentBitFieldWrite8 (
389 return PciSegmentWrite8 (
391 BitFieldWrite8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, Value
)
396 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
397 writes the result back to the bit field in the 8-bit port.
399 Reads the 8-bit PCI configuration register specified by Address, performs a
400 bitwise OR between the read result and the value specified by
401 OrData, and writes the result to the 8-bit PCI configuration register
402 specified by Address. The value written to the PCI configuration register is
403 returned. This function must guarantee that all PCI read and write operations
404 are serialized. Extra left bits in OrData are stripped.
406 If any reserved bits in Address are set, then ASSERT().
407 If StartBit is greater than 7, then ASSERT().
408 If EndBit is greater than 7, then ASSERT().
409 If EndBit is less than StartBit, then ASSERT().
411 @param Address PCI configuration register to write.
412 @param StartBit The ordinal of the least significant bit in the bit field.
414 @param EndBit The ordinal of the most significant bit in the bit field.
416 @param OrData The value to OR with the PCI configuration register.
418 @return The value written back to the PCI configuration register.
423 PciSegmentBitFieldOr8 (
430 return PciSegmentWrite8 (
432 BitFieldOr8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, OrData
)
437 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
438 AND, and writes the result back to the bit field in the 8-bit register.
440 Reads the 8-bit PCI configuration register specified by Address, performs a
441 bitwise AND between the read result and the value specified by AndData, and
442 writes the result to the 8-bit PCI configuration register specified by
443 Address. The value written to the PCI configuration register is returned.
444 This function must guarantee that all PCI read and write operations are
445 serialized. Extra left bits in AndData are stripped.
447 If any reserved bits in Address are set, then ASSERT().
448 If StartBit is greater than 7, then ASSERT().
449 If EndBit is greater than 7, then ASSERT().
450 If EndBit is less than StartBit, then ASSERT().
452 @param Address PCI configuration register to write.
453 @param StartBit The ordinal of the least significant bit in the bit field.
455 @param EndBit The ordinal of the most significant bit in the bit field.
457 @param AndData The value to AND with the PCI configuration register.
459 @return The value written back to the PCI configuration register.
464 PciSegmentBitFieldAnd8 (
471 return PciSegmentWrite8 (
473 BitFieldAnd8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, AndData
)
478 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
479 bitwise OR, and writes the result back to the bit field in the
482 Reads the 8-bit PCI configuration register specified by Address, performs a
483 bitwise AND followed by a bitwise OR between the read result and
484 the value specified by AndData, and writes the result to the 8-bit PCI
485 configuration register specified by Address. The value written to the PCI
486 configuration register is returned. This function must guarantee that all PCI
487 read and write operations are serialized. Extra left bits in both AndData and
490 If any reserved bits in Address are set, then ASSERT().
491 If StartBit is greater than 7, then ASSERT().
492 If EndBit is greater than 7, then ASSERT().
493 If EndBit is less than StartBit, then ASSERT().
495 @param Address PCI configuration register to write.
496 @param StartBit The ordinal of the least significant bit in the bit field.
498 @param EndBit The ordinal of the most significant bit in the bit field.
500 @param AndData The value to AND with the PCI configuration register.
501 @param OrData The value to OR with the result of the AND operation.
503 @return The value written back to the PCI configuration register.
508 PciSegmentBitFieldAndThenOr8 (
516 return PciSegmentWrite8 (
518 BitFieldAndThenOr8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, AndData
, OrData
)
523 Reads a 16-bit PCI configuration register.
525 Reads and returns the 16-bit PCI configuration register specified by Address.
526 This function must guarantee that all PCI read and write operations are serialized.
528 If any reserved bits in Address are set, then ASSERT().
529 If Address is not aligned on a 16-bit boundary, then ASSERT().
531 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
533 @return The 16-bit PCI configuration register specified by Address.
542 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 1);
544 return (UINT16
) PeiPciSegmentLibPciCfg2ReadWorker (Address
, EfiPeiPciCfgWidthUint16
);
548 Writes a 16-bit PCI configuration register.
550 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
551 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
553 If any reserved bits in Address are set, then ASSERT().
554 If Address is not aligned on a 16-bit boundary, then ASSERT().
556 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
557 @param Value The value to write.
559 @return The parameter of Value.
569 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 1);
571 return (UINT16
) PeiPciSegmentLibPciCfg2WriteWorker (Address
, EfiPeiPciCfgWidthUint16
, Value
);
575 Performs a bitwise OR of a 16-bit PCI configuration register with
578 Reads the 16-bit PCI configuration register specified by Address, performs a
579 bitwise OR between the read result and the value specified by
580 OrData, and writes the result to the 16-bit PCI configuration register
581 specified by Address. The value written to the PCI configuration register is
582 returned. This function must guarantee that all PCI read and write operations
585 If any reserved bits in Address are set, then ASSERT().
586 If Address is not aligned on a 16-bit boundary, then ASSERT().
588 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
590 @param OrData The value to OR with the PCI configuration register.
592 @return The value written back to the PCI configuration register.
602 return PciSegmentWrite16 (Address
, (UINT16
) (PciSegmentRead16 (Address
) | OrData
));
606 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.
608 Reads the 16-bit PCI configuration register specified by Address,
609 performs a bitwise AND between the read result and the value specified by AndData,
610 and writes the result to the 16-bit PCI configuration register specified by Address.
611 The value written to the PCI configuration register is returned.
612 This function must guarantee that all PCI read and write operations are serialized.
614 If any reserved bits in Address are set, then ASSERT().
615 If Address is not aligned on a 16-bit boundary, then ASSERT().
617 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
618 @param AndData The value to AND with the PCI configuration register.
620 @return The value written to the PCI configuration register.
630 return PciSegmentWrite16 (Address
, (UINT16
) (PciSegmentRead16 (Address
) & AndData
));
634 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
635 followed a bitwise OR with another 16-bit value.
637 Reads the 16-bit PCI configuration register specified by Address,
638 performs a bitwise AND between the read result and the value specified by AndData,
639 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
640 and writes the result to the 16-bit PCI configuration register specified by Address.
641 The value written to the PCI configuration register is returned.
642 This function must guarantee that all PCI read and write operations are serialized.
644 If any reserved bits in Address are set, then ASSERT().
645 If Address is not aligned on a 16-bit boundary, then ASSERT().
647 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
648 @param AndData The value to AND with the PCI configuration register.
649 @param OrData The value to OR with the PCI configuration register.
651 @return The value written to the PCI configuration register.
656 PciSegmentAndThenOr16 (
662 return PciSegmentWrite16 (Address
, (UINT16
) ((PciSegmentRead16 (Address
) & AndData
) | OrData
));
666 Reads a bit field of a PCI configuration register.
668 Reads the bit field in a 16-bit PCI configuration register. The bit field is
669 specified by the StartBit and the EndBit. The value of the bit field is
672 If any reserved bits in Address are set, then ASSERT().
673 If Address is not aligned on a 16-bit boundary, then ASSERT().
674 If StartBit is greater than 15, then ASSERT().
675 If EndBit is greater than 15, then ASSERT().
676 If EndBit is less than StartBit, then ASSERT().
678 @param Address PCI configuration register to read.
679 @param StartBit The ordinal of the least significant bit in the bit field.
681 @param EndBit The ordinal of the most significant bit in the bit field.
684 @return The value of the bit field read from the PCI configuration register.
689 PciSegmentBitFieldRead16 (
695 return BitFieldRead16 (PciSegmentRead16 (Address
), StartBit
, EndBit
);
699 Writes a bit field to a PCI configuration register.
701 Writes Value to the bit field of the PCI configuration register. The bit
702 field is specified by the StartBit and the EndBit. All other bits in the
703 destination PCI configuration register are preserved. The new value of the
704 16-bit register is returned.
706 If any reserved bits in Address are set, then ASSERT().
707 If Address is not aligned on a 16-bit boundary, then ASSERT().
708 If StartBit is greater than 15, then ASSERT().
709 If EndBit is greater than 15, then ASSERT().
710 If EndBit is less than StartBit, then ASSERT().
712 @param Address PCI configuration register to write.
713 @param StartBit The ordinal of the least significant bit in the bit field.
715 @param EndBit The ordinal of the most significant bit in the bit field.
717 @param Value New value of the bit field.
719 @return The value written back to the PCI configuration register.
724 PciSegmentBitFieldWrite16 (
731 return PciSegmentWrite16 (
733 BitFieldWrite16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, Value
)
738 Reads the 16-bit PCI configuration register specified by Address,
739 performs a bitwise OR between the read result and the value specified by OrData,
740 and writes the result to the 16-bit PCI configuration register specified by Address.
742 If any reserved bits in Address are set, then ASSERT().
743 If Address is not aligned on a 16-bit boundary, then ASSERT().
744 If StartBit is greater than 15, then ASSERT().
745 If EndBit is greater than 15, then ASSERT().
746 If EndBit is less than StartBit, then ASSERT().
748 @param Address PCI configuration register to write.
749 @param StartBit The ordinal of the least significant bit in the bit field.
751 @param EndBit The ordinal of the most significant bit in the bit field.
753 @param OrData The value to OR with the PCI configuration register.
755 @return The value written back to the PCI configuration register.
760 PciSegmentBitFieldOr16 (
767 return PciSegmentWrite16 (
769 BitFieldOr16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, OrData
)
774 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
775 AND, and writes the result back to the bit field in the 16-bit register.
777 Reads the 16-bit PCI configuration register specified by Address, performs a
778 bitwise AND between the read result and the value specified by AndData, and
779 writes the result to the 16-bit PCI configuration register specified by
780 Address. The value written to the PCI configuration register is returned.
781 This function must guarantee that all PCI read and write operations are
782 serialized. Extra left bits in AndData are stripped.
784 If any reserved bits in Address are set, then ASSERT().
785 If StartBit is greater than 15, then ASSERT().
786 If EndBit is greater than 15, then ASSERT().
787 If EndBit is less than StartBit, then ASSERT().
789 @param Address PCI configuration register to write.
790 @param StartBit The ordinal of the least significant bit in the bit field.
792 @param EndBit The ordinal of the most significant bit in the bit field.
794 @param AndData The value to AND with the PCI configuration register.
796 @return The value written back to the PCI configuration register.
801 PciSegmentBitFieldAnd16 (
808 return PciSegmentWrite16 (
810 BitFieldAnd16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, AndData
)
815 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
816 bitwise OR, and writes the result back to the bit field in the
819 Reads the 16-bit PCI configuration register specified by Address, performs a
820 bitwise AND followed by a bitwise OR between the read result and
821 the value specified by AndData, and writes the result to the 16-bit PCI
822 configuration register specified by Address. The value written to the PCI
823 configuration register is returned. This function must guarantee that all PCI
824 read and write operations are serialized. Extra left bits in both AndData and
827 If any reserved bits in Address are set, then ASSERT().
828 If StartBit is greater than 15, then ASSERT().
829 If EndBit is greater than 15, then ASSERT().
830 If EndBit is less than StartBit, then ASSERT().
832 @param Address PCI configuration register to write.
833 @param StartBit The ordinal of the least significant bit in the bit field.
835 @param EndBit The ordinal of the most significant bit in the bit field.
837 @param AndData The value to AND with the PCI configuration register.
838 @param OrData The value to OR with the result of the AND operation.
840 @return The value written back to the PCI configuration register.
845 PciSegmentBitFieldAndThenOr16 (
853 return PciSegmentWrite16 (
855 BitFieldAndThenOr16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, AndData
, OrData
)
860 Reads a 32-bit PCI configuration register.
862 Reads and returns the 32-bit PCI configuration register specified by Address.
863 This function must guarantee that all PCI read and write operations are serialized.
865 If any reserved bits in Address are set, then ASSERT().
866 If Address is not aligned on a 32-bit boundary, then ASSERT().
868 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
870 @return The 32-bit PCI configuration register specified by Address.
879 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 3);
881 return PeiPciSegmentLibPciCfg2ReadWorker (Address
, EfiPeiPciCfgWidthUint32
);
885 Writes a 32-bit PCI configuration register.
887 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
888 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
890 If any reserved bits in Address are set, then ASSERT().
891 If Address is not aligned on a 32-bit boundary, then ASSERT().
893 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
894 @param Value The value to write.
896 @return The parameter of Value.
906 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 3);
908 return PeiPciSegmentLibPciCfg2WriteWorker (Address
, EfiPeiPciCfgWidthUint32
, Value
);
912 Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.
914 Reads the 32-bit PCI configuration register specified by Address,
915 performs a bitwise OR between the read result and the value specified by OrData,
916 and writes the result to the 32-bit PCI configuration register specified by Address.
917 The value written to the PCI configuration register is returned.
918 This function must guarantee that all PCI read and write operations are serialized.
920 If any reserved bits in Address are set, then ASSERT().
921 If Address is not aligned on a 32-bit boundary, then ASSERT().
923 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
924 @param OrData The value to OR with the PCI configuration register.
926 @return The value written to the PCI configuration register.
936 return PciSegmentWrite32 (Address
, PciSegmentRead32 (Address
) | OrData
);
940 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.
942 Reads the 32-bit PCI configuration register specified by Address,
943 performs a bitwise AND between the read result and the value specified by AndData,
944 and writes the result to the 32-bit PCI configuration register specified by Address.
945 The value written to the PCI configuration register is returned.
946 This function must guarantee that all PCI read and write operations are serialized.
948 If any reserved bits in Address are set, then ASSERT().
949 If Address is not aligned on a 32-bit boundary, then ASSERT().
951 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
952 @param AndData The value to AND with the PCI configuration register.
954 @return The value written to the PCI configuration register.
964 return PciSegmentWrite32 (Address
, PciSegmentRead32 (Address
) & AndData
);
968 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
969 followed a bitwise OR with another 32-bit value.
971 Reads the 32-bit PCI configuration register specified by Address,
972 performs a bitwise AND between the read result and the value specified by AndData,
973 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
974 and writes the result to the 32-bit PCI configuration register specified by Address.
975 The value written to the PCI configuration register is returned.
976 This function must guarantee that all PCI read and write operations are serialized.
978 If any reserved bits in Address are set, then ASSERT().
979 If Address is not aligned on a 32-bit boundary, then ASSERT().
981 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
982 @param AndData The value to AND with the PCI configuration register.
983 @param OrData The value to OR with the PCI configuration register.
985 @return The value written to the PCI configuration register.
990 PciSegmentAndThenOr32 (
996 return PciSegmentWrite32 (Address
, (PciSegmentRead32 (Address
) & AndData
) | OrData
);
1000 Reads a bit field of a PCI configuration register.
1002 Reads the bit field in a 32-bit PCI configuration register. The bit field is
1003 specified by the StartBit and the EndBit. The value of the bit field is
1006 If any reserved bits in Address are set, then ASSERT().
1007 If Address is not aligned on a 32-bit boundary, then ASSERT().
1008 If StartBit is greater than 31, then ASSERT().
1009 If EndBit is greater than 31, then ASSERT().
1010 If EndBit is less than StartBit, then ASSERT().
1012 @param Address PCI configuration register to read.
1013 @param StartBit The ordinal of the least significant bit in the bit field.
1015 @param EndBit The ordinal of the most significant bit in the bit field.
1018 @return The value of the bit field read from the PCI configuration register.
1023 PciSegmentBitFieldRead32 (
1029 return BitFieldRead32 (PciSegmentRead32 (Address
), StartBit
, EndBit
);
1033 Writes a bit field to a PCI configuration register.
1035 Writes Value to the bit field of the PCI configuration register. The bit
1036 field is specified by the StartBit and the EndBit. All other bits in the
1037 destination PCI configuration register are preserved. The new value of the
1038 32-bit register is returned.
1040 If any reserved bits in Address are set, then ASSERT().
1041 If Address is not aligned on a 32-bit boundary, then ASSERT().
1042 If StartBit is greater than 31, then ASSERT().
1043 If EndBit is greater than 31, then ASSERT().
1044 If EndBit is less than StartBit, then ASSERT().
1046 @param Address PCI configuration register to write.
1047 @param StartBit The ordinal of the least significant bit in the bit field.
1049 @param EndBit The ordinal of the most significant bit in the bit field.
1051 @param Value New value of the bit field.
1053 @return The value written back to the PCI configuration register.
1058 PciSegmentBitFieldWrite32 (
1065 return PciSegmentWrite32 (
1067 BitFieldWrite32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, Value
)
1072 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
1073 writes the result back to the bit field in the 32-bit port.
1075 Reads the 32-bit PCI configuration register specified by Address, performs a
1076 bitwise OR between the read result and the value specified by
1077 OrData, and writes the result to the 32-bit PCI configuration register
1078 specified by Address. The value written to the PCI configuration register is
1079 returned. This function must guarantee that all PCI read and write operations
1080 are serialized. Extra left bits in OrData are stripped.
1082 If any reserved bits in Address are set, then ASSERT().
1083 If StartBit is greater than 31, then ASSERT().
1084 If EndBit is greater than 31, then ASSERT().
1085 If EndBit is less than StartBit, then ASSERT().
1087 @param Address PCI configuration register to write.
1088 @param StartBit The ordinal of the least significant bit in the bit field.
1090 @param EndBit The ordinal of the most significant bit in the bit field.
1092 @param OrData The value to OR with the PCI configuration register.
1094 @return The value written back to the PCI configuration register.
1099 PciSegmentBitFieldOr32 (
1106 return PciSegmentWrite32 (
1108 BitFieldOr32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, OrData
)
1113 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
1114 AND, and writes the result back to the bit field in the 32-bit register.
1116 Reads the 32-bit PCI configuration register specified by Address, performs a
1117 bitwise AND between the read result and the value specified by AndData, and
1118 writes the result to the 32-bit PCI configuration register specified by
1119 Address. The value written to the PCI configuration register is returned.
1120 This function must guarantee that all PCI read and write operations are
1121 serialized. Extra left bits in AndData are stripped.
1123 If any reserved bits in Address are set, then ASSERT().
1124 If StartBit is greater than 31, then ASSERT().
1125 If EndBit is greater than 31, then ASSERT().
1126 If EndBit is less than StartBit, then ASSERT().
1128 @param Address PCI configuration register to write.
1129 @param StartBit The ordinal of the least significant bit in the bit field.
1131 @param EndBit The ordinal of the most significant bit in the bit field.
1133 @param AndData The value to AND with the PCI configuration register.
1135 @return The value written back to the PCI configuration register.
1140 PciSegmentBitFieldAnd32 (
1147 return PciSegmentWrite32 (
1149 BitFieldAnd32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, AndData
)
1154 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1155 bitwise OR, and writes the result back to the bit field in the
1158 Reads the 32-bit PCI configuration register specified by Address, performs a
1159 bitwise AND followed by a bitwise OR between the read result and
1160 the value specified by AndData, and writes the result to the 32-bit PCI
1161 configuration register specified by Address. The value written to the PCI
1162 configuration register is returned. This function must guarantee that all PCI
1163 read and write operations are serialized. Extra left bits in both AndData and
1164 OrData are stripped.
1166 If any reserved bits in Address are set, then ASSERT().
1167 If StartBit is greater than 31, then ASSERT().
1168 If EndBit is greater than 31, then ASSERT().
1169 If EndBit is less than StartBit, then ASSERT().
1171 @param Address PCI configuration register to write.
1172 @param StartBit The ordinal of the least significant bit in the bit field.
1174 @param EndBit The ordinal of the most significant bit in the bit field.
1176 @param AndData The value to AND with the PCI configuration register.
1177 @param OrData The value to OR with the result of the AND operation.
1179 @return The value written back to the PCI configuration register.
1184 PciSegmentBitFieldAndThenOr32 (
1192 return PciSegmentWrite32 (
1194 BitFieldAndThenOr32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, AndData
, OrData
)
1199 Reads a range of PCI configuration registers into a caller supplied buffer.
1201 Reads the range of PCI configuration registers specified by StartAddress
1202 and Size into the buffer specified by Buffer.
1203 This function only allows the PCI configuration registers from a single PCI function to be read.
1206 If any reserved bits in StartAddress are set, then ASSERT().
1207 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1208 If Size > 0 and Buffer is NULL, then ASSERT().
1210 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.
1211 @param Size Size in bytes of the transfer.
1212 @param Buffer Pointer to a buffer receiving the data read.
1214 @return The parameter of Size.
1219 PciSegmentReadBuffer (
1220 IN UINT64 StartAddress
,
1227 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress
, 0);
1228 ASSERT (((StartAddress
& 0xFFF) + Size
) <= 0x1000);
1234 ASSERT (Buffer
!= NULL
);
1237 // Save Size for return
1241 if ((StartAddress
& BIT0
) != 0) {
1243 // Read a byte if StartAddress is byte aligned
1245 *(volatile UINT8
*)Buffer
= PciSegmentRead8 (StartAddress
);
1246 StartAddress
+= sizeof (UINT8
);
1247 Size
-= sizeof (UINT8
);
1248 Buffer
= (UINT8
*)Buffer
+ 1;
1251 if (Size
>= sizeof (UINT16
) && (StartAddress
& BIT1
) != 0) {
1253 // Read a word if StartAddress is word aligned
1255 *(volatile UINT16
*)Buffer
= PciSegmentRead16 (StartAddress
);
1256 StartAddress
+= sizeof (UINT16
);
1257 Size
-= sizeof (UINT16
);
1258 Buffer
= (UINT16
*)Buffer
+ 1;
1261 while (Size
>= sizeof (UINT32
)) {
1263 // Read as many double words as possible
1265 *(volatile UINT32
*)Buffer
= PciSegmentRead32 (StartAddress
);
1266 StartAddress
+= sizeof (UINT32
);
1267 Size
-= sizeof (UINT32
);
1268 Buffer
= (UINT32
*)Buffer
+ 1;
1271 if (Size
>= sizeof (UINT16
)) {
1273 // Read the last remaining word if exist
1275 *(volatile UINT16
*)Buffer
= PciSegmentRead16 (StartAddress
);
1276 StartAddress
+= sizeof (UINT16
);
1277 Size
-= sizeof (UINT16
);
1278 Buffer
= (UINT16
*)Buffer
+ 1;
1281 if (Size
>= sizeof (UINT8
)) {
1283 // Read the last remaining byte if exist
1285 *(volatile UINT8
*)Buffer
= PciSegmentRead8 (StartAddress
);
1293 Copies the data in a caller supplied buffer to a specified range of PCI configuration space.
1295 Writes the range of PCI configuration registers specified by StartAddress
1296 and Size from the buffer specified by Buffer.
1297 This function only allows the PCI configuration registers from a single PCI function to be written.
1300 If any reserved bits in StartAddress are set, then ASSERT().
1301 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1302 If Size > 0 and Buffer is NULL, then ASSERT().
1304 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.
1305 @param Size Size in bytes of the transfer.
1306 @param Buffer Pointer to a buffer containing the data to write.
1308 @return The parameter of Size.
1313 PciSegmentWriteBuffer (
1314 IN UINT64 StartAddress
,
1321 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress
, 0);
1322 ASSERT (((StartAddress
& 0xFFF) + Size
) <= 0x1000);
1328 ASSERT (Buffer
!= NULL
);
1331 // Save Size for return
1335 if ((StartAddress
& BIT0
) != 0) {
1337 // Write a byte if StartAddress is byte aligned
1339 PciSegmentWrite8 (StartAddress
, *(UINT8
*)Buffer
);
1340 StartAddress
+= sizeof (UINT8
);
1341 Size
-= sizeof (UINT8
);
1342 Buffer
= (UINT8
*)Buffer
+ 1;
1345 if (Size
>= sizeof (UINT16
) && (StartAddress
& BIT1
) != 0) {
1347 // Write a word if StartAddress is word aligned
1349 PciSegmentWrite16 (StartAddress
, *(UINT16
*)Buffer
);
1350 StartAddress
+= sizeof (UINT16
);
1351 Size
-= sizeof (UINT16
);
1352 Buffer
= (UINT16
*)Buffer
+ 1;
1355 while (Size
>= sizeof (UINT32
)) {
1357 // Write as many double words as possible
1359 PciSegmentWrite32 (StartAddress
, *(UINT32
*)Buffer
);
1360 StartAddress
+= sizeof (UINT32
);
1361 Size
-= sizeof (UINT32
);
1362 Buffer
= (UINT32
*)Buffer
+ 1;
1365 if (Size
>= sizeof (UINT16
)) {
1367 // Write the last remaining word if exist
1369 PciSegmentWrite16 (StartAddress
, *(UINT16
*)Buffer
);
1370 StartAddress
+= sizeof (UINT16
);
1371 Size
-= sizeof (UINT16
);
1372 Buffer
= (UINT16
*)Buffer
+ 1;
1375 if (Size
>= sizeof (UINT8
)) {
1377 // Write the last remaining byte if exist
1379 PciSegmentWrite8 (StartAddress
, *(UINT8
*)Buffer
);