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1 /** @file
2 This file declares PciCfg PPI used to access PCI configuration space in PEI
3
4 Copyright (c) 2006, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 Module Name: PciCfg.h
14
15 @par Revision Reference:
16 This PPI is defined in PEI CIS
17 Version 0.91.
18
19 **/
20
21 #ifndef __PEI_PCI_CFG_H__
22 #define __PEI_PCI_CFG_H__
23
24 #define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \
25 { \
26 0xe1f2eba0, 0xf7b9, 0x4a26, {0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } \
27 }
28
29 typedef struct _EFI_PEI_PCI_CFG_PPI EFI_PEI_PCI_CFG_PPI;
30
31 #define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) ( \
32 (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \
33 ) & 0x00000000ffffffff
34
35 typedef enum {
36 EfiPeiPciCfgWidthUint8 = 0,
37 EfiPeiPciCfgWidthUint16 = 1,
38 EfiPeiPciCfgWidthUint32 = 2,
39 EfiPeiPciCfgWidthUint64 = 3,
40 EfiPeiPciCfgWidthMaximum
41 } EFI_PEI_PCI_CFG_PPI_WIDTH;
42
43 typedef struct {
44 UINT8 Register;
45 UINT8 Function;
46 UINT8 Device;
47 UINT8 Bus;
48 UINT8 Reserved[4];
49 } EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS;
50
51 /**
52 PCI read and write operation.
53
54 @param PeiServices An indirect pointer to the PEI Services Table
55 published by the PEI Foundation.
56 @param This Pointer to local data for the interface.
57 @param Width The width of the access. Enumerated in bytes.
58 @param Address The physical address of the access.
59 @param Buffer A pointer to the buffer of data.
60
61 @retval EFI_SUCCESS The function completed successfully.
62 @retval EFI_NOT_YET_AVAILABLE The service has not been installed.
63
64 **/
65 typedef
66 EFI_STATUS
67 (EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (
68 IN EFI_PEI_SERVICES **PeiServices,
69 IN EFI_PEI_PCI_CFG_PPI *This,
70 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
71 IN UINT64 Address,
72 IN OUT VOID *Buffer
73 );
74
75 /**
76 PCI read-modify-write operation.
77
78 @param PeiServices An indirect pointer to the PEI Services Table
79 published by the PEI Foundation.
80 @param This Pointer to local data for the interface.
81 @param Width The width of the access. Enumerated in bytes.
82 @param Address The physical address of the access.
83 @param SetBits Value of the bits to set.
84 @param ClearBits Value of the bits to clear.
85
86 @retval EFI_SUCCESS The function completed successfully.
87
88 **/
89 typedef
90 EFI_STATUS
91 (EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (
92 IN EFI_PEI_SERVICES **PeiServices,
93 IN EFI_PEI_PCI_CFG_PPI *This,
94 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
95 IN UINT64 Address,
96 IN UINTN SetBits,
97 IN UINTN ClearBits
98 );
99
100 /**
101 @par Ppi Description:
102 The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
103 controllers behind a PCI root bridge controller.
104
105 @param Read
106 PCI read services. See the Read() function description.
107
108 @param Write
109 PCI write services. See the Write() function description.
110
111 @param Modify
112 PCI read-modify-write services. See the Modify() function description.
113
114 **/
115 struct _EFI_PEI_PCI_CFG_PPI {
116 EFI_PEI_PCI_CFG_PPI_IO Read;
117 EFI_PEI_PCI_CFG_PPI_IO Write;
118 EFI_PEI_PCI_CFG_PPI_RW Modify;
119 };
120
121 extern EFI_GUID gEfiPciCfgPpiInServiceTableGuid;
122
123 #endif