Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.c

   1 /** @file
   2   OMAP35xx DMA abstractions modeled on PCI IO protocol. EnableDma()/DisableDma()
   3   are from OMAP35xx TRM.
   4
   5   Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
   6
   7   This program and the accompanying materials
   8   are licensed and made available under the terms and conditions of the BSD License
   9   which accompanies this distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #include <Base.h>
  18 #include <Library/DebugLib.h>
  19 #include <Library/OmapDmaLib.h>
  20 #include <Library/MemoryAllocationLib.h>
  21 #include <Library/UefiBootServicesTableLib.h>
  22 #include <Library/UncachedMemoryAllocationLib.h>
  23 #include <Library/IoLib.h>
  24 #include <Omap3530/Omap3530.h>
  25
  26 #include <Protocol/Cpu.h>
  27
  28 typedef struct {
  29   EFI_PHYSICAL_ADDRESS      HostAddress;
  30   EFI_PHYSICAL_ADDRESS      DeviceAddress;
  31   UINTN                     NumberOfBytes;
  32   DMA_MAP_OPERATION         Operation;
  33 } MAP_INFO_INSTANCE;
  34
  35
  36
  37 EFI_CPU_ARCH_PROTOCOL      *gCpu;
  38
  39 /**
  40   Configure OMAP DMA Channel
  41
  42   @param  Channel               DMA Channel to configure
  43   @param  Dma4                  Pointer to structure used to initialize DMA registers for the Channel
  44
  45   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
  46   @retval EFI_INVALID_PARAMETER Channel is not valid
  47   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.
  48
  49 **/
  50 EFI_STATUS
  51 EFIAPI
  52 EnableDmaChannel (
  53   IN  UINTN       Channel,
  54   IN  OMAP_DMA4   *DMA4
  55   )
  56 {
  57   UINT32  RegVal;
  58
  59
  60   if (Channel > DMA4_MAX_CHANNEL) {
  61     return EFI_INVALID_PARAMETER;
  62   }
  63
  64   /* 1) Configure the transfer parameters in the logical DMA registers */
  65   /*-------------------------------------------------------------------*/
  66
  67   /* a) Set the data type CSDP[1:0], the Read/Write Port access type
  68         CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19],
  69         write mode CSDP[17:16], source/dest packed or nonpacked CSDP[6]/CSDP[13] */
  70
  71   // Read CSDP
  72   RegVal = MmioRead32 (DMA4_CSDP (Channel));
  73
  74   // Build reg
  75   RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );
  76   RegVal = ((RegVal & ~(0x3 <<  7)) | (DMA4->ReadPortAccessType << 7));
  77   RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));
  78   RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21));
  79   RegVal = ((RegVal & ~(0x1 << 19)) | (DMA4->DestinationEndianism << 19));
  80   RegVal = ((RegVal & ~(0x3 << 16)) | (DMA4->WriteMode << 16));
  81   RegVal = ((RegVal & ~(0x1 <<  6)) | (DMA4->SourcePacked << 6));
  82   RegVal = ((RegVal & ~(0x1 << 13)) | (DMA4->DestinationPacked << 13));
  83   // Write CSDP
  84   MmioWrite32 (DMA4_CSDP (Channel), RegVal);
  85
  86   /* b) Set the number of element per frame CEN[23:0]*/
  87   MmioWrite32 (DMA4_CEN (Channel), DMA4->NumberOfElementPerFrame);
  88
  89   /* c) Set the number of frame per block CFN[15:0]*/
  90   MmioWrite32 (DMA4_CFN (Channel), DMA4->NumberOfFramePerTransferBlock);
  91
  92   /* d) Set the Source/dest start address index CSSA[31:0]/CDSA[31:0]*/
  93   MmioWrite32 (DMA4_CSSA (Channel), DMA4->SourceStartAddress);
  94   MmioWrite32 (DMA4_CDSA (Channel), DMA4->DestinationStartAddress);
  95
  96   /* e) Set the Read Port addressing mode CCR[13:12], the Write Port addressing mode CCR[15:14],
  97         read/write priority CCR[6]/CCR[26]
  98         I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to
  99         LCH CCR[20:19]= DMA4->WriteRequestNumber and CCR[4:0]=DMA4->ReadRequestNumber
 100   */
 101
 102   // Read CCR
 103   RegVal = MmioRead32 (DMA4_CCR (Channel));
 104
 105   // Build reg
 106   RegVal  = ((RegVal &  ~0x1f)            | DMA4->ReadRequestNumber);
 107   RegVal  = ((RegVal &  ~(BIT20 | BIT19)) | DMA4->WriteRequestNumber << 19);
 108   RegVal  = ((RegVal & ~(0x3 << 12)) | (DMA4->ReadPortAccessMode << 12));
 109   RegVal  = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessMode << 14));
 110   RegVal  = ((RegVal & ~(0x1 <<  6)) | (DMA4->ReadPriority << 6));
 111   RegVal  = ((RegVal & ~(0x1 << 26)) | (DMA4->WritePriority << 26));
 112
 113   // Write CCR
 114   MmioWrite32 (DMA4_CCR (Channel), RegVal);
 115
 116   /* f)- Set the source element index CSEI[15:0]*/
 117   MmioWrite32 (DMA4_CSEI (Channel), DMA4->SourceElementIndex);
 118
 119   /* - Set the source frame index CSFI[15:0]*/
 120   MmioWrite32 (DMA4_CSFI (Channel), DMA4->SourceFrameIndex);
 121
 122
 123   /* - Set the destination element index CDEI[15:0]*/
 124   MmioWrite32 (DMA4_CDEI (Channel), DMA4->DestinationElementIndex);
 125
 126   /* - Set the destination frame index CDFI[31:0]*/
 127   MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);
 128
 129   MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);
 130
 131   // Enable all the status bits since we are polling
 132   MmioWrite32 (DMA4_CICR (Channel), DMA4_CICR_ENABLE_ALL);
 133   MmioWrite32 (DMA4_CSR (Channel),  DMA4_CSR_RESET);
 134
 135   /* 2) Start the DMA transfer by Setting the enable bit CCR[7]=1 */
 136   /*--------------------------------------------------------------*/
 137   //write enable bit
 138   MmioOr32 (DMA4_CCR(Channel), DMA4_CCR_ENABLE); //Launch transfer
 139
 140   return EFI_SUCCESS;
 141 }
 142
 143 /**
 144   Turn of DMA channel configured by EnableDma().
 145
 146   @param  Channel               DMA Channel to configure
 147   @param  SuccesMask            Bits in DMA4_CSR register indicate EFI_SUCCESS
 148   @param  ErrorMask             Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR
 149
 150   @retval EFI_SUCCESS           DMA hardware disabled
 151   @retval EFI_INVALID_PARAMETER Channel is not valid
 152   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.
 153
 154 **/
 155 EFI_STATUS
 156 EFIAPI
 157 DisableDmaChannel (
 158   IN  UINTN       Channel,
 159   IN  UINT32      SuccessMask,
 160   IN  UINT32      ErrorMask
 161   )
 162 {
 163   EFI_STATUS  Status = EFI_SUCCESS;
 164   UINT32      Reg;
 165
 166
 167   if (Channel > DMA4_MAX_CHANNEL) {
 168     return EFI_INVALID_PARAMETER;
 169   }
 170
 171   do {
 172     Reg = MmioRead32 (DMA4_CSR(Channel));
 173     if ((Reg & ErrorMask) != 0) {
 174       Status = EFI_DEVICE_ERROR;
 175       DEBUG ((EFI_D_ERROR, "DMA Error (%d) %x\n", Channel, Reg));
 176       break;
 177     }
 178   } while ((Reg & SuccessMask) != SuccessMask);
 179
 180
 181   // Disable all status bits and clear them
 182   MmioWrite32 (DMA4_CICR (Channel), 0);
 183   MmioWrite32 (DMA4_CSR (Channel),  DMA4_CSR_RESET);
 184
 185   MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE));
 186   return Status;
 187 }
 188
 189
 190
 191 /**
 192   Provides the DMA controller-specific addresses needed to access system memory.
 193
 194   Operation is relative to the DMA bus master.
 195
 196   @param  Operation             Indicates if the bus master is going to read or write to system memory.
 197   @param  HostAddress           The system memory address to map to the DMA controller.
 198   @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes
 199                                 that were mapped.
 200   @param  DeviceAddress         The resulting map address for the bus master controller to use to
 201                                 access the hosts HostAddress.
 202   @param  Mapping               A resulting value to pass to Unmap().
 203
 204   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
 205   @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.
 206   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 207   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 208   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
 209
 210 **/
 211 EFI_STATUS
 212 EFIAPI
 213 DmaMap (
 214   IN     DMA_MAP_OPERATION              Operation,
 215   IN     VOID                           *HostAddress,
 216   IN OUT UINTN                          *NumberOfBytes,
 217   OUT    PHYSICAL_ADDRESS               *DeviceAddress,
 218   OUT    VOID                           **Mapping
 219   )
 220 {
 221   MAP_INFO_INSTANCE     *Map;
 222
 223   if ( HostAddress == NULL || NumberOfBytes == NULL ||
 224        DeviceAddress == NULL || Mapping == NULL ) {
 225     return EFI_INVALID_PARAMETER;
 226   }
 227
 228
 229   if (Operation >= MapOperationMaximum) {
 230     return EFI_INVALID_PARAMETER;
 231   }
 232
 233   *DeviceAddress = ConvertToPhysicalAddress (HostAddress);
 234
 235   // Remember range so we can flush on the other side
 236   Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
 237   if (Map == NULL) {
 238     return  EFI_OUT_OF_RESOURCES;
 239   }
 240
 241   *Mapping = Map;
 242
 243   Map->HostAddress   = (UINTN)HostAddress;
 244   Map->DeviceAddress = *DeviceAddress;
 245   Map->NumberOfBytes = *NumberOfBytes;
 246   Map->Operation     = Operation;
 247
 248   // EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
 249   gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
 250
 251   return EFI_SUCCESS;
 252 }
 253
 254
 255 /**
 256   Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()
 257   operation and releases any corresponding resources.
 258
 259   @param  Mapping               The mapping value returned from DmaMap*().
 260
 261   @retval EFI_SUCCESS           The range was unmapped.
 262   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
 263
 264 **/
 265 EFI_STATUS
 266 EFIAPI
 267 DmaUnmap (
 268   IN  VOID                         *Mapping
 269   )
 270 {
 271   MAP_INFO_INSTANCE *Map;
 272
 273   if (Mapping == NULL) {
 274     ASSERT (FALSE);
 275     return EFI_INVALID_PARAMETER;
 276   }
 277
 278   Map = (MAP_INFO_INSTANCE *)Mapping;
 279   if (Map->Operation == MapOperationBusMasterWrite) {
 280     //
 281     // Make sure we read buffer from uncached memory and not the cache
 282     //
 283     gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
 284   }
 285
 286   FreePool (Map);
 287
 288   return EFI_SUCCESS;
 289 }
 290
 291 /**
 292   Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.
 293   mapping.
 294
 295   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
 296                                 EfiRuntimeServicesData.
 297   @param  Pages                 The number of pages to allocate.
 298   @param  HostAddress           A pointer to store the base system memory address of the
 299                                 allocated range.
 300
 301                                 @retval EFI_SUCCESS           The requested memory pages were allocated.
 302   @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are
 303                                 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
 304   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 305   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
 306
 307 **/EFI_STATUS
 308 EFIAPI
 309 DmaAllocateBuffer (
 310   IN  EFI_MEMORY_TYPE              MemoryType,
 311   IN  UINTN                        Pages,
 312   OUT VOID                         **HostAddress
 313   )
 314 {
 315   if (HostAddress == NULL) {
 316     return EFI_INVALID_PARAMETER;
 317   }
 318
 319   //
 320   // The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
 321   //
 322   // We used uncached memory to keep coherency
 323   //
 324   if (MemoryType == EfiBootServicesData) {
 325     *HostAddress = UncachedAllocatePages (Pages);
 326   } else if (MemoryType != EfiRuntimeServicesData) {
 327     *HostAddress = UncachedAllocateRuntimePages (Pages);
 328   } else {
 329     return EFI_INVALID_PARAMETER;
 330   }
 331
 332   return EFI_SUCCESS;
 333 }
 334
 335
 336 /**
 337   Frees memory that was allocated with DmaAllocateBuffer().
 338
 339   @param  Pages                 The number of pages to free.
 340   @param  HostAddress           The base system memory address of the allocated range.
 341
 342   @retval EFI_SUCCESS           The requested memory pages were freed.
 343   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
 344                                 was not allocated with DmaAllocateBuffer().
 345
 346 **/
 347 EFI_STATUS
 348 EFIAPI
 349 DmaFreeBuffer (
 350   IN  UINTN                        Pages,
 351   IN  VOID                         *HostAddress
 352   )
 353 {
 354   if (HostAddress == NULL) {
 355      return EFI_INVALID_PARAMETER;
 356   }
 357
 358   UncachedFreePages (HostAddress, Pages);
 359   return EFI_SUCCESS;
 360 }
 361
 362
 363 EFI_STATUS
 364 EFIAPI
 365 OmapDmaLibConstructor (
 366   IN EFI_HANDLE       ImageHandle,
 367   IN EFI_SYSTEM_TABLE *SystemTable
 368   )
 369 {
 370   EFI_STATUS              Status;
 371
 372   // Get the Cpu protocol for later use
 373   Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
 374   ASSERT_EFI_ERROR(Status);
 375
 376   return EFI_SUCCESS;
 377 }
 378